[PATCH] ARM: cache: flush to LoUU instead of LoUIS on uniprocessor CPUs

Will Deacon will.deacon at arm.com
Tue Dec 18 05:07:39 EST 2012


On Mon, Dec 17, 2012 at 08:19:51PM +0000, Nicolas Pitre wrote:
> On Mon, 17 Dec 2012, Will Deacon wrote:
> 
> > flush_cache_louis flushes the D-side caches to the point of unification
> > inner-shareable. On uniprocessor CPUs, this is defined as zero and
> > therefore no flushing will take place. Rather than invent a new interface
> > for UP systems, instead use our SMP_ON_UP patching code to read the
> > LoUU from the CLIDR instead.
> > 
> > Cc: Lorenzo Pieralisi <Lorenzo.Pieralisi at arm.com>
> > Tested-by: Guennadi Liakhovetski <g.liakhovetski at gmx.de>
> > Signed-off-by: Will Deacon <will.deacon at arm.com>
> 
> This should be a candidate for the stable tree.

Yup, the same also goes for the other fix I posted yesterday (RealView EB).

Cheers,

Will



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