[PATCH 19/33] ARM i.MX: prepare for common clock framework

[Sascha Hauer]

On Fri, Apr 27, 2012 at 03:55:41PM +0800, Shawn Guo wrote:
> On Fri, Apr 27, 2012 at 09:16:22AM +0200, Sascha Hauer wrote:
> > On Fri, Apr 27, 2012 at 02:40:09PM +0800, Shawn Guo wrote:
> > > On Wed, Apr 25, 2012 at 05:28:09PM +0200, Sascha Hauer wrote:
> > > > - Add necessary #ifdefs for CONFIG_COMMON_CLOCK
> > > > - Add a global spinlock to protect the CCM registers
> > > > 
> > > > Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
> > > > ---
> > > > +
> > > > +static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg,
> > > > +		u8 shift, u8 width, const char **parents, int num_parents)
> > > > +{
> > > > +	return clk_register_mux(NULL, name, parents, num_parents, 0, reg, shift,
> > > 
> > > I think the fourth parameter should be CLK_SET_RATE_PARENT too, as mux
> > > could also likely be in a clk_set_rate propagation path, saying it has
> > > a parent clk who has .round_rate and .set_rate operations.
> > 
> > Nope, we can't do this. When we do this every clock_set_rate on a leaf
> > node will propagate up to the ipg, ahb, main_clk, plls and whatever is
> > up there.
> 
> PLL does not have CLK_SET_RATE_PARENT set, right?
> 
> What's the problem with that propagation?  Isn't it designed so?  Now
> on imx6q, 792MHz is a set point for cpu frequency, we have to propagate
> up to pll's set_rate to get that frequency.  There is a mux in the
> middle of the propagation path.  If we do not set CLK_SET_RATE_PARENT
> for mux, how can we get this frequency?

We need a way to set the propagation flag on some muxes (maybe also a
way to not set it on some dividers or gates). As said, the assumption
that all dividers/gates can propagate whereas all muxes cannot propagate
may turn out to be too simple. You found one case where this is wrong,
I'm sure there are others.

Sascha


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