oprofile and ARM A9 hardware counter
Paul Walmsley
paul at pwsan.com
Tue Apr 3 19:29:49 EDT 2012
Hi
On Tue, 3 Apr 2012, Kevin Hilman wrote:
> Indeed, like you, I have to change the EMU clock domain to SWSUP[1] in
> order to see any interrupts and see anything in perf top. This isn't
> really a mergeable workaround, so I'll look into this a little closer
> with Santosh to see what we can do once we fully understand the HW
> problem.
Part of the problem is that the clockdomain data for the emu_sys
clockdomain is wrong. Here's something to try to fix it. It might just
be enough to get it to work.
- Paul
From: Paul Walmsley <paul at pwsan.com>
Date: Tue, 3 Apr 2012 17:13:48 -0600
Subject: [PATCH] ARM: OMAP44xx: clockdomain data: correct the emu_sys_clkdm
CLKTRCTRL data
According to the 4430 ES2.0 TRM vX Table 3-744 "CM_EMU_CLKSTCTRL",
the emu_sys clockdomain data in mainline is incorrect.
The emu_sys clockdomain does not support the DISABLE_AUTO state, and
instead it supports the FORCE_WAKEUP state.
Signed-off-by: Paul Walmsley <paul at pwsan.com>
Cc: Benoît Cousson <b-cousson at ti.com>
Cc: Kevin Hilman <khilman at ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar at ti.com>
Cc: Ming Lei <ming.lei at canonical.com>
---
arch/arm/mach-omap2/clockdomains44xx_data.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c
index 9299ac2..bd7ed13 100644
--- a/arch/arm/mach-omap2/clockdomains44xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c
@@ -390,7 +390,7 @@ static struct clockdomain emu_sys_44xx_clkdm = {
.prcm_partition = OMAP4430_PRM_PARTITION,
.cm_inst = OMAP4430_PRM_EMU_CM_INST,
.clkdm_offs = OMAP4430_PRM_EMU_CM_EMU_CDOFFS,
- .flags = CLKDM_CAN_HWSUP,
+ .flags = CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_FORCE_WAKEUP,
};
static struct clockdomain l3_dma_44xx_clkdm = {
--
1.7.9.5
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