[PATCH] mmci: calculate remaining bytes at error correctly

Russell King - ARM Linux linux at arm.linux.org.uk
Mon Jan 31 09:00:09 EST 2011


On Mon, Jan 31, 2011 at 02:53:32PM +0100, Linus Walleij wrote:
> On Mon, Jan 31, 2011 at 11:40 AM, Russell King - ARM Linux <
> linux at arm.linux.org.uk> wrote:
> 
> What can happen is you receive the DATAEND interrupt,
> > which tears down the data side of the request, and starts the stop
> > command.  Meanwhile there's still data left in the FIFO for the CPU
> > to read.
> >
> > I suspect there's a similar race between DMA and the host CPU too as
> > you leave the DATAEND interrupt on.  I suspect for reliability, we
> > need to have the DMA controller callback function in place to enable
> > the DATAEND interrupt.  Or something like that.
> >
> 
> Yes I get it now, well, what we do is essentially create three state
> variables that are all checked at end of DMA (by adding a
> DMA termination callback), end of PIO or DATAEND IRQ arrival.

There's no need, and you don't want to do it like that.  If you receive
and ack the data end interrupt before you've completed the transfer,
then you need additional complexity in the PIO data handler.

Keep it simple.  Keep DATAEND masked until you've finished transfering
the data and then enable it - you'll get the interrupt at the right point
that way.

> I'll cook up some patch ASAP, just need to backport some
> stuff on top of your latest MMCI patches.

I have a number of patches on top of just these two.  There's eight
in total.  See the mmci-dma branch.  I want to discard the top patch
as I still don't think the mmci imposes that requirement.

PS, don't send me html encoded mail...



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