[PATCH v2 02/11] msm: Generalize timer register mappings

Dima Zavin dmitriyz at google.com
Wed Jan 26 17:50:30 EST 2011

On Wed, Jan 26, 2011 at 2:41 PM, David Brown <davidb at codeaurora.org> wrote:
> On Wed, Jan 26 2011, Dima Zavin wrote:
>> On Mon, Jan 24, 2011 at 2:44 PM, David Brown <davidb at codeaurora.org> wrote:
>> To be honest I don't understand why you would want to do this at
>> runtime. You cannot select multiple SoCs in the kernel build anyway,
>> nor would you want to. Trying to have same kernel to boot on ARM v6
>> and ARM v7 would already be freaky enough. On top of that mixing 7201a
>> with all the baggage that it comes with 8x60 just wouldn't make sense.
>> These architectures are so different that it I can't see that ever
>> being useful. When would you ever envision building for multiple of
>> these SoCs at the same time?
> People (especially distributions) want to be able to build one arm
> kernel rather than multiple ones.  The issues about CPU detection and
> base addresses are being worked on now.

Yeah, you are right. I guess for distributions that would make a lot
of sense. Point taken.

I think the hard part for msm will be in the peripheral drivers and
not in core. The subtle ways in which all the bits move around in the
peripherals like the display and nand controllers made it very hard
without doing defines and build time. I'm not sure how much worse or
better it is in TI land?


> Other targets, especially omap, are already way ahead of MSM in this
> area.

> David
> --
> Sent by an employee of the Qualcomm Innovation Center, Inc.
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

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