[PATCH] ARM: vfp: Fix up exception location in Thumb mode

[Catalin Marinas]

On 14 January 2011 07:42, Colin Cross <ccross at android.com> wrote:
> The exception handler in entry-armv.S checks for thumb mode and
> correctly determines the exception location and instruction,
> but VFP_bounce uses the uncorrected location off the stack.
> If the VFP exception occured in Thumb mode, fix up the
> exception location to match the value that would be returned
> in ARM mode.
>
> Fixes segfaults in userspace applications running in Thumb mode
> caused by a handled VFP exception returning to the middle of the
> instruction that triggered the exception.
>
> Change-Id: I6c6ba1ab88e107bec166ea334d7e0974a4f6bfba
> Signed-off-by: Colin Cross <ccross at android.com>
> ---
>  arch/arm/vfp/vfpmodule.c |   10 ++++++++++
>  1 files changed, 10 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
> index 0797cb5..63ed73d 100644
> --- a/arch/arm/vfp/vfpmodule.c
> +++ b/arch/arm/vfp/vfpmodule.c
> @@ -275,6 +275,16 @@ void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)
>        pr_debug("VFP: bounce: trigger %08x fpexc %08x\n", trigger, fpexc);
>
>        /*
> +        * If the exception occured in thumb mode, pc is exception location + 2,
> +        * the middle of the 32-bit VFP instruction.  Add 2 to get exception
> +        * location + 4, the same we get in ARM mode.
> +        */
> +#ifdef CONFIG_ARM_THUMB
> +       if (regs->ARM_cpsr & PSR_T_BIT)
> +               regs->ARM_pc += 2;
> +#endif

You can use "if (thumb_mode(regs))" and avoid the #ifdef entirely.

-- 
Catalin