mmci: U300 "sync with blockend" broken for multi-block?
Russell King - ARM Linux
linux at arm.linux.org.uk
Wed Jan 5 11:43:44 EST 2011
On Wed, Jan 05, 2011 at 05:15:04PM +0100, Linus Walleij wrote:
> 2011/1/1 Russell King - ARM Linux <linux at arm.linux.org.uk>:
>
> > It would be good to characterize what's actually going on with U300 some
> > more, especially the timing between these signals and the FIFO interrupts,
> > rather than just stating that they occur "out of order".
>
> I will try to document more closely. OTOMH it was like
> for reads they would come in one order first one then
> another and for writes the other way around. That was
> why the older quirk for U300 was working, wiring the
> DATAEND high, though it was no good in modeling
> what was actually happening.
Any chance of pr_debug'ing the complete status register each time you
service an interrupt? You'll probably need to set the kernel log
buffer fairly large to ensure that you capture everything.
I wouldn't recommend dumping the messages through the serial port
directly as that'd put far too much latency on the servicing of them,
but using dmesg after the accesses to retrieve them. (IOW, don't
pass 'debug' to the kernel...)
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