[RFC PATCH 2/2] ARM: CSR: add PM sleep entry for SiRFprimaII

[Barry Song]

2011/8/21 Russell King - ARM Linux <linux at arm.linux.org.uk>:
> On Tue, Aug 16, 2011 at 09:34:35AM +0800, Barry Song wrote:
>> 2011/8/15 Barry Song <21cnbao at gmail.com>:
>> > 2011/8/15 Russell King - ARM Linux <linux at arm.linux.org.uk>:
>> >> On Mon, Aug 15, 2011 at 03:43:13PM +0800, Barry Song wrote:
>> >>> Sorry, my fault. i simply picked these lines which have been verified
>> >>> to be working in local old 2.6.38.8 kernel and really didn't think and
>> >>> refine more carefully.
>> >>> in deep sleep mode, SiRFprimaII will powerdown CPU core.
>> >>
>> >> ... just like everyone else.
>> >>
>> >>> due to this,
>> >>> i just ignored to delete the codes saving registers of all kinds of
>> >>> CPU modes. but it is not the real situation in kernel. For example,
>> >>> IRQ mode used the stack of corrupted thread, and kernel was not in
>> >>> interrupt while going to pm_ops->enter(), then it is unnecessary to
>> >>> enter IRQ and save sp of IRQ:
>> >>
>> >> No.  There is _no_ need to save and restore these registers.  They
>> >> can simply be re-setup.  The generic cpu_suspend stuff already
>> >> takes care of that.
>> >
>> > i did have saied it is not necessary to save and restore if you read
>> > my reply carefully :-)
>>
>> just as you said, after deleting all codes to save/restore regsiters:
> ...
>> and call cpu_init() to re-setup while resuming, things go well.
>
> Good - so can we have a patch based on the generic cpu suspend support
> in the kernel for this SoC please?

sure.

>
> Thanks.
>

-barry