[PATCH 2/8] ARM: Implement read/write for ownership intheARMv6 DMA cache ops

[Catalin Marinas]

On Mon, 2010-05-17 at 12:47 +0100, Catalin Marinas wrote:
> On Mon, 2010-05-17 at 14:27 +0300, Ronen Shitrit wrote:
> > Performance wise we prefer to enable it...
> > But it seems to be on the safe side we will disable it.
> 
> It's worth doing some benchmarking.
> 
> Anyway, if it's a new SoC, you may have the option of implementing IPI
> via FIQ and you could broadcast the cache maintenance operations via FIQ
> (and avoid potential deadlocks in the kernel).

Or even better - implement cache broadcasting in hardware.

-- 
Catalin