[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops
Russell King - ARM Linux
linux at arm.linux.org.uk
Mon May 17 02:57:12 EDT 2010
On Mon, May 17, 2010 at 09:29:35AM +0300, Ronen Shitrit wrote:
> Got it, thanks.
No you haven't; disabling interrupts doesn't prevent CPUs speculatively
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