[PATCH 1/5] ARM: Use lazy cache flushing on ARMv7 SMP systems

Russell King - ARM Linux linux at arm.linux.org.uk
Tue Mar 23 17:33:45 EDT 2010


On Mon, Mar 22, 2010 at 03:19:39PM +0000, Catalin Marinas wrote:
> ARMv7 processors like Cortex-A9 broadcast the cache maintenance
> operations in hardware. This patch allows the
> flush_dcache_page/update_mmu_cache pair to work in lazy flushing mode
> similar to the UP case.

Didn't Ben point out that there's a race with the lazy dcache flushing
on SMP platforms?

> The standard ICIALLU and BPIALL operations are not automatically
> broadcast to the other CPUs in an MP system. The patch adds the Inner
> Shareable variants, ICIALLUIS and BPIALLIS, if ARMv7 and SMP.

Jargon overload.  (Just because it's in a specification does not mean
the names are a good idea.)

In any case, this should probably be two separate patches.



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