[PATCH] spi/omap2_mcspi: disable and enable chan between each SPI transfer

jason jason77.wang at gmail.com
Fri Jun 25 08:05:53 EDT 2010


roman.tereshonkov at nokia.com wrote:
>  
>
>   
[snip]
>> -----Original Message-----
>>
>> 					}
>> 					c = 0;
>> -				} else if (c == 0 && tx == NULL) {
>> -					omap2_mcspi_set_enable(spi, 0);
>> 				}
>>
>> 				*rx++ = __raw_readl(rx_reg);
>>     
>
> Why do you do this?
> Reading the last word from the shift register buffer leads to 
> the receiving new data to the buffer.
> The channel needs to be disabled before the last word reading.
>
>
>   
Yes, you are right. If this patch can be accepted, i will remove those 
changes in the V2 patch.
Please see my email replying grant likely's questions.

Thanks,
Jason.
>   
>> @@ -646,7 +641,7 @@ omap2_mcspi_txrx_pio(struct spi_device 
>> *spi, struct spi_transfer *xfer)
>> 			dev_err(&spi->dev, "EOT timed out\n");
>> 	}
>> out:
>> -	omap2_mcspi_set_enable(spi, 1);
>> +	omap2_mcspi_set_enable(spi, 0);
>> 	return count - c;
>> }
>>
>> @@ -894,7 +889,6 @@ static void omap2_mcspi_work(struct 
>> work_struct *work)
>> 		cs = spi->controller_state;
>> 		cd = spi->controller_data;
>>
>> -		omap2_mcspi_set_enable(spi, 1);
>> 		list_for_each_entry(t, &m->transfers, transfer_list) {
>> 			if (t->tx_buf == NULL && t->rx_buf == 
>> NULL && t->len) {
>> 				status = -EINVAL;
>> @@ -931,6 +925,8 @@ static void omap2_mcspi_work(struct 
>> work_struct *work)
>>
>> 			mcspi_write_chconf0(spi, chconf);
>>
>> +			omap2_mcspi_set_enable(spi, 1);
>> +
>> 			if (t->len) {
>> 				unsigned	count;
>>
>> -- 
>> 1.5.6.5
>>
>>
>>     




More information about the linux-arm-kernel mailing list