NXP LPC3250 LCD controller

[Stefan]

Hi,

there is an errata for NXP LPC3250 LCD controller.

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3.4 LCD.1: Low throughput when LCD controller accesses DDR/SDRAM

Introduction:
The LCD controller is an AHB Master that uses an internal DMA controller
to transfer frame data from memory to the LCD panel.

Problem:
The time required to read data from either SDR or DDR SDRAM using the
LCD DMA controller takes longer than expected. ...
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Does anybody know whether LCD with greater resolution then QVGA will 
definitely not work? 
(I'll use 480x272 24Bit) 

Or is there something I could fine tune in memory arbiter?

Has somebody a lager LCD than QVGA running on Linux with this SOC?

Thanks in advance 
Stefan