[PATCH 3/4] ARM: cns3xxx: Add support for AHCI controllers
Anton Vorontsov
avorontsov at mvista.com
Wed Jun 2 08:29:44 EDT 2010
On Wed, Jun 02, 2010 at 01:26:48PM +0400, Sergei Shtylyov wrote:
[...]
> >+ tmp = MISC_SATA_POWER_MODE;
> >+ tmp |= 0x1 << 16; /* Disable SATA PHY 0 from SLUMBER Mode */
> >+ tmp |= 0x1 << 17; /* Disable SATA PHY 1 from SLUMBER Mode */
> >+ MISC_SATA_POWER_MODE = tmp;
>
> Why aren't you using I/O accessors?
For CNS3xxx __raw_{read,write} are equivalent to direct accesses,
and originally Cavium used registers directly just because it was
easier (less keystrokes, quite understandable).
Ben Dooks also pointed out this concern, and I agree that using
IO accessors would be a good cleanup.
As I'm going to send other improvements, I think I'll fix this for
all CNS3xxx code base on top of this pull request, if nobody minds.
Thanks!
--
Anton Vorontsov
email: cbouatmailru at gmail.com
irc://irc.freenode.net/bd2
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