About cachetype on ARMv7

[Russell King - ARM Linux]

On Thu, Jul 08, 2010 at 09:52:23AM +0900, Kukjin Kim wrote:
> I agree with you in principle.
> But I think, it would be helpful to someone if it could be shown more exact
> feature in the kernel boot message especially in this case, it differs with
> actual hardware information.

I disagree.  What's interesting is how the kernel drives the cache,
not what the cache actually is - what you want to know is "the docs
say that it's a X cache, is the kernel driving it correctly" not
"can the kernel decode the cache type register and tell me what the
documentation says the cache is".

The former is what the kernel tells you today.  The latter is useless
to working out if the kernel is doing the right thing, and is just a
proof that you can decode register values to strings.