[PATCH] ARM: S5PV210: Fix on SECTION_SIZE_BITS on S5PV210/S5PC110.

Tue Jul 6 03:12:45 EDT 2010

On Tue, Jul 06, 2010 at 01:36:47PM +0900, Kukjin Kim wrote:
> This patch fixes on SECTION_SIZE_BITS for Sparsemem on S5PV210/S5PC110.
> Because smallest size of a bank on S5PV210/S5PC110 is aligned by 16MB.
> So each section's maximum size should be 16MB.

What is the spacing of chunks of memory, and minimum alignment of those
chunks in physical address space?

Also, what is the maximum physical address which memory can be located?