[PATCH 1/3] ARM: mmu: Setup MT_MEMORY and MT_MEMORY_NONACHED L1 entries

[Shilimkar, Santosh]

> -----Original Message-----
> From: Russell King - ARM Linux [mailto:linux at arm.linux.org.uk]
> Sent: Sunday, August 08, 2010 5:04 PM
> To: Shilimkar, Santosh
> Cc: linux-omap at vger.kernel.org; linux-arm-kernel at lists.infradead.org
> Subject: Re: [PATCH 1/3] ARM: mmu: Setup MT_MEMORY and MT_MEMORY_NONACHED
> L1 entries
> 
> On Sun, Aug 08, 2010 at 03:47:52PM +0530, Santosh Shilimkar wrote:
> > @@ -475,6 +486,9 @@ static void __init build_mem_type_table(void)
> >  	mem_types[MT_LOW_VECTORS].prot_l1 |= ecc_mask;
> >  	mem_types[MT_HIGH_VECTORS].prot_l1 |= ecc_mask;
> >  	mem_types[MT_MEMORY].prot_sect |= ecc_mask | cp->pmd;
> > +	mem_types[MT_MEMORY].prot_pte |= kern_pgprot;
> > +	mem_types[MT_MEMORY_NONCACHED].prot_sect |= ecc_mask | cp->pmd;
> > +	mem_types[MT_MEMORY_NONCACHED].prot_pte |= kern_pgprot;
> 
> This is wrong - it will result in the non-cached memory mapped in as
> sections having the same cache settings as MT_MEMORY - in other
> words, probably write back.
You are right. Will fix this in next version.

Regards,
Santosh