Question about armv7(cortex-a9) dcache initialization.

ikjn tiffang at
Mon Aug 2 05:55:31 EDT 2010

Now I think that it is a bootloader requirement.

And in the arm linux kernel's booting requirement,
"Data cache must be off and must not contain any stale data."
And today I found a code for invalidating dcache in omap4 bootloader
source code.

So it's okay to clean & invalidate in kernel init procedure.
Boot loader should initialize all caches before use.

On Thu, Jul 22, 2010 at 10:12 AM, ikjn <tiffang at> wrote:
> In the ARM Cortex-A9 TRM, I found a note in chapter 6.1
> Note:
> You must invalidate the instruction cache, the data cache, and BTAC
> before using them.
> You are not required to invalidate the main TLB, even though it is
> recommended for
> safety reasons. This ensures compatibility with future revisions of
> the processor.
> But the kernel does.. ( __v7_setup in proc-v7.S )
> clean & invalidate before turning on the MMU, not just 'invalidate'.
> If dcache tag&data ram has garbage data when power up,
> I think some dirty data lines can be flushed into to L2 or L3 memory
> because kernel does clean.
> And It can pollute the memory.
> Is it possible in cortex-A9?
> Thanks..

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