Query: ARM Cortex A9: Is invalidating L1 data cache mandatory before usage

[Russell King - ARM Linux]

On Sun, Apr 18, 2010 at 09:13:55PM +0530, shiraz hashim wrote:
> On Sat, Apr 17, 2010 at 11:44 PM, Russell King - ARM Linux
> <linux at arm.linux.org.uk> wrote:
> > On Sat, Apr 17, 2010 at 03:26:13PM +0530, Shiraz HASHIM wrote:
> >> Hello,
> >>
> >> I am trying to port Linux on ARM Cortex A9 based platform and what
> >> I see is that if I don't invalidate the data cache before enabling
> >> and using it (in arch/arm/boot/compressed/head.S) the system crashes.
> >>
> >> I need to do the same for second core before calling secondary_startup.
> >>
> >> Is it normal? Why then other platforms (cortex A9 based) are not doing
> >> this. What am I missing?
> >
> > Yes, it's required.  See:
> >
> > http://www.arm.linux.org.uk/developer/booting.php
> 
> The only thing which is confusing me is that do we need to invalidate
> the data cache, even if it is disabled in bootloader.

If you don't, the cache will be in an undefined state when it is enabled,
which in turn means that when you enable it, you don't know whether the
instructions you're going to execute come from the cache or from the
memory - and the two may be different.