Query: ARM Cortex A9: Is invalidating L1 data cache mandatory before usage
shiraz.linux.kernel at gmail.com
Sun Apr 18 10:35:09 EDT 2010
On Sat, Apr 17, 2010 at 11:44 PM, Russell King - ARM Linux
<linux at arm.linux.org.uk> wrote:
> On Sat, Apr 17, 2010 at 03:26:13PM +0530, Shiraz HASHIM wrote:
>> I am trying to port Linux on ARM Cortex A9 based platform and what
>> I see is that if I don't invalidate the data cache before enabling
>> and using it (in arch/arm/boot/compressed/head.S) the system crashes.
>> I need to do the same for second core before calling secondary_startup.
>> Is it normal? Why then other platforms (cortex A9 based) are not doing
>> this. What am I missing?
> Yes, it's required. See:
OK. So it means that the bootloader is expected to do this
invalidation or cleanup,
and for secondary cpus we can do it before calling secondary_startup.
Am I right ?
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