[Kgdb-bugreport] [PATCH] ARM: change definition of cpu_relax() for ARM11MPCore
George G. Davis
gdavis at mvista.com
Thu Apr 15 13:36:09 EDT 2010
On Mon, Apr 12, 2010 at 06:32:47PM +0100, Russell King - ARM Linux wrote:
> On Mon, Apr 12, 2010 at 06:23:58PM +0100, Will Deacon wrote:
> > This patch changes the definition of cpu_relax() to smp_mb() for ARMv6 cores,
> > forcing the write buffer to drain while inside a polling loop on an SMP system.
> > If the Kernel is not compiled for SMP support, this will expand to a barrier()
> > as before.
If I've followed these threads  correctly, this ARM11 MPCore issue
was discovered while running the "KGDB: internal test suite" (KGDB_TESTS)
and that problem is resolved via "kgdb: use atomic_inc and atomic_dec
instead of atomic_set" . If so, isn't the original ARM11 MPCore KGDB
cpu_relax() issue just a red herring? Shouldn't any polling loops
which depend on specific (hardware) write/read order implement appropriate
barriers rather than rely on cpu_relax() to guarantee order? If
perhaps there are indeed other cases where cpu_relax() is being used
incorrectly, then maybe those should be fixed instead? Just curious...
> Linus asked how expensive (in terms of power rather than performance)
> this was; so far that question has remained unanswered. Can someone
> please answer his question?
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