[PATCH 2/8] omap: Lock DPLL5 at boot

Paul Walmsley paul at pwsan.com
Tue Oct 6 11:19:10 EDT 2009

On Fri, 2 Oct 2009, Tony Lindgren wrote:

> From: Rajendra Nayak <rnayak at ti.com>
> Lock DPLL5 at 120MHz at boot. The USBHOST 120MHz f-clock and
> USBTLL f-clock are the only users of this DPLL, and 120MHz is
> is the only recommended rate for these clocks.
> With this patch, the 60 MHz ULPI clock is generated correctly.
> Tested on an OMAP3430 SDP.
> Signed-off-by: Rajendra Nayak <rnayak at ti.com>
> Signed-off-by: Anand Gadiyar <gadiyar at ti.com>
> Signed-off-by: Tony Lindgren <tony at atomide.com>

Signed-off-by: Paul Walmsley <paul at pwsan.com>

- Paul

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