[PATCH] ep93xx: introduce clk parent

Russell King - ARM Linux linux at arm.linux.org.uk
Thu Oct 1 10:59:39 EDT 2009


On Wed, Sep 30, 2009 at 05:30:28PM -0400, H Hartley Sweeten wrote:
> On Wednesday, September 30, 2009 12:54 PM, Ryan Mallon wrote:
> > H Hartley Sweeten wrote:
> >> The clock generation system in the ep93xx uses two external oscillator's
> >> and two internal PLLs to derive all the internal clocks.  Many of these
> >> internal clocks can be stopped to save power.
> >> 
> >> This introduces a "parent" hierarchy for the clocks so that the users
> >> count can be correctly tracked for power management.
> >> 
> >> The "parent" for the video clock can either be one of the PLL outputs
> >> or the external oscillator.  In order to correctly track the "parent"
> >> for the video clock calc_clk_div() needed to be modified.  It now
> >> returns an error code if the desired rate cannot be generated.
> >> 
> >> Signed-off-by: H Hartley Sweeten <hsweeten at visionengravers.com>
> >> Cc: Ryan Mallon <ryan at bluewatersys.com>
> >> 
> >> ---
> >> 
> >
> > Acked-by: Ryan Mallon <ryan at bluewatersys.com>
> 
> Russell,
> 
> As the clkdev maintainer, do you see any problems with this?

Only comment is that you should really consider some locking in
clk_enable and clk_disable to prevent the use count being corrupted
by simultaneous calls.



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