[PATCH] ARM: MM: use 64bytes of L1 cache on plat S5PC1xx
Marc Zyngier
maz at misterjones.org
Tue Nov 17 03:10:24 EST 2009
On Tue, 17 Nov 2009 08:47:54 +0100
Marek Szyprowski <m.szyprowski at samsung.com> wrote:
> From: Kyungmin Park <kyungmin.park at samsung.com>
>
> Samsung S5PC1xx SoCs are Coretex8 based, so use 64 bytes of L1 cache
> line instead of the default 32 bytes.
>
> Signed-off-by: Kyungmin Park <kyungmin.park at samsung.com>
> Signed-off-by: Marek Szyprowski <m.szyprowski at samsung.com>
> ---
> arch/arm/mm/Kconfig | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
> index 9264d81..7b7d4c3 100644
> --- a/arch/arm/mm/Kconfig
> +++ b/arch/arm/mm/Kconfig
> @@ -774,5 +774,5 @@ config CACHE_XSC3L2
>
> config ARM_L1_CACHE_SHIFT
> int
> - default 6 if ARCH_OMAP3
> + default 6 if ARCH_OMAP3 || ARCH_S5PC1XX
> default 5
If this feature is related to the S5PC1xx being a CortexA8, why not
depend on CPU_V7 rather that adding each and every new CortexA8
implementation to this list?
M.
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