[PATCH] [ARM] serial/pxa: work around Errata #75

[Uwe Kleine-König]

Hello,

[Added Greg to Cc:]

On Tue, Nov 03, 2009 at 11:47:15AM +0100, Uwe Kleine-König wrote:
> Intel(R) PXA27x Processor Family Specification Update (Nov 2005)
> says:
> 
>   E75. UART: Baud rate may not be programmed correctly on
>        back-to-back writes.
> 
>   Problem:
>   When programming the Divisor Latch registers, Low and High (DLL and
>   DLH), with back-to-back writes, the second register write may not
>   take effect. The result is an incorrect baud rate.
> 
>   Workaround:
>   After programming the first Divisor Latch register, read and verify
>   it before programming the second Divisor Latch register.
> 
> This was hit when changing the baud rate from 115200 to 9600 while
> receiving characters at 9600 Bd.
> 
> And fixed indention of some comments nearby.
I havn't received any feed-back for this up to now.

Did I address the right people?  Are you just burried in work?
Assuming the patch is OK, which is the right path into mainline?
Some patches touching drivers/serial/pxa.c went in via Russell's tree,
bdc04e3 (serial: move delta_msr_wait into the tty_port) went in via
gregkh/tty-2.6.

Greg: as you didn't get the original patch you can find it below.

Best regards
Uwe