[PATCH 5/5] arm/perfevents: implement perf event support for ARMv6

[Jamie Iles]

On Tue, Dec 15, 2009 at 04:30:13PM +0100, Peter Zijlstra wrote:
> On Tue, 2009-12-15 at 15:19 +0000, Jamie Iles wrote:
> > Another problem with mpcore support is that
> > with the v6 performance counters, you can't disable a single event
> > counter. 
> 
> Can you program them with a non-counting event?
> 
> On x86 there's various ways of doing that, either by selecting an event
> that simply doesn't count (cache-misses with 0 MESI mask), or by telling
> it to mask both user and kernel event.
That's exactly what I do for single core ARMv6. However, in the list of events
for mpcore I can't see any that wouldn't count. There's plenty of reserved
identifiers though so hopefully one of those will do the job. Also, ARM
counters can't be set to exclude any modes.

Jamie