shared memory problem on ARM v5TE using threads
chripell at gmail.com
Mon Dec 14 12:48:14 EST 2009
On Mon, Dec 14, 2009 at 3:46 PM, Ronen Shitrit <rshitrit at marvell.com> wrote:
> I think your patch doesn't cover the PIO mode...
Has someone a suggestion on how to write a test-case for this? I tried
various forms of mixing read/write syscalls (or a mmap wit
MAP_PRIVATE) and access via two mmap with MAP_SHARED aliasing the same
address (I checked that adjust_pte was called by them) but didn't get
any problem. I have to admit that I really don't understand how PIO in
kernel mode can refer to mappings that are aliased (and so market
uncacheable) made by user-space programs. Thank you for your patience.
Christian Pellegrin, see http://www.evolware.org/chri/
"Real Programmers don't play tennis, or any other sport which requires
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