shared memory problem on ARM v5TE using threads
Ronen Shitrit
rshitrit at marvell.com
Sun Dec 6 08:53:48 EST 2009
Hi
There isn't any known issues related to working with C=0 B=1 on Kirkwood.
Can you pls run this test on some other ARMv5 platform and approve it is working.
Thanks
-----Original Message-----
From: linux-arm-kernel-bounces at lists.infradead.org [mailto:linux-arm-kernel-bounces at lists.infradead.org] On Behalf Of Heiko Schocher
Sent: Friday, December 04, 2009 9:35 PM
To: Russell King - ARM Linux
Cc: linux-arm-kernel at lists.infradead.org
Subject: Re: shared memory problem on ARM v5TE using threads
Hello Russell King,
Russell King - ARM Linux wrote:
> Well, the kernel messages of relevance from the dump are:
>
> shmtest2:351: c7220140 c72179c0 0 41170000 64a1
> shmtest2:351: vma c7217968 addr 40961000 pte 064a13cf
> shmtest2:351: modified 064a13c7
> shmtest2:351: aliases 1
> shmtest2:351: vma c72179c0 addr 41170000 pte 064a13cf
> shmtest2:351: modified 064a13c7
> shmtest2:352: c7220140 c7217548 0 4197f000 64a1
> shmtest2:352: vma c7217968 addr 40961000 pte 064a13c7
> shmtest2:352: vma c72179c0 addr 41170000 pte 064a13c7
> shmtest2:352: aliases 2
> shmtest2:352: vma c7217548 addr 4197f000 pte 064a13cf
> shmtest2:352: modified 064a13c7
> shmtest2:354: c7220140 c7217650 0 4218e000 64a1
> shmtest2:354: vma c7217968 addr 40961000 pte 064a13c7
> shmtest2:354: vma c72179c0 addr 41170000 pte 064a13c7
> shmtest2:354: vma c7217548 addr 4197f000 pte 064a13c7
> shmtest2:354: aliases 3
> shmtest2:354: vma c7217650 addr 4218e000 pte 064a13cf
> shmtest2:354: modified 064a13c7
>
> which shows that the PTEs are having their 'cacheable' bit correctly
> cleared, thus making changes to the page in RAM immediately visible to
> the user program.
Ok, sounds good :-)
> Could it be that the CPU you're using doesn't support the C=0 B=1
> PTE encoding properly, and still caches data in such a region?
Hmm.. I try to find this out, thanks!
bye
Heiko
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