shared memory problem on ARM v5TE using threads

Russell King - ARM Linux linux at arm.linux.org.uk
Fri Dec 4 14:13:49 EST 2009


Well, the kernel messages of relevance from the dump are:

shmtest2:351: c7220140 c72179c0 0 41170000 64a1
shmtest2:351: vma c7217968 addr 40961000 pte 064a13cf
shmtest2:351: modified 064a13c7
shmtest2:351: aliases 1
shmtest2:351: vma c72179c0 addr 41170000 pte 064a13cf
shmtest2:351: modified 064a13c7
shmtest2:352: c7220140 c7217548 0 4197f000 64a1
shmtest2:352: vma c7217968 addr 40961000 pte 064a13c7
shmtest2:352: vma c72179c0 addr 41170000 pte 064a13c7
shmtest2:352: aliases 2
shmtest2:352: vma c7217548 addr 4197f000 pte 064a13cf
shmtest2:352: modified 064a13c7
shmtest2:354: c7220140 c7217650 0 4218e000 64a1
shmtest2:354: vma c7217968 addr 40961000 pte 064a13c7
shmtest2:354: vma c72179c0 addr 41170000 pte 064a13c7
shmtest2:354: vma c7217548 addr 4197f000 pte 064a13c7
shmtest2:354: aliases 3
shmtest2:354: vma c7217650 addr 4218e000 pte 064a13cf
shmtest2:354: modified 064a13c7

which shows that the PTEs are having their 'cacheable' bit correctly
cleared, thus making changes to the page in RAM immediately visible to
the user program.

Could it be that the CPU you're using doesn't support the C=0 B=1
PTE encoding properly, and still caches data in such a region?



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