[PATCH 1/1] fix occasional ULPI timeouts with ehci-mxc
Valentin Longchamp
valentin.longchamp at epfl.ch
Thu Dec 3 03:03:27 EST 2009
Hi all,
Andy Green wrote:
> On 12/02/09 20:25, Somebody in the thread at some point said:
>
>>> What did you do with your chip select line on the ULPI PHY?
>> I turn this line (CS_N) low before initializing ISP1504.
>
> It's more a question about what that input on the PHY chip sees during
> powerup / reset... it needs to be nicely and definitely high the whole
> time so it will ignore what happens then. Is it pulled up, or just
> connected to the iMX GPIO? iMX GPIO alone may not be enough. They
> mostly default to 100K pullup but even that may not be enabled early in
> the powerup action.
>
> A 10K to your IO voltage rail on CS_N solved it for the LiteKIT and on
> the boards we have made.
>
I just wanted to point out that we also have a 10K pull-up on the CS_N
on our boards, it helps a lot.
Val
--
Valentin Longchamp, PhD Student, EPFL-STI-LSRO1
valentin.longchamp at epfl.ch, Phone: +41216937827
http://people.epfl.ch/valentin.longchamp
MEA3485, Station 9, CH-1015 Lausanne
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