[PATCH] [MTD] [ONENAND] add pxa3xx onenand<br><br>In order to supp=


Mon Aug 24 09:56:15 EDT 2009 

ort Marvell PXA3xx bad block management, add pxa3xx onenand<br>device drive=
r. Since there&#39;s some specific operation in it.<br><br>Either pxa3xx on=
enand or generic onenand device driver can be supported.<br>
<br>Signed-off-by: Haojian Zhuang &lt;<a href=3D"mailto:haojian.zhuang at marv=
ell.com">haojian.zhuang at marvell.com</a>&gt;<br>---<br>=A0drivers/mtd/onenan=
d/Kconfig=A0 |=A0=A0=A0 7 +<br>=A0drivers/mtd/onenand/Makefile |=A0=A0=A0 1=
 +<br>=A0drivers/mtd/onenand/pxa3xx.c |=A0 248 ++++++++++++++++++++++++++++=
++++++++++++++<br>
=A0drivers/mtd/pxa3xx_bbm.c=A0=A0=A0=A0 |=A0=A0=A0 4 +<br>=A04 files change=
d, 260 insertions(+), 0 deletions(-)<br>=A0create mode 100644 drivers/mtd/o=
nenand/pxa3xx.c<br><br>diff --git a/drivers/mtd/onenand/Kconfig b/drivers/m=
td/onenand/Kconfig<br>
index 79fa79e..d2878ac 100644<br>--- a/drivers/mtd/onenand/Kconfig<br>+++ b=
/drivers/mtd/onenand/Kconfig<br>@@ -34,6 +34,13 @@ config MTD_ONENAND_OMAP2=
<br>=A0=A0=A0=A0 =A0 Support for a OneNAND flash device connected to an OMA=
P2/OMAP3 CPU<br>
=A0=A0=A0=A0 =A0 via the GPMC memory controller.<br>=A0<br>+config MTD_ONEN=
AND_PXA3xx<br>+=A0=A0=A0 tristate &quot;OneNAND on PXA3xx/MMP support&quot;=
<br>+=A0=A0=A0 depends on MTD_ONENAND &amp;&amp; (ARCH_PXA || ARCH_MMP)<br>=
+=A0=A0=A0 help<br>+=A0=A0=A0 =A0 Support for a OneNAND flash device connec=
ted to an PXA3xx CPU<br>
+=A0=A0=A0 =A0 via the static memory controller.<br>+<br>=A0config MTD_ONEN=
AND_OTP<br>=A0=A0=A0=A0 bool &quot;OneNAND OTP Support&quot;<br>=A0=A0=A0=
=A0 select HAVE_MTD_OTP<br>diff --git a/drivers/mtd/onenand/Makefile b/driv=
ers/mtd/onenand/Makefile<br>
index 64b6cc6..66cc1fb 100644<br>--- a/drivers/mtd/onenand/Makefile<br>+++ =
b/drivers/mtd/onenand/Makefile<br>@@ -8,6 +8,7 @@ obj-$(CONFIG_MTD_ONENAND)=
=A0=A0=A0 =A0=A0=A0 +=3D onenand.o<br>=A0# Board specific.<br>=A0obj-$(CONF=
IG_MTD_ONENAND_GENERIC)=A0=A0=A0 +=3D generic.o<br>
=A0obj-$(CONFIG_MTD_ONENAND_OMAP2)=A0=A0=A0 =A0=A0=A0 +=3D omap2.o<br>+obj-=
$(CONFIG_MTD_ONENAND_PXA3xx)=A0=A0=A0 +=3D pxa3xx.o<br>=A0<br>=A0# Simulato=
r<br>=A0obj-$(CONFIG_MTD_ONENAND_SIM)=A0=A0=A0 =A0=A0=A0 +=3D onenand_sim.o=
<br>diff --git a/drivers/mtd/onenand/pxa3xx.c b/drivers/mtd/onenand/pxa3xx.=
c<br>
new file mode 100644<br>index 0000000..d97ec15<br>--- /dev/null<br>+++ b/dr=
ivers/mtd/onenand/pxa3xx.c<br>@@ -0,0 +1,248 @@<br>+/*<br>+ *=A0 linux/driv=
ers/mtd/onenand/onenand_base.c<br>+ *<br>+ *=A0 Copyright (C) 2007 Marvell =
Internal Ltd.<br>
+ *<br>+ *=A0 Haojian Zhuang &lt;<a href=3D"mailto:haojian.zhuang at marvell.c=
om">haojian.zhuang at marvell.com</a>&gt;<br>+ *<br>+ * This program is free s=
oftware; you can redistribute it and/or modify<br>+ * it under the terms of=
 the GNU General Public License version 2 as<br>
+ * published by the Free Software Foundation.<br>+ */<br>+<br>+#include &l=
t;linux/module.h&gt;<br>+#include &lt;linux/init.h&gt;<br>+#include &lt;lin=
ux/platform_device.h&gt;<br>+#include &lt;linux/mtd/mtd.h&gt;<br>+#include =
&lt;linux/mtd/onenand.h&gt;<br>
+#include &lt;linux/mtd/partitions.h&gt;<br>+<br>+#include &lt;asm/io.h&gt;=
<br>+#include &lt;asm/mach/flash.h&gt;<br>+<br>+#ifdef CONFIG_PXA3xx_BBM<br=
>+#include &lt;plat/pxa3xx_bbm.h&gt;<br>+#endif<br>+<br>+#define DRIVER_NAM=
E=A0=A0=A0 &quot;pxa3xx-onenand&quot;<br>
+<br>+<br>+#ifdef CONFIG_MTD_PARTITIONS<br>+static const char *part_probes[=
] =3D { &quot;cmdlinepart&quot;, NULL,=A0 };<br>+#endif<br>+<br>+struct pxa=
3xx_onenand_info {<br>+=A0=A0=A0 struct onenand_chip=A0=A0=A0 onenand;<br>+=
#ifdef CONFIG_PXA3xx_BBM<br>
+=A0=A0=A0 /*<br>+=A0=A0=A0 =A0* Restriction: onenand_chip should be the fi=
rst one of<br>+=A0=A0=A0 =A0* pxa3xx_onenand_info.<br>+=A0=A0=A0 =A0* bbm s=
hould be the second one of pxa3xx_nand_info.<br>+=A0=A0=A0 =A0* Marvell PXA=
3xx BBM always access this field to get bbm.<br>
+=A0=A0=A0 =A0*/<br>+=A0=A0=A0 struct pxa3xx_bbm=A0=A0=A0 *bbm;<br>+#endif<=
br>+=A0=A0=A0 struct mtd_info=A0=A0=A0 =A0=A0=A0 mtd;<br>+=A0=A0=A0 struct =
mtd_partition=A0=A0=A0 *parts;<br>+};<br>+<br>+#ifdef CONFIG_PXA3xx_BBM<br>=
+static int pxa3xx_onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)<=
br>
+{<br>+=A0=A0=A0 struct pxa3xx_onenand_info *info =3D mtd-&gt;priv;<br>+=A0=
=A0=A0 struct pxa3xx_bbm *bbm =3D info-&gt;bbm;<br>+=A0=A0=A0 struct onenan=
d_chip *this =3D mtd-&gt;priv;<br>+=A0=A0=A0 unsigned char buf[2] =3D {0, 0=
};<br>+=A0=A0=A0 struct mtd_oob_ops ops =3D {<br>
+=A0=A0=A0 =A0=A0=A0 .mode =3D MTD_OOB_PLACE,<br>+=A0=A0=A0 =A0=A0=A0 .oobl=
en =3D 2,<br>+=A0=A0=A0 =A0=A0=A0 .oobbuf =3D buf,<br>+=A0=A0=A0 =A0=A0=A0 =
.ooboffs =3D 0,<br>+=A0=A0=A0 };<br>+=A0=A0=A0 int block, ret;<br>+<br>+=A0=
=A0=A0 /* Get block number */<br>+=A0=A0=A0 block =3D onenand_block(this, o=
fs);<br>
+<br>+=A0=A0=A0=A0=A0=A0=A0 /* We write two bytes, so we dont have to mess =
with 16 bit access */<br>+=A0=A0=A0=A0=A0=A0=A0 ofs +=3D mtd-&gt;oobsize + =
(ONENAND_BADBLOCK_POS &amp; ~0x01);<br>+=A0=A0=A0 /* FIXME : What to do whe=
n marking SLC block in partition<br>
+=A0=A0=A0 =A0* =A0=A0=A0 =A0=A0 with MLC erasesize? For now, it is not adv=
isable to<br>+=A0=A0=A0 =A0*=A0=A0=A0 =A0=A0 create partitions containing b=
oth SLC and MLC regions.<br>+=A0=A0=A0 =A0*/<br>+=A0=A0=A0 ret =3D mtd-&gt;=
write_oob(mtd, ofs, &amp;ops);<br>+=A0=A0=A0 if (ret)<br>
+=A0=A0=A0 =A0=A0=A0 return ret;<br>+<br>+=A0=A0=A0 return bbm-&gt;block_ma=
rkbad(mtd, block);<br>+}<br>+<br>+int verify_onenand_bbm(struct mtd_info *m=
td, struct pxa3xx_bbm **bbm)<br>+{<br>+=A0=A0=A0 struct onenand_chip *chip =
=3D mtd-&gt;priv;<br>+=A0=A0=A0 struct pxa3xx_bbm **nbbm =3D NULL;<br>
+<br>+=A0=A0=A0 /* check whether current flash is onenand */<br>+=A0=A0=A0 =
nbbm =3D (struct pxa3xx_bbm **)(++chip);<br>+=A0=A0=A0 if (((unsigned int)n=
bbm &lt; PAGE_OFFSET)<br>+=A0=A0=A0 =A0=A0=A0 || ((unsigned int)*nbbm &lt; =
PAGE_OFFSET))<br>+=A0=A0=A0 =A0=A0=A0 return PXA3xx_BBM_INVALID;<br>
+<br>+=A0=A0=A0 if ((*nbbm)-&gt;magic =3D=3D PXA_BBM_MAGIC) {<br>+=A0=A0=A0=
 =A0=A0=A0 pr_debug(&quot;%s:Found Onenand flash.\n&quot;, __func__);<br>+=
=A0=A0=A0 =A0=A0=A0 *bbm =3D *nbbm;<br>+=A0=A0=A0 =A0=A0=A0 return PXA3xx_B=
BM_ONENAND;<br>+=A0=A0=A0 }<br>+=A0=A0=A0 return PXA3xx_BBM_INVALID;<br>
+}<br>+<br>+/**<br>+ * pxa3xx_onenand_command - Send command to OneNAND dev=
ice<br>+ * @param mtd=A0=A0=A0 =A0=A0=A0 MTD device structure<br>+ * @param=
 cmd=A0=A0=A0 =A0=A0=A0 the command to be sent<br>+ * @param addr=A0=A0=A0 =
=A0=A0=A0 offset to read from or write to<br>
+ * @param len=A0=A0=A0 =A0=A0=A0 number of bytes to read or write<br>+ *<b=
r>+ * Send command to OneNAND device. This function is used for middle/larg=
e page<br>+ * devices (1KB/2KB Bytes per page)<br>+ */<br>+static int pxa3x=
x_onenand_command(struct mtd_info *mtd, int cmd,<br>
+=A0=A0=A0 =A0=A0=A0 =A0=A0=A0 =A0=A0=A0 =A0 loff_t addr, size_t len)<br>+{=
<br>+=A0=A0=A0 struct pxa3xx_onenand_info *info =3D mtd-&gt;priv;<br>+=A0=
=A0=A0 struct pxa3xx_bbm *bbm =3D info-&gt;bbm;<br>+<br>+=A0=A0=A0 /* Get r=
eolocated address */<br>+=A0=A0=A0 addr =3D bbm-&gt;search(mtd, addr);<br>
+=A0=A0=A0 return onenand_command(mtd, cmd, addr, len);<br>+}<br>+<br>+stat=
ic void pxa3xx_onenand_init_chip(struct pxa3xx_onenand_info *info)<br>+{<br=
>+=A0=A0=A0 struct onenand_chip *this =3D &amp;info-&gt;onenand;<br>+=A0=A0=
=A0 struct pxa3xx_bbm *bbm =3D NULL;<br>
+<br>+=A0=A0=A0 bbm =3D pxa3xx_query_bbm();<br>+=A0=A0=A0 if (bbm) {<br>+=
=A0=A0=A0 =A0=A0=A0 /* Marvell PXA3xx BBM is initialized successfully */<br=
>+=A0=A0=A0 =A0=A0=A0 info-&gt;bbm =3D bbm;<br>+=A0=A0=A0 =A0=A0=A0 this-&g=
t;scan_bbt =3D bbm-&gt;scan_bbt;<br>+=A0=A0=A0 =A0=A0=A0 this-&gt;block_mar=
kbad =3D pxa3xx_onenand_block_markbad;<br>
+=A0=A0=A0 =A0=A0=A0 this-&gt;command =3D pxa3xx_onenand_command;<br>+=A0=
=A0=A0 }<br>+}<br>+#else<br>+static void pxa3xx_onenand_init_chip(struct px=
a3xx_onenand_info *info) {}<br>+#endif<br>+<br>+static int __devinit pxa3xx=
_onenand_probe(struct platform_device *pdev)<br>
+{<br>+=A0=A0=A0 struct pxa3xx_onenand_info *info =3D NULL;<br>+=A0=A0=A0 s=
truct flash_platform_data *pdata =3D pdev-&gt;dev.platform_data;<br>+=A0=A0=
=A0 struct resource *res =3D pdev-&gt;resource;<br>+=A0=A0=A0 unsigned long=
 size =3D res-&gt;end - res-&gt;start + 1;<br>
+=A0=A0=A0 int err;<br>+<br>+=A0=A0=A0 info =3D kzalloc(sizeof(struct pxa3x=
x_onenand_info), GFP_KERNEL);<br>+=A0=A0=A0 if (!info)<br>+=A0=A0=A0 =A0=A0=
=A0 return -ENOMEM;<br>+<br>+=A0=A0=A0 if (!request_mem_region(res-&gt;star=
t, size, pdev-&gt;dev.driver-&gt;name)) {<br>
+=A0=A0=A0 =A0=A0=A0 err =3D -EBUSY;<br>+=A0=A0=A0 =A0=A0=A0 goto out_free_=
info;<br>+=A0=A0=A0 }<br>+<br>+=A0=A0=A0 info-&gt;onenand.base =3D ioremap(=
res-&gt;start, size);<br>+=A0=A0=A0 if (!info-&gt;onenand.base) {<br>+=A0=
=A0=A0 =A0=A0=A0 err =3D -ENOMEM;<br>+=A0=A0=A0 =A0=A0=A0 goto out_release_=
mem_region;<br>
+=A0=A0=A0 }<br>+<br>+=A0=A0=A0 info-&gt;onenand.mmcontrol =3D pdata-&gt;mm=
control;<br>+=A0=A0=A0 info-&gt;onenand.irq =3D platform_get_irq(pdev, 0);<=
br>+<br>+=A0=A0=A0 pxa3xx_onenand_init_chip(info);<br>+<br>+=A0=A0=A0 info-=
&gt;<a href=3D"http://mtd.name">mtd.name</a> =3D dev_name(&amp;pdev-&gt;dev=
);<br>
+=A0=A0=A0 info-&gt;mtd.priv =3D &amp;info-&gt;onenand;<br>+=A0=A0=A0 info-=
&gt;mtd.owner =3D THIS_MODULE;<br>+<br>+=A0=A0=A0 if (onenand_scan(&amp;inf=
o-&gt;mtd, 1)) {<br>+=A0=A0=A0 =A0=A0=A0 err =3D -ENXIO;<br>+=A0=A0=A0 =A0=
=A0=A0 goto out_iounmap;<br>+=A0=A0=A0 }<br>+<br>+#ifdef CONFIG_MTD_PARTITI=
ONS<br>
+=A0=A0=A0 err =3D parse_mtd_partitions(&amp;info-&gt;mtd, part_probes, &am=
p;info-&gt;parts, 0);<br>+=A0=A0=A0 if (err &gt; 0)<br>+=A0=A0=A0 =A0=A0=A0=
 add_mtd_partitions(&amp;info-&gt;mtd, info-&gt;parts, err);<br>+=A0=A0=A0 =
else if (err &lt;=3D 0 &amp;&amp; pdata-&gt;parts)<br>
+=A0=A0=A0 =A0=A0=A0 add_mtd_partitions(&amp;info-&gt;mtd, pdata-&gt;parts,=
 pdata-&gt;nr_parts);<br>+=A0=A0=A0 else<br>+#endif<br>+=A0=A0=A0 =A0=A0=A0=
 err =3D add_mtd_device(&amp;info-&gt;mtd);<br>+<br>+=A0=A0=A0 platform_set=
_drvdata(pdev, info);<br>+<br>+=A0=A0=A0 return 0;<br>
+<br>+out_iounmap:<br>+=A0=A0=A0 iounmap(info-&gt;onenand.base);<br>+out_re=
lease_mem_region:<br>+=A0=A0=A0 release_mem_region(res-&gt;start, size);<br=
>+out_free_info:<br>+=A0=A0=A0 kfree(info);<br>+<br>+=A0=A0=A0 return err;<=
br>+}<br>+<br>+static int __devexit pxa3xx_onenand_remove(struct platform_d=
evice *pdev)<br>
+{<br>+=A0=A0=A0 struct pxa3xx_onenand_info *info =3D platform_get_drvdata(=
pdev);<br>+=A0=A0=A0 struct resource *res =3D pdev-&gt;resource;<br>+=A0=A0=
=A0 unsigned long size =3D res-&gt;end - res-&gt;start + 1;<br>+<br>+=A0=A0=
=A0 platform_set_drvdata(pdev, NULL);<br>
+<br>+=A0=A0=A0 if (info) {<br>+=A0=A0=A0 =A0=A0=A0 if (info-&gt;parts)<br>=
+=A0=A0=A0 =A0=A0=A0 =A0=A0=A0 del_mtd_partitions(&amp;info-&gt;mtd);<br>+=
=A0=A0=A0 =A0=A0=A0 else<br>+=A0=A0=A0 =A0=A0=A0 =A0=A0=A0 del_mtd_device(&=
amp;info-&gt;mtd);<br>+<br>+=A0=A0=A0 =A0=A0=A0 onenand_release(&amp;info-&=
gt;mtd);<br>
+=A0=A0=A0 =A0=A0=A0 release_mem_region(res-&gt;start, size);<br>+=A0=A0=A0=
 =A0=A0=A0 iounmap(info-&gt;onenand.base);<br>+=A0=A0=A0 =A0=A0=A0 kfree(in=
fo);<br>+=A0=A0=A0 }<br>+<br>+=A0=A0=A0 return 0;<br>+}<br>+<br>+static str=
uct platform_driver pxa3xx_onenand_driver =3D {<br>
+=A0=A0=A0 .driver =3D {<br>+=A0=A0=A0 =A0=A0=A0 .name=A0=A0=A0 =A0=A0=A0 =
=3D DRIVER_NAME,<br>+=A0=A0=A0 =A0=A0=A0 .owner=A0=A0=A0 =A0=A0=A0 =3D THIS=
_MODULE,<br>+=A0=A0=A0 },<br>+=A0=A0=A0 .probe=A0=A0=A0 =A0=A0=A0 =3D pxa3x=
x_onenand_probe,<br>+=A0=A0=A0 .remove=A0=A0=A0 =A0=A0=A0 =3D __devexit_p(p=
xa3xx_onenand_remove),<br>+};<br>
+<br>+MODULE_ALIAS(DRIVER_NAME);<br>+<br>+static int __init pxa3xx_onenand_=
init(void)<br>+{<br>+=A0=A0=A0 return platform_driver_register(&amp;pxa3xx_=
onenand_driver);<br>+}<br>+<br>+static void __exit pxa3xx_onenand_exit(void=
)<br>
+{<br>+=A0=A0=A0 platform_driver_unregister(&amp;pxa3xx_onenand_driver);<br=
>+}<br>+<br>+module_init(pxa3xx_onenand_init);<br>+module_exit(pxa3xx_onena=
nd_exit);<br>+<br>+MODULE_LICENSE(&quot;GPL&quot;);<br>+MODULE_AUTHOR(&quot=
;Haojian Zhuang &lt;<a href=3D"mailto:haojian.zhuang at marvell.com">haojian.z=
huang at marvell.com</a>&gt;&quot;);<br>
+MODULE_DESCRIPTION(&quot;Glue layer for OneNAND flash on Marvell PXA3xx&qu=
ot;);<br>diff --git a/drivers/mtd/pxa3xx_bbm.c b/drivers/mtd/pxa3xx_bbm.c<b=
r>index bcc9a35..070e5d1 100644<br>--- a/drivers/mtd/pxa3xx_bbm.c<br>+++ b/=
drivers/mtd/pxa3xx_bbm.c<br>
@@ -27,6 +27,10 @@ static int verify_bbm_magic(struct mtd_info *mtd, struct=
 pxa3xx_bbm **bbm)<br>=A0=A0=A0=A0 int ret;<br>=A0<br>=A0=A0=A0=A0 ret =3D =
verify_nand_bbm(mtd, bbm);<br>+=A0=A0=A0 if (ret &gt;=3D 0)<br>+=A0=A0=A0 =
=A0=A0=A0 return ret;<br>+<br>+=A0=A0=A0 ret =3D verify_onenand_bbm(mtd, bb=
m);<br>
=A0=A0=A0=A0 return ret;<br>=A0}<br>=A0<br>-- <br>1.5.6.5<br><br>

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--0016e644c18e3e1679047465b6ad
Content-Type: text/x-patch; charset=US-ASCII; 
	name="0004--MTD-ONENAND-add-pxa3xx-onenand.patch"
Content-Disposition: attachment; 
	filename="0004--MTD-ONENAND-add-pxa3xx-onenand.patch"
Content-Transfer-Encoding: base64
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