[PATCH] pxa: extend gpio pins from 128 to 256<br><br>GPIO pins exc=


Mon Aug 24 09:56:15 EDT 2009


eeds 128 pins. So extend the maximum GPIO pins to 256.<br>And extend MFP pi=
ns also.<br><br>Signed-off-by: Haojian Zhuang &lt;<a href=3D"mailto:haojian=
.zhuang at marvell.com">haojian.zhuang at marvell.com</a>&gt;<br>
---<br>=A0arch/arm/mach-pxa/include/mach/gpio.h |=A0=A0=A0 2 +-<br>=A0arch/=
arm/mach-pxa/include/mach/irqs.h |=A0=A0=A0 2 +-<br>=A0arch/arm/mach-pxa/mf=
p-pxa2xx.c=A0=A0=A0=A0=A0=A0=A0 |=A0=A0=A0 6 +++---<br>=A0arch/arm/mach-pxa=
/pxa3xx.c=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 |=A0=A0=A0 2 +-<br>=A0arch/arm/p=
lat-pxa/include/plat/mfp.h=A0 |=A0=A0=A0 2 +-<br>
=A05 files changed, 7 insertions(+), 7 deletions(-)<br><br>diff --git a/arc=
h/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h<=
br>index b024a8b..0cd683c 100644<br>--- a/arch/arm/mach-pxa/include/mach/gp=
io.h<br>
+++ b/arch/arm/mach-pxa/include/mach/gpio.h<br>@@ -99,7 +99,7 @@<br>=A0#def=
ine GAFR(x)=A0=A0=A0 =A0=A0=A0 GPIO_REG(0x54 + (((x) &amp; 0x70) &gt;&gt; 2=
))<br>=A0<br>=A0<br>-#define NR_BUILTIN_GPIO 128<br>+#define NR_BUILTIN_GPI=
O 256<br>=A0<br>
=A0#define gpio_to_bank(gpio)=A0=A0=A0 ((gpio) &gt;&gt; 5)<br>=A0#define gp=
io_to_irq(gpio)=A0=A0=A0 IRQ_GPIO(gpio)<br>diff --git a/arch/arm/mach-pxa/i=
nclude/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h<br>index 3677a9a=
..9565b0f 100644<br>
--- a/arch/arm/mach-pxa/include/mach/irqs.h<br>+++ b/arch/arm/mach-pxa/incl=
ude/mach/irqs.h<br>@@ -106,7 +106,7 @@<br>=A0#endif<br>=A0<br>=A0#define PX=
A_GPIO_IRQ_BASE=A0=A0=A0 PXA_IRQ(96)<br>-#define PXA_GPIO_IRQ_NUM=A0=A0=A0 =
(192)<br>+#define PXA_GPIO_IRQ_NUM=A0=A0=A0 (256)<br>
=A0<br>=A0#define GPIO_2_x_TO_IRQ(x)=A0=A0=A0 (PXA_GPIO_IRQ_BASE + (x))<br>=
=A0#define IRQ_GPIO(x)=A0=A0=A0 (((x) &lt; 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_=
x_TO_IRQ(x))<br>diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach=
-pxa/mfp-pxa2xx.c<br>
index cf6b720..767db92 100644<br>--- a/arch/arm/mach-pxa/mfp-pxa2xx.c<br>++=
+ b/arch/arm/mach-pxa/mfp-pxa2xx.c<br>@@ -41,7 +41,7 @@ struct gpio_desc {<=
br>=A0=A0=A0=A0 unsigned long=A0=A0=A0 config;<br>=A0};<br>=A0<br>-static s=
truct gpio_desc gpio_desc[MFP_PIN_GPIO127 + 1];<br>
+static struct gpio_desc gpio_desc[MFP_PIN_GPIO255 + 1];<br>=A0<br>=A0stati=
c unsigned long gpdr_lpm[4];<br>=A0<br>@@ -117,7 +117,7 @@ static inline in=
t __mfp_validate(int mfp)<br>=A0{<br>=A0=A0=A0=A0 int gpio =3D mfp_to_gpio(=
mfp);<br>=A0<br>
-=A0=A0=A0 if ((mfp &gt; MFP_PIN_GPIO127) || !gpio_desc[gpio].valid) {<br>+=
=A0=A0=A0 if ((mfp &gt; MFP_PIN_GPIO255) || !gpio_desc[gpio].valid) {<br>=
=A0=A0=A0=A0 =A0=A0=A0 pr_warning(&quot;%s: GPIO%d is invalid pin\n&quot;, =
__func__, gpio);<br>=A0=A0=A0=A0 =A0=A0=A0 return -1;<br>
=A0=A0=A0=A0 }<br>@@ -169,7 +169,7 @@ int gpio_set_wake(unsigned int gpio, =
unsigned int on)<br>=A0=A0=A0=A0 struct gpio_desc *d;<br>=A0=A0=A0=A0 unsig=
ned long c, mux_taken;<br>=A0<br>-=A0=A0=A0 if (gpio &gt; mfp_to_gpio(MFP_P=
IN_GPIO127))<br>+=A0=A0=A0 if (gpio &gt; mfp_to_gpio(MFP_PIN_GPIO255))<br>
=A0=A0=A0=A0 =A0=A0=A0 return -EINVAL;<br>=A0<br>=A0=A0=A0=A0 d =3D &amp;gp=
io_desc[gpio];<br>diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-p=
xa/pxa3xx.c<br>index 09b7b1a..7783ac9 100644<br>--- a/arch/arm/mach-pxa/pxa=
3xx.c<br>+++ b/arch/arm/mach-pxa/pxa3xx.c<br>
@@ -539,7 +539,7 @@ void __init pxa3xx_init_irq(void)<br>=A0=A0=A0=A0 __asm=
__ __volatile__(&quot;mcr p15, 0, %0, c15, c1, 0\n&quot;: :&quot;r&quot;(va=
lue));<br>=A0<br>=A0=A0=A0=A0 pxa_init_irq(56, pxa3xx_set_wake);<br>-=A0=A0=
=A0 pxa_init_gpio(IRQ_GPIO_2_x, 2, 127, NULL);<br>
+=A0=A0=A0 pxa_init_gpio(IRQ_GPIO_2_x, 2, 255, NULL);<br>=A0}<br>=A0<br>=A0=
/*<br>diff --git a/arch/arm/plat-pxa/include/plat/mfp.h b/arch/arm/plat-pxa=
/include/plat/mfp.h<br>index 22086e6..857a683 100644<br>--- a/arch/arm/plat=
-pxa/include/plat/mfp.h<br>
+++ b/arch/arm/plat-pxa/include/plat/mfp.h<br>@@ -16,7 +16,7 @@<br>=A0#ifnd=
ef __ASM_PLAT_MFP_H<br>=A0#define __ASM_PLAT_MFP_H<br>=A0<br>-#define mfp_t=
o_gpio(m)=A0=A0=A0 ((m) % 128)<br>+#define mfp_to_gpio(m)=A0=A0=A0 ((m) % 2=
56)<br>=A0<br>=A0/* list of all the configurable MFP pins */<br>
=A0enum {<br>-- <br>1.5.6.5<br><br>

--0016e646114219b34d0474649139--
--0016e646114219b354047464913b
Content-Type: text/x-patch; charset=US-ASCII; 
	name="0001-pxa-extend-gpio-pins-from-128-to-256.patch"
Content-Disposition: attachment; 
	filename="0001-pxa-extend-gpio-pins-from-128-to-256.patch"
Content-Transfer-Encoding: base64
X-Attachment-Id: f_g019snqm0

RnJvbSAzNDE2MjhkOWM0NGQxMjAyODRjZDQ1ZThmYTVhYzliZDRhY2ZlNDY0IE1vbiBTZXAgMTcg
MDA6MDA6MDAgMjAwMQpGcm9tOiBIYW9qaWFuIFpodWFuZyA8aGFvamlhbi56aHVhbmdAbWFydmVs
bC5jb20+CkRhdGU6IEZyaSwgMjUgU2VwIDIwMDkgMTQ6Mjg6MTEgLTA0MDAKU3ViamVjdDogW1BB
VENIXSBweGE6IGV4dGVuZCBncGlvIHBpbnMgZnJvbSAxMjggdG8gMjU2CgpHUElPIHBpbnMgZXhj
ZWVkcyAxMjggcGlucy4gU28gZXh0ZW5kIHRoZSBtYXhpbXVtIEdQSU8gcGlucyB0byAyNTYuCkFu
ZCBleHRlbmQgTUZQIHBpbnMgYWxzby4KClNpZ25lZC1vZmYtYnk6IEhhb2ppYW4gWmh1YW5nIDxo
YW9qaWFuLnpodWFuZ0BtYXJ2ZWxsLmNvbT4KLS0tCiBhcmNoL2FybS9tYWNoLXB4YS9pbmNsdWRl
L21hY2gvZ3Bpby5oIHwgICAgMiArLQogYXJjaC9hcm0vbWFjaC1weGEvaW5jbHVkZS9tYWNoL2ly
cXMuaCB8ICAgIDIgKy0KIGFyY2gvYXJtL21hY2gtcHhhL21mcC1weGEyeHguYyAgICAgICAgfCAg
ICA2ICsrKy0tLQogYXJjaC9hcm0vbWFjaC1weGEvcHhhM3h4LmMgICAgICAgICAgICB8ICAgIDIg
Ky0KIGFyY2gvYXJtL3BsYXQtcHhhL2luY2x1ZGUvcGxhdC9tZnAuaCAgfCAgICAyICstCiA1IGZp
bGVzIGNoYW5nZWQsIDcgaW5zZXJ0aW9ucygrKSwgNyBkZWxldGlvbnMoLSkKCmRpZmYgLS1naXQg
YS9hcmNoL2FybS9tYWNoLXB4YS9pbmNsdWRlL21hY2gvZ3Bpby5oIGIvYXJjaC9hcm0vbWFjaC1w
eGEvaW5jbHVkZS9tYWNoL2dwaW8uaAppbmRleCBiMDI0YThiLi4wY2Q2ODNjIDEwMDY0NAotLS0g
YS9hcmNoL2FybS9tYWNoLXB4YS9pbmNsdWRlL21hY2gvZ3Bpby5oCisrKyBiL2FyY2gvYXJtL21h
Y2gtcHhhL2luY2x1ZGUvbWFjaC9ncGlvLmgKQEAgLTk5LDcgKzk5LDcgQEAKICNkZWZpbmUgR0FG
Uih4KQkJR1BJT19SRUcoMHg1NCArICgoKHgpICYgMHg3MCkgPj4gMikpCiAKIAotI2RlZmluZSBO
Ul9CVUlMVElOX0dQSU8gMTI4CisjZGVmaW5lIE5SX0JVSUxUSU5fR1BJTyAyNTYKIAogI2RlZmlu
ZSBncGlvX3RvX2JhbmsoZ3BpbykJKChncGlvKSA+PiA1KQogI2RlZmluZSBncGlvX3RvX2lycShn
cGlvKQlJUlFfR1BJTyhncGlvKQpkaWZmIC0tZ2l0IGEvYXJjaC9hcm0vbWFjaC1weGEvaW5jbHVk
ZS9tYWNoL2lycXMuaCBiL2FyY2gvYXJtL21hY2gtcHhhL2luY2x1ZGUvbWFjaC9pcnFzLmgKaW5k
ZXggMzY3N2E5YS4uOTU2NWIwZiAxMDA2NDQKLS0tIGEvYXJjaC9hcm0vbWFjaC1weGEvaW5jbHVk
ZS9tYWNoL2lycXMuaAorKysgYi9hcmNoL2FybS9tYWNoLXB4YS9pbmNsdWRlL21hY2gvaXJxcy5o
CkBAIC0xMDYsNyArMTA2LDcgQEAKICNlbmRpZgogCiAjZGVmaW5lIFBYQV9HUElPX0lSUV9CQVNF
CVBYQV9JUlEoOTYpCi0jZGVmaW5lIFBYQV9HUElPX0lSUV9OVU0JKDE5MikKKyNkZWZpbmUgUFhB
X0dQSU9fSVJRX05VTQkoMjU2KQogCiAjZGVmaW5lIEdQSU9fMl94X1RPX0lSUSh4KQkoUFhBX0dQ
SU9fSVJRX0JBU0UgKyAoeCkpCiAjZGVmaW5lIElSUV9HUElPKHgpCSgoKHgpIDwgMikgPyAoSVJR
X0dQSU8wICsgKHgpKSA6IEdQSU9fMl94X1RPX0lSUSh4KSkKZGlmZiAtLWdpdCBhL2FyY2gvYXJt
L21hY2gtcHhhL21mcC1weGEyeHguYyBiL2FyY2gvYXJtL21hY2gtcHhhL21mcC1weGEyeHguYwpp
bmRleCBjZjZiNzIwLi43NjdkYjkyIDEwMDY0NAotLS0gYS9hcmNoL2FybS9tYWNoLXB4YS9tZnAt
cHhhMnh4LmMKKysrIGIvYXJjaC9hcm0vbWFjaC1weGEvbWZwLXB4YTJ4eC5jCkBAIC00MSw3ICs0
MSw3IEBAIHN0cnVjdCBncGlvX2Rlc2MgewogCXVuc2lnbmVkIGxvbmcJY29uZmlnOwogfTsKIAot
c3RhdGljIHN0cnVjdCBncGlvX2Rlc2MgZ3Bpb19kZXNjW01GUF9QSU5fR1BJTzEyNyArIDFdOwor
c3RhdGljIHN0cnVjdCBncGlvX2Rlc2MgZ3Bpb19kZXNjW01GUF9QSU5fR1BJTzI1NSArIDFdOwog
CiBzdGF0aWMgdW5zaWduZWQgbG9uZyBncGRyX2xwbVs0XTsKIApAQCAtMTE3LDcgKzExNyw3IEBA
IHN0YXRpYyBpbmxpbmUgaW50IF9fbWZwX3ZhbGlkYXRlKGludCBtZnApCiB7CiAJaW50IGdwaW8g
PSBtZnBfdG9fZ3BpbyhtZnApOwogCi0JaWYgKChtZnAgPiBNRlBfUElOX0dQSU8xMjcpIHx8ICFn
cGlvX2Rlc2NbZ3Bpb10udmFsaWQpIHsKKwlpZiAoKG1mcCA+IE1GUF9QSU5fR1BJTzI1NSkgfHwg
IWdwaW9fZGVzY1tncGlvXS52YWxpZCkgewogCQlwcl93YXJuaW5nKCIlczogR1BJTyVkIGlzIGlu
dmFsaWQgcGluXG4iLCBfX2Z1bmNfXywgZ3Bpbyk7CiAJCXJldHVybiAtMTsKIAl9CkBAIC0xNjks
NyArMTY5LDcgQEAgaW50IGdwaW9fc2V0X3dha2UodW5zaWduZWQgaW50IGdwaW8sIHVuc2lnbmVk
IGludCBvbikKIAlzdHJ1Y3QgZ3Bpb19kZXNjICpkOwogCXVuc2lnbmVkIGxvbmcgYywgbXV4X3Rh
a2VuOwogCi0JaWYgKGdwaW8gPiBtZnBfdG9fZ3BpbyhNRlBfUElOX0dQSU8xMjcpKQorCWlmIChn
cGlvID4gbWZwX3RvX2dwaW8oTUZQX1BJTl9HUElPMjU1KSkKIAkJcmV0dXJuIC1FSU5WQUw7CiAK
IAlkID0gJmdwaW9fZGVzY1tncGlvXTsKZGlmZiAtLWdpdCBhL2FyY2gvYXJtL21hY2gtcHhhL3B4
YTN4eC5jIGIvYXJjaC9hcm0vbWFjaC1weGEvcHhhM3h4LmMKaW5kZXggMDliN2IxYS4uNzc4M2Fj
OSAxMDA2NDQKLS0tIGEvYXJjaC9hcm0vbWFjaC1weGEvcHhhM3h4LmMKKysrIGIvYXJjaC9hcm0v
bWFjaC1weGEvcHhhM3h4LmMKQEAgLTUzOSw3ICs1MzksNyBAQCB2b2lkIF9faW5pdCBweGEzeHhf
aW5pdF9pcnEodm9pZCkKIAlfX2FzbV9fIF9fdm9sYXRpbGVfXygibWNyIHAxNSwgMCwgJTAsIGMx
NSwgYzEsIDBcbiI6IDoiciIodmFsdWUpKTsKIAogCXB4YV9pbml0X2lycSg1NiwgcHhhM3h4X3Nl
dF93YWtlKTsKLQlweGFfaW5pdF9ncGlvKElSUV9HUElPXzJfeCwgMiwgMTI3LCBOVUxMKTsKKwlw
eGFfaW5pdF9ncGlvKElSUV9HUElPXzJfeCwgMiwgMjU1LCBOVUxMKTsKIH0KIAogLyoKZGlmZiAt
LWdpdCBhL2FyY2gvYXJtL3BsYXQtcHhhL2luY2x1ZGUvcGxhdC9tZnAuaCBiL2FyY2gvYXJtL3Bs
YXQtcHhhL2luY2x1ZGUvcGxhdC9tZnAuaAppbmRleCAyMjA4NmU2Li44NTdhNjgzIDEwMDY0NAot
LS0gYS9hcmNoL2FybS9wbGF0LXB4YS9pbmNsdWRlL3BsYXQvbWZwLmgKKysrIGIvYXJjaC9hcm0v
cGxhdC1weGEvaW5jbHVkZS9wbGF0L21mcC5oCkBAIC0xNiw3ICsxNiw3IEBACiAjaWZuZGVmIF9f
QVNNX1BMQVRfTUZQX0gKICNkZWZpbmUgX19BU01fUExBVF9NRlBfSAogCi0jZGVmaW5lIG1mcF90
b19ncGlvKG0pCSgobSkgJSAxMjgpCisjZGVmaW5lIG1mcF90b19ncGlvKG0pCSgobSkgJSAyNTYp
CiAKIC8qIGxpc3Qgb2YgYWxsIHRoZSBjb25maWd1cmFibGUgTUZQIHBpbnMgKi8KIGVudW0gewot
LSAKMS41LjYuNQoK
--0016e646114219b354047464913b--



More information about the linux-arm-kernel mailing list