LDREX/STREX and pre-emption on SMP hardware

[David Xiao]

On Mon, 2009-08-24 at 08:44 -0700, Catalin Marinas wrote:
> On Fri, 2009-08-21 at 14:29 -0700, David Xiao wrote:
> > The DDI0406A ARM V7 Architecture Reference Manual (section A3.4.1) seems
> > to indicate that the exclusive monitor is tagging/matching the physical
> > memory address accessed by the LDREX/STREX instructions.
> > 
> > And in the same document (section A3.4.5), it seems to suggest that the
> > reason we need to do CLREX during the context switch is that because the
> > IsExclusiveLocal() implementation does not have to do memory
> > address/size check, but just the exclusive state check.
> 
> Yes, that's correct. And the reason we don't need this in interrupt
> handlers is that we would never call a STREX without a preceding LDREX
> or just a LDREX without a being followed by a STREX and interrupt
> handlers are in the worst case nested rather than freely preemptible.
> 

If an IRQ handler is registered with IRQF_DISABLED, then the handling of
this IRQ will not be preempted by any other IRQ handlers; however, if it
is not using that flag, which is the common case, that IRQ handler could
be interrupted/preempted by another different IRQ handler though.

Meanwhile, if we could assume that interrupt handlers are always using
the LDREX/CLREX in pairs, then the same thing could be assumed for any
other contexts in the system, kernel/user threads. Therefore, I do not
think that we can make that assumption.
  
Given that, I think we need to add the same CLREX for the switching of
the ISR context as well.

David