[PATCH v3 15/16] PCI: dwc: tegra194: Use cached PCIe capability offset

[sashiko-bot at kernel.org]

> In host mode: tegra_pcie_dw_host_init() runs inside .start_link, which is
> called after dw_pcie_host_init() has cached the offset. However, the
> driver's own initialization already enables hardware, so calling
> dw_pcie_get_pcie_cap() is safe and will return the cached value.
> 
> In endpoint mode: pex_ep_event_pex_rst_deassert() runs after hardware is
> enabled (PERST# deassert). Because the core no longer caches automatically,
> we call dw_pcie_get_pcie_cap() here to cache the offset for subsequent
> accesses. The helper performs the DBI read only when hardware is ready.
> 
> Thus, the private pcie_cap_base is always valid and can still be used for
> register accesses.
> 
> Signed-off-by: Hans Zhang <18255117159 at 163.com>

Sashiko has reviewed this patch and found no issues. It looks great!

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Sashiko AI review · https://sashiko.dev/#/patchset/20260720150619.24733-1-18255117159@163.com?part=15