[PATCH] arm64: dts: amlogic: meson-g12b: Fix L2 cache reference for S922X CPUs

[Neil Armstrong]

On 11/23/25 18:14, Guillaume La Roque wrote:
> The original addition of cache information for the Amlogic S922X SoC
> used the wrong next-level cache node for CPU cores 100 and 101,
> incorrectly referencing `l2_cache_l`. These cores actually belong to
> the big cluster and should reference `l2_cache_b`. Update the device
> tree accordingly.
> 
> Fixes: e7f85e6c155a ("arm64: dts: amlogic: Add cache information to the Amlogic S922X SoC")
> Signed-off-by: Guillaume La Roque <glaroque at baylibre.com>
> ---
>   arch/arm64/boot/dts/amlogic/meson-g12b.dtsi | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
> index f04efa828256..23358d94844c 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
> @@ -87,7 +87,7 @@ cpu100: cpu at 100 {
>   			i-cache-line-size = <32>;
>   			i-cache-size = <0x8000>;
>   			i-cache-sets = <32>;
> -			next-level-cache = <&l2_cache_l>;
> +			next-level-cache = <&l2_cache_b>;
>   			#cooling-cells = <2>;
>   		};
>   
> @@ -103,7 +103,7 @@ cpu101: cpu at 101 {
>   			i-cache-line-size = <32>;
>   			i-cache-size = <0x8000>;
>   			i-cache-sets = <32>;
> -			next-level-cache = <&l2_cache_l>;
> +			next-level-cache = <&l2_cache_b>;
>   			#cooling-cells = <2>;
>   		};
>   
> 
> ---
> base-commit: 6a23ae0a96a600d1d12557add110e0bb6e32730c
> change-id: 20251123-fixkhadas-c84da7d7c47c
> 
> Best regards,

Reviewed-by: Neil Armstrong <neil.armstrong at linaro.org>