[PATCH 26/26] clk: amlogic: c3-peripherals: use helper for basic composite clocks

[Jerome Brunet]

On Thu 03 Jul 2025 at 15:56, Chuan Liu <chuan.liu at amlogic.com> wrote:


>> +static C3_COMP_SEL(hcodec_1, VDEC3_CLK_CTRL, 9, 0x7, c3_hcodec_pre_parents);
>> +static C3_COMP_DIV(hcodec_1, VDEC3_CLK_CTRL, 0, 7);
>> +static C3_COMP_GATE(hcodec_1, VDEC3_CLK_CTRL, 8);
>
>
> Note: hcodec_clk is a no-glitch clock. The current driver may fail to set
> hcodec_clk properly. A previous patch attempted to fix this by adding a
> flag,
> but was abandoned as it introduced other issues.
> (https://lore.kernel.org/all/f8c3b6e7-2f5d-493e-8254-2a27623f0d2e@amlogic.com/)
>
> This macro won't be suitable if we revisit the flag approach later.
>

But it is now. As documented in the description, the purpose of these
macro is to get the easy and repeating stuff out of the way, helping
tricky things stand out.

So when/if you fix this clock and you add tricky things, please drop the
macro then and add some comments explaining what you do and why.

>
>>
>>   static const struct clk_parent_data c3_hcodec_parents[] = {
>>          { .hw = &c3_hcodec_0.hw },
>
>
> [...]
>
>
>> --
>> 2.47.2
>>
>>
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-- 
Jerome