[APPROACH 2 1/2] arm64: dts: amlogic: list all slave clocks for audio clock controller

Jan Dakinevich jan.dakinevich at salutedevices.com
Wed May 8 07:42:58 PDT 2024


Signed-off-by: Jan Dakinevich <jan.dakinevich at salutedevices.com>
---
 arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 27 ++++++++++++++++++++--
 arch/arm64/boot/dts/amlogic/meson-g12.dtsi | 26 +++++++++++++++++++--
 arch/arm64/boot/dts/amlogic/meson-sm1.dtsi | 26 +++++++++++++++++++--
 3 files changed, 73 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index 6d12b760b90f..28f4ec5f39b0 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -1342,7 +1342,9 @@ clkc_audio: clock-controller at 0 {
 					 <&clkc CLKID_HIFI_PLL>,
 					 <&clkc CLKID_FCLK_DIV3>,
 					 <&clkc CLKID_FCLK_DIV4>,
-					 <&clkc CLKID_GP0_PLL>;
+					 <&clkc CLKID_GP0_PLL>,
+					 <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
+					 <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>;
 				clock-names = "pclk",
 					      "mst_in0",
 					      "mst_in1",
@@ -1351,7 +1353,28 @@ clkc_audio: clock-controller at 0 {
 					      "mst_in4",
 					      "mst_in5",
 					      "mst_in6",
-					      "mst_in7";
+					      "mst_in7",
+					      "slv_sclk0",
+					      "slv_sclk1",
+					      "slv_sclk2",
+					      "slv_sclk3",
+					      "slv_sclk4",
+					      "slv_sclk5",
+					      "slv_sclk6",
+					      "slv_sclk7",
+					      "slv_sclk8",
+					      "slv_sclk9",
+					      "slv_lrclk0",
+					      "slv_lrclk1",
+					      "slv_lrclk2",
+					      "slv_lrclk3",
+					      "slv_lrclk4",
+					      "slv_lrclk5",
+					      "slv_lrclk6",
+					      "slv_lrclk7",
+					      "slv_lrclk8",
+					      "slv_lrclk9";
+
 
 				resets = <&reset RESET_AUDIO>;
 			};
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12.dtsi
index e732df3f3114..af99781f3c4e 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12.dtsi
@@ -82,7 +82,9 @@ clkc_audio: clock-controller at 0 {
 				 <&clkc CLKID_HIFI_PLL>,
 				 <&clkc CLKID_FCLK_DIV3>,
 				 <&clkc CLKID_FCLK_DIV4>,
-				 <&clkc CLKID_GP0_PLL>;
+				 <&clkc CLKID_GP0_PLL>,
+				 <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
+				 <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>;
 			clock-names = "pclk",
 				      "mst_in0",
 				      "mst_in1",
@@ -91,7 +93,27 @@ clkc_audio: clock-controller at 0 {
 				      "mst_in4",
 				      "mst_in5",
 				      "mst_in6",
-				      "mst_in7";
+				      "mst_in7",
+				      "slv_sclk0",
+				      "slv_sclk1",
+				      "slv_sclk2",
+				      "slv_sclk3",
+				      "slv_sclk4",
+				      "slv_sclk5",
+				      "slv_sclk6",
+				      "slv_sclk7",
+				      "slv_sclk8",
+				      "slv_sclk9",
+				      "slv_lrclk0",
+				      "slv_lrclk1",
+				      "slv_lrclk2",
+				      "slv_lrclk3",
+				      "slv_lrclk4",
+				      "slv_lrclk5",
+				      "slv_lrclk6",
+				      "slv_lrclk7",
+				      "slv_lrclk8",
+				      "slv_lrclk9";
 
 			resets = <&reset RESET_AUDIO>;
 		};
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
index 643f94d9d08e..24e520c3e2a6 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
@@ -162,7 +162,9 @@ clkc_audio: clock-controller at 0 {
 				 <&clkc CLKID_HIFI_PLL>,
 				 <&clkc CLKID_FCLK_DIV3>,
 				 <&clkc CLKID_FCLK_DIV4>,
-				 <&clkc CLKID_FCLK_DIV5>;
+				 <&clkc CLKID_FCLK_DIV5>,
+				 <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
+				 <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>;
 			clock-names = "pclk",
 				      "mst_in0",
 				      "mst_in1",
@@ -171,7 +173,27 @@ clkc_audio: clock-controller at 0 {
 				      "mst_in4",
 				      "mst_in5",
 				      "mst_in6",
-				      "mst_in7";
+				      "mst_in7",
+				      "slv_sclk0",
+				      "slv_sclk1",
+				      "slv_sclk2",
+				      "slv_sclk3",
+				      "slv_sclk4",
+				      "slv_sclk5",
+				      "slv_sclk6",
+				      "slv_sclk7",
+				      "slv_sclk8",
+				      "slv_sclk9",
+				      "slv_lrclk0",
+				      "slv_lrclk1",
+				      "slv_lrclk2",
+				      "slv_lrclk3",
+				      "slv_lrclk4",
+				      "slv_lrclk5",
+				      "slv_lrclk6",
+				      "slv_lrclk7",
+				      "slv_lrclk8",
+				      "slv_lrclk9";
 
 			resets = <&reset RESET_AUDIO>;
 		};
-- 
2.34.1




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