[PATCH v3 1/3] dt-bindings: clock: fix C3 PLL input parameter
Xianwei Zhao
xianwei.zhao at amlogic.com
Fri Aug 23 02:22:11 PDT 2024
Hi Krzysztof,
Thanks for your reply.
On 2024/8/23 14:41, Krzysztof Kozlowski wrote:
> [ EXTERNAL EMAIL ]
>
> On Fri, Aug 23, 2024 at 10:29:17AM +0800, Xianwei Zhao wrote:
>> Add C3 PLL controller input clock parameters "fix".
>>
>> The clock named "fix" was initially implemented in PLL clock controller driver.
>> However, some registers required secure zone access, so we moved it to
>> the secure zone (BL31) and accessed it through SCMI. Since the PLL clock
>> driver needs to use this clock, the "fix" clock is used as an input source.
>> We updated the driver but forgot to modify the binding accordingly,
>
> Please wrap commit message according to Linux coding style / submission
> process (neither too early nor over the limit):
> https://elixir.bootlin.com/linux/v6.4-rc1/source/Documentation/process/submitting-patches.rst#L597
>
Will do.
> Best regards,
> Krzysztof
>
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