From konrad.zielinski at synergyflux.pl  Fri Aug  2 00:30:58 2024
From: konrad.zielinski at synergyflux.pl (=?UTF-8?Q? Konrad_Zieli=C5=84ski_ ?=)
Date: Fri,  2 Aug 2024 07:30:58 GMT
Subject: Instalacja pv
Message-ID: <20240802084500-0.1.d4.39h4j.0.mcl2a25606@synergyflux.pl>

Dzie? dobry,

czy s? Pa?stwo otwarci na niezobowi?zuj?c? rozmow? na temat fotowoltaiki?

Jako firma specjalizuj?ca si? w instalacji i serwisie najlepszych jako?ciowo paneli s?onecznych na rynku chcia?bym przedstawi? propozycj?, jak? wsp?lnie z zespo?em przygotowali?my dla Pa?stwa obiektu.

B?d? wdzi?czny za wiadomo?? od Pa?stwa czy mo?emy porozmawia?.


Pozdrawiam
Konrad Zieli?ski 


From kamil.tralewski at originateinc.pl  Mon Aug  5 00:50:08 2024
From: kamil.tralewski at originateinc.pl (Kamil Tralewski)
Date: Mon,  5 Aug 2024 07:50:08 GMT
Subject: =?UTF-8?Q?S=C5=82owa_kluczowe_do_wypozycjonowania?=
Message-ID: <20240805074500-0.1.ed.1he2s.0.nmb4nkn9ep@OriginateInc.pl>

Dzie? dobry,

zapozna?em si? z Pa?stwa ofert? i z przyjemno?ci? przyznaj?, ?e przyci?ga uwag? i zach?ca do dalszych rozm?w. 

Pomy?la?em, ?e mo?e m?g?bym mie? sw?j wk?ad w Pa?stwa rozw?j i pom?c dotrze? z t? ofert? do wi?kszego grona odbiorc?w. Pozycjonuj? strony www, dzi?ki czemu generuj? ?wietny ruch w sieci.

Mo?emy porozmawia? w najbli?szym czasie?


Pozdrawiam
Kamil Tralewski


From ulf.hansson at linaro.org  Mon Aug  5 04:34:43 2024
From: ulf.hansson at linaro.org (Ulf Hansson)
Date: Mon, 5 Aug 2024 13:34:43 +0200
Subject: [PATCH] pmdomain: amlogic: remove obsolete vpu domain driver
In-Reply-To: <20240730130227.712894-1-jbrunet@baylibre.com>
References: <20240730130227.712894-1-jbrunet@baylibre.com>
Message-ID: <CAPDyKFqbF-0d=EGdsKR2_R_-3VowLeYXGrSuzTGeN-bvwSgwGg@mail.gmail.com>

On Tue, 30 Jul 2024 at 15:02, Jerome Brunet <jbrunet at baylibre.com> wrote:
>
> meson-gx-pwrc-vpu has been superseded by meson-ee-pwrc since
> commit 53773f2dfd9c ("soc: amlogic: meson-ee-pwrc: add support for the Meson GX SoCs"),
> so v5.8.
>
> This driver is obsolete and no longer used or tested.
> There is no reason to keep it around so remove it.
>
> Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>

Applied for next, thanks!

Kind regards
Uffe


> ---
>  drivers/pmdomain/amlogic/Kconfig             |  11 -
>  drivers/pmdomain/amlogic/Makefile            |   1 -
>  drivers/pmdomain/amlogic/meson-gx-pwrc-vpu.c | 380 -------------------
>  3 files changed, 392 deletions(-)
>  delete mode 100644 drivers/pmdomain/amlogic/meson-gx-pwrc-vpu.c
>
> diff --git a/drivers/pmdomain/amlogic/Kconfig b/drivers/pmdomain/amlogic/Kconfig
> index 2108729909b5..e72b664174af 100644
> --- a/drivers/pmdomain/amlogic/Kconfig
> +++ b/drivers/pmdomain/amlogic/Kconfig
> @@ -1,17 +1,6 @@
>  # SPDX-License-Identifier: GPL-2.0-only
>  menu "Amlogic PM Domains"
>
> -config MESON_GX_PM_DOMAINS
> -       tristate "Amlogic Meson GX Power Domains driver"
> -       depends on ARCH_MESON || COMPILE_TEST
> -       depends on PM && OF
> -       default ARCH_MESON
> -       select PM_GENERIC_DOMAINS
> -       select PM_GENERIC_DOMAINS_OF
> -       help
> -         Say yes to expose Amlogic Meson GX Power Domains as
> -         Generic Power Domains.
> -
>  config MESON_EE_PM_DOMAINS
>         tristate "Amlogic Meson Everything-Else Power Domains driver"
>         depends on ARCH_MESON || COMPILE_TEST
> diff --git a/drivers/pmdomain/amlogic/Makefile b/drivers/pmdomain/amlogic/Makefile
> index 3d58abd574f9..99f195f09957 100644
> --- a/drivers/pmdomain/amlogic/Makefile
> +++ b/drivers/pmdomain/amlogic/Makefile
> @@ -1,4 +1,3 @@
>  # SPDX-License-Identifier: GPL-2.0-only
> -obj-$(CONFIG_MESON_GX_PM_DOMAINS) += meson-gx-pwrc-vpu.o
>  obj-$(CONFIG_MESON_EE_PM_DOMAINS) += meson-ee-pwrc.o
>  obj-$(CONFIG_MESON_SECURE_PM_DOMAINS) += meson-secure-pwrc.o
> diff --git a/drivers/pmdomain/amlogic/meson-gx-pwrc-vpu.c b/drivers/pmdomain/amlogic/meson-gx-pwrc-vpu.c
> deleted file mode 100644
> index 6028e91664a4..000000000000
> --- a/drivers/pmdomain/amlogic/meson-gx-pwrc-vpu.c
> +++ /dev/null
> @@ -1,380 +0,0 @@
> -/*
> - * Copyright (c) 2017 BayLibre, SAS
> - * Author: Neil Armstrong <narmstrong at baylibre.com>
> - *
> - * SPDX-License-Identifier: GPL-2.0+
> - */
> -
> -#include <linux/platform_device.h>
> -#include <linux/pm_domain.h>
> -#include <linux/bitfield.h>
> -#include <linux/regmap.h>
> -#include <linux/mfd/syscon.h>
> -#include <linux/of.h>
> -#include <linux/reset.h>
> -#include <linux/clk.h>
> -#include <linux/module.h>
> -
> -/* AO Offsets */
> -
> -#define AO_RTI_GEN_PWR_SLEEP0          (0x3a << 2)
> -
> -#define GEN_PWR_VPU_HDMI               BIT(8)
> -#define GEN_PWR_VPU_HDMI_ISO           BIT(9)
> -
> -/* HHI Offsets */
> -
> -#define HHI_MEM_PD_REG0                        (0x40 << 2)
> -#define HHI_VPU_MEM_PD_REG0            (0x41 << 2)
> -#define HHI_VPU_MEM_PD_REG1            (0x42 << 2)
> -#define HHI_VPU_MEM_PD_REG2            (0x4d << 2)
> -
> -struct meson_gx_pwrc_vpu {
> -       struct generic_pm_domain genpd;
> -       struct regmap *regmap_ao;
> -       struct regmap *regmap_hhi;
> -       struct reset_control *rstc;
> -       struct clk *vpu_clk;
> -       struct clk *vapb_clk;
> -};
> -
> -static inline
> -struct meson_gx_pwrc_vpu *genpd_to_pd(struct generic_pm_domain *d)
> -{
> -       return container_of(d, struct meson_gx_pwrc_vpu, genpd);
> -}
> -
> -static int meson_gx_pwrc_vpu_power_off(struct generic_pm_domain *genpd)
> -{
> -       struct meson_gx_pwrc_vpu *pd = genpd_to_pd(genpd);
> -       int i;
> -
> -       regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
> -                          GEN_PWR_VPU_HDMI_ISO, GEN_PWR_VPU_HDMI_ISO);
> -       udelay(20);
> -
> -       /* Power Down Memories */
> -       for (i = 0; i < 32; i += 2) {
> -               regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG0,
> -                                  0x3 << i, 0x3 << i);
> -               udelay(5);
> -       }
> -       for (i = 0; i < 32; i += 2) {
> -               regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG1,
> -                                  0x3 << i, 0x3 << i);
> -               udelay(5);
> -       }
> -       for (i = 8; i < 16; i++) {
> -               regmap_update_bits(pd->regmap_hhi, HHI_MEM_PD_REG0,
> -                                  BIT(i), BIT(i));
> -               udelay(5);
> -       }
> -       udelay(20);
> -
> -       regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
> -                          GEN_PWR_VPU_HDMI, GEN_PWR_VPU_HDMI);
> -
> -       msleep(20);
> -
> -       clk_disable_unprepare(pd->vpu_clk);
> -       clk_disable_unprepare(pd->vapb_clk);
> -
> -       return 0;
> -}
> -
> -static int meson_g12a_pwrc_vpu_power_off(struct generic_pm_domain *genpd)
> -{
> -       struct meson_gx_pwrc_vpu *pd = genpd_to_pd(genpd);
> -       int i;
> -
> -       regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
> -                          GEN_PWR_VPU_HDMI_ISO, GEN_PWR_VPU_HDMI_ISO);
> -       udelay(20);
> -
> -       /* Power Down Memories */
> -       for (i = 0; i < 32; i += 2) {
> -               regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG0,
> -                                  0x3 << i, 0x3 << i);
> -               udelay(5);
> -       }
> -       for (i = 0; i < 32; i += 2) {
> -               regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG1,
> -                                  0x3 << i, 0x3 << i);
> -               udelay(5);
> -       }
> -       for (i = 0; i < 32; i += 2) {
> -               regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG2,
> -                                  0x3 << i, 0x3 << i);
> -               udelay(5);
> -       }
> -       for (i = 8; i < 16; i++) {
> -               regmap_update_bits(pd->regmap_hhi, HHI_MEM_PD_REG0,
> -                                  BIT(i), BIT(i));
> -               udelay(5);
> -       }
> -       udelay(20);
> -
> -       regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
> -                          GEN_PWR_VPU_HDMI, GEN_PWR_VPU_HDMI);
> -
> -       msleep(20);
> -
> -       clk_disable_unprepare(pd->vpu_clk);
> -       clk_disable_unprepare(pd->vapb_clk);
> -
> -       return 0;
> -}
> -
> -static int meson_gx_pwrc_vpu_setup_clk(struct meson_gx_pwrc_vpu *pd)
> -{
> -       int ret;
> -
> -       ret = clk_prepare_enable(pd->vpu_clk);
> -       if (ret)
> -               return ret;
> -
> -       ret = clk_prepare_enable(pd->vapb_clk);
> -       if (ret)
> -               clk_disable_unprepare(pd->vpu_clk);
> -
> -       return ret;
> -}
> -
> -static int meson_gx_pwrc_vpu_power_on(struct generic_pm_domain *genpd)
> -{
> -       struct meson_gx_pwrc_vpu *pd = genpd_to_pd(genpd);
> -       int ret;
> -       int i;
> -
> -       regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
> -                          GEN_PWR_VPU_HDMI, 0);
> -       udelay(20);
> -
> -       /* Power Up Memories */
> -       for (i = 0; i < 32; i += 2) {
> -               regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG0,
> -                                  0x3 << i, 0);
> -               udelay(5);
> -       }
> -
> -       for (i = 0; i < 32; i += 2) {
> -               regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG1,
> -                                  0x3 << i, 0);
> -               udelay(5);
> -       }
> -
> -       for (i = 8; i < 16; i++) {
> -               regmap_update_bits(pd->regmap_hhi, HHI_MEM_PD_REG0,
> -                                  BIT(i), 0);
> -               udelay(5);
> -       }
> -       udelay(20);
> -
> -       ret = reset_control_assert(pd->rstc);
> -       if (ret)
> -               return ret;
> -
> -       regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
> -                          GEN_PWR_VPU_HDMI_ISO, 0);
> -
> -       ret = reset_control_deassert(pd->rstc);
> -       if (ret)
> -               return ret;
> -
> -       ret = meson_gx_pwrc_vpu_setup_clk(pd);
> -       if (ret)
> -               return ret;
> -
> -       return 0;
> -}
> -
> -static int meson_g12a_pwrc_vpu_power_on(struct generic_pm_domain *genpd)
> -{
> -       struct meson_gx_pwrc_vpu *pd = genpd_to_pd(genpd);
> -       int ret;
> -       int i;
> -
> -       regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
> -                          GEN_PWR_VPU_HDMI, 0);
> -       udelay(20);
> -
> -       /* Power Up Memories */
> -       for (i = 0; i < 32; i += 2) {
> -               regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG0,
> -                                  0x3 << i, 0);
> -               udelay(5);
> -       }
> -
> -       for (i = 0; i < 32; i += 2) {
> -               regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG1,
> -                                  0x3 << i, 0);
> -               udelay(5);
> -       }
> -
> -       for (i = 0; i < 32; i += 2) {
> -               regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG2,
> -                                  0x3 << i, 0);
> -               udelay(5);
> -       }
> -
> -       for (i = 8; i < 16; i++) {
> -               regmap_update_bits(pd->regmap_hhi, HHI_MEM_PD_REG0,
> -                                  BIT(i), 0);
> -               udelay(5);
> -       }
> -       udelay(20);
> -
> -       ret = reset_control_assert(pd->rstc);
> -       if (ret)
> -               return ret;
> -
> -       regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
> -                          GEN_PWR_VPU_HDMI_ISO, 0);
> -
> -       ret = reset_control_deassert(pd->rstc);
> -       if (ret)
> -               return ret;
> -
> -       ret = meson_gx_pwrc_vpu_setup_clk(pd);
> -       if (ret)
> -               return ret;
> -
> -       return 0;
> -}
> -
> -static bool meson_gx_pwrc_vpu_get_power(struct meson_gx_pwrc_vpu *pd)
> -{
> -       u32 reg;
> -
> -       regmap_read(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, &reg);
> -
> -       return (reg & GEN_PWR_VPU_HDMI);
> -}
> -
> -static struct meson_gx_pwrc_vpu vpu_hdmi_pd = {
> -       .genpd = {
> -               .name = "vpu_hdmi",
> -               .power_off = meson_gx_pwrc_vpu_power_off,
> -               .power_on = meson_gx_pwrc_vpu_power_on,
> -       },
> -};
> -
> -static struct meson_gx_pwrc_vpu vpu_hdmi_pd_g12a = {
> -       .genpd = {
> -               .name = "vpu_hdmi",
> -               .power_off = meson_g12a_pwrc_vpu_power_off,
> -               .power_on = meson_g12a_pwrc_vpu_power_on,
> -       },
> -};
> -
> -static int meson_gx_pwrc_vpu_probe(struct platform_device *pdev)
> -{
> -       const struct meson_gx_pwrc_vpu *vpu_pd_match;
> -       struct regmap *regmap_ao, *regmap_hhi;
> -       struct meson_gx_pwrc_vpu *vpu_pd;
> -       struct device_node *parent_np;
> -       struct reset_control *rstc;
> -       struct clk *vpu_clk;
> -       struct clk *vapb_clk;
> -       bool powered_off;
> -       int ret;
> -
> -       vpu_pd_match = of_device_get_match_data(&pdev->dev);
> -       if (!vpu_pd_match) {
> -               dev_err(&pdev->dev, "failed to get match data\n");
> -               return -ENODEV;
> -       }
> -
> -       vpu_pd = devm_kzalloc(&pdev->dev, sizeof(*vpu_pd), GFP_KERNEL);
> -       if (!vpu_pd)
> -               return -ENOMEM;
> -
> -       memcpy(vpu_pd, vpu_pd_match, sizeof(*vpu_pd));
> -
> -       parent_np = of_get_parent(pdev->dev.of_node);
> -       regmap_ao = syscon_node_to_regmap(parent_np);
> -       of_node_put(parent_np);
> -       if (IS_ERR(regmap_ao)) {
> -               dev_err(&pdev->dev, "failed to get regmap\n");
> -               return PTR_ERR(regmap_ao);
> -       }
> -
> -       regmap_hhi = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
> -                                                    "amlogic,hhi-sysctrl");
> -       if (IS_ERR(regmap_hhi)) {
> -               dev_err(&pdev->dev, "failed to get HHI regmap\n");
> -               return PTR_ERR(regmap_hhi);
> -       }
> -
> -       rstc = devm_reset_control_array_get_exclusive(&pdev->dev);
> -       if (IS_ERR(rstc))
> -               return dev_err_probe(&pdev->dev, PTR_ERR(rstc),
> -                                    "failed to get reset lines\n");
> -
> -       vpu_clk = devm_clk_get(&pdev->dev, "vpu");
> -       if (IS_ERR(vpu_clk)) {
> -               dev_err(&pdev->dev, "vpu clock request failed\n");
> -               return PTR_ERR(vpu_clk);
> -       }
> -
> -       vapb_clk = devm_clk_get(&pdev->dev, "vapb");
> -       if (IS_ERR(vapb_clk)) {
> -               dev_err(&pdev->dev, "vapb clock request failed\n");
> -               return PTR_ERR(vapb_clk);
> -       }
> -
> -       vpu_pd->regmap_ao = regmap_ao;
> -       vpu_pd->regmap_hhi = regmap_hhi;
> -       vpu_pd->rstc = rstc;
> -       vpu_pd->vpu_clk = vpu_clk;
> -       vpu_pd->vapb_clk = vapb_clk;
> -
> -       platform_set_drvdata(pdev, vpu_pd);
> -
> -       powered_off = meson_gx_pwrc_vpu_get_power(vpu_pd);
> -
> -       /* If already powered, sync the clock states */
> -       if (!powered_off) {
> -               ret = meson_gx_pwrc_vpu_setup_clk(vpu_pd);
> -               if (ret)
> -                       return ret;
> -       }
> -
> -       vpu_pd->genpd.flags = GENPD_FLAG_ALWAYS_ON;
> -       pm_genpd_init(&vpu_pd->genpd, NULL, powered_off);
> -
> -       return of_genpd_add_provider_simple(pdev->dev.of_node,
> -                                           &vpu_pd->genpd);
> -}
> -
> -static void meson_gx_pwrc_vpu_shutdown(struct platform_device *pdev)
> -{
> -       struct meson_gx_pwrc_vpu *vpu_pd = platform_get_drvdata(pdev);
> -       bool powered_off;
> -
> -       powered_off = meson_gx_pwrc_vpu_get_power(vpu_pd);
> -       if (!powered_off)
> -               vpu_pd->genpd.power_off(&vpu_pd->genpd);
> -}
> -
> -static const struct of_device_id meson_gx_pwrc_vpu_match_table[] = {
> -       { .compatible = "amlogic,meson-gx-pwrc-vpu", .data = &vpu_hdmi_pd },
> -       {
> -         .compatible = "amlogic,meson-g12a-pwrc-vpu",
> -         .data = &vpu_hdmi_pd_g12a
> -       },
> -       { /* sentinel */ }
> -};
> -MODULE_DEVICE_TABLE(of, meson_gx_pwrc_vpu_match_table);
> -
> -static struct platform_driver meson_gx_pwrc_vpu_driver = {
> -       .probe  = meson_gx_pwrc_vpu_probe,
> -       .shutdown = meson_gx_pwrc_vpu_shutdown,
> -       .driver = {
> -               .name           = "meson_gx_pwrc_vpu",
> -               .of_match_table = meson_gx_pwrc_vpu_match_table,
> -       },
> -};
> -module_platform_driver(meson_gx_pwrc_vpu_driver);
> -MODULE_DESCRIPTION("Amlogic Meson GX Power Domains driver");
> -MODULE_LICENSE("GPL v2");
> --
> 2.43.0
>


From daniel at fooishbar.org  Mon Aug  5 06:11:32 2024
From: daniel at fooishbar.org (Daniel Stone)
Date: Mon, 5 Aug 2024 14:11:32 +0100
Subject: [PATCH v9 0/6] drm/ci: Add support for GPU and display testing
In-Reply-To: <20240730021545.912271-1-vignesh.raman@collabora.com>
References: <20240730021545.912271-1-vignesh.raman@collabora.com>
Message-ID: <CAPj87rOYVCG2A10ruyYan9y6NmMY0fUM6Z5-9ht7dEp_THYmNw@mail.gmail.com>

Hi Vignesh,

On Tue, 30 Jul 2024 at 03:16, Vignesh Raman <vignesh.raman at collabora.com> wrote:
> Some ARM SOCs have a separate display controller and GPU, each with
> different drivers. For mediatek mt8173, the GPU driver is powervr,
> and the display driver is mediatek. In the case of mediatek mt8183,
> the GPU driver is panfrost, and the display driver is mediatek.
> With rockchip rk3288/rk3399, the GPU driver is panfrost, while the
> display driver is rockchip. For amlogic meson G12B (A311D) SOC, the
> GPU driver is panfrost, and the display driver is meson.
>
> IGT tests run various tests with different xfails and can test both
> GPU devices and KMS/display devices. Currently, in drm-ci for MediaTek,
> Rockchip, and Amlogic Meson platforms, only the GPU driver is tested.
> This leads to incomplete coverage since the display is never tested on
> these platforms. This commit series adds support in drm-ci to run tests
> for both GPU and display drivers for MediaTek mt8173/mt8183, Rockchip
> rk3288/rk3399, and Amlogic Meson G12B (A311D) platforms.
>
> Update the expectations file, and skip driver-specific tests and
> tools_test on non-intel platforms.

Thanks, series looks sensible and is:
Reviewed-by: Daniel Stone <daniels at collabora.com>

Cheers,
Daniel


From bigeasy at linutronix.de  Mon Aug  5 08:33:09 2024
From: bigeasy at linutronix.de (Sebastian Andrzej Siewior)
Date: Mon, 5 Aug 2024 17:33:09 +0200
Subject: [PATCH v1] ASoC: meson: axg-fifo: set option to use raw spinlock
In-Reply-To: <1j1q3cw5ri.fsf@starbuckisacylon.baylibre.com>
References: <20240729131652.3012327-1-avkrasnov@salutedevices.com>
 <1ja5i0wags.fsf@starbuckisacylon.baylibre.com>
 <2b16b95e-196e-4d8a-98c3-3be568cdd18a@sirena.org.uk>
 <1j5xsow839.fsf@starbuckisacylon.baylibre.com>
 <7dfdade5-3a57-4883-bfac-067c50ec0ffb@sirena.org.uk>
 <1j1q3cw5ri.fsf@starbuckisacylon.baylibre.com>
Message-ID: <20240805153309.k_SfHw62@linutronix.de>

On 2024-07-29 17:57:05 [+0200], Jerome Brunet wrote:
> On Mon 29 Jul 2024 at 16:28, Mark Brown <broonie at kernel.org> wrote:
> 
> > On Mon, Jul 29, 2024 at 05:06:50PM +0200, Jerome Brunet wrote:
> >> On Mon 29 Jul 2024 at 15:44, Mark Brown <broonie at kernel.org> wrote:
> >
> >> > I don't recall this coming up much TBH.  It may be that people just set
> >> > raw spinlocks when they need it, or that there's not many people using
> >> > relevant devices with RT kernels.
> >
> >> I have not been playing much with RT TBH, but AFAIK, with RT irq
> >> handlers are threaded unless IRQF_NO_THREAD is set. In this case,
> >> something preemptible in the handler should not be a problem.
> >
> >> The axg-fifo drivers do not have IRQF_NO_THREAD so something is a bit
> >> unclear here.
> >
> > Yeah, it's definitely likely to happen all the time for people using RT
> > with relevant devices.  I'm not sure I have a good sense of if it's
> > likely to be a nasty surprise to switch raw spinlocks on by default when
> > it's currently controllable, I'd expect it'll generally be fine but it's
> > possibly a bit rude to any users that don't use interrupts...
> 
> Indeed it is bit radical.
> 
> My concern with this patch is that, IIUC, the handler should be
> threaded under RT and there should be no problem with the spinlock API.
> 
> Adding the RT folks to try to get a better understanding, they should
> have been CCed anyway.

I'm not sure if making the lock a raw_spinlock_t solves all the
problems. The regmap is regmap_mmio so direct memory-access and looks
simple enough to do so. In regmap_mmio_write() I see clk_enable() and
and this uses a spinlock_t so we should be back at the same problem.
There might be an additional problem if reg-caching is enabled.

Let me propose two alternatives:
#1: Why two handlers if we have IRQF_ONESHOT and the primary does almost
    nothing. Assuming the thread is always woken up and the "unexpected
    irq" case does not happen. If so, why not:

diff --git a/sound/soc/meson/axg-fifo.c b/sound/soc/meson/axg-fifo.c
index 7e6090af720b9..60af05a3cad6b 100644
--- a/sound/soc/meson/axg-fifo.c
+++ b/sound/soc/meson/axg-fifo.c
@@ -220,9 +220,21 @@ static irqreturn_t axg_fifo_pcm_irq_block(int irq, void *dev_id)
 static irqreturn_t axg_fifo_pcm_irq_block_thread(int irq, void *dev_id)
 {
 	struct snd_pcm_substream *ss = dev_id;
+	struct axg_fifo *fifo = axg_fifo_data(ss);
+	unsigned int status;
+
+	regmap_read(fifo->map, FIFO_STATUS1, &status);
+	status = FIELD_GET(STATUS1_INT_STS, status);
+
+	/* Use the thread to call period elapsed on nonatomic links */
+	if (!(status & FIFO_INT_COUNT_REPEAT)) {
+		dev_dbg(axg_fifo_dev(ss), "unexpected irq - STS 0x%02x\n",
+			status);
+		return IRQ_NONE;
+	}
+	axg_fifo_ack_irq(fifo, status);
 
 	snd_pcm_period_elapsed(ss);
-
 	return IRQ_HANDLED;
 }
 
@@ -251,9 +263,9 @@ int axg_fifo_pcm_open(struct snd_soc_component *component,
 	if (ret)
 		return ret;
 
-	ret = request_threaded_irq(fifo->irq, axg_fifo_pcm_irq_block,
-				   axg_fifo_pcm_irq_block_thread,
-				   IRQF_ONESHOT, dev_name(dev), ss);
+	ret = request_threaded_irq(fifo->irq, NULL,
+				   axg_fifo_pcm_irq_block_thread, IRQF_ONESHOT,
+				   dev_name(dev), ss);
 	if (ret)
 		return ret;
 

#2: If two handers are required due to $REASON then primary should ACK/
    disable the interrupt line while the secondary/ threaded handler is
    running. In this is case then IRQF_ONESHOT is not needed because its
    "tasks" is performed by the primary handler:

diff --git a/sound/soc/meson/axg-fifo.c b/sound/soc/meson/axg-fifo.c
index 7e6090af720b9..5b4c518eb4ccd 100644
--- a/sound/soc/meson/axg-fifo.c
+++ b/sound/soc/meson/axg-fifo.c
@@ -205,11 +205,16 @@ static irqreturn_t axg_fifo_pcm_irq_block(int irq, void *dev_id)
 
 	regmap_read(fifo->map, FIFO_STATUS1, &status);
 	status = FIELD_GET(STATUS1_INT_STS, status);
-	axg_fifo_ack_irq(fifo, status);
 
 	/* Use the thread to call period elapsed on nonatomic links */
-	if (status & FIFO_INT_COUNT_REPEAT)
+	if (status & FIFO_INT_COUNT_REPEAT) {
+		/*
+		 * ACKs/ Disables the interrupt until re-enabled by
+		 * axg_fifo_pcm_irq_block_thread()
+		 */
+		axg_fifo_ack_irq(fifo, status);
 		return IRQ_WAKE_THREAD;
+	}
 
 	dev_dbg(axg_fifo_dev(ss), "unexpected irq - STS 0x%02x\n",
 		status);
@@ -253,7 +258,7 @@ int axg_fifo_pcm_open(struct snd_soc_component *component,
 
 	ret = request_threaded_irq(fifo->irq, axg_fifo_pcm_irq_block,
 				   axg_fifo_pcm_irq_block_thread,
-				   IRQF_ONESHOT, dev_name(dev), ss);
+				   0, dev_name(dev), ss);
 	if (ret)
 		return ret;

On the PREEMPT_RT both handler will be threaded.
 
My favorite is #1. Also ACKing the interrupt only if it occurred for the
device/ driver in charge. Otherwise don't care?

Sebastian


From jbrunet at baylibre.com  Mon Aug  5 09:07:28 2024
From: jbrunet at baylibre.com (Jerome Brunet)
Date: Mon, 05 Aug 2024 18:07:28 +0200
Subject: [PATCH v1] ASoC: meson: axg-fifo: set option to use raw spinlock
In-Reply-To: <20240805153309.k_SfHw62@linutronix.de> (Sebastian Andrzej
	Siewior's message of "Mon, 5 Aug 2024 17:33:09 +0200")
References: <20240729131652.3012327-1-avkrasnov@salutedevices.com>
	<1ja5i0wags.fsf@starbuckisacylon.baylibre.com>
	<2b16b95e-196e-4d8a-98c3-3be568cdd18a@sirena.org.uk>
	<1j5xsow839.fsf@starbuckisacylon.baylibre.com>
	<7dfdade5-3a57-4883-bfac-067c50ec0ffb@sirena.org.uk>
	<1j1q3cw5ri.fsf@starbuckisacylon.baylibre.com>
	<20240805153309.k_SfHw62@linutronix.de>
Message-ID: <1jplqnuf5r.fsf@starbuckisacylon.baylibre.com>

On Mon 05 Aug 2024 at 17:33, Sebastian Andrzej Siewior <bigeasy at linutronix.de> wrote:

> On 2024-07-29 17:57:05 [+0200], Jerome Brunet wrote:
>> On Mon 29 Jul 2024 at 16:28, Mark Brown <broonie at kernel.org> wrote:
>> 
>> > On Mon, Jul 29, 2024 at 05:06:50PM +0200, Jerome Brunet wrote:
>> >> On Mon 29 Jul 2024 at 15:44, Mark Brown <broonie at kernel.org> wrote:
>> >
>> >> > I don't recall this coming up much TBH.  It may be that people just set
>> >> > raw spinlocks when they need it, or that there's not many people using
>> >> > relevant devices with RT kernels.
>> >
>> >> I have not been playing much with RT TBH, but AFAIK, with RT irq
>> >> handlers are threaded unless IRQF_NO_THREAD is set. In this case,
>> >> something preemptible in the handler should not be a problem.
>> >
>> >> The axg-fifo drivers do not have IRQF_NO_THREAD so something is a bit
>> >> unclear here.
>> >
>> > Yeah, it's definitely likely to happen all the time for people using RT
>> > with relevant devices.  I'm not sure I have a good sense of if it's
>> > likely to be a nasty surprise to switch raw spinlocks on by default when
>> > it's currently controllable, I'd expect it'll generally be fine but it's
>> > possibly a bit rude to any users that don't use interrupts...
>> 
>> Indeed it is bit radical.
>> 
>> My concern with this patch is that, IIUC, the handler should be
>> threaded under RT and there should be no problem with the spinlock API.
>> 
>> Adding the RT folks to try to get a better understanding, they should
>> have been CCed anyway.
>
> I'm not sure if making the lock a raw_spinlock_t solves all the
> problems. The regmap is regmap_mmio so direct memory-access and looks
> simple enough to do so. In regmap_mmio_write() I see clk_enable() and
> and this uses a spinlock_t so we should be back at the same problem.
> There might be an additional problem if reg-caching is enabled.

Hi Sebastian,

Thanks a lot for taking the time to dig into the driver specifics.
The IRQ handler is actually not awfully critical in this case. The HW
will continue to run regardless of the IRQ being acked or not

The purpose of the handler is mainly to let Alsa know that 1 (or more)
period is ready. If alsa is too slow to react, and the buffer allows
just a few periods, the HW may under/overflow the buffer.

IRQF_ONESHOT is fine because snd_pcm_period_elapsed() 'notifies'
all past periods, not just one. The irq handler does not need to
run again until this function has been called. It also helps if the
period is ridiculously small, to try to reduce the number of IRQs.

>
> Let me propose two alternatives:
> #1: Why two handlers if we have IRQF_ONESHOT and the primary does almost
>     nothing. Assuming the thread is always woken up and the "unexpected
>     irq" case does not happen. If so, why not:

That was mainly there for initial debugging. It does not happen (yet).

>
> diff --git a/sound/soc/meson/axg-fifo.c b/sound/soc/meson/axg-fifo.c
> index 7e6090af720b9..60af05a3cad6b 100644
> --- a/sound/soc/meson/axg-fifo.c
> +++ b/sound/soc/meson/axg-fifo.c
> @@ -220,9 +220,21 @@ static irqreturn_t axg_fifo_pcm_irq_block(int irq, void *dev_id)
>  static irqreturn_t axg_fifo_pcm_irq_block_thread(int irq, void *dev_id)
>  {
>  	struct snd_pcm_substream *ss = dev_id;
> +	struct axg_fifo *fifo = axg_fifo_data(ss);
> +	unsigned int status;
> +
> +	regmap_read(fifo->map, FIFO_STATUS1, &status);
> +	status = FIELD_GET(STATUS1_INT_STS, status);
> +
> +	/* Use the thread to call period elapsed on nonatomic links */
> +	if (!(status & FIFO_INT_COUNT_REPEAT)) {
> +		dev_dbg(axg_fifo_dev(ss), "unexpected irq - STS 0x%02x\n",
> +			status);
> +		return IRQ_NONE;
> +	}
> +	axg_fifo_ack_irq(fifo, status);
>  
>  	snd_pcm_period_elapsed(ss);
> -
>  	return IRQ_HANDLED;
>  }
>  
> @@ -251,9 +263,9 @@ int axg_fifo_pcm_open(struct snd_soc_component *component,
>  	if (ret)
>  		return ret;
>  
> -	ret = request_threaded_irq(fifo->irq, axg_fifo_pcm_irq_block,
> -				   axg_fifo_pcm_irq_block_thread,
> -				   IRQF_ONESHOT, dev_name(dev), ss);
> +	ret = request_threaded_irq(fifo->irq, NULL,
> +				   axg_fifo_pcm_irq_block_thread, IRQF_ONESHOT,
> +				   dev_name(dev), ss);
>  	if (ret)
>  		return ret;
>  
>
> #2: If two handers are required due to $REASON then primary should ACK/
>     disable the interrupt line while the secondary/ threaded handler is
>     running. In this is case then IRQF_ONESHOT is not needed because its
>     "tasks" is performed by the primary handler:
>
> diff --git a/sound/soc/meson/axg-fifo.c b/sound/soc/meson/axg-fifo.c
> index 7e6090af720b9..5b4c518eb4ccd 100644
> --- a/sound/soc/meson/axg-fifo.c
> +++ b/sound/soc/meson/axg-fifo.c
> @@ -205,11 +205,16 @@ static irqreturn_t axg_fifo_pcm_irq_block(int irq, void *dev_id)
>  
>  	regmap_read(fifo->map, FIFO_STATUS1, &status);
>  	status = FIELD_GET(STATUS1_INT_STS, status);
> -	axg_fifo_ack_irq(fifo, status);
>  
>  	/* Use the thread to call period elapsed on nonatomic links */
> -	if (status & FIFO_INT_COUNT_REPEAT)
> +	if (status & FIFO_INT_COUNT_REPEAT) {
> +		/*
> +		 * ACKs/ Disables the interrupt until re-enabled by
> +		 * axg_fifo_pcm_irq_block_thread()
> +		 */
> +		axg_fifo_ack_irq(fifo, status);
>  		return IRQ_WAKE_THREAD;
> +	}
>  
>  	dev_dbg(axg_fifo_dev(ss), "unexpected irq - STS 0x%02x\n",
>  		status);
> @@ -253,7 +258,7 @@ int axg_fifo_pcm_open(struct snd_soc_component *component,
>  
>  	ret = request_threaded_irq(fifo->irq, axg_fifo_pcm_irq_block,
>  				   axg_fifo_pcm_irq_block_thread,
> -				   IRQF_ONESHOT, dev_name(dev), ss);
> +				   0, dev_name(dev), ss);
>  	if (ret)
>  		return ret;
>
> On the PREEMPT_RT both handler will be threaded.
>  
> My favorite is #1. Also ACKing the interrupt only if it occurred for the
> device/ driver in charge. Otherwise don't care?

I'd prefer #1 too. IRQ is not shared, so the ownership should be fine.

However I still don't fully understand what we are fixing here TBH. It
seems it could apply to other parts of the kernel so I'd like to
understand what is wrong (and avoid repeating the same mistake)

* With PREEMPT_RT, both handler will threaded, so they should be able to
  call preemptible function, right ?
* If so, and spinlock_lock() actually becomes preemptible with
  PREEMPT_RT as stated in this change description, why is it problem here ?

Do you have an idea about what is going on ?

Again, thanks a lot for your help.

>
> Sebastian

-- 
Jerome


From broonie at kernel.org  Mon Aug  5 09:56:22 2024
From: broonie at kernel.org (Mark Brown)
Date: Mon, 5 Aug 2024 17:56:22 +0100
Subject: [PATCH v1] ASoC: meson: axg-fifo: set option to use raw spinlock
In-Reply-To: <20240805153309.k_SfHw62@linutronix.de>
References: <20240729131652.3012327-1-avkrasnov@salutedevices.com>
 <1ja5i0wags.fsf@starbuckisacylon.baylibre.com>
 <2b16b95e-196e-4d8a-98c3-3be568cdd18a@sirena.org.uk>
 <1j5xsow839.fsf@starbuckisacylon.baylibre.com>
 <7dfdade5-3a57-4883-bfac-067c50ec0ffb@sirena.org.uk>
 <1j1q3cw5ri.fsf@starbuckisacylon.baylibre.com>
 <20240805153309.k_SfHw62@linutronix.de>
Message-ID: <04b2b8c5-8b18-4594-9eeb-9971d8cf3786@sirena.org.uk>

On Mon, Aug 05, 2024 at 05:33:09PM +0200, Sebastian Andrzej Siewior wrote:

> I'm not sure if making the lock a raw_spinlock_t solves all the
> problems. The regmap is regmap_mmio so direct memory-access and looks
> simple enough to do so. In regmap_mmio_write() I see clk_enable() and
> and this uses a spinlock_t so we should be back at the same problem.

The clk_enable() is optional, users simply shouldn't use the internal
clock management with devices that it'll cause problems for.

> There might be an additional problem if reg-caching is enabled.

The flat cache is there mostly for the benefit of things accessed from
interrupt context, it guarantees to never do any allocations and doesn't
lock.  You can also use other caches if you ensure that any registers
accessed in interrupt context are already cached so won't trigger any
new allocations.
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From bigeasy at linutronix.de  Mon Aug  5 23:50:21 2024
From: bigeasy at linutronix.de (Sebastian Andrzej Siewior)
Date: Tue, 6 Aug 2024 08:50:21 +0200
Subject: [PATCH v1] ASoC: meson: axg-fifo: set option to use raw spinlock
In-Reply-To: <1jplqnuf5r.fsf@starbuckisacylon.baylibre.com>
References: <20240729131652.3012327-1-avkrasnov@salutedevices.com>
 <1ja5i0wags.fsf@starbuckisacylon.baylibre.com>
 <2b16b95e-196e-4d8a-98c3-3be568cdd18a@sirena.org.uk>
 <1j5xsow839.fsf@starbuckisacylon.baylibre.com>
 <7dfdade5-3a57-4883-bfac-067c50ec0ffb@sirena.org.uk>
 <1j1q3cw5ri.fsf@starbuckisacylon.baylibre.com>
 <20240805153309.k_SfHw62@linutronix.de>
 <1jplqnuf5r.fsf@starbuckisacylon.baylibre.com>
Message-ID: <20240806065021.PINvpze_@linutronix.de>

On 2024-08-05 18:07:28 [+0200], Jerome Brunet wrote:
> Hi Sebastian,
Hi Jerome,

> Thanks a lot for taking the time to dig into the driver specifics.
> The IRQ handler is actually not awfully critical in this case. The HW
> will continue to run regardless of the IRQ being acked or not
> 
> The purpose of the handler is mainly to let Alsa know that 1 (or more)
> period is ready. If alsa is too slow to react, and the buffer allows
> just a few periods, the HW may under/overflow the buffer.
> 
> IRQF_ONESHOT is fine because snd_pcm_period_elapsed() 'notifies'
> all past periods, not just one. The irq handler does not need to
> run again until this function has been called. It also helps if the
> period is ridiculously small, to try to reduce the number of IRQs.

IRQF_ONESHOT is used to disable to keep the IRQ line disabled (after the
primary handler) while the threaded handler is running. This implies
that the primary handler must not be threaded under PREEMPT_RT.
?
> I'd prefer #1 too. IRQ is not shared, so the ownership should be fine.
> 
> However I still don't fully understand what we are fixing here TBH. It
> seems it could apply to other parts of the kernel so I'd like to
> understand what is wrong (and avoid repeating the same mistake)
> 
> * With PREEMPT_RT, both handler will threaded, so they should be able to
>   call preemptible function, right ?

Correct. But flags like IRQF_ONESHOT won't thread the primary handler.

> * If so, and spinlock_lock() actually becomes preemptible with
>   PREEMPT_RT as stated in this change description, why is it problem here ?

Because in this case the primary handler is not threaded and runs in
not preemptible hard-IRQ context.

> Do you have an idea about what is going on ?

Yes.

Sebastian


From bigeasy at linutronix.de  Mon Aug  5 23:57:40 2024
From: bigeasy at linutronix.de (Sebastian Andrzej Siewior)
Date: Tue, 6 Aug 2024 08:57:40 +0200
Subject: [PATCH v1] ASoC: meson: axg-fifo: set option to use raw spinlock
In-Reply-To: <04b2b8c5-8b18-4594-9eeb-9971d8cf3786@sirena.org.uk>
References: <20240729131652.3012327-1-avkrasnov@salutedevices.com>
 <1ja5i0wags.fsf@starbuckisacylon.baylibre.com>
 <2b16b95e-196e-4d8a-98c3-3be568cdd18a@sirena.org.uk>
 <1j5xsow839.fsf@starbuckisacylon.baylibre.com>
 <7dfdade5-3a57-4883-bfac-067c50ec0ffb@sirena.org.uk>
 <1j1q3cw5ri.fsf@starbuckisacylon.baylibre.com>
 <20240805153309.k_SfHw62@linutronix.de>
 <04b2b8c5-8b18-4594-9eeb-9971d8cf3786@sirena.org.uk>
Message-ID: <20240806065740.DAZwSnQ7@linutronix.de>

On 2024-08-05 17:56:22 [+0100], Mark Brown wrote:
> On Mon, Aug 05, 2024 at 05:33:09PM +0200, Sebastian Andrzej Siewior wrote:
> 
> > I'm not sure if making the lock a raw_spinlock_t solves all the
> > problems. The regmap is regmap_mmio so direct memory-access and looks
> > simple enough to do so. In regmap_mmio_write() I see clk_enable() and
> > and this uses a spinlock_t so we should be back at the same problem.
> 
> The clk_enable() is optional, users simply shouldn't use the internal
> clock management with devices that it'll cause problems for.
> 
> > There might be an additional problem if reg-caching is enabled.
> 
> The flat cache is there mostly for the benefit of things accessed from
> interrupt context, it guarantees to never do any allocations and doesn't
> lock.  You can also use other caches if you ensure that any registers
> accessed in interrupt context are already cached so won't trigger any
> new allocations.

My point is simply that those two things could complicate things further
if the desired fix is to (always) use raw_spinlock_t.

Sebastian


From jbrunet at baylibre.com  Tue Aug  6 02:21:50 2024
From: jbrunet at baylibre.com (Jerome Brunet)
Date: Tue, 06 Aug 2024 11:21:50 +0200
Subject: [PATCH v1] ASoC: meson: axg-fifo: set option to use raw spinlock
In-Reply-To: <20240806065021.PINvpze_@linutronix.de> (Sebastian Andrzej
	Siewior's message of "Tue, 6 Aug 2024 08:50:21 +0200")
References: <20240729131652.3012327-1-avkrasnov@salutedevices.com>
	<1ja5i0wags.fsf@starbuckisacylon.baylibre.com>
	<2b16b95e-196e-4d8a-98c3-3be568cdd18a@sirena.org.uk>
	<1j5xsow839.fsf@starbuckisacylon.baylibre.com>
	<7dfdade5-3a57-4883-bfac-067c50ec0ffb@sirena.org.uk>
	<1j1q3cw5ri.fsf@starbuckisacylon.baylibre.com>
	<20240805153309.k_SfHw62@linutronix.de>
	<1jplqnuf5r.fsf@starbuckisacylon.baylibre.com>
	<20240806065021.PINvpze_@linutronix.de>
Message-ID: <1jle1auhu9.fsf@starbuckisacylon.baylibre.com>

On Tue 06 Aug 2024 at 08:50, Sebastian Andrzej Siewior <bigeasy at linutronix.de> wrote:

> On 2024-08-05 18:07:28 [+0200], Jerome Brunet wrote:
>> Hi Sebastian,
> Hi Jerome,
>
>> Thanks a lot for taking the time to dig into the driver specifics.
>> The IRQ handler is actually not awfully critical in this case. The HW
>> will continue to run regardless of the IRQ being acked or not
>> 
>> The purpose of the handler is mainly to let Alsa know that 1 (or more)
>> period is ready. If alsa is too slow to react, and the buffer allows
>> just a few periods, the HW may under/overflow the buffer.
>> 
>> IRQF_ONESHOT is fine because snd_pcm_period_elapsed() 'notifies'
>> all past periods, not just one. The irq handler does not need to
>> run again until this function has been called. It also helps if the
>> period is ridiculously small, to try to reduce the number of IRQs.
>
> IRQF_ONESHOT is used to disable to keep the IRQ line disabled (after the
> primary handler) while the threaded handler is running. This implies
> that the primary handler must not be threaded under PREEMPT_RT.
> ?

This is the point I was missing. It is clear now. Thanks a lot.

I have tweaked #1 and added a few tags but the gist remains the same.
I was going to add you under 'Suggested-by' but maybe putting you as the
actual Author would be more appropriate. 

What do you prefer ?


From bigeasy at linutronix.de  Tue Aug  6 03:03:02 2024
From: bigeasy at linutronix.de (Sebastian Andrzej Siewior)
Date: Tue, 6 Aug 2024 12:03:02 +0200
Subject: [PATCH v1] ASoC: meson: axg-fifo: set option to use raw spinlock
In-Reply-To: <1jle1auhu9.fsf@starbuckisacylon.baylibre.com>
References: <20240729131652.3012327-1-avkrasnov@salutedevices.com>
 <1ja5i0wags.fsf@starbuckisacylon.baylibre.com>
 <2b16b95e-196e-4d8a-98c3-3be568cdd18a@sirena.org.uk>
 <1j5xsow839.fsf@starbuckisacylon.baylibre.com>
 <7dfdade5-3a57-4883-bfac-067c50ec0ffb@sirena.org.uk>
 <1j1q3cw5ri.fsf@starbuckisacylon.baylibre.com>
 <20240805153309.k_SfHw62@linutronix.de>
 <1jplqnuf5r.fsf@starbuckisacylon.baylibre.com>
 <20240806065021.PINvpze_@linutronix.de>
 <1jle1auhu9.fsf@starbuckisacylon.baylibre.com>
Message-ID: <20240806100302.Up0MShrZ@linutronix.de>

On 2024-08-06 11:21:50 [+0200], Jerome Brunet wrote:
> I have tweaked #1 and added a few tags but the gist remains the same.
> I was going to add you under 'Suggested-by' but maybe putting you as the
> actual Author would be more appropriate. 
> 
> What do you prefer ?

Suggested-by is fine.

Sebastian


From jbrunet at baylibre.com  Tue Aug  6 03:27:03 2024
From: jbrunet at baylibre.com (Jerome Brunet)
Date: Tue,  6 Aug 2024 12:27:03 +0200
Subject: [PATCH] ASoC: meson: axg-fifo: fix irq scheduling issue with PREEMPT_RT
Message-ID: <20240806102707.3825703-1-jbrunet@baylibre.com>

With PREEMPT_RT enabled, spinlocks become preemptible.
This is usually not a problem with spinlocks used in IRQ context since
IRQ handlers get threaded. However, if IRQF_ONESHOT is set, the upper half
of a threaded irq handler won't be threaded and this causes scheduling
problems if spinlocks are used in the upper half, like with regmap when
'.fast_io' is set.

In this particular instance, it is actually better to do everything in
the bottom half and it solves the problem with PREEMPT_RT.

Reported-by: Arseniy Krasnov <avkrasnov at salutedevices.com>
Closes: https://lore.kernel.org/linux-amlogic/20240729131652.3012327-1-avkrasnov at salutedevices.com
Suggested-by: Sebastian Andrzej Siewior <bigeasy at linutronix.de>
Fixes: b11d26660dff ("ASoC: meson: axg-fifo: use threaded irq to check periods")
Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
---
 sound/soc/meson/axg-fifo.c | 26 ++++++++++----------------
 1 file changed, 10 insertions(+), 16 deletions(-)

diff --git a/sound/soc/meson/axg-fifo.c b/sound/soc/meson/axg-fifo.c
index 7e6090af720b..d0d05fa44d66 100644
--- a/sound/soc/meson/axg-fifo.c
+++ b/sound/soc/meson/axg-fifo.c
@@ -207,25 +207,18 @@ static irqreturn_t axg_fifo_pcm_irq_block(int irq, void *dev_id)
 	status = FIELD_GET(STATUS1_INT_STS, status);
 	axg_fifo_ack_irq(fifo, status);
 
-	/* Use the thread to call period elapsed on nonatomic links */
-	if (status & FIFO_INT_COUNT_REPEAT)
-		return IRQ_WAKE_THREAD;
+	if (status & ~FIFO_INT_COUNT_REPEAT)
+		dev_dbg(axg_fifo_dev(ss), "unexpected irq - STS 0x%02x\n",
+			status);
 
-	dev_dbg(axg_fifo_dev(ss), "unexpected irq - STS 0x%02x\n",
-		status);
+	if (status & FIFO_INT_COUNT_REPEAT) {
+		snd_pcm_period_elapsed(ss);
+		return IRQ_HANDLED;
+	}
 
 	return IRQ_NONE;
 }
 
-static irqreturn_t axg_fifo_pcm_irq_block_thread(int irq, void *dev_id)
-{
-	struct snd_pcm_substream *ss = dev_id;
-
-	snd_pcm_period_elapsed(ss);
-
-	return IRQ_HANDLED;
-}
-
 int axg_fifo_pcm_open(struct snd_soc_component *component,
 		      struct snd_pcm_substream *ss)
 {
@@ -251,8 +244,9 @@ int axg_fifo_pcm_open(struct snd_soc_component *component,
 	if (ret)
 		return ret;
 
-	ret = request_threaded_irq(fifo->irq, axg_fifo_pcm_irq_block,
-				   axg_fifo_pcm_irq_block_thread,
+	/* Use the bottom half of a threaded irq with non-atomic links */
+	ret = request_threaded_irq(fifo->irq, NULL,
+				   axg_fifo_pcm_irq_block,
 				   IRQF_ONESHOT, dev_name(dev), ss);
 	if (ret)
 		return ret;
-- 
2.43.0



From devnull+xianwei.zhao.amlogic.com at kernel.org  Tue Aug  6 03:27:16 2024
From: devnull+xianwei.zhao.amlogic.com at kernel.org (Xianwei Zhao via B4 Relay)
Date: Tue, 06 Aug 2024 18:27:16 +0800
Subject: [PATCH 3/3] arm64: dts: amlogic: add C3 AW419 board
In-Reply-To: <20240806-c3_add_node-v1-0-c0de41341632@amlogic.com>
References: <20240806-c3_add_node-v1-0-c0de41341632@amlogic.com>
Message-ID: <20240806-c3_add_node-v1-3-c0de41341632@amlogic.com>

From: Xianwei Zhao <xianwei.zhao at amlogic.com>

Add Amlogic C3 C308L AW419 board.

Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
---
 arch/arm64/boot/dts/amlogic/Makefile               |   1 +
 .../boot/dts/amlogic/amlogic-c3-c308l-aw419.dts    | 278 +++++++++++++++++++++
 2 files changed, 279 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
index 29417f04f886..2fbda8419c65 100644
--- a/arch/arm64/boot/dts/amlogic/Makefile
+++ b/arch/arm64/boot/dts/amlogic/Makefile
@@ -2,6 +2,7 @@
 dtb-$(CONFIG_ARCH_MESON) += amlogic-a4-a113l2-ba400.dtb
 dtb-$(CONFIG_ARCH_MESON) += amlogic-a5-a113x2-av400.dtb
 dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c302x-aw409.dtb
+dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c308l-aw419.dtb
 dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-an400.dtb
 dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
 dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3-c308l-aw419.dts b/arch/arm64/boot/dts/amlogic/amlogic-c3-c308l-aw419.dts
new file mode 100644
index 000000000000..d28fd2a1acf0
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/amlogic-c3-c308l-aw419.dts
@@ -0,0 +1,278 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "amlogic-c3.dtsi"
+
+/ {
+	model = "Amlogic C308l aw419 Development Board";
+	compatible = "amlogic,aw419", "amlogic,c3";
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	aliases {
+		serial0 = &uart_b;
+		spi0 = &spifc;
+	};
+
+	memory at 0 {
+		device_type = "memory";
+		reg = <0x0 0x0 0x0 0x80000000>;
+	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		/* 9 MiB reserved for ARM Trusted Firmware */
+		secmon_reserved: secmon at 7f00000 {
+			compatible = "shared-dma-pool";
+			reg = <0x0 0x07f00000 0x0 0x900000>;
+			no-map;
+		};
+	};
+
+	main_12v: regulator-main-12v {
+		compatible = "regulator-fixed";
+		regulator-name = "12V";
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vcc_5v: regulator-vcc-5v {
+		compatible = "regulator-fixed";
+		regulator-name = "VCC5V";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&main_12v>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddq: regulator-vddq {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDQ";
+		regulator-min-microvolt = <1200000>;
+		regulator-max-microvolt = <1200000>;
+		vin-supply = <&main_12v>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddao_3v3: regulator-vddao-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDAO3V3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&main_12v>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddao_1v8: regulator-vddao-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDAO1V8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vddao_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	ddr4_2v5: regulator-ddr4-2v5 {
+		compatible = "regulator-fixed";
+		regulator-name = "DDR4_2V5";
+		regulator-min-microvolt = <2500000>;
+		regulator-max-microvolt = <2500000>;
+		vin-supply = <&vddao_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vcc_3v3: regulator-vcc-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "VCC3V3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vddao_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vcc_1v8: regulator-vcc-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "VCC1V8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vdd_1v8: regulator-vdd-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "VDD1V8_BOOT";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddio_b: regulator-vddio-3v3-b {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDIO_B";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vcc_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	sdcard: regulator-sdcard {
+		compatible = "regulator-fixed";
+		regulator-name = "SDCARD_POWER";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vddao_3v3>;
+		gpio = <&gpio GPIOA_4 GPIO_ACTIVE_LOW>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+};
+
+&uart_b {
+	status = "okay";
+};
+
+&nand {
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	pinctrl-0 = <&nand_pins>;
+	pinctrl-names = "default";
+
+	nand at 0 {
+		reg = <0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		nand-on-flash-bbt;
+
+		partition at 0 {
+			label = "boot";
+			reg = <0x0 0x00200000>;
+		};
+		partition at 200000 {
+			label = "env";
+			reg = <0x00200000 0x00400000>;
+		};
+		partition at 600000 {
+			label = "system";
+			reg = <0x00600000 0x00a00000>;
+		};
+		partition at 1000000 {
+			label = "rootfs";
+			reg = <0x01000000 0x03000000>;
+		};
+		partition at 4000000 {
+			label = "media";
+			reg = <0x04000000 0x8000000>;
+		};
+	};
+};
+
+&ethmac {
+	status = "okay";
+	phy-handle = <&internal_ephy>;
+	phy-mode = "rmii";
+};
+
+&spifc {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	pinctrl-0 = <&spifc_pins>;
+	pinctrl-names = "default";
+
+	nand at 0 {
+		compatible = "spi-nand";
+		reg = <0>;
+		spi-max-frequency = <83000000>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		status = "disabled";
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition at 0 {
+				label = "boot";
+				reg = <0 0x200000>;
+			};
+
+			partition at 200000 {
+				label = "env";
+				reg = <0x200000 0x400000>;
+			};
+
+			partition at 600000 {
+				label = "system";
+				reg = <0x600000 0xa00000>;
+			};
+
+			partition at 1000000 {
+				label = "rootfs";
+				reg = <0x1000000 0x3000000>;
+			};
+
+			partition at 4000000 {
+				label = "data";
+				reg = <0x4000000 0x8000000>;
+			};
+		};
+	};
+};
+
+&sd {
+	status = "okay";
+	pinctrl-0 = <&sdcard_pins>;
+	pinctrl-1 = <&sdcard_clk_gate_pins>;
+	pinctrl-names = "default","clk-gate";
+
+	bus-width = <4>;
+	cap-sd-highspeed;
+	max-frequency = <50000000>;
+	disable-wp;
+
+	cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
+	vmmc-supply = <&sdcard>;
+	vqmmc-supply = <&sdcard>;
+};
+
+&sdio {
+	pinctrl-0 = <&sdio_m_pins>;
+	pinctrl-1 = <&sdio_m_clk_gate_pins>;
+	pinctrl-names = "default", "clk-gate";
+	bus-width = <4>;
+	cap-sd-highspeed;
+	non-removable;
+	max-frequency = <200000000>;
+	disable-wp;
+	cap-sdio-irq;
+	keep-power-in-suspend;
+
+	vmmc-supply = <&sdcard>;
+	vqmmc-supply = <&sdcard>;
+};

-- 
2.37.1




From devnull+xianwei.zhao.amlogic.com at kernel.org  Tue Aug  6 03:27:13 2024
From: devnull+xianwei.zhao.amlogic.com at kernel.org (Xianwei Zhao via B4 Relay)
Date: Tue, 06 Aug 2024 18:27:13 +0800
Subject: [PATCH 0/3] add some node for amlogic c3
Message-ID: <20240806-c3_add_node-v1-0-c0de41341632@amlogic.com>

Add some node for board AW409 and support board C308l AW419.

Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
---
Xianwei Zhao (3):
      dt-bindings: clock: fix C3 PLL input parameter
      arm64: dts: amlogic: add some device nodes for C3
      arm64: dts: amlogic: add C3 AW419 board

 .../bindings/clock/amlogic,c3-pll-clkc.yaml        |   7 +-
 arch/arm64/boot/dts/amlogic/Makefile               |   1 +
 .../boot/dts/amlogic/amlogic-c3-c302x-aw409.dts    | 249 +++++++++++
 .../boot/dts/amlogic/amlogic-c3-c308l-aw419.dts    | 278 ++++++++++++
 arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi        | 487 ++++++++++++++++++++-
 5 files changed, 1019 insertions(+), 3 deletions(-)
---
base-commit: 89933feccececf778cab56b1ec3d0916e9bbef3b
change-id: 20240806-c3_add_node-420a37918f18

Best regards,
-- 
Xianwei Zhao <xianwei.zhao at amlogic.com>




From devnull+xianwei.zhao.amlogic.com at kernel.org  Tue Aug  6 03:27:14 2024
From: devnull+xianwei.zhao.amlogic.com at kernel.org (Xianwei Zhao via B4 Relay)
Date: Tue, 06 Aug 2024 18:27:14 +0800
Subject: [PATCH 1/3] dt-bindings: clock: fix C3 PLL input parameter
In-Reply-To: <20240806-c3_add_node-v1-0-c0de41341632@amlogic.com>
References: <20240806-c3_add_node-v1-0-c0de41341632@amlogic.com>
Message-ID: <20240806-c3_add_node-v1-1-c0de41341632@amlogic.com>

From: Xianwei Zhao <xianwei.zhao at amlogic.com>

Add C3 PLL controller input clock parameters "fix".

Fixes: 0e6be855a96d ("dt-bindings: clock: add Amlogic C3 PLL clock controller")
Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
---
 Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
index 43de3c6fc1cf..700865cc9792 100644
--- a/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
+++ b/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
@@ -24,11 +24,13 @@ properties:
     items:
       - description: input top pll
       - description: input mclk pll
+      - description: input fix pll
 
   clock-names:
     items:
       - const: top
       - const: mclk
+      - const: fix
 
   "#clock-cells":
     const: 1
@@ -52,8 +54,9 @@ examples:
             compatible = "amlogic,c3-pll-clkc";
             reg = <0x0 0x8000 0x0 0x1a4>;
             clocks = <&scmi_clk 2>,
-                     <&scmi_clk 5>;
-            clock-names = "top", "mclk";
+                     <&scmi_clk 5>,
+                     <&scmi_clk 12>;
+            clock-names = "top", "mclk", "fix";
             #clock-cells = <1>;
         };
     };

-- 
2.37.1




From devnull+xianwei.zhao.amlogic.com at kernel.org  Tue Aug  6 03:27:15 2024
From: devnull+xianwei.zhao.amlogic.com at kernel.org (Xianwei Zhao via B4 Relay)
Date: Tue, 06 Aug 2024 18:27:15 +0800
Subject: [PATCH 2/3] arm64: dts: amlogic: add some device nodes for C3
In-Reply-To: <20240806-c3_add_node-v1-0-c0de41341632@amlogic.com>
References: <20240806-c3_add_node-v1-0-c0de41341632@amlogic.com>
Message-ID: <20240806-c3_add_node-v1-2-c0de41341632@amlogic.com>

From: Xianwei Zhao <xianwei.zhao at amlogic.com>

Add some device nodes for SoC C3, including periphs clock controller
node, PLL clock controller node, SPICC node, regulator node, NAND
controller node, sdcard node, Ethernet MAC and PHY node.

Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
---
 .../boot/dts/amlogic/amlogic-c3-c302x-aw409.dts    | 249 +++++++++++
 arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi        | 487 ++++++++++++++++++++-
 2 files changed, 735 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts b/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts
index edce8850b338..c85431748a73 100644
--- a/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts
+++ b/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts
@@ -16,14 +16,263 @@ / {
 
 	aliases {
 		serial0 = &uart_b;
+		spi0 = &spifc;
 	};
 
 	memory at 0 {
 		device_type = "memory";
 		reg = <0x0 0x0 0x0 0x10000000>;
 	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		/* 9 MiB reserved for ARM Trusted Firmware */
+		secmon_reserved: secmon at 7f00000 {
+			compatible = "shared-dma-pool";
+			reg = <0x0 0x07f00000 0x0 0x900000>;
+			no-map;
+		};
+	};
+
+	main_12v: regulator-main-12v {
+		compatible = "regulator-fixed";
+		regulator-name = "12V";
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vcc_5v: regulator-vcc-5v {
+		compatible = "regulator-fixed";
+		regulator-name = "VCC5V";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&main_12v>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddq: regulator-vddq {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDQ";
+		regulator-min-microvolt = <1200000>;
+		regulator-max-microvolt = <1200000>;
+		vin-supply = <&main_12v>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddao_3v3: regulator-vddao-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDAO3V3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&main_12v>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddao_1v8: regulator-vddao-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDAO1V8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vddao_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	ddr4_2v5: regulator-ddr4-2v5 {
+		compatible = "regulator-fixed";
+		regulator-name = "DDR4_2V5";
+		regulator-min-microvolt = <2500000>;
+		regulator-max-microvolt = <2500000>;
+		vin-supply = <&vddao_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vcc_3v3: regulator-vcc-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "VCC3V3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vddao_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vcc_1v8: regulator-vcc-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "VCC1V8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vdd_1v8: regulator-vdd-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "VDD1V8_BOOT";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddio_b: regulator-vddio-3v3-b {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDIO_B";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vcc_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	sdcard: regulator-sdcard {
+		compatible = "regulator-fixed";
+		regulator-name = "SDCARD_POWER";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vddao_3v3>;
+		gpio = <&gpio GPIOA_4 GPIO_ACTIVE_LOW>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
 };
 
 &uart_b {
 	status = "okay";
 };
+
+&nand {
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	pinctrl-0 = <&nand_pins>;
+	pinctrl-names = "default";
+
+	nand at 0 {
+		reg = <0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		nand-on-flash-bbt;
+
+		partition at 0 {
+			label = "boot";
+			reg = <0x0 0x00200000>;
+		};
+		partition at 200000 {
+			label = "env";
+			reg = <0x00200000 0x00400000>;
+		};
+		partition at 600000 {
+			label = "system";
+			reg = <0x00600000 0x00a00000>;
+		};
+		partition at 1000000 {
+			label = "rootfs";
+			reg = <0x01000000 0x03000000>;
+		};
+		partition at 4000000 {
+			label = "media";
+			reg = <0x04000000 0x8000000>;
+		};
+	};
+};
+
+&ethmac {
+	status = "okay";
+	phy-handle = <&internal_ephy>;
+	phy-mode = "rmii";
+};
+
+&spifc {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	pinctrl-0 = <&spifc_pins>;
+	pinctrl-names = "default";
+
+	nand at 0 {
+		compatible = "spi-nand";
+		reg = <0>;
+		spi-max-frequency = <83000000>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		status = "disabled";
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition at 0 {
+				label = "boot";
+				reg = <0 0x200000>;
+			};
+
+			partition at 200000 {
+				label = "env";
+				reg = <0x200000 0x400000>;
+			};
+
+			partition at 600000 {
+				label = "system";
+				reg = <0x600000 0xa00000>;
+			};
+
+			partition at 1000000 {
+				label = "rootfs";
+				reg = <0x1000000 0x3000000>;
+			};
+
+			partition at 4000000 {
+				label = "data";
+				reg = <0x4000000 0x8000000>;
+			};
+		};
+	};
+};
+
+&sd {
+	status = "okay";
+	pinctrl-0 = <&sdcard_pins>;
+	pinctrl-1 = <&sdcard_clk_gate_pins>;
+	pinctrl-names = "default","clk-gate";
+
+	bus-width = <4>;
+	cap-sd-highspeed;
+	max-frequency = <50000000>;
+	disable-wp;
+
+	cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
+	vmmc-supply = <&sdcard>;
+	vqmmc-supply = <&sdcard>;
+};
+
+&sdio {
+	pinctrl-0 = <&sdio_m_pins>;
+	pinctrl-1 = <&sdio_m_clk_gate_pins>;
+	pinctrl-names = "default", "clk-gate";
+	bus-width = <4>;
+	cap-sd-highspeed;
+	non-removable;
+	max-frequency = <200000000>;
+	disable-wp;
+	cap-sdio-irq;
+	keep-power-in-suspend;
+
+	vmmc-supply = <&sdcard>;
+	vqmmc-supply = <&sdcard>;
+};
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
index f8fb060c49ae..2bf56fbe3dfb 100644
--- a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
+++ b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
@@ -7,6 +7,11 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/reset/amlogic,c3-reset.h>
+#include <dt-bindings/clock/amlogic,c3-pll-clkc.h>
+#include <dt-bindings/clock/amlogic,c3-scmi-clkc.h>
+#include <dt-bindings/clock/amlogic,c3-peripherals-clkc.h>
+#include <dt-bindings/power/amlogic,c3-pwrc.h>
+#include <dt-bindings/gpio/amlogic-c3-gpio.h>
 
 / {
 	cpus {
@@ -57,6 +62,34 @@ pwrc: power-controller {
 		};
 	};
 
+	sram {
+		compatible = "mmio-sram";
+		reg = <0x0 0x07f50e00 0x0 0x100>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0x0 0x07f50e00 0x100>;
+
+		scmi_shmem: sram at 0 {
+			compatible = "arm,scmi-shmem";
+			reg = <0x0 0x100>;
+		};
+	};
+
+	firmware {
+		scmi: scmi {
+			compatible = "arm,scmi-smc";
+			arm,smc-id = <0x820000C1>;
+			shmem = <&scmi_shmem>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			scmi_clk: protocol at 14 {
+				reg = <0x14>;
+				#clock-cells = <1>;
+			};
+		};
+	};
+
 	soc {
 		compatible = "simple-bus";
 		#address-cells = <2>;
@@ -108,6 +141,237 @@ gpio: bank at 4000 {
 					#gpio-cells = <2>;
 					gpio-ranges = <&periphs_pinctrl 0 0 55>;
 				};
+
+				i2c0_pins1: i2c0-pins1 {
+					mux {
+						groups = "i2c0_sda_e",
+							 "i2c0_scl_e";
+						function = "i2c0";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c0_pins2: i2c0-pins2 {
+					mux {
+						groups = "i2c0_sda_d",
+							 "i2c0_scl_d";
+						function = "i2c0";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c1_pins1: i2c1-pins1 {
+					mux {
+						groups = "i2c1_sda_x",
+							 "i2c1_scl_x";
+						function = "i2c1";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c1_pins2: i2c1-pins2 {
+					mux {
+						groups = "i2c1_sda_d",
+							 "i2c1_scl_d";
+						function = "i2c1";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c1_pins3: i2c1-pins3 {
+					mux {
+						groups = "i2c1_sda_a",
+							 "i2c1_scl_a";
+						function = "i2c1";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c1_pins4: i2c1-pins4 {
+					mux {
+						groups = "i2c1_sda_b",
+							 "i2c1_scl_b";
+						function = "i2c1";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c2_pins1: i2c2-pins1 {
+					mux {
+						groups = "i2c2_sda",
+							 "i2c2_scl";
+						function = "i2c2";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c3_pins1: i2c3-pins1 {
+					mux {
+						groups = "i2c3_sda_c",
+							 "i2c3_scl_c";
+						function = "i2c3";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c3_pins2: i2c3-pins2 {
+					mux {
+						groups = "i2c3_sda_x",
+							 "i2c3_scl_x";
+						function = "i2c3";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c3_pins3: i2c3-pins3 {
+					mux {
+						groups = "i2c3_sda_d",
+							 "i2c3_scl_d";
+						function = "i2c3";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				nand_pins: nand-pins {
+					mux {
+						groups = "emmc_nand_d0",
+							 "emmc_nand_d1",
+							 "emmc_nand_d2",
+							 "emmc_nand_d3",
+							 "emmc_nand_d4",
+							 "emmc_nand_d5",
+							 "emmc_nand_d6",
+							 "emmc_nand_d7",
+							 "nand_ce0",
+							 "nand_ale",
+							 "nand_cle",
+							 "nand_wen_clk",
+							 "nand_ren_wr";
+						function = "nand";
+						input-enable;
+					};
+				};
+
+				sdcard_pins: sdcard-pins {
+					mux {
+						groups = "sdcard_d0",
+							 "sdcard_d1",
+							 "sdcard_d2",
+							 "sdcard_d3",
+							 "sdcard_clk",
+							 "sdcard_cmd";
+						function = "sdcard";
+						bias-pull-up;
+						drive-strength-microamp = <4000>;
+					};
+				};
+
+				sdcard_clk_gate_pins: sdcard-clk-cmd-pins {
+					mux {
+						groups = "GPIOC_4";
+						function = "gpio_periphs";
+						bias-pull-down;
+						drive-strength-microamp = <4000>;
+					};
+				};
+
+				sdio_m_clk_gate_pins: sdio-m-clk-cmd-pins {
+					mux {
+						groups = "sdio_clk";
+						function = "sdio";
+						bias-pull-down;
+						drive-strength-microamp = <4000>;
+					};
+				};
+
+				sdio_m_pins: sdio-m-all-pins {
+					mux {
+						groups = "sdio_d0",
+							 "sdio_d1",
+							 "sdio_d2",
+							 "sdio_d3",
+							 "sdio_clk",
+							 "sdio_cmd";
+						function = "sdio";
+						input-enable;
+						bias-pull-up;
+						drive-strength-microamp = <4000>;
+					};
+				};
+
+				spicc0_pins1: spicc0-pins1 {
+					mux {
+						groups = "spi_a_mosi_b",
+							 "spi_a_miso_b",
+							 "spi_a_clk_b";
+						function = "spi_a";
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				spicc0_pins2: spicc0-pins2 {
+					mux {
+						groups = "spi_a_mosi_c",
+							 "spi_a_miso_c",
+							 "spi_a_clk_c";
+						function = "spi_a";
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				spicc0_pins3: spicc0-pins3 {
+					mux {
+						groups = "spi_a_mosi_x",
+							 "spi_a_miso_x",
+							 "spi_a_clk_x";
+						function = "spi_a";
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				spicc1_pins1: spicc1-pins1 {
+					mux {
+						groups = "spi_b_mosi_d",
+							 "spi_b_miso_d",
+							 "spi_b_clk_d";
+						function = "spi_b";
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				spicc1_pins2: spicc1-pins2 {
+					mux {
+						groups = "spi_b_mosi_x",
+							 "spi_b_miso_x",
+							 "spi_b_clk_x";
+						function = "spi_b";
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				spifc_pins: spifc-pins {
+					mux {
+						groups = "spif_mo",
+							 "spif_mi",
+							 "spif_clk",
+							 "spif_cs",
+							 "spif_hold",
+							 "spif_wp",
+							 "spif_clk_loop";
+						function = "spif";
+						drive-strength-microamp = <4000>;
+					};
+				};
 			};
 
 			gpio_intc: interrupt-controller at 4080 {
@@ -119,16 +383,237 @@ gpio_intc: interrupt-controller at 4080 {
 					<10 11 12 13 14 15 16 17 18 19 20 21>;
 			};
 
+			clkc_pll: clock-controller at 8000 {
+				compatible = "amlogic,c3-pll-clkc";
+				reg = <0x0 0x8000 0x0 0x1a4>;
+				#clock-cells = <1>;
+				clocks = <&scmi_clk CLKID_TOP_PLL_OSC>,
+					 <&scmi_clk CLKID_MCLK_PLL_OSC>,
+					 <&scmi_clk CLKID_FIXED_PLL_OSC>;
+				clock-names = "top",
+					      "mclk",
+					      "fix";
+			};
+
+			clkc_periphs: clock-controller at 0 {
+				compatible = "amlogic,c3-peripherals-clkc";
+				reg = <0x0 0x0 0x0 0x49c>;
+				#clock-cells = <1>;
+				clocks = <&xtal>,
+					 <&scmi_clk CLKID_OSC>,
+					 <&scmi_clk CLKID_FIXED_PLL_OSC>,
+					 <&clkc_pll CLKID_FCLK_DIV2>,
+					 <&clkc_pll CLKID_FCLK_DIV2P5>,
+					 <&clkc_pll CLKID_FCLK_DIV3>,
+					 <&clkc_pll CLKID_FCLK_DIV4>,
+					 <&clkc_pll CLKID_FCLK_DIV5>,
+					 <&clkc_pll CLKID_FCLK_DIV7>,
+					 <&clkc_pll CLKID_GP0_PLL>,
+					 <&scmi_clk CLKID_GP1_PLL_OSC>,
+					 <&clkc_pll CLKID_HIFI_PLL>,
+					 <&scmi_clk CLKID_SYS_CLK>,
+					 <&scmi_clk CLKID_AXI_CLK>,
+					 <&scmi_clk CLKID_SYS_PLL_DIV16>,
+					 <&scmi_clk CLKID_CPU_CLK_DIV16>;
+				clock-names = "xtal_24m",
+					      "oscin",
+					      "fix",
+					      "fdiv2",
+					      "fdiv2p5",
+					      "fdiv3",
+					      "fdiv4",
+					      "fdiv5",
+					      "fdiv7",
+					      "gp0",
+					      "gp1",
+					      "hifi",
+					      "sysclk",
+					      "axiclk",
+					      "sysplldiv16",
+					      "cpudiv16";
+			};
+
+			eth_phy: mdio-multiplexer at 28000 {
+				compatible = "amlogic,g12a-mdio-mux";
+				reg = <0x0 0x28000 0x0 0xa4>;
+
+				clocks = <&clkc_periphs CLKID_SYS_ETH_PHY>,
+					 <&xtal>,
+					 <&clkc_pll CLKID_FCLK_50M>;
+				clock-names = "pclk", "clkin0", "clkin1";
+				mdio-parent-bus = <&mdio0>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				ext_mdio: mdio at 0 {
+					reg = <0>;
+					#address-cells = <1>;
+					#size-cells = <0>;
+				};
+
+				int_mdio: mdio at 1 {
+					reg = <1>;
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					internal_ephy: ethernet_phy at 8 {
+						compatible = "ethernet-phy-id0180.3301",
+							     "ethernet-phy-ieee802.3-c22";
+						interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+						reg = <8>;
+						max-speed = <100>;
+					};
+				};
+			};
+
+			spicc0: spi at 50000 {
+				compatible = "amlogic,meson-g12a-spicc";
+				reg = <0x0 0x50000 0x0 0x44>;
+				interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clkc_periphs CLKID_SYS_SPICC_0>,
+					 <&clkc_periphs CLKID_SPICC_A>;
+				clock-names = "core", "pclk";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+
+			spicc1: spi at 52000 {
+				compatible = "amlogic,meson-g12a-spicc";
+				reg = <0x0 0x52000 0x0 0x44>;
+				interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clkc_periphs CLKID_SYS_SPICC_1>,
+					 <&clkc_periphs CLKID_SPICC_B>;
+				clock-names = "core", "pclk";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+
+			spifc: spi at 56000 {
+				compatible = "amlogic,a1-spifc";
+				reg = <0x0 0x56000 0x0 0x290>;
+				interrupts = <GIC_SPI 182 IRQ_TYPE_EDGE_RISING>;
+				clocks = <&clkc_periphs CLKID_SPIFC>;
+				clock-names = "core";
+				status = "disabled";
+			};
+
+			i2c0: i2c at 66000 {
+				compatible = "amlogic,meson-axg-i2c";
+				reg = <0x0 0x66000 0x0 0x24>;
+				interrupts = <GIC_SPI 160 IRQ_TYPE_EDGE_RISING>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&clkc_periphs CLKID_SYS_I2C_M_A>;
+				status = "disabled";
+			};
+
+			i2c1: i2c at 68000 {
+				compatible = "amlogic,meson-axg-i2c";
+				reg = <0x0 0x68000 0x0 0x24>;
+				interrupts = <GIC_SPI 161 IRQ_TYPE_EDGE_RISING>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&clkc_periphs CLKID_SYS_I2C_M_B>;
+				status = "disabled";
+			};
+
+			i2c2: i2c at 6a000 {
+				compatible = "amlogic,meson-axg-i2c";
+				reg = <0x0 0x6a000 0x0 0x24>;
+				interrupts = <GIC_SPI 162 IRQ_TYPE_EDGE_RISING>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&clkc_periphs CLKID_SYS_I2C_M_C>;
+				status = "disabled";
+			};
+
+			i2c3: i2c at 6c000 {
+				compatible = "amlogic,meson-axg-i2c";
+				reg = <0x0 0x6c000 0x0 0x24>;
+				interrupts = <GIC_SPI 163 IRQ_TYPE_EDGE_RISING>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&clkc_periphs CLKID_SYS_I2C_M_D>;
+				status = "disabled";
+			};
+
 			uart_b: serial at 7a000 {
 				compatible = "amlogic,meson-s4-uart",
 					   "amlogic,meson-ao-uart";
 				reg = <0x0 0x7a000 0x0 0x18>;
 				interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
 				status = "disabled";
-				clocks = <&xtal>, <&xtal>, <&xtal>;
+				clocks = <&xtal>, <&clkc_periphs CLKID_SYS_UART_B>, <&xtal>;
 				clock-names = "xtal", "pclk", "baud";
 			};
 
+			sdio: mmc at 88000 {
+				compatible = "amlogic,meson-axg-mmc";
+				reg = <0x0 0x88000 0x0 0x800>;
+				interrupts = <GIC_SPI 176 IRQ_TYPE_EDGE_RISING>;
+				power-domains = <&pwrc PWRC_C3_SDIOA_ID>;
+				clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_A>,
+					  <&clkc_periphs CLKID_SD_EMMC_A>,
+					  <&clkc_pll CLKID_FCLK_DIV2>;
+				clock-names = "core","clkin0", "clkin1";
+				no-mmc;
+				no-sd;
+				resets = <&reset RESET_SD_EMMC_A>;
+				status = "disabled";
+			};
+
+			sd: mmc at 8a000 {
+				compatible = "amlogic,meson-axg-mmc";
+				reg = <0x0 0x8a000 0x0 0x800>;
+				interrupts = <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>;
+				power-domains = <&pwrc PWRC_C3_SDCARD_ID>;
+				clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_B>,
+					<&clkc_periphs CLKID_SD_EMMC_B>,
+					<&clkc_pll CLKID_FCLK_DIV2>;
+				clock-names = "core", "clkin0", "clkin1";
+				no-mmc;
+				no-sdio;
+				resets = <&reset RESET_SD_EMMC_B>;
+				status = "disabled";
+			};
+
+			nand: nand-controller at 8d000 {
+				compatible = "amlogic,meson-axg-nfc";
+				reg = <0x0 0x8d000 0x0 0x200>,
+					<0x0 0x8C000 0x0 0x4>;
+				reg-names = "nfc", "emmc";
+				interrupts = <GIC_SPI 87 IRQ_TYPE_EDGE_RISING>;
+				clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_C>,
+					<&clkc_pll CLKID_FCLK_DIV2>;
+				clock-names = "core", "device";
+				status = "disabled";
+			};
+		};
+
+		ethmac: ethernet at fdc00000 {
+			compatible = "amlogic,meson-g12a-dwmac",
+				     "snps,dwmac-3.70a",
+				     "snps,dwmac";
+			reg = <0x0 0xfdc00000 0x0 0x10000>,
+			      <0x0 0xfe024000 0x0 0x8>;
+			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "macirq";
+			power-domains = <&pwrc PWRC_C3_ETH_ID>;
+			clocks = <&clkc_periphs CLKID_SYS_ETH_MAC>,
+				 <&clkc_pll CLKID_FCLK_DIV2>,
+				 <&clkc_pll CLKID_FCLK_50M>;
+			clock-names = "stmmaceth", "clkin0", "clkin1";
+			rx-fifo-depth = <4096>;
+			tx-fifo-depth = <2048>;
+			status = "disabled";
+
+			mdio0: mdio {
+				compatible = "snps,dwmac-mdio";
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
 		};
 	};
 };

-- 
2.37.1




From bigeasy at linutronix.de  Tue Aug  6 05:36:00 2024
From: bigeasy at linutronix.de (Sebastian Andrzej Siewior)
Date: Tue, 6 Aug 2024 14:36:00 +0200
Subject: [PATCH] ASoC: meson: axg-fifo: fix irq scheduling issue with
 PREEMPT_RT
In-Reply-To: <20240806102707.3825703-1-jbrunet@baylibre.com>
References: <20240806102707.3825703-1-jbrunet@baylibre.com>
Message-ID: <20240806123600.uI5LeCdp@linutronix.de>

On 2024-08-06 12:27:03 [+0200], Jerome Brunet wrote:
> With PREEMPT_RT enabled, spinlocks become preemptible.
With PREEMPT_RT enabled a spinlock_t becomes a sleeping lock.

> This is usually not a problem with spinlocks used in IRQ context since
> IRQ handlers get threaded. However, if IRQF_ONESHOT is set, the upper half
> of a threaded irq handler won't be threaded and this causes scheduling
> problems if spinlocks are used in the upper half, like with regmap when
> '.fast_io' is set.

? However, if IRQF_ONESHOT is set, the primary handler won't be
force-threaded and runs always in hardirq context. This is a problem
because spinlock_t requires a preemptible context on PREEMPT_RT. 

> In this particular instance, it is actually better to do everything in
> the bottom half and it solves the problem with PREEMPT_RT.

      threaded handler

The term "bottom half" is usually used with softirq. The IRQ part has a
primary handler and a threaded handler.

> Reported-by: Arseniy Krasnov <avkrasnov at salutedevices.com>
> Closes: https://lore.kernel.org/linux-amlogic/20240729131652.3012327-1-avkrasnov at salutedevices.com
> Suggested-by: Sebastian Andrzej Siewior <bigeasy at linutronix.de>
> Fixes: b11d26660dff ("ASoC: meson: axg-fifo: use threaded irq to check periods")
> Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
> ---
>  sound/soc/meson/axg-fifo.c | 26 ++++++++++----------------
>  1 file changed, 10 insertions(+), 16 deletions(-)
> 
> diff --git a/sound/soc/meson/axg-fifo.c b/sound/soc/meson/axg-fifo.c
> index 7e6090af720b..d0d05fa44d66 100644
> --- a/sound/soc/meson/axg-fifo.c
> +++ b/sound/soc/meson/axg-fifo.c
> @@ -251,8 +244,9 @@ int axg_fifo_pcm_open(struct snd_soc_component *component,
>  	if (ret)
>  		return ret;
>  
> -	ret = request_threaded_irq(fifo->irq, axg_fifo_pcm_irq_block,
> -				   axg_fifo_pcm_irq_block_thread,
> +	/* Use the bottom half of a threaded irq with non-atomic links */

This requests only a threaded handler. There is no "bottom half of a
threaded IRQ".

> +	ret = request_threaded_irq(fifo->irq, NULL,
> +				   axg_fifo_pcm_irq_block,
>  				   IRQF_ONESHOT, dev_name(dev), ss);
>  	if (ret)
>  		return ret;

Sebastian


From krzk at kernel.org  Tue Aug  6 06:10:53 2024
From: krzk at kernel.org (Krzysztof Kozlowski)
Date: Tue, 6 Aug 2024 15:10:53 +0200
Subject: [PATCH 1/3] dt-bindings: clock: fix C3 PLL input parameter
In-Reply-To: <20240806-c3_add_node-v1-1-c0de41341632@amlogic.com>
References: <20240806-c3_add_node-v1-0-c0de41341632@amlogic.com>
 <20240806-c3_add_node-v1-1-c0de41341632@amlogic.com>
Message-ID: <b63fe216-ee29-489e-a175-e1525ac12722@kernel.org>

On 06/08/2024 12:27, Xianwei Zhao via B4 Relay wrote:
> From: Xianwei Zhao <xianwei.zhao at amlogic.com>
> 
> Add C3 PLL controller input clock parameters "fix".

What is "parameters" here? Why you are adding it? Is it missing?
Something is not working?

> 
> Fixes: 0e6be855a96d ("dt-bindings: clock: add Amlogic C3 PLL clock controller")

Why? What bug are you fixing?

> Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
> ---
>  Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
> index 43de3c6fc1cf..700865cc9792 100644
> --- a/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
> +++ b/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
> @@ -24,11 +24,13 @@ properties:
>      items:
>        - description: input top pll
>        - description: input mclk pll
> +      - description: input fix pll
>  
>    clock-names:
>      items:
>        - const: top
>        - const: mclk
> +      - const: fix

and that's not an ABI break because?

Best regards,
Krzysztof



From krzk at kernel.org  Tue Aug  6 06:13:34 2024
From: krzk at kernel.org (Krzysztof Kozlowski)
Date: Tue, 6 Aug 2024 15:13:34 +0200
Subject: [PATCH 2/3] arm64: dts: amlogic: add some device nodes for C3
In-Reply-To: <20240806-c3_add_node-v1-2-c0de41341632@amlogic.com>
References: <20240806-c3_add_node-v1-0-c0de41341632@amlogic.com>
 <20240806-c3_add_node-v1-2-c0de41341632@amlogic.com>
Message-ID: <a1aa292d-6d61-4cb9-8343-6f38258c176f@kernel.org>

On 06/08/2024 12:27, Xianwei Zhao via B4 Relay wrote:
> From: Xianwei Zhao <xianwei.zhao at amlogic.com>
> 
> Add some device nodes for SoC C3, including periphs clock controller
> node, PLL clock controller node, SPICC node, regulator node, NAND
> controller node, sdcard node, Ethernet MAC and PHY node.
> 
> Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
> ---
>  .../boot/dts/amlogic/amlogic-c3-c302x-aw409.dts    | 249 +++++++++++
>  arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi        | 487 ++++++++++++++++++++-
>  2 files changed, 735 insertions(+), 1 deletion(-)
> 


...


> +
> +			sd: mmc at 8a000 {
> +				compatible = "amlogic,meson-axg-mmc";
> +				reg = <0x0 0x8a000 0x0 0x800>;
> +				interrupts = <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>;
> +				power-domains = <&pwrc PWRC_C3_SDCARD_ID>;
> +				clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_B>,
> +					<&clkc_periphs CLKID_SD_EMMC_B>,
> +					<&clkc_pll CLKID_FCLK_DIV2>;
> +				clock-names = "core", "clkin0", "clkin1";
> +				no-mmc;
> +				no-sdio;

Hm? Why are these blocks incomplete that they do not handle SDIO? Aren't
you putting board properties into SoC?

Best regards,
Krzysztof



From krzk at kernel.org  Tue Aug  6 06:14:39 2024
From: krzk at kernel.org (Krzysztof Kozlowski)
Date: Tue, 6 Aug 2024 15:14:39 +0200
Subject: [PATCH 3/3] arm64: dts: amlogic: add C3 AW419 board
In-Reply-To: <20240806-c3_add_node-v1-3-c0de41341632@amlogic.com>
References: <20240806-c3_add_node-v1-0-c0de41341632@amlogic.com>
 <20240806-c3_add_node-v1-3-c0de41341632@amlogic.com>
Message-ID: <c82b6e70-8f2f-4b37-9186-7c49aea019bd@kernel.org>

On 06/08/2024 12:27, Xianwei Zhao via B4 Relay wrote:
> From: Xianwei Zhao <xianwei.zhao at amlogic.com>
> 
> Add Amlogic C3 C308L AW419 board.
> 
> Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
> ---
>  arch/arm64/boot/dts/amlogic/Makefile               |   1 +
>  .../boot/dts/amlogic/amlogic-c3-c308l-aw419.dts    | 278 +++++++++++++++++++++
>  2 files changed, 279 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
> index 29417f04f886..2fbda8419c65 100644
> --- a/arch/arm64/boot/dts/amlogic/Makefile
> +++ b/arch/arm64/boot/dts/amlogic/Makefile
> @@ -2,6 +2,7 @@
>  dtb-$(CONFIG_ARCH_MESON) += amlogic-a4-a113l2-ba400.dtb
>  dtb-$(CONFIG_ARCH_MESON) += amlogic-a5-a113x2-av400.dtb
>  dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c302x-aw409.dtb
> +dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c308l-aw419.dtb
>  dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-an400.dtb
>  dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
>  dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3-c308l-aw419.dts b/arch/arm64/boot/dts/amlogic/amlogic-c3-c308l-aw419.dts
> new file mode 100644
> index 000000000000..d28fd2a1acf0
> --- /dev/null
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-c3-c308l-aw419.dts
> @@ -0,0 +1,278 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
> + */
> +
> +/dts-v1/;
> +
> +#include "amlogic-c3.dtsi"
> +
> +/ {
> +	model = "Amlogic C308l aw419 Development Board";
> +	compatible = "amlogic,aw419", "amlogic,c3";

Where are the bindings? Why do you add bindings without boards? Or
boards without bindings?

Best regards,
Krzysztof



From martin.blumenstingl at googlemail.com  Tue Aug  6 13:24:49 2024
From: martin.blumenstingl at googlemail.com (Martin Blumenstingl)
Date: Tue, 6 Aug 2024 22:24:49 +0200
Subject: [PATCH 2/9] drm/meson: vclk: drop hdmi system clock setup
In-Reply-To: <20240730125023.710237-3-jbrunet@baylibre.com>
References: <20240730125023.710237-1-jbrunet@baylibre.com> <20240730125023.710237-3-jbrunet@baylibre.com>
Message-ID: <CAFBinCB6x3cs3HvrZLaL+qpF1bfuMiRO0nywJPYDa+QUj3c3=Q@mail.gmail.com>

On Tue, Jul 30, 2024 at 2:50?PM Jerome Brunet <jbrunet at baylibre.com> wrote:
>
> Poking the HHI syscon is a way to setup clocks behind CCF's back.
> Also, 2 drm code paths, the encoder and the hdmi-phy, are racing to do the
> same setup of the HDMI system clock.
>
> This clock is used is used by the HDMI phy and should not be set by the
> encoder, so drop those HHI pokes from vclk.
>
> Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl at googlemail.com>


From martin.blumenstingl at googlemail.com  Tue Aug  6 13:28:10 2024
From: martin.blumenstingl at googlemail.com (Martin Blumenstingl)
Date: Tue, 6 Aug 2024 22:28:10 +0200
Subject: [PATCH 3/9] drm/meson: dw-hdmi: use generic clock helpers
In-Reply-To: <20240730125023.710237-4-jbrunet@baylibre.com>
References: <20240730125023.710237-1-jbrunet@baylibre.com> <20240730125023.710237-4-jbrunet@baylibre.com>
Message-ID: <CAFBinCCW9bNtHLRaJNBvqLXN_vCm4mFSVhhV6OcrUb+j-0x3kg@mail.gmail.com>

On Tue, Jul 30, 2024 at 2:50?PM Jerome Brunet <jbrunet at baylibre.com> wrote:
>
> The Amlogic HDMI phy driver is not doing anything with the clocks
> besides enabling on probe. CCF provides generic helpers to do that.
>
> Use the generic clock helpers rather than using a custom one to get and
> enable clocks.
>
> Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl at googlemail.com>

note to self: even if we need to manage one of the clocks specifically
we can do it with clk_bulk_data


From martin.blumenstingl at googlemail.com  Tue Aug  6 13:30:42 2024
From: martin.blumenstingl at googlemail.com (Martin Blumenstingl)
Date: Tue, 6 Aug 2024 22:30:42 +0200
Subject: [PATCH 4/9] drm/meson: dw-hdmi: fix incorrect comment in suspend
In-Reply-To: <20240730125023.710237-5-jbrunet@baylibre.com>
References: <20240730125023.710237-1-jbrunet@baylibre.com> <20240730125023.710237-5-jbrunet@baylibre.com>
Message-ID: <CAFBinCDun9kgPO9ko9seFvWxjZvHwpRO=SaPrdxT1_Yh-FzXVg@mail.gmail.com>

On Tue, Jul 30, 2024 at 2:50?PM Jerome Brunet <jbrunet at baylibre.com> wrote:
>
> Comment in suspend says TOP is put in suspend, but the register
> poke following is actually de-asserting the reset, like in init.
>
> It is doing the opposite of what the comment says.
>
> Align the comment with what the code is doing for now and add
> a FIXME note to sort this out later
>
> Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl at googlemail.com>
(based on public S912 and A311 datasheets)


From martin.blumenstingl at googlemail.com  Tue Aug  6 13:49:40 2024
From: martin.blumenstingl at googlemail.com (Martin Blumenstingl)
Date: Tue, 6 Aug 2024 22:49:40 +0200
Subject: [PATCH 5/9] drm/meson: dw-hdmi: split resets out of hw init.
In-Reply-To: <20240730125023.710237-6-jbrunet@baylibre.com>
References: <20240730125023.710237-1-jbrunet@baylibre.com> <20240730125023.710237-6-jbrunet@baylibre.com>
Message-ID: <CAFBinCCvWFCCvb9gPvv0-eudG=iuKROk5rPSiorKTnHcToDfTQ@mail.gmail.com>

Hi Jerome,

On Tue, Jul 30, 2024 at 2:50?PM Jerome Brunet <jbrunet at baylibre.com> wrote:
>
> This prepares the migration to regmap usage.
>
> To properly setup regmap, the APB needs to be in working order.
> This is easier handled if the resets are not mixed with hw init.
>
> More checks are required to determine if the resets are needed
> on resume or not. Add a note for this.
>
> Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
> ---
>  drivers/gpu/drm/meson/meson_dw_hdmi.c | 14 +++++++++-----
>  1 file changed, 9 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c
> index 5cd3264ab874..47aa3e184e98 100644
> --- a/drivers/gpu/drm/meson/meson_dw_hdmi.c
> +++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c
> @@ -581,11 +581,6 @@ static void meson_dw_hdmi_init(struct meson_dw_hdmi *meson_dw_hdmi)
>         /* Bring HDMITX MEM output of power down */
>         regmap_update_bits(priv->hhi, HHI_MEM_PD_REG0, 0xff << 8, 0);
>
> -       /* Reset HDMITX APB & TX & PHY */
> -       reset_control_reset(meson_dw_hdmi->hdmitx_apb);
> -       reset_control_reset(meson_dw_hdmi->hdmitx_ctrl);
> -       reset_control_reset(meson_dw_hdmi->hdmitx_phy);
> -
>         /* Enable APB3 fail on error */
>         if (!meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) {
>                 writel_bits_relaxed(BIT(15), BIT(15),
> @@ -675,6 +670,10 @@ static int meson_dw_hdmi_bind(struct device *dev, struct device *master,
>                 return PTR_ERR(meson_dw_hdmi->hdmitx_phy);
>         }
>
> +       reset_control_reset(meson_dw_hdmi->hdmitx_apb);
> +       reset_control_reset(meson_dw_hdmi->hdmitx_ctrl);
> +       reset_control_reset(meson_dw_hdmi->hdmitx_phy);
The old out of tree vendor driver [0] enables the "isfr" and "iahb"
(in P_HHI_HDMI_CLK_CNTL and P_HHI_GCLK_MPEG2) clocks before triggering
the resets.
Previously meson_dw_hdmi's behavior was identical as it enabled the
clocks in meson_dw_hdmi_bind() and only later triggered the resets.

I'm totally fine with moving the resets to meson_dw_hdmi_bind() but I
think it should happen after devm_clk_bulk_get_all_enable() has been
called (to keep the order and thus avoid side-effects that we don't
know about yet).

Also out of curiosity: are you planning to convert the driver to use
devm_reset_control_bulk_get_exclusive()?


Best regards,
Martin


[0] https://github.com/endlessm/linux-s905x/blob/master/drivers/amlogic/hdmi/hdmi_tx_20/hw/hdmi_tx_hw.c#L470


From martin.blumenstingl at googlemail.com  Tue Aug  6 14:03:25 2024
From: martin.blumenstingl at googlemail.com (Martin Blumenstingl)
Date: Tue, 6 Aug 2024 23:03:25 +0200
Subject: [PATCH 7/9] drm/meson: dw-hdmi: use matched data
In-Reply-To: <20240730125023.710237-8-jbrunet@baylibre.com>
References: <20240730125023.710237-1-jbrunet@baylibre.com> <20240730125023.710237-8-jbrunet@baylibre.com>
Message-ID: <CAFBinCAaZumGU6dOq0RrHRTQV=MejTJ=RW0P_6tQFOG9vybY6g@mail.gmail.com>

Hi Jerome,

On Tue, Jul 30, 2024 at 2:50?PM Jerome Brunet <jbrunet at baylibre.com> wrote:
[...]
> +       }, {
> +               .limit = 297000,
> +               .regs = gxbb_3g_regs,
> +               .reg_num = ARRAY_SIZE(gxbb_3g_regs)
Just as a side-note: this looked odd when reading for the first time
as I thought that it's a typo (and it should be gxbb_2g97_regs - but
that name is not used).

[...]
> +static const struct meson_dw_hdmi_speed gxl_speeds[] = {
> +       {
> +               .limit = 371250,
> +               .regs = gxl_3g7_regs,
> +               .reg_num = ARRAY_SIZE(gxl_3g7_regs)
> +       }, {
> +               .limit = 297000,
> +               .regs = gxl_3g_regs,
> +               .reg_num = ARRAY_SIZE(gxl_3g_regs)
> +       }, {
> +               .limit = 148500,
> +               .regs = gxl_def_regs,
> +               .reg_num = ARRAY_SIZE(gxl_def_regs)
this is not consistent with what we have above or below so it either
needs to be updated or a comment.
I think this should be called gxl_1g48_regs

> +       }, {
> +               .regs = gxl_270m_regs,
> +               .reg_num = ARRAY_SIZE(gxl_270m_regs)
and this should be called gxl_def_regs



Best regards,
Martin


From helen.koike at collabora.com  Tue Aug  6 10:53:33 2024
From: helen.koike at collabora.com (Helen Koike)
Date: Tue, 6 Aug 2024 14:53:33 -0300
Subject: [PATCH v9 0/6] drm/ci: Add support for GPU and display testing
In-Reply-To: <CAPj87rOYVCG2A10ruyYan9y6NmMY0fUM6Z5-9ht7dEp_THYmNw@mail.gmail.com>
References: <20240730021545.912271-1-vignesh.raman@collabora.com>
 <CAPj87rOYVCG2A10ruyYan9y6NmMY0fUM6Z5-9ht7dEp_THYmNw@mail.gmail.com>
Message-ID: <83921779-808f-487d-a6fc-5a853024791a@collabora.com>



On 05/08/2024 10:11, Daniel Stone wrote:
> Hi Vignesh,
> 
> On Tue, 30 Jul 2024 at 03:16, Vignesh Raman <vignesh.raman at collabora.com> wrote:
>> Some ARM SOCs have a separate display controller and GPU, each with
>> different drivers. For mediatek mt8173, the GPU driver is powervr,
>> and the display driver is mediatek. In the case of mediatek mt8183,
>> the GPU driver is panfrost, and the display driver is mediatek.
>> With rockchip rk3288/rk3399, the GPU driver is panfrost, while the
>> display driver is rockchip. For amlogic meson G12B (A311D) SOC, the
>> GPU driver is panfrost, and the display driver is meson.
>>
>> IGT tests run various tests with different xfails and can test both
>> GPU devices and KMS/display devices. Currently, in drm-ci for MediaTek,
>> Rockchip, and Amlogic Meson platforms, only the GPU driver is tested.
>> This leads to incomplete coverage since the display is never tested on
>> these platforms. This commit series adds support in drm-ci to run tests
>> for both GPU and display drivers for MediaTek mt8173/mt8183, Rockchip
>> rk3288/rk3399, and Amlogic Meson G12B (A311D) platforms.
>>
>> Update the expectations file, and skip driver-specific tests and
>> tools_test on non-intel platforms.
> 
> Thanks, series looks sensible and is:
> Reviewed-by: Daniel Stone <daniels at collabora.com>
> 
> Cheers,
> Daniel


Applied to drm-misc-next

Thanks
Helen


From xianwei.zhao at amlogic.com  Tue Aug  6 18:55:06 2024
From: xianwei.zhao at amlogic.com (Xianwei Zhao)
Date: Wed, 7 Aug 2024 09:55:06 +0800
Subject: [PATCH 1/3] dt-bindings: clock: fix C3 PLL input parameter
In-Reply-To: <b63fe216-ee29-489e-a175-e1525ac12722@kernel.org>
References: <20240806-c3_add_node-v1-0-c0de41341632@amlogic.com>
 <20240806-c3_add_node-v1-1-c0de41341632@amlogic.com>
 <b63fe216-ee29-489e-a175-e1525ac12722@kernel.org>
Message-ID: <86b01ecb-6ca8-496e-b3a8-0b21bb951a60@amlogic.com>

Hi Krzysztof,
     Thanks for your review.

On 2024/8/6 21:10, Krzysztof Kozlowski wrote:
> [ EXTERNAL EMAIL ]
> 
> On 06/08/2024 12:27, Xianwei Zhao via B4 Relay wrote:
>> From: Xianwei Zhao <xianwei.zhao at amlogic.com>
>>
>> Add C3 PLL controller input clock parameters "fix".
> 
> What is "parameters" here? Why you are adding it? Is it missing?
> Something is not working?
> 
Yes. The previous submission was lost.

>>
>> Fixes: 0e6be855a96d ("dt-bindings: clock: add Amlogic C3 PLL clock controller")
> 
> Why? What bug are you fixing?

The input clock of PLL clock controller need the clock whose fw_name is 
called "fix".
> 
>> Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
>> ---
>>   Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml | 7 +++++--
>>   1 file changed, 5 insertions(+), 2 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
>> index 43de3c6fc1cf..700865cc9792 100644
>> --- a/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
>> +++ b/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
>> @@ -24,11 +24,13 @@ properties:
>>       items:
>>         - description: input top pll
>>         - description: input mclk pll
>> +      - description: input fix pll
>>
>>     clock-names:
>>       items:
>>         - const: top
>>         - const: mclk
>> +      - const: fix
> 
> and that's not an ABI break because?
This is "fixed" clock.
I will modify "fix" to "fixed",in next version.
> 
> Best regards,
> Krzysztof
> 


From xianwei.zhao at amlogic.com  Tue Aug  6 19:37:11 2024
From: xianwei.zhao at amlogic.com (Xianwei Zhao)
Date: Wed, 7 Aug 2024 10:37:11 +0800
Subject: [PATCH 3/3] arm64: dts: amlogic: add C3 AW419 board
In-Reply-To: <c82b6e70-8f2f-4b37-9186-7c49aea019bd@kernel.org>
References: <20240806-c3_add_node-v1-0-c0de41341632@amlogic.com>
 <20240806-c3_add_node-v1-3-c0de41341632@amlogic.com>
 <c82b6e70-8f2f-4b37-9186-7c49aea019bd@kernel.org>
Message-ID: <59f37c77-d57b-4568-ad9e-6d50791ae5f7@amlogic.com>

Hi Krzysztof,
     Thanks for your reply.

On 2024/8/6 21:14, Krzysztof Kozlowski wrote:
> [ EXTERNAL EMAIL ]
> 
> On 06/08/2024 12:27, Xianwei Zhao via B4 Relay wrote:
>> From: Xianwei Zhao <xianwei.zhao at amlogic.com>
>>
>> Add Amlogic C3 C308L AW419 board.
>>
>> Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
>> ---
>>   arch/arm64/boot/dts/amlogic/Makefile               |   1 +
>>   .../boot/dts/amlogic/amlogic-c3-c308l-aw419.dts    | 278 +++++++++++++++++++++
>>   2 files changed, 279 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
>> index 29417f04f886..2fbda8419c65 100644
>> --- a/arch/arm64/boot/dts/amlogic/Makefile
>> +++ b/arch/arm64/boot/dts/amlogic/Makefile
>> @@ -2,6 +2,7 @@
>>   dtb-$(CONFIG_ARCH_MESON) += amlogic-a4-a113l2-ba400.dtb
>>   dtb-$(CONFIG_ARCH_MESON) += amlogic-a5-a113x2-av400.dtb
>>   dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c302x-aw409.dtb
>> +dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c308l-aw419.dtb
>>   dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-an400.dtb
>>   dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
>>   dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb
>> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3-c308l-aw419.dts b/arch/arm64/boot/dts/amlogic/amlogic-c3-c308l-aw419.dts
>> new file mode 100644
>> index 000000000000..d28fd2a1acf0
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/amlogic/amlogic-c3-c308l-aw419.dts
>> @@ -0,0 +1,278 @@
>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>> +/*
>> + * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "amlogic-c3.dtsi"
>> +
>> +/ {
>> +     model = "Amlogic C308l aw419 Development Board";
>> +     compatible = "amlogic,aw419", "amlogic,c3";
> 
> Where are the bindings? Why do you add bindings without boards? Or
> boards without bindings?
> 
The bindings of board aw419 was submitted with board aw409.
The commit number is cb3f4e8cacfa7b32ed8b9dff1282c0d4aaf42e88.
> Best regards,
> Krzysztof
> 


From krzysztof.kozlowski at linaro.org  Tue Aug  6 22:44:18 2024
From: krzysztof.kozlowski at linaro.org (Krzysztof Kozlowski)
Date: Wed, 7 Aug 2024 07:44:18 +0200
Subject: [PATCH 1/3] dt-bindings: clock: fix C3 PLL input parameter
In-Reply-To: <86b01ecb-6ca8-496e-b3a8-0b21bb951a60@amlogic.com>
References: <20240806-c3_add_node-v1-0-c0de41341632@amlogic.com>
 <20240806-c3_add_node-v1-1-c0de41341632@amlogic.com>
 <b63fe216-ee29-489e-a175-e1525ac12722@kernel.org>
 <86b01ecb-6ca8-496e-b3a8-0b21bb951a60@amlogic.com>
Message-ID: <2da06dac-7a1a-461c-956d-13b74320723e@linaro.org>

On 07/08/2024 03:55, Xianwei Zhao wrote:
> Hi Krzysztof,
>      Thanks for your review.
> 
> On 2024/8/6 21:10, Krzysztof Kozlowski wrote:
>> [ EXTERNAL EMAIL ]
>>
>> On 06/08/2024 12:27, Xianwei Zhao via B4 Relay wrote:
>>> From: Xianwei Zhao <xianwei.zhao at amlogic.com>
>>>
>>> Add C3 PLL controller input clock parameters "fix".
>>
>> What is "parameters" here? Why you are adding it? Is it missing?
>> Something is not working?
>>
> Yes. The previous submission was lost.

What submission is lost?

> 
>>>
>>> Fixes: 0e6be855a96d ("dt-bindings: clock: add Amlogic C3 PLL clock controller")
>>
>> Why? What bug are you fixing?
> 
> The input clock of PLL clock controller need the clock whose fw_name is 
> called "fix".

Then explain this in commit msg.

>>
>>> Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
>>> ---
>>>   Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml | 7 +++++--
>>>   1 file changed, 5 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
>>> index 43de3c6fc1cf..700865cc9792 100644
>>> --- a/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
>>> +++ b/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
>>> @@ -24,11 +24,13 @@ properties:
>>>       items:
>>>         - description: input top pll
>>>         - description: input mclk pll
>>> +      - description: input fix pll
>>>
>>>     clock-names:
>>>       items:
>>>         - const: top
>>>         - const: mclk
>>> +      - const: fix
>>
>> and that's not an ABI break because?
> This is "fixed" clock.
> I will modify "fix" to "fixed",in next version.

With "fixed" it is still ABI break, right?

Best regards,
Krzysztof



From krzysztof.kozlowski at linaro.org  Tue Aug  6 22:44:47 2024
From: krzysztof.kozlowski at linaro.org (Krzysztof Kozlowski)
Date: Wed, 7 Aug 2024 07:44:47 +0200
Subject: [PATCH 3/3] arm64: dts: amlogic: add C3 AW419 board
In-Reply-To: <59f37c77-d57b-4568-ad9e-6d50791ae5f7@amlogic.com>
References: <20240806-c3_add_node-v1-0-c0de41341632@amlogic.com>
 <20240806-c3_add_node-v1-3-c0de41341632@amlogic.com>
 <c82b6e70-8f2f-4b37-9186-7c49aea019bd@kernel.org>
 <59f37c77-d57b-4568-ad9e-6d50791ae5f7@amlogic.com>
Message-ID: <6ff63eb7-81f4-4d3e-b96f-890432ec184a@linaro.org>

On 07/08/2024 04:37, Xianwei Zhao wrote:
>>> +#include "amlogic-c3.dtsi"
>>> +
>>> +/ {
>>> +     model = "Amlogic C308l aw419 Development Board";
>>> +     compatible = "amlogic,aw419", "amlogic,c3";
>>
>> Where are the bindings? Why do you add bindings without boards? Or
>> boards without bindings?
>>
> The bindings of board aw419 was submitted with board aw409.
> The commit number is cb3f4e8cacfa7b32ed8b9dff1282c0d4aaf42e88.

Why are you adding bindings separate from DTS?

Best regards,
Krzysztof



From xianwei.zhao at amlogic.com  Tue Aug  6 22:54:41 2024
From: xianwei.zhao at amlogic.com (Xianwei Zhao)
Date: Wed, 7 Aug 2024 13:54:41 +0800
Subject: [PATCH 2/3] arm64: dts: amlogic: add some device nodes for C3
In-Reply-To: <a1aa292d-6d61-4cb9-8343-6f38258c176f@kernel.org>
References: <20240806-c3_add_node-v1-0-c0de41341632@amlogic.com>
 <20240806-c3_add_node-v1-2-c0de41341632@amlogic.com>
 <a1aa292d-6d61-4cb9-8343-6f38258c176f@kernel.org>
Message-ID: <49b41346-a98a-470b-9572-0f81557eea29@amlogic.com>

Hi Krzysztof,
    Thanks for your reply.

On 2024/8/6 21:13, Krzysztof Kozlowski wrote:
> [ EXTERNAL EMAIL ]
> 
> On 06/08/2024 12:27, Xianwei Zhao via B4 Relay wrote:
>> From: Xianwei Zhao <xianwei.zhao at amlogic.com>
>>
>> Add some device nodes for SoC C3, including periphs clock controller
>> node, PLL clock controller node, SPICC node, regulator node, NAND
>> controller node, sdcard node, Ethernet MAC and PHY node.
>>
>> Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
>> ---
>>   .../boot/dts/amlogic/amlogic-c3-c302x-aw409.dts    | 249 +++++++++++
>>   arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi        | 487 ++++++++++++++++++++-
>>   2 files changed, 735 insertions(+), 1 deletion(-)
>>
> 
> 
> ...
> 
> 
>> +
>> +                     sd: mmc at 8a000 {
>> +                             compatible = "amlogic,meson-axg-mmc";
>> +                             reg = <0x0 0x8a000 0x0 0x800>;
>> +                             interrupts = <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>;
>> +                             power-domains = <&pwrc PWRC_C3_SDCARD_ID>;
>> +                             clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_B>,
>> +                                     <&clkc_periphs CLKID_SD_EMMC_B>,
>> +                                     <&clkc_pll CLKID_FCLK_DIV2>;
>> +                             clock-names = "core", "clkin0", "clkin1";
>> +                             no-mmc;
>> +                             no-sdio;
> 
> Hm? Why are these blocks incomplete that they do not handle SDIO? Aren't
> you putting board properties into SoC?
>The sdacrd (mmc at 8a000) depends on regulator and pinctrl(select), So some 
property fields are placed at the board level. The SDIO is connect with 
the firmware (wifi&bt). Now I'll remove SDIO implementation and wait 
until later to submit it with the firmware.
> Best regards,
> Krzysztof
> 


From krzk at kernel.org  Tue Aug  6 23:38:54 2024
From: krzk at kernel.org (Krzysztof Kozlowski)
Date: Wed, 7 Aug 2024 08:38:54 +0200
Subject: [PATCH 2/3] arm64: dts: amlogic: add some device nodes for C3
In-Reply-To: <49b41346-a98a-470b-9572-0f81557eea29@amlogic.com>
References: <20240806-c3_add_node-v1-0-c0de41341632@amlogic.com>
 <20240806-c3_add_node-v1-2-c0de41341632@amlogic.com>
 <a1aa292d-6d61-4cb9-8343-6f38258c176f@kernel.org>
 <49b41346-a98a-470b-9572-0f81557eea29@amlogic.com>
Message-ID: <dfcc71af-678b-47bb-b0a3-e72ada0b85bf@kernel.org>

On 07/08/2024 07:54, Xianwei Zhao wrote:
> Hi Krzysztof,
>     Thanks for your reply.
> 
> On 2024/8/6 21:13, Krzysztof Kozlowski wrote:
>> [ EXTERNAL EMAIL ]
>>
>> On 06/08/2024 12:27, Xianwei Zhao via B4 Relay wrote:
>>> From: Xianwei Zhao <xianwei.zhao at amlogic.com>
>>>
>>> Add some device nodes for SoC C3, including periphs clock controller
>>> node, PLL clock controller node, SPICC node, regulator node, NAND
>>> controller node, sdcard node, Ethernet MAC and PHY node.
>>>
>>> Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
>>> ---
>>>   .../boot/dts/amlogic/amlogic-c3-c302x-aw409.dts    | 249 +++++++++++
>>>   arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi        | 487 ++++++++++++++++++++-
>>>   2 files changed, 735 insertions(+), 1 deletion(-)
>>>
>>
>>
>> ...
>>
>>
>>> +
>>> +                     sd: mmc at 8a000 {
>>> +                             compatible = "amlogic,meson-axg-mmc";
>>> +                             reg = <0x0 0x8a000 0x0 0x800>;
>>> +                             interrupts = <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>;
>>> +                             power-domains = <&pwrc PWRC_C3_SDCARD_ID>;
>>> +                             clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_B>,
>>> +                                     <&clkc_periphs CLKID_SD_EMMC_B>,
>>> +                                     <&clkc_pll CLKID_FCLK_DIV2>;
>>> +                             clock-names = "core", "clkin0", "clkin1";
>>> +                             no-mmc;
>>> +                             no-sdio;
>>
>> Hm? Why are these blocks incomplete that they do not handle SDIO? Aren't
>> you putting board properties into SoC?
>> The sdacrd (mmc at 8a000) depends on regulator and pinctrl(select), So some 
> property fields are placed at the board level. The SDIO is connect with 
> the firmware (wifi&bt). Now I'll remove SDIO implementation and wait 
> until later to submit it with the firmware.

My comment applied to all your nodes.

Best regards,
Krzysztof



From xianwei.zhao at amlogic.com  Tue Aug  6 23:40:18 2024
From: xianwei.zhao at amlogic.com (Xianwei Zhao)
Date: Wed, 7 Aug 2024 14:40:18 +0800
Subject: [PATCH 1/3] dt-bindings: clock: fix C3 PLL input parameter
In-Reply-To: <2da06dac-7a1a-461c-956d-13b74320723e@linaro.org>
References: <20240806-c3_add_node-v1-0-c0de41341632@amlogic.com>
 <20240806-c3_add_node-v1-1-c0de41341632@amlogic.com>
 <b63fe216-ee29-489e-a175-e1525ac12722@kernel.org>
 <86b01ecb-6ca8-496e-b3a8-0b21bb951a60@amlogic.com>
 <2da06dac-7a1a-461c-956d-13b74320723e@linaro.org>
Message-ID: <43a600fb-8094-414d-8a3c-0573286a11f7@amlogic.com>

Hi Krzysztof,
    Thank you for your reply.

On 2024/8/7 13:44, Krzysztof Kozlowski wrote:
> [ EXTERNAL EMAIL ]
> 
> On 07/08/2024 03:55, Xianwei Zhao wrote:
>> Hi Krzysztof,
>>       Thanks for your review.
>>
>> On 2024/8/6 21:10, Krzysztof Kozlowski wrote:
>>> [ EXTERNAL EMAIL ]
>>>
>>> On 06/08/2024 12:27, Xianwei Zhao via B4 Relay wrote:
>>>> From: Xianwei Zhao <xianwei.zhao at amlogic.com>
>>>>
>>>> Add C3 PLL controller input clock parameters "fix".
>>>
>>> What is "parameters" here? Why you are adding it? Is it missing?
>>> Something is not working?
>>>
>> Yes. The previous submission was lost.
> 
> What submission is lost?
> 
>>
>>>>
>>>> Fixes: 0e6be855a96d ("dt-bindings: clock: add Amlogic C3 PLL clock controller")
>>>
>>> Why? What bug are you fixing?
>>
>> The input clock of PLL clock controller need the clock whose fw_name is
>> called "fix".
> 
> Then explain this in commit msg.
> 
Will add this in commit msg.
>>>
>>>> Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
>>>> ---
>>>>    Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml | 7 +++++--
>>>>    1 file changed, 5 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
>>>> index 43de3c6fc1cf..700865cc9792 100644
>>>> --- a/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
>>>> +++ b/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
>>>> @@ -24,11 +24,13 @@ properties:
>>>>        items:
>>>>          - description: input top pll
>>>>          - description: input mclk pll
>>>> +      - description: input fix pll
>>>>
>>>>      clock-names:
>>>>        items:
>>>>          - const: top
>>>>          - const: mclk
>>>> +      - const: fix
>>>
>>> and that's not an ABI break because?
>> This is "fixed" clock.
>> I will modify "fix" to "fixed",in next version.
> 
> With "fixed" it is still ABI break, right?
> No. The clock named "fixed" was initially implemented in the PLL clock 
controller driver, but some registers needed secure zone access,
so we put it in secure zone(BL31) implemented and access it through the 
SCMI. but the PLL clock driver need uses this clock, so the "fixed" 
clock is input as an input source,
We changed the driver and forgot to change the binding, so we added it here.
> Best regards,
> Krzysztof
> 


From krzysztof.kozlowski at linaro.org  Wed Aug  7 00:01:51 2024
From: krzysztof.kozlowski at linaro.org (Krzysztof Kozlowski)
Date: Wed, 7 Aug 2024 09:01:51 +0200
Subject: [PATCH 1/3] dt-bindings: clock: fix C3 PLL input parameter
In-Reply-To: <43a600fb-8094-414d-8a3c-0573286a11f7@amlogic.com>
References: <20240806-c3_add_node-v1-0-c0de41341632@amlogic.com>
 <20240806-c3_add_node-v1-1-c0de41341632@amlogic.com>
 <b63fe216-ee29-489e-a175-e1525ac12722@kernel.org>
 <86b01ecb-6ca8-496e-b3a8-0b21bb951a60@amlogic.com>
 <2da06dac-7a1a-461c-956d-13b74320723e@linaro.org>
 <43a600fb-8094-414d-8a3c-0573286a11f7@amlogic.com>
Message-ID: <41aa85d2-a84d-4fea-9d48-ce137437203d@linaro.org>

On 07/08/2024 08:40, Xianwei Zhao wrote:
> Hi Krzysztof,
>     Thank you for your reply.
> 
> On 2024/8/7 13:44, Krzysztof Kozlowski wrote:
>> [ EXTERNAL EMAIL ]
>>
>> On 07/08/2024 03:55, Xianwei Zhao wrote:
>>> Hi Krzysztof,
>>>       Thanks for your review.
>>>
>>> On 2024/8/6 21:10, Krzysztof Kozlowski wrote:
>>>> [ EXTERNAL EMAIL ]
>>>>
>>>> On 06/08/2024 12:27, Xianwei Zhao via B4 Relay wrote:
>>>>> From: Xianwei Zhao <xianwei.zhao at amlogic.com>
>>>>>
>>>>> Add C3 PLL controller input clock parameters "fix".
>>>>
>>>> What is "parameters" here? Why you are adding it? Is it missing?
>>>> Something is not working?
>>>>
>>> Yes. The previous submission was lost.
>>
>> What submission is lost?
>>
>>>
>>>>>
>>>>> Fixes: 0e6be855a96d ("dt-bindings: clock: add Amlogic C3 PLL clock controller")
>>>>
>>>> Why? What bug are you fixing?
>>>
>>> The input clock of PLL clock controller need the clock whose fw_name is
>>> called "fix".
>>
>> Then explain this in commit msg.
>>
> Will add this in commit msg.
>>>>
>>>>> Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
>>>>> ---
>>>>>    Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml | 7 +++++--
>>>>>    1 file changed, 5 insertions(+), 2 deletions(-)
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
>>>>> index 43de3c6fc1cf..700865cc9792 100644
>>>>> --- a/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
>>>>> +++ b/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
>>>>> @@ -24,11 +24,13 @@ properties:
>>>>>        items:
>>>>>          - description: input top pll
>>>>>          - description: input mclk pll
>>>>> +      - description: input fix pll
>>>>>
>>>>>      clock-names:
>>>>>        items:
>>>>>          - const: top
>>>>>          - const: mclk
>>>>> +      - const: fix
>>>>
>>>> and that's not an ABI break because?
>>> This is "fixed" clock.
>>> I will modify "fix" to "fixed",in next version.
>>
>> With "fixed" it is still ABI break, right?
>> No. The clock named "fixed" was initially implemented in the PLL clock 
> controller driver, but some registers needed secure zone access,
> so we put it in secure zone(BL31) implemented and access it through the 
> SCMI. but the PLL clock driver need uses this clock, so the "fixed" 
> clock is input as an input source,
> We changed the driver and forgot to change the binding, so we added it here.

Fix your quoting or your email program - I don't understand what you are
saying here.

Anyway, provide justification in the commit msg.

Best regards,
Krzysztof



From xianwei.zhao at amlogic.com  Wed Aug  7 00:25:09 2024
From: xianwei.zhao at amlogic.com (Xianwei Zhao)
Date: Wed, 7 Aug 2024 15:25:09 +0800
Subject: [PATCH 3/3] arm64: dts: amlogic: add C3 AW419 board
In-Reply-To: <6ff63eb7-81f4-4d3e-b96f-890432ec184a@linaro.org>
References: <20240806-c3_add_node-v1-0-c0de41341632@amlogic.com>
 <20240806-c3_add_node-v1-3-c0de41341632@amlogic.com>
 <c82b6e70-8f2f-4b37-9186-7c49aea019bd@kernel.org>
 <59f37c77-d57b-4568-ad9e-6d50791ae5f7@amlogic.com>
 <6ff63eb7-81f4-4d3e-b96f-890432ec184a@linaro.org>
Message-ID: <553f6971-c253-4382-826b-c9bcd97ce66d@amlogic.com>

Hi Krzysztof,
     Thank you for your quick reply.

On 2024/8/7 13:44, Krzysztof Kozlowski wrote:
> [ EXTERNAL EMAIL ]
> 
> On 07/08/2024 04:37, Xianwei Zhao wrote:
>>>> +#include "amlogic-c3.dtsi"
>>>> +
>>>> +/ {
>>>> +     model = "Amlogic C308l aw419 Development Board";
>>>> +     compatible = "amlogic,aw419", "amlogic,c3";
>>>
>>> Where are the bindings? Why do you add bindings without boards? Or
>>> boards without bindings?
>>>
>> The bindings of board aw419 was submitted with board aw409.
>> The commit number is cb3f4e8cacfa7b32ed8b9dff1282c0d4aaf42e88.
> 
> Why are you adding bindings separate from DTS?
> 

This binding was applied in April last year. I will make sure to submit 
both the binding and DTS together next time.

> Best regards,
> Krzysztof
> 


From jbrunet at baylibre.com  Wed Aug  7 00:56:27 2024
From: jbrunet at baylibre.com (Jerome Brunet)
Date: Wed, 07 Aug 2024 09:56:27 +0200
Subject: [PATCH 1/3] dt-bindings: clock: fix C3 PLL input parameter
In-Reply-To: <2da06dac-7a1a-461c-956d-13b74320723e@linaro.org> (Krzysztof
	Kozlowski's message of "Wed, 7 Aug 2024 07:44:18 +0200")
References: <20240806-c3_add_node-v1-0-c0de41341632@amlogic.com>
	<20240806-c3_add_node-v1-1-c0de41341632@amlogic.com>
	<b63fe216-ee29-489e-a175-e1525ac12722@kernel.org>
	<86b01ecb-6ca8-496e-b3a8-0b21bb951a60@amlogic.com>
	<2da06dac-7a1a-461c-956d-13b74320723e@linaro.org>
Message-ID: <1jikwczrys.fsf@starbuckisacylon.baylibre.com>

On Wed 07 Aug 2024 at 07:44, Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org> wrote:

> On 07/08/2024 03:55, Xianwei Zhao wrote:
>> Hi Krzysztof,
>>      Thanks for your review.
>> 
>> On 2024/8/6 21:10, Krzysztof Kozlowski wrote:
>>> [ EXTERNAL EMAIL ]
>>>
>>> On 06/08/2024 12:27, Xianwei Zhao via B4 Relay wrote:
>>>> From: Xianwei Zhao <xianwei.zhao at amlogic.com>
>>>>
>>>> Add C3 PLL controller input clock parameters "fix".
>>>
>>> What is "parameters" here? Why you are adding it? Is it missing?
>>> Something is not working?
>>>
>> Yes. The previous submission was lost.
>
> What submission is lost?
>

He means it was just forgotten in the submission and noboby picked up on
it at the time. He is not not trying to sneak anything new. That input
is used everywhere in the driver and nothing would work without it.

It is just an honest mistake that he is trying to correct

Indeed the description could certainly detail this a bit more

>> 
>>>>
>>>> Fixes: 0e6be855a96d ("dt-bindings: clock: add Amlogic C3 PLL clock controller")
>>>
>>> Why? What bug are you fixing?
>> 
>> The input clock of PLL clock controller need the clock whose fw_name is 
>> called "fix".
>
> Then explain this in commit msg.
>
>>>
>>>> Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
>>>> ---
>>>>   Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml | 7 +++++--
>>>>   1 file changed, 5 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
>>>> index 43de3c6fc1cf..700865cc9792 100644
>>>> --- a/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
>>>> +++ b/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
>>>> @@ -24,11 +24,13 @@ properties:
>>>>       items:
>>>>         - description: input top pll
>>>>         - description: input mclk pll
>>>> +      - description: input fix pll
>>>>
>>>>     clock-names:
>>>>       items:
>>>>         - const: top
>>>>         - const: mclk
>>>> +      - const: fix
>>>
>>> and that's not an ABI break because?
>> This is "fixed" clock.
>> I will modify "fix" to "fixed",in next version.

No keep the original name. No reason to change it and make more of a mess.

>
> With "fixed" it is still ABI break, right?

It is an ABI break but on a new and immature platform.
Noboby could really use that platform at this stage, so nothing is going
to break on anyone really.

>
> Best regards,
> Krzysztof

-- 
Jerome


From jbrunet at baylibre.com  Wed Aug  7 00:59:13 2024
From: jbrunet at baylibre.com (Jerome Brunet)
Date: Wed, 07 Aug 2024 09:59:13 +0200
Subject: [PATCH 3/9] drm/meson: dw-hdmi: use generic clock helpers
In-Reply-To: <CAFBinCCW9bNtHLRaJNBvqLXN_vCm4mFSVhhV6OcrUb+j-0x3kg@mail.gmail.com>
	(Martin Blumenstingl's message of "Tue, 6 Aug 2024 22:28:10 +0200")
References: <20240730125023.710237-1-jbrunet@baylibre.com>
	<20240730125023.710237-4-jbrunet@baylibre.com>
	<CAFBinCCW9bNtHLRaJNBvqLXN_vCm4mFSVhhV6OcrUb+j-0x3kg@mail.gmail.com>
Message-ID: <1jed70zru6.fsf@starbuckisacylon.baylibre.com>

On Tue 06 Aug 2024 at 22:28, Martin Blumenstingl <martin.blumenstingl at googlemail.com> wrote:

> On Tue, Jul 30, 2024 at 2:50?PM Jerome Brunet <jbrunet at baylibre.com> wrote:
>>
>> The Amlogic HDMI phy driver is not doing anything with the clocks
>> besides enabling on probe. CCF provides generic helpers to do that.
>>
>> Use the generic clock helpers rather than using a custom one to get and
>> enable clocks.
>>
>> Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
> Reviewed-by: Martin Blumenstingl <martin.blumenstingl at googlemail.com>
>
> note to self: even if we need to manage one of the clocks specifically
> we can do it with clk_bulk_data

Honestly I've gone for bulk variant only because calling
devm_clk_get_enabled() 3 times in row and do nothing with the clocks
looks odd.

In I had to do something specific with a clock later on, personnaly I
would back to plain 'struct clk' and use devm_clk_get_enabled()

-- 
Jerome


From krzk at kernel.org  Wed Aug  7 01:07:09 2024
From: krzk at kernel.org (Krzysztof Kozlowski)
Date: Wed, 7 Aug 2024 10:07:09 +0200
Subject: [PATCH 1/3] dt-bindings: clock: fix C3 PLL input parameter
In-Reply-To: <1jikwczrys.fsf@starbuckisacylon.baylibre.com>
References: <20240806-c3_add_node-v1-0-c0de41341632@amlogic.com>
 <20240806-c3_add_node-v1-1-c0de41341632@amlogic.com>
 <b63fe216-ee29-489e-a175-e1525ac12722@kernel.org>
 <86b01ecb-6ca8-496e-b3a8-0b21bb951a60@amlogic.com>
 <2da06dac-7a1a-461c-956d-13b74320723e@linaro.org>
 <1jikwczrys.fsf@starbuckisacylon.baylibre.com>
Message-ID: <4ca79a32-55ab-4d38-96de-ff2fc8074f53@kernel.org>

On 07/08/2024 09:56, Jerome Brunet wrote:
>>>> and that's not an ABI break because?
>>> This is "fixed" clock.
>>> I will modify "fix" to "fixed",in next version.
> 
> No keep the original name. No reason to change it and make more of a mess.
> 
>>
>> With "fixed" it is still ABI break, right?
> 
> It is an ABI break but on a new and immature platform.
> Noboby could really use that platform at this stage, so nothing is going
> to break on anyone really.

Sure, this could be also used in commit msg saving us from this entire
discussion.

Best regards,
Krzysztof



From xianwei.zhao at amlogic.com  Wed Aug  7 01:23:27 2024
From: xianwei.zhao at amlogic.com (Xianwei Zhao)
Date: Wed, 7 Aug 2024 16:23:27 +0800
Subject: [PATCH 1/3] dt-bindings: clock: fix C3 PLL input parameter
In-Reply-To: <1jikwczrys.fsf@starbuckisacylon.baylibre.com>
References: <20240806-c3_add_node-v1-0-c0de41341632@amlogic.com>
 <20240806-c3_add_node-v1-1-c0de41341632@amlogic.com>
 <b63fe216-ee29-489e-a175-e1525ac12722@kernel.org>
 <86b01ecb-6ca8-496e-b3a8-0b21bb951a60@amlogic.com>
 <2da06dac-7a1a-461c-956d-13b74320723e@linaro.org>
 <1jikwczrys.fsf@starbuckisacylon.baylibre.com>
Message-ID: <9718cdaa-1a5a-4153-b19b-328127dedbee@amlogic.com>

Hi Jerome,
     Thanks for your reply.

On 2024/8/7 15:56, Jerome Brunet wrote:
> [ EXTERNAL EMAIL ]
> 
> On Wed 07 Aug 2024 at 07:44, Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org> wrote:
> 
>> On 07/08/2024 03:55, Xianwei Zhao wrote:
>>> Hi Krzysztof,
>>>       Thanks for your review.
>>>
>>> On 2024/8/6 21:10, Krzysztof Kozlowski wrote:
>>>> [ EXTERNAL EMAIL ]
>>>>
>>>> On 06/08/2024 12:27, Xianwei Zhao via B4 Relay wrote:
>>>>> From: Xianwei Zhao <xianwei.zhao at amlogic.com>
>>>>>
>>>>> Add C3 PLL controller input clock parameters "fix".
>>>>
>>>> What is "parameters" here? Why you are adding it? Is it missing?
>>>> Something is not working?
>>>>
>>> Yes. The previous submission was lost.
>>
>> What submission is lost?
>>
> 
> He means it was just forgotten in the submission and noboby picked up on
> it at the time. He is not not trying to sneak anything new. That input
> is used everywhere in the driver and nothing would work without it.
> 
> It is just an honest mistake that he is trying to correct
> 
> Indeed the description could certainly detail this a bit more
> 
>>>
>>>>>
>>>>> Fixes: 0e6be855a96d ("dt-bindings: clock: add Amlogic C3 PLL clock controller")
>>>>
>>>> Why? What bug are you fixing?
>>>
>>> The input clock of PLL clock controller need the clock whose fw_name is
>>> called "fix".
>>
>> Then explain this in commit msg.
>>
>>>>
>>>>> Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
>>>>> ---
>>>>>    Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml | 7 +++++--
>>>>>    1 file changed, 5 insertions(+), 2 deletions(-)
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
>>>>> index 43de3c6fc1cf..700865cc9792 100644
>>>>> --- a/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
>>>>> +++ b/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
>>>>> @@ -24,11 +24,13 @@ properties:
>>>>>        items:
>>>>>          - description: input top pll
>>>>>          - description: input mclk pll
>>>>> +      - description: input fix pll
>>>>>
>>>>>      clock-names:
>>>>>        items:
>>>>>          - const: top
>>>>>          - const: mclk
>>>>> +      - const: fix
>>>>
>>>> and that's not an ABI break because?
>>> This is "fixed" clock.
>>> I will modify "fix" to "fixed",in next version.
> 
> No keep the original name. No reason to change it and make more of a mess.
> 

OK. Will keep original name.

>>
>> With "fixed" it is still ABI break, right?
> 
> It is an ABI break but on a new and immature platform.
> Noboby could really use that platform at this stage, so nothing is going
> to break on anyone really.
> 
>>
>> Best regards,
>> Krzysztof
> 
> --
> Jerome


From jbrunet at baylibre.com  Wed Aug  7 01:26:42 2024
From: jbrunet at baylibre.com (Jerome Brunet)
Date: Wed, 07 Aug 2024 10:26:42 +0200
Subject: [PATCH 5/9] drm/meson: dw-hdmi: split resets out of hw init.
In-Reply-To: <CAFBinCCvWFCCvb9gPvv0-eudG=iuKROk5rPSiorKTnHcToDfTQ@mail.gmail.com>
	(Martin Blumenstingl's message of "Tue, 6 Aug 2024 22:49:40 +0200")
References: <20240730125023.710237-1-jbrunet@baylibre.com>
	<20240730125023.710237-6-jbrunet@baylibre.com>
	<CAFBinCCvWFCCvb9gPvv0-eudG=iuKROk5rPSiorKTnHcToDfTQ@mail.gmail.com>
Message-ID: <1ja5hozqkd.fsf@starbuckisacylon.baylibre.com>

On Tue 06 Aug 2024 at 22:49, Martin Blumenstingl <martin.blumenstingl at googlemail.com> wrote:

> Hi Jerome,
>
> On Tue, Jul 30, 2024 at 2:50?PM Jerome Brunet <jbrunet at baylibre.com> wrote:
>>
>> This prepares the migration to regmap usage.
>>
>> To properly setup regmap, the APB needs to be in working order.
>> This is easier handled if the resets are not mixed with hw init.
>>
>> More checks are required to determine if the resets are needed
>> on resume or not. Add a note for this.
>>
>> Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
>> ---
>>  drivers/gpu/drm/meson/meson_dw_hdmi.c | 14 +++++++++-----
>>  1 file changed, 9 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c
>> index 5cd3264ab874..47aa3e184e98 100644
>> --- a/drivers/gpu/drm/meson/meson_dw_hdmi.c
>> +++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c
>> @@ -581,11 +581,6 @@ static void meson_dw_hdmi_init(struct meson_dw_hdmi *meson_dw_hdmi)
>>         /* Bring HDMITX MEM output of power down */
>>         regmap_update_bits(priv->hhi, HHI_MEM_PD_REG0, 0xff << 8, 0);
>>
>> -       /* Reset HDMITX APB & TX & PHY */
>> -       reset_control_reset(meson_dw_hdmi->hdmitx_apb);
>> -       reset_control_reset(meson_dw_hdmi->hdmitx_ctrl);
>> -       reset_control_reset(meson_dw_hdmi->hdmitx_phy);
>> -
>>         /* Enable APB3 fail on error */
>>         if (!meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) {
>>                 writel_bits_relaxed(BIT(15), BIT(15),
>> @@ -675,6 +670,10 @@ static int meson_dw_hdmi_bind(struct device *dev, struct device *master,
>>                 return PTR_ERR(meson_dw_hdmi->hdmitx_phy);
>>         }
>>
>> +       reset_control_reset(meson_dw_hdmi->hdmitx_apb);
>> +       reset_control_reset(meson_dw_hdmi->hdmitx_ctrl);
>> +       reset_control_reset(meson_dw_hdmi->hdmitx_phy);
> The old out of tree vendor driver [0] enables the "isfr" and "iahb"
> (in P_HHI_HDMI_CLK_CNTL and P_HHI_GCLK_MPEG2) clocks before triggering
> the resets.
> Previously meson_dw_hdmi's behavior was identical as it enabled the
> clocks in meson_dw_hdmi_bind() and only later triggered the resets.
>
> I'm totally fine with moving the resets to meson_dw_hdmi_bind() but I
> think it should happen after devm_clk_bulk_get_all_enable() has been
> called (to keep the order and thus avoid side-effects that we don't
> know about yet).

Good point.

I was also thinking about squashing this with the regmap patch.
I've split it apart for v1 to make things a bit more clear but it only
really makes sense with the regmap conversion. 

>
> Also out of curiosity: are you planning to convert the driver to use
> devm_reset_control_bulk_get_exclusive()?
>

It's been a while this I've done that. I remember I thought about it.
I think it was a bit more difficult to use that clocks. I was looking at
making the driver a bit more clean and simple. It was not really helping
to move it in that direction IIRC.

>
> Best regards,
> Martin
>
>
> [0] https://github.com/endlessm/linux-s905x/blob/master/drivers/amlogic/hdmi/hdmi_tx_20/hw/hdmi_tx_hw.c#L470

-- 
Jerome


From jbrunet at baylibre.com  Wed Aug  7 02:12:52 2024
From: jbrunet at baylibre.com (Jerome Brunet)
Date: Wed, 07 Aug 2024 11:12:52 +0200
Subject: [PATCH 7/9] drm/meson: dw-hdmi: use matched data
In-Reply-To: <CAFBinCAaZumGU6dOq0RrHRTQV=MejTJ=RW0P_6tQFOG9vybY6g@mail.gmail.com>
	(Martin Blumenstingl's message of "Tue, 6 Aug 2024 23:03:25 +0200")
References: <20240730125023.710237-1-jbrunet@baylibre.com>
	<20240730125023.710237-8-jbrunet@baylibre.com>
	<CAFBinCAaZumGU6dOq0RrHRTQV=MejTJ=RW0P_6tQFOG9vybY6g@mail.gmail.com>
Message-ID: <1j5xsczoff.fsf@starbuckisacylon.baylibre.com>

On Tue 06 Aug 2024 at 23:03, Martin Blumenstingl <martin.blumenstingl at googlemail.com> wrote:

> Hi Jerome,
>
> On Tue, Jul 30, 2024 at 2:50?PM Jerome Brunet <jbrunet at baylibre.com> wrote:
> [...]
>> +       }, {
>> +               .limit = 297000,
>> +               .regs = gxbb_3g_regs,
>> +               .reg_num = ARRAY_SIZE(gxbb_3g_regs)
> Just as a side-note: this looked odd when reading for the first time
> as I thought that it's a typo (and it should be gxbb_2g97_regs - but
> that name is not used).

I know it looks odd but there is a (perhaps silly) reason for it.

The names are derived from PHY modes used in the Amlogic vendor tree.
Those are magic pokes and we don't really know anything about it. The
vendor tree often update and mainline does not always follow. I know
that we are not 100% aligned right now. No one knows what branch is the
reference to follow anyway.

Using the same names is way to leave breadcrumbs that may help people
linking this to vendor code later on (if necessary)

I think the modes are named after the (rounded) bandwidth they provide,
not necessarily the limit we are using to pick it ... except for def,
which might just mean 'default' I guess.

https://github.com/khadas/linux/blob/khadas-vims-5.4.y/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_g12a.c#L589

I focused on keeping mainline as it was for the value poked, retaining
as much information as possible to find our way back.

Your proposed naming convention is fine by me as well.

>
> [...]
>> +static const struct meson_dw_hdmi_speed gxl_speeds[] = {
>> +       {
>> +               .limit = 371250,
>> +               .regs = gxl_3g7_regs,
>> +               .reg_num = ARRAY_SIZE(gxl_3g7_regs)
>> +       }, {
>> +               .limit = 297000,
>> +               .regs = gxl_3g_regs,
>> +               .reg_num = ARRAY_SIZE(gxl_3g_regs)
>> +       }, {
>> +               .limit = 148500,
>> +               .regs = gxl_def_regs,
>> +               .reg_num = ARRAY_SIZE(gxl_def_regs)
> this is not consistent with what we have above or below so it either
> needs to be updated or a comment.
> I think this should be called gxl_1g48_regs
>
>> +       }, {
>> +               .regs = gxl_270m_regs,
>> +               .reg_num = ARRAY_SIZE(gxl_270m_regs)
> and this should be called gxl_def_regs

def in not the last one, it is another name used by AML

It so happens that on mainline with we have only put the SD/270M for
gxl. In the AML tree, it does exist for G12 too. Maybe it will be needed someday.

>
>
>
> Best regards,
> Martin

-- 
Jerome


From christophe.jaillet at wanadoo.fr  Wed Aug  7 02:30:55 2024
From: christophe.jaillet at wanadoo.fr (Christophe JAILLET)
Date: Wed,  7 Aug 2024 11:30:55 +0200
Subject: [PATCH 1/3] pinctrl: meson: Constify struct meson_pmx_group and meson_pmx_func
In-Reply-To: <cover.1723022467.git.christophe.jaillet@wanadoo.fr>
References: <cover.1723022467.git.christophe.jaillet@wanadoo.fr>
Message-ID: <18676f51c891782c9c13bd469ec57041e9a6e0ff.1723022467.git.christophe.jaillet@wanadoo.fr>

'struct meson_pmx_group' and 'struct meson_pmx_func' are not modified in
these drivers.

Constifying these structures moves some data to a read-only section, so
increase overall security.


On a x86_64, with allmodconfig:
Before:
======
   text	   data	    bss	    dec	    hex	filename
  10818	  11696	      0	  22514	   57f2	drivers/pinctrl/meson/pinctrl-amlogic-c3.o
  17198	  17680	      0	  34878	   883e	drivers/pinctrl/meson/pinctrl-amlogic-t7.o
  14161	  11200	      0	  25361	   6311	drivers/pinctrl/meson/pinctrl-meson8b.o
  17348	  12512	      0	  29860	   74a4	drivers/pinctrl/meson/pinctrl-meson8.o
   3070	    324	      0	   3394	    d42	drivers/pinctrl/meson/pinctrl-meson8-pmx.o
   9317	   9648	      0	  18965	   4a15	drivers/pinctrl/meson/pinctrl-meson-a1.o
  12115	  11664	      0	  23779	   5ce3	drivers/pinctrl/meson/pinctrl-meson-axg.o
   2470	    120	      0	   2590	    a1e	drivers/pinctrl/meson/pinctrl-meson-axg-pmx.o
  15125	  15224	      0	  30349	   768d	drivers/pinctrl/meson/pinctrl-meson-g12a.o
  13800	  10160	      0	  23960	   5d98	drivers/pinctrl/meson/pinctrl-meson-gxbb.o
  13040	   9648	      0	  22688	   58a0	drivers/pinctrl/meson/pinctrl-meson-gxl.o
  20507	   1132	     48	  21687	   54b7	drivers/pinctrl/meson/pinctrl-meson.o
  12212	  12880	      0	  25092	   6204	drivers/pinctrl/meson/pinctrl-meson-s4.o

After:
=====
   text	   data	    bss	    dec	    hex	filename
  21410	   1096	      0	  22506	   57ea	drivers/pinctrl/meson/pinctrl-amlogic-c3.o
  33358	   1552	      0	  34910	   885e	drivers/pinctrl/meson/pinctrl-amlogic-t7.o
  24049	   1336	      0	  25385	   6329	drivers/pinctrl/meson/pinctrl-meson8b.o
  28804	   1048	      0	  29852	   749c	drivers/pinctrl/meson/pinctrl-meson8.o
   3070	    324	      0	   3394	    d42	drivers/pinctrl/meson/pinctrl-meson8-pmx.o
  18085	    888	      0	  18973	   4a1d	drivers/pinctrl/meson/pinctrl-meson-a1.o
  22675	   1112	      0	  23787	   5ceb	drivers/pinctrl/meson/pinctrl-meson-axg.o
   2470	    120	      0	   2590	    a1e	drivers/pinctrl/meson/pinctrl-meson-axg-pmx.o
  29045	   1320	      0	  30365	   769d	drivers/pinctrl/meson/pinctrl-meson-g12a.o
  22824	   1136	      0	  23960	   5d98	drivers/pinctrl/meson/pinctrl-meson-gxbb.o
  21616	   1064	      0	  22680	   5898	drivers/pinctrl/meson/pinctrl-meson-gxl.o
  20507	   1132	     48	  21687	   54b7	drivers/pinctrl/meson/pinctrl-meson.o
  23924	   1168	      0	  25092	   6204	drivers/pinctrl/meson/pinctrl-meson-s4.o

Signed-off-by: Christophe JAILLET <christophe.jaillet at wanadoo.fr>
---
Compile tested-only.
---
 drivers/pinctrl/meson/pinctrl-amlogic-c3.c    | 4 ++--
 drivers/pinctrl/meson/pinctrl-amlogic-t7.c    | 4 ++--
 drivers/pinctrl/meson/pinctrl-meson-a1.c      | 4 ++--
 drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c | 4 ++--
 drivers/pinctrl/meson/pinctrl-meson-axg.c     | 8 ++++----
 drivers/pinctrl/meson/pinctrl-meson-g12a.c    | 8 ++++----
 drivers/pinctrl/meson/pinctrl-meson-gxbb.c    | 8 ++++----
 drivers/pinctrl/meson/pinctrl-meson-gxl.c     | 8 ++++----
 drivers/pinctrl/meson/pinctrl-meson-s4.c      | 4 ++--
 drivers/pinctrl/meson/pinctrl-meson.c         | 2 +-
 drivers/pinctrl/meson/pinctrl-meson.h         | 4 ++--
 drivers/pinctrl/meson/pinctrl-meson8-pmx.c    | 6 +++---
 drivers/pinctrl/meson/pinctrl-meson8.c        | 8 ++++----
 drivers/pinctrl/meson/pinctrl-meson8b.c       | 8 ++++----
 14 files changed, 40 insertions(+), 40 deletions(-)

diff --git a/drivers/pinctrl/meson/pinctrl-amlogic-c3.c b/drivers/pinctrl/meson/pinctrl-amlogic-c3.c
index 04f1e87bae99..9c14a8781680 100644
--- a/drivers/pinctrl/meson/pinctrl-amlogic-c3.c
+++ b/drivers/pinctrl/meson/pinctrl-amlogic-c3.c
@@ -375,7 +375,7 @@ static const unsigned int spi_a_mosi_a_pins[]		= { GPIOA_3 };
 static const unsigned int gen_clk_a4_pins[]		= { GPIOA_4 };
 static const unsigned int clk12_24_a_pins[]		= { GPIOA_5 };
 
-static struct meson_pmx_group c3_periphs_groups[] = {
+static const struct meson_pmx_group c3_periphs_groups[] = {
 	GPIO_GROUP(GPIOE_0),
 	GPIO_GROUP(GPIOE_1),
 	GPIO_GROUP(GPIOE_2),
@@ -987,7 +987,7 @@ static const char * const lcd_groups[] = {
 	"lcd_clk_a", "lcd_clk_x", "lcd_hs", "lcd_vs",
 };
 
-static struct meson_pmx_func c3_periphs_functions[] = {
+static const struct meson_pmx_func c3_periphs_functions[] = {
 	FUNCTION(gpio_periphs),
 	FUNCTION(uart_a),
 	FUNCTION(uart_b),
diff --git a/drivers/pinctrl/meson/pinctrl-amlogic-t7.c b/drivers/pinctrl/meson/pinctrl-amlogic-t7.c
index 0aed5de3f068..121158cce4f7 100644
--- a/drivers/pinctrl/meson/pinctrl-amlogic-t7.c
+++ b/drivers/pinctrl/meson/pinctrl-amlogic-t7.c
@@ -535,7 +535,7 @@ static const unsigned int i2c0_sck_h_pins[]		= { GPIOH_7 };
 /* Bank H func3 */
 static const unsigned int pcieck_reqn_h_pins[]		= { GPIOH_2 };
 
-static struct meson_pmx_group t7_periphs_groups[] = {
+static const struct meson_pmx_group t7_periphs_groups[] = {
 	GPIO_GROUP(GPIOB_0),
 	GPIO_GROUP(GPIOB_1),
 	GPIO_GROUP(GPIOB_2),
@@ -1443,7 +1443,7 @@ static const char * const mic_mute_groups[] = {
 	"mic_mute_key", "mic_mute_led",
 };
 
-static struct meson_pmx_func t7_periphs_functions[] = {
+static const struct meson_pmx_func t7_periphs_functions[] = {
 	FUNCTION(gpio_periphs),
 	FUNCTION(emmc),
 	FUNCTION(nor),
diff --git a/drivers/pinctrl/meson/pinctrl-meson-a1.c b/drivers/pinctrl/meson/pinctrl-meson-a1.c
index d2ac9ca72a3e..11368ee01452 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-a1.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-a1.c
@@ -339,7 +339,7 @@ static const unsigned int tst_out11_pins[]		= { GPIOA_11 };
 static const unsigned int mute_key_pins[]		= { GPIOA_4 };
 static const unsigned int mute_en_pins[]		= { GPIOA_5 };
 
-static struct meson_pmx_group meson_a1_periphs_groups[] = {
+static const struct meson_pmx_group meson_a1_periphs_groups[] = {
 	GPIO_GROUP(GPIOP_0),
 	GPIO_GROUP(GPIOP_1),
 	GPIO_GROUP(GPIOP_2),
@@ -832,7 +832,7 @@ static const char * const mute_groups[] = {
 	"mute_key", "mute_en",
 };
 
-static struct meson_pmx_func meson_a1_periphs_functions[] = {
+static const struct meson_pmx_func meson_a1_periphs_functions[] = {
 	FUNCTION(gpio_periphs),
 	FUNCTION(psram),
 	FUNCTION(pwm_a),
diff --git a/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c b/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c
index cad411d90727..2ae802ee8241 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c
@@ -82,8 +82,8 @@ static int meson_axg_pmx_set_mux(struct pinctrl_dev *pcdev,
 	int i;
 	int ret;
 	struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
-	struct meson_pmx_func *func = &pc->data->funcs[func_num];
-	struct meson_pmx_group *group = &pc->data->groups[group_num];
+	const struct meson_pmx_func *func = &pc->data->funcs[func_num];
+	const struct meson_pmx_group *group = &pc->data->groups[group_num];
 	struct meson_pmx_axg_data *pmx_data =
 		(struct meson_pmx_axg_data *)group->data;
 
diff --git a/drivers/pinctrl/meson/pinctrl-meson-axg.c b/drivers/pinctrl/meson/pinctrl-meson-axg.c
index 8f4e7154b73f..9fb99af8a348 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-axg.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-axg.c
@@ -352,7 +352,7 @@ static const unsigned int tdmb_dout2_pins[] = {GPIOA_12};
 static const unsigned int tdmb_din3_pins[] = {GPIOA_13};
 static const unsigned int tdmb_dout3_pins[] = {GPIOA_13};
 
-static struct meson_pmx_group meson_axg_periphs_groups[] = {
+static const struct meson_pmx_group meson_axg_periphs_groups[] = {
 	GPIO_GROUP(GPIOZ_0),
 	GPIO_GROUP(GPIOZ_1),
 	GPIO_GROUP(GPIOZ_2),
@@ -675,7 +675,7 @@ static const unsigned int jtag_ao_tms_pins[] = {GPIOAO_7};
 /* gen_clk */
 static const unsigned int gen_clk_ee_pins[] = {GPIOAO_13};
 
-static struct meson_pmx_group meson_axg_aobus_groups[] = {
+static const struct meson_pmx_group meson_axg_aobus_groups[] = {
 	GPIO_GROUP(GPIOAO_0),
 	GPIO_GROUP(GPIOAO_1),
 	GPIO_GROUP(GPIOAO_2),
@@ -955,7 +955,7 @@ static const char * const gen_clk_ee_groups[] = {
 	"gen_clk_ee",
 };
 
-static struct meson_pmx_func meson_axg_periphs_functions[] = {
+static const struct meson_pmx_func meson_axg_periphs_functions[] = {
 	FUNCTION(gpio_periphs),
 	FUNCTION(emmc),
 	FUNCTION(nor),
@@ -987,7 +987,7 @@ static struct meson_pmx_func meson_axg_periphs_functions[] = {
 	FUNCTION(tdmc),
 };
 
-static struct meson_pmx_func meson_axg_aobus_functions[] = {
+static const struct meson_pmx_func meson_axg_aobus_functions[] = {
 	FUNCTION(gpio_aobus),
 	FUNCTION(uart_ao_a),
 	FUNCTION(uart_ao_b),
diff --git a/drivers/pinctrl/meson/pinctrl-meson-g12a.c b/drivers/pinctrl/meson/pinctrl-meson-g12a.c
index 32830269a5b4..28a3a06e40e3 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-g12a.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-g12a.c
@@ -436,7 +436,7 @@ static const unsigned int tdm_c_dout1_z_pins[]		= { GPIOZ_3 };
 static const unsigned int tdm_c_dout2_z_pins[]		= { GPIOZ_4 };
 static const unsigned int tdm_c_dout3_z_pins[]		= { GPIOZ_5 };
 
-static struct meson_pmx_group meson_g12a_periphs_groups[] = {
+static const struct meson_pmx_group meson_g12a_periphs_groups[] = {
 	GPIO_GROUP(GPIOZ_0),
 	GPIO_GROUP(GPIOZ_1),
 	GPIO_GROUP(GPIOZ_2),
@@ -860,7 +860,7 @@ static const unsigned int tdm_ao_b_dout2_pins[]		= { GPIOAO_6 };
 /* mclk0_ao */
 static const unsigned int mclk0_ao_pins[]		= { GPIOAO_9 };
 
-static struct meson_pmx_group meson_g12a_aobus_groups[] = {
+static const struct meson_pmx_group meson_g12a_aobus_groups[] = {
 	GPIO_GROUP(GPIOAO_0),
 	GPIO_GROUP(GPIOAO_1),
 	GPIO_GROUP(GPIOAO_2),
@@ -1253,7 +1253,7 @@ static const char * const mclk0_ao_groups[] = {
 	"mclk0_ao",
 };
 
-static struct meson_pmx_func meson_g12a_periphs_functions[] = {
+static const struct meson_pmx_func meson_g12a_periphs_functions[] = {
 	FUNCTION(gpio_periphs),
 	FUNCTION(emmc),
 	FUNCTION(nor),
@@ -1295,7 +1295,7 @@ static struct meson_pmx_func meson_g12a_periphs_functions[] = {
 	FUNCTION(tdm_c),
 };
 
-static struct meson_pmx_func meson_g12a_aobus_functions[] = {
+static const struct meson_pmx_func meson_g12a_aobus_functions[] = {
 	FUNCTION(gpio_aobus),
 	FUNCTION(uart_ao_a),
 	FUNCTION(uart_ao_b),
diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
index 2867f397fec6..64f43f4bddb2 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
@@ -307,7 +307,7 @@ static const unsigned int spdif_out_ao_13_pins[] = { GPIOAO_13 };
 static const unsigned int ao_cec_pins[]		= { GPIOAO_12 };
 static const unsigned int ee_cec_pins[]		= { GPIOAO_12 };
 
-static struct meson_pmx_group meson_gxbb_periphs_groups[] = {
+static const struct meson_pmx_group meson_gxbb_periphs_groups[] = {
 	GPIO_GROUP(GPIOZ_0),
 	GPIO_GROUP(GPIOZ_1),
 	GPIO_GROUP(GPIOZ_2),
@@ -541,7 +541,7 @@ static struct meson_pmx_group meson_gxbb_periphs_groups[] = {
 	GROUP(sdcard_clk,	2,	11),
 };
 
-static struct meson_pmx_group meson_gxbb_aobus_groups[] = {
+static const struct meson_pmx_group meson_gxbb_aobus_groups[] = {
 	GPIO_GROUP(GPIOAO_0),
 	GPIO_GROUP(GPIOAO_1),
 	GPIO_GROUP(GPIOAO_2),
@@ -798,7 +798,7 @@ static const char * const cec_ao_groups[] = {
 	"ao_cec", "ee_cec",
 };
 
-static struct meson_pmx_func meson_gxbb_periphs_functions[] = {
+static const struct meson_pmx_func meson_gxbb_periphs_functions[] = {
 	FUNCTION(gpio_periphs),
 	FUNCTION(emmc),
 	FUNCTION(nor),
@@ -829,7 +829,7 @@ static struct meson_pmx_func meson_gxbb_periphs_functions[] = {
 	FUNCTION(tsin_b),
 };
 
-static struct meson_pmx_func meson_gxbb_aobus_functions[] = {
+static const struct meson_pmx_func meson_gxbb_aobus_functions[] = {
 	FUNCTION(gpio_aobus),
 	FUNCTION(uart_ao),
 	FUNCTION(uart_ao_b),
diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
index a2f25fa02852..f812393e5b2c 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
@@ -301,7 +301,7 @@ static const unsigned int spdif_out_ao_9_pins[] = { GPIOAO_9 };
 static const unsigned int ao_cec_pins[]		= { GPIOAO_8 };
 static const unsigned int ee_cec_pins[]		= { GPIOAO_8 };
 
-static struct meson_pmx_group meson_gxl_periphs_groups[] = {
+static const struct meson_pmx_group meson_gxl_periphs_groups[] = {
 	GPIO_GROUP(GPIOZ_0),
 	GPIO_GROUP(GPIOZ_1),
 	GPIO_GROUP(GPIOZ_2),
@@ -527,7 +527,7 @@ static struct meson_pmx_group meson_gxl_periphs_groups[] = {
 	GROUP(pwm_f_clk,	8,	30),
 };
 
-static struct meson_pmx_group meson_gxl_aobus_groups[] = {
+static const struct meson_pmx_group meson_gxl_aobus_groups[] = {
 	GPIO_GROUP(GPIOAO_0),
 	GPIO_GROUP(GPIOAO_1),
 	GPIO_GROUP(GPIOAO_2),
@@ -763,7 +763,7 @@ static const char * const cec_ao_groups[] = {
 	"ao_cec", "ee_cec",
 };
 
-static struct meson_pmx_func meson_gxl_periphs_functions[] = {
+static const struct meson_pmx_func meson_gxl_periphs_functions[] = {
 	FUNCTION(gpio_periphs),
 	FUNCTION(emmc),
 	FUNCTION(nor),
@@ -793,7 +793,7 @@ static struct meson_pmx_func meson_gxl_periphs_functions[] = {
 	FUNCTION(tsin_b),
 };
 
-static struct meson_pmx_func meson_gxl_aobus_functions[] = {
+static const struct meson_pmx_func meson_gxl_aobus_functions[] = {
 	FUNCTION(gpio_aobus),
 	FUNCTION(uart_ao),
 	FUNCTION(uart_ao_b),
diff --git a/drivers/pinctrl/meson/pinctrl-meson-s4.c b/drivers/pinctrl/meson/pinctrl-meson-s4.c
index 60c7d5003e8a..6a6bd767ae0a 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-s4.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-s4.c
@@ -411,7 +411,7 @@ static const unsigned int s2_demod_gpio0_pins[]		= { GPIOZ_12 };
 static const unsigned int gen_clk_z9_pins[]		= { GPIOZ_9 };
 static const unsigned int gen_clk_z12_pins[]		= { GPIOZ_12 };
 
-static struct meson_pmx_group meson_s4_periphs_groups[] = {
+static const struct meson_pmx_group meson_s4_periphs_groups[] = {
 	GPIO_GROUP(GPIOE_0),
 	GPIO_GROUP(GPIOE_1),
 
@@ -1100,7 +1100,7 @@ static const char * const s2_demod_groups[] = {
 	"s2_demod_gpio3", "s2_demod_gpio2", "s2_demod_gpio1", "s2_demod_gpio0",
 };
 
-static struct meson_pmx_func meson_s4_periphs_functions[] = {
+static const struct meson_pmx_func meson_s4_periphs_functions[] = {
 	FUNCTION(gpio_periphs),
 	FUNCTION(i2c0),
 	FUNCTION(i2c1),
diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c
index ef002b9dd464..1a58f135aca9 100644
--- a/drivers/pinctrl/meson/pinctrl-meson.c
+++ b/drivers/pinctrl/meson/pinctrl-meson.c
@@ -528,7 +528,7 @@ static int meson_pinconf_group_set(struct pinctrl_dev *pcdev,
 				   unsigned long *configs, unsigned num_configs)
 {
 	struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
-	struct meson_pmx_group *group = &pc->data->groups[num_group];
+	const struct meson_pmx_group *group = &pc->data->groups[num_group];
 	int i;
 
 	dev_dbg(pc->dev, "set pinconf for group %s\n", group->name);
diff --git a/drivers/pinctrl/meson/pinctrl-meson.h b/drivers/pinctrl/meson/pinctrl-meson.h
index 34fc4e8612e4..395362c33d59 100644
--- a/drivers/pinctrl/meson/pinctrl-meson.h
+++ b/drivers/pinctrl/meson/pinctrl-meson.h
@@ -110,8 +110,8 @@ struct meson_bank {
 struct meson_pinctrl_data {
 	const char *name;
 	const struct pinctrl_pin_desc *pins;
-	struct meson_pmx_group *groups;
-	struct meson_pmx_func *funcs;
+	const struct meson_pmx_group *groups;
+	const struct meson_pmx_func *funcs;
 	unsigned int num_pins;
 	unsigned int num_groups;
 	unsigned int num_funcs;
diff --git a/drivers/pinctrl/meson/pinctrl-meson8-pmx.c b/drivers/pinctrl/meson/pinctrl-meson8-pmx.c
index 7f22aa0f8e36..10adf52edda6 100644
--- a/drivers/pinctrl/meson/pinctrl-meson8-pmx.c
+++ b/drivers/pinctrl/meson/pinctrl-meson8-pmx.c
@@ -32,7 +32,7 @@
 static void meson8_pmx_disable_other_groups(struct meson_pinctrl *pc,
 					    unsigned int pin, int sel_group)
 {
-	struct meson_pmx_group *group;
+	const struct meson_pmx_group *group;
 	struct meson8_pmx_data *pmx_data;
 	int i, j;
 
@@ -57,8 +57,8 @@ static int meson8_pmx_set_mux(struct pinctrl_dev *pcdev, unsigned func_num,
 			      unsigned group_num)
 {
 	struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
-	struct meson_pmx_func *func = &pc->data->funcs[func_num];
-	struct meson_pmx_group *group = &pc->data->groups[group_num];
+	const struct meson_pmx_func *func = &pc->data->funcs[func_num];
+	const struct meson_pmx_group *group = &pc->data->groups[group_num];
 	struct meson8_pmx_data *pmx_data =
 		(struct meson8_pmx_data *)group->data;
 	int i, ret = 0;
diff --git a/drivers/pinctrl/meson/pinctrl-meson8.c b/drivers/pinctrl/meson/pinctrl-meson8.c
index dd17100efdcf..af479d4b3e2a 100644
--- a/drivers/pinctrl/meson/pinctrl-meson8.c
+++ b/drivers/pinctrl/meson/pinctrl-meson8.c
@@ -405,7 +405,7 @@ static const unsigned int i2s_out_ch01_ao_pins[] = { GPIOAO_11 };
 
 static const unsigned int hdmi_cec_ao_pins[]	= { GPIOAO_12 };
 
-static struct meson_pmx_group meson8_cbus_groups[] = {
+static const struct meson_pmx_group meson8_cbus_groups[] = {
 	GPIO_GROUP(GPIOX_0),
 	GPIO_GROUP(GPIOX_1),
 	GPIO_GROUP(GPIOX_2),
@@ -745,7 +745,7 @@ static struct meson_pmx_group meson8_cbus_groups[] = {
 	GROUP(sdxc_cmd_b,	2,	4),
 };
 
-static struct meson_pmx_group meson8_aobus_groups[] = {
+static const struct meson_pmx_group meson8_aobus_groups[] = {
 	GPIO_GROUP(GPIOAO_0),
 	GPIO_GROUP(GPIOAO_1),
 	GPIO_GROUP(GPIOAO_2),
@@ -1015,7 +1015,7 @@ static const char * const hdmi_cec_ao_groups[] = {
 	"hdmi_cec_ao"
 };
 
-static struct meson_pmx_func meson8_cbus_functions[] = {
+static const struct meson_pmx_func meson8_cbus_functions[] = {
 	FUNCTION(gpio_periphs),
 	FUNCTION(sd_a),
 	FUNCTION(sdxc_a),
@@ -1051,7 +1051,7 @@ static struct meson_pmx_func meson8_cbus_functions[] = {
 	FUNCTION(spdif),
 };
 
-static struct meson_pmx_func meson8_aobus_functions[] = {
+static const struct meson_pmx_func meson8_aobus_functions[] = {
 	FUNCTION(gpio_aobus),
 	FUNCTION(uart_ao),
 	FUNCTION(remote),
diff --git a/drivers/pinctrl/meson/pinctrl-meson8b.c b/drivers/pinctrl/meson/pinctrl-meson8b.c
index 6cd4b3ec1b40..f1a8950d0bde 100644
--- a/drivers/pinctrl/meson/pinctrl-meson8b.c
+++ b/drivers/pinctrl/meson/pinctrl-meson8b.c
@@ -349,7 +349,7 @@ static const unsigned int eth_ref_clk_pins[]	= { DIF_3_N };
 static const unsigned int eth_mdc_pins[]	= { DIF_4_P };
 static const unsigned int eth_mdio_en_pins[]	= { DIF_4_N };
 
-static struct meson_pmx_group meson8b_cbus_groups[] = {
+static const struct meson_pmx_group meson8b_cbus_groups[] = {
 	GPIO_GROUP(GPIOX_0),
 	GPIO_GROUP(GPIOX_1),
 	GPIO_GROUP(GPIOX_2),
@@ -603,7 +603,7 @@ static struct meson_pmx_group meson8b_cbus_groups[] = {
 	GROUP(eth_rxd2,		7,	23),
 };
 
-static struct meson_pmx_group meson8b_aobus_groups[] = {
+static const struct meson_pmx_group meson8b_aobus_groups[] = {
 	GPIO_GROUP(GPIOAO_0),
 	GPIO_GROUP(GPIOAO_1),
 	GPIO_GROUP(GPIOAO_2),
@@ -869,7 +869,7 @@ static const char * const tsin_b_groups[] = {
 	"tsin_d0_b", "tsin_clk_b", "tsin_sop_b", "tsin_d_valid_b"
 };
 
-static struct meson_pmx_func meson8b_cbus_functions[] = {
+static const struct meson_pmx_func meson8b_cbus_functions[] = {
 	FUNCTION(gpio_periphs),
 	FUNCTION(sd_a),
 	FUNCTION(sdxc_a),
@@ -903,7 +903,7 @@ static struct meson_pmx_func meson8b_cbus_functions[] = {
 	FUNCTION(clk_24m),
 };
 
-static struct meson_pmx_func meson8b_aobus_functions[] = {
+static const struct meson_pmx_func meson8b_aobus_functions[] = {
 	FUNCTION(gpio_aobus),
 	FUNCTION(uart_ao),
 	FUNCTION(uart_ao_b),
-- 
2.45.2



From christophe.jaillet at wanadoo.fr  Wed Aug  7 02:30:54 2024
From: christophe.jaillet at wanadoo.fr (Christophe JAILLET)
Date: Wed,  7 Aug 2024 11:30:54 +0200
Subject: [PATCH 0/3] pinctrl: meson: Constify some structure
Message-ID: <cover.1723022467.git.christophe.jaillet@wanadoo.fr>

These 3 patches constify some structures in order to move some data to a
read-only section, so increase overall security.

It is splitted in 3 to ease review.
Patch 1: struct meson_pmx_group and meson_pmx_func
patch 2: struct meson_bank
patch 3: struct meson_pmx_bank

All patches are only compile tested.

In order to compile them, I update Kconfig to add some "| COMPILE_TEST"
on depends line.
Should it be useful, I can send a patch to add it, but I don't think it
would be that useful.

On a x86_64, with allmodconfig:
Before:
======
   text	   data	    bss	    dec	    hex	filename
  10818	  11696	      0	  22514	   57f2	drivers/pinctrl/meson/pinctrl-amlogic-c3.o
  17198	  17680	      0	  34878	   883e	drivers/pinctrl/meson/pinctrl-amlogic-t7.o
  14161	  11200	      0	  25361	   6311	drivers/pinctrl/meson/pinctrl-meson8b.o
  17348	  12512	      0	  29860	   74a4	drivers/pinctrl/meson/pinctrl-meson8.o
   3070	    324	      0	   3394	    d42	drivers/pinctrl/meson/pinctrl-meson8-pmx.o
   9317	   9648	      0	  18965	   4a15	drivers/pinctrl/meson/pinctrl-meson-a1.o
  12115	  11664	      0	  23779	   5ce3	drivers/pinctrl/meson/pinctrl-meson-axg.o
   2470	    120	      0	   2590	    a1e	drivers/pinctrl/meson/pinctrl-meson-axg-pmx.o
  15125	  15224	      0	  30349	   768d	drivers/pinctrl/meson/pinctrl-meson-g12a.o
  13800	  10160	      0	  23960	   5d98	drivers/pinctrl/meson/pinctrl-meson-gxbb.o
  13040	   9648	      0	  22688	   58a0	drivers/pinctrl/meson/pinctrl-meson-gxl.o
  20507	   1132	     48	  21687	   54b7	drivers/pinctrl/meson/pinctrl-meson.o
  12212	  12880	      0	  25092	   6204	drivers/pinctrl/meson/pinctrl-meson-s4.o

After:
=====
   text	   data	    bss	    dec	    hex	filename
  22114	    384	      0	  22498	   57e2	drivers/pinctrl/meson/pinctrl-amlogic-c3.o
  34510	    384	      0	  34894	   884e	drivers/pinctrl/meson/pinctrl-amlogic-t7.o
  24945	    440	      0	  25385	   6329	drivers/pinctrl/meson/pinctrl-meson8b.o
  29412	    440	      0	  29852	   749c	drivers/pinctrl/meson/pinctrl-meson8.o
   3070	    324	      0	   3394	    d42	drivers/pinctrl/meson/pinctrl-meson8-pmx.o
  18597	    384	      0	  18981	   4a25	drivers/pinctrl/meson/pinctrl-meson-a1.o
  23315	    496	      0	  23811	   5d03	drivers/pinctrl/meson/pinctrl-meson-axg.o
   2470	    120	      0	   2590	    a1e	drivers/pinctrl/meson/pinctrl-meson-axg-pmx.o
  29877	    504	      0	  30381	   76ad	drivers/pinctrl/meson/pinctrl-meson-g12a.o
  23496	    456	      0	  23952	   5d90	drivers/pinctrl/meson/pinctrl-meson-gxbb.o
  22224	    456	      0	  22680	   5898	drivers/pinctrl/meson/pinctrl-meson-gxl.o
  20507	   1132	     48	  21687	   54b7	drivers/pinctrl/meson/pinctrl-meson.o
  24692	    384	      0	  25076	   61f4	drivers/pinctrl/meson/pinctrl-meson-s4.o

Christophe JAILLET (3):
  pinctrl: meson: Constify struct meson_pmx_group and meson_pmx_func
  pinctrl: meson: Constify struct meson_bank
  pinctrl: meson: Constify struct meson_pmx_bank

 drivers/pinctrl/meson/pinctrl-amlogic-c3.c    |  8 +++---
 drivers/pinctrl/meson/pinctrl-amlogic-t7.c    |  8 +++---
 drivers/pinctrl/meson/pinctrl-meson-a1.c      |  8 +++---
 drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c | 12 ++++-----
 drivers/pinctrl/meson/pinctrl-meson-axg-pmx.h |  2 +-
 drivers/pinctrl/meson/pinctrl-meson-axg.c     | 16 ++++++------
 drivers/pinctrl/meson/pinctrl-meson-g12a.c    | 16 ++++++------
 drivers/pinctrl/meson/pinctrl-meson-gxbb.c    | 12 ++++-----
 drivers/pinctrl/meson/pinctrl-meson-gxl.c     | 12 ++++-----
 drivers/pinctrl/meson/pinctrl-meson-s4.c      |  8 +++---
 drivers/pinctrl/meson/pinctrl-meson.c         | 25 ++++++++++---------
 drivers/pinctrl/meson/pinctrl-meson.h         |  6 ++---
 drivers/pinctrl/meson/pinctrl-meson8-pmx.c    |  6 ++---
 drivers/pinctrl/meson/pinctrl-meson8.c        | 12 ++++-----
 drivers/pinctrl/meson/pinctrl-meson8b.c       | 12 ++++-----
 15 files changed, 82 insertions(+), 81 deletions(-)

-- 
2.45.2



From christophe.jaillet at wanadoo.fr  Wed Aug  7 02:30:56 2024
From: christophe.jaillet at wanadoo.fr (Christophe JAILLET)
Date: Wed,  7 Aug 2024 11:30:56 +0200
Subject: [PATCH 2/3] pinctrl: meson: Constify struct meson_bank
In-Reply-To: <cover.1723022467.git.christophe.jaillet@wanadoo.fr>
References: <cover.1723022467.git.christophe.jaillet@wanadoo.fr>
Message-ID: <9c720086e1bba8dc44f15ac435711468d0e6a591.1723022467.git.christophe.jaillet@wanadoo.fr>

'struct meson_bank' are not modified in these drivers.

Constifying these structures moves some data to a read-only section, so
increase overall security.


On a x86_64, with allmodconfig:
Before:
======
   text	   data	    bss	    dec	    hex	filename
  21410	   1096	      0	  22506	   57ea	drivers/pinctrl/meson/pinctrl-amlogic-c3.o
  33358	   1552	      0	  34910	   885e	drivers/pinctrl/meson/pinctrl-amlogic-t7.o
  24049	   1336	      0	  25385	   6329	drivers/pinctrl/meson/pinctrl-meson8b.o
  28804	   1048	      0	  29852	   749c	drivers/pinctrl/meson/pinctrl-meson8.o
   3070	    324	      0	   3394	    d42	drivers/pinctrl/meson/pinctrl-meson8-pmx.o
  18085	    888	      0	  18973	   4a1d	drivers/pinctrl/meson/pinctrl-meson-a1.o
  22675	   1112	      0	  23787	   5ceb	drivers/pinctrl/meson/pinctrl-meson-axg.o
   2470	    120	      0	   2590	    a1e	drivers/pinctrl/meson/pinctrl-meson-axg-pmx.o
  29045	   1320	      0	  30365	   769d	drivers/pinctrl/meson/pinctrl-meson-g12a.o
  22824	   1136	      0	  23960	   5d98	drivers/pinctrl/meson/pinctrl-meson-gxbb.o
  21616	   1064	      0	  22680	   5898	drivers/pinctrl/meson/pinctrl-meson-gxl.o
  20507	   1132	     48	  21687	   54b7	drivers/pinctrl/meson/pinctrl-meson.o
  23924	   1168	      0	  25092	   6204	drivers/pinctrl/meson/pinctrl-meson-s4.o

After:
=====
  21922	    568	      0	  22490	   57da	drivers/pinctrl/meson/pinctrl-amlogic-c3.o
  34222	    688	      0	  34910	   885e	drivers/pinctrl/meson/pinctrl-amlogic-t7.o
  24945	    440	      0	  25385	   6329	drivers/pinctrl/meson/pinctrl-meson8b.o
  29412	    440	      0	  29852	   749c	drivers/pinctrl/meson/pinctrl-meson8.o
   3070	    324	      0	   3394	    d42	drivers/pinctrl/meson/pinctrl-meson8-pmx.o
  18469	    520	      0	  18989	   4a2d	drivers/pinctrl/meson/pinctrl-meson-a1.o
  23155	    648	      0	  23803	   5cfb	drivers/pinctrl/meson/pinctrl-meson-axg.o
   2470	    120	      0	   2590	    a1e	drivers/pinctrl/meson/pinctrl-meson-axg-pmx.o
  29653	    712	      0	  30365	   769d	drivers/pinctrl/meson/pinctrl-meson-g12a.o
  23496	    456	      0	  23952	   5d90	drivers/pinctrl/meson/pinctrl-meson-gxbb.o
  22224	    456	      0	  22680	   5898	drivers/pinctrl/meson/pinctrl-meson-gxl.o
  20507	   1132	     48	  21687	   54b7	drivers/pinctrl/meson/pinctrl-meson.o
  24500	    592	      0	  25092	   6204	drivers/pinctrl/meson/pinctrl-meson-s4.o

Signed-off-by: Christophe JAILLET <christophe.jaillet at wanadoo.fr>
---
Compile tested-only.
---
 drivers/pinctrl/meson/pinctrl-amlogic-c3.c |  2 +-
 drivers/pinctrl/meson/pinctrl-amlogic-t7.c |  2 +-
 drivers/pinctrl/meson/pinctrl-meson-a1.c   |  2 +-
 drivers/pinctrl/meson/pinctrl-meson-axg.c  |  4 ++--
 drivers/pinctrl/meson/pinctrl-meson-g12a.c |  4 ++--
 drivers/pinctrl/meson/pinctrl-meson-gxbb.c |  4 ++--
 drivers/pinctrl/meson/pinctrl-meson-gxl.c  |  4 ++--
 drivers/pinctrl/meson/pinctrl-meson-s4.c   |  2 +-
 drivers/pinctrl/meson/pinctrl-meson.c      | 23 +++++++++++-----------
 drivers/pinctrl/meson/pinctrl-meson.h      |  2 +-
 drivers/pinctrl/meson/pinctrl-meson8.c     |  4 ++--
 drivers/pinctrl/meson/pinctrl-meson8b.c    |  4 ++--
 12 files changed, 29 insertions(+), 28 deletions(-)

diff --git a/drivers/pinctrl/meson/pinctrl-amlogic-c3.c b/drivers/pinctrl/meson/pinctrl-amlogic-c3.c
index 9c14a8781680..aeaa810e855b 100644
--- a/drivers/pinctrl/meson/pinctrl-amlogic-c3.c
+++ b/drivers/pinctrl/meson/pinctrl-amlogic-c3.c
@@ -1036,7 +1036,7 @@ static const struct meson_pmx_func c3_periphs_functions[] = {
 	FUNCTION(lcd),
 };
 
-static struct meson_bank c3_periphs_banks[] = {
+static const struct meson_bank c3_periphs_banks[] = {
 	/* name  first  last  irq  pullen  pull  dir  out  in ds */
 	BANK_DS("X",      GPIOX_0,      GPIOX_13,   40, 53,
 		0x03, 0,  0x04, 0,  0x02, 0,  0x01, 0, 0x00, 0, 0x07, 0),
diff --git a/drivers/pinctrl/meson/pinctrl-amlogic-t7.c b/drivers/pinctrl/meson/pinctrl-amlogic-t7.c
index 121158cce4f7..f880b36c3b54 100644
--- a/drivers/pinctrl/meson/pinctrl-amlogic-t7.c
+++ b/drivers/pinctrl/meson/pinctrl-amlogic-t7.c
@@ -1524,7 +1524,7 @@ static const struct meson_pmx_func t7_periphs_functions[] = {
 	FUNCTION(mic_mute),
 };
 
-static struct meson_bank t7_periphs_banks[] = {
+static const struct meson_bank t7_periphs_banks[] = {
 	/* name  first  last  irq pullen  pull  dir  out  in  ds */
 	BANK_DS("D",      GPIOD_0,     GPIOD_12, 57, 69,
 		0x03, 0,  0x04,  0,  0x02,  0, 0x01, 0,  0x00, 0, 0x07, 0),
diff --git a/drivers/pinctrl/meson/pinctrl-meson-a1.c b/drivers/pinctrl/meson/pinctrl-meson-a1.c
index 11368ee01452..e0589ce8dd2e 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-a1.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-a1.c
@@ -875,7 +875,7 @@ static const struct meson_pmx_func meson_a1_periphs_functions[] = {
 	FUNCTION(mute),
 };
 
-static struct meson_bank meson_a1_periphs_banks[] = {
+static const struct meson_bank meson_a1_periphs_banks[] = {
 	/* name  first  last  irq  pullen  pull  dir  out  in  ds*/
 	BANK_DS("P",  GPIOP_0,  GPIOP_12,  0,  12, 0x3,  0,  0x4,  0,
 		0x2,  0,  0x1,  0,  0x0,  0,  0x5,  0),
diff --git a/drivers/pinctrl/meson/pinctrl-meson-axg.c b/drivers/pinctrl/meson/pinctrl-meson-axg.c
index 9fb99af8a348..9968bd68f129 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-axg.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-axg.c
@@ -1003,7 +1003,7 @@ static const struct meson_pmx_func meson_axg_aobus_functions[] = {
 	FUNCTION(gen_clk_ee),
 };
 
-static struct meson_bank meson_axg_periphs_banks[] = {
+static const struct meson_bank meson_axg_periphs_banks[] = {
 	/*   name    first      last       irq	     pullen  pull    dir     out     in  */
 	BANK("Z",    GPIOZ_0,	GPIOZ_10, 14,  24, 3,  0,  3,  0,  9,  0,  10, 0,  11, 0),
 	BANK("BOOT", BOOT_0,	BOOT_14,  25,  39, 4,  0,  4,  0,  12, 0,  13, 0,  14, 0),
@@ -1012,7 +1012,7 @@ static struct meson_bank meson_axg_periphs_banks[] = {
 	BANK("Y", 	 GPIOY_0,	GPIOY_15, 84,  99, 1,  0,  1,  0,  3,  0,  4,  0,  5,  0),
 };
 
-static struct meson_bank meson_axg_aobus_banks[] = {
+static const struct meson_bank meson_axg_aobus_banks[] = {
 	/*   name    first      last      irq	pullen  pull    dir     out     in  */
 	BANK("AO",   GPIOAO_0,  GPIOAO_13, 0, 13, 0,  16,  0, 0,  0,  0,  0, 16,  1,  0),
 };
diff --git a/drivers/pinctrl/meson/pinctrl-meson-g12a.c b/drivers/pinctrl/meson/pinctrl-meson-g12a.c
index 28a3a06e40e3..0d901b2d1193 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-g12a.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-g12a.c
@@ -1317,7 +1317,7 @@ static const struct meson_pmx_func meson_g12a_aobus_functions[] = {
 	FUNCTION(mclk0_ao),
 };
 
-static struct meson_bank meson_g12a_periphs_banks[] = {
+static const struct meson_bank meson_g12a_periphs_banks[] = {
 	/* name  first  last  irq  pullen  pull  dir  out  in  ds */
 	BANK_DS("Z",    GPIOZ_0,  GPIOZ_15,  IRQID_GPIOZ_0,  IRQID_GPIOZ_15,
 		4,  0,  4,  0,  12,  0, 13,  0,  14,  0,  5, 0),
@@ -1333,7 +1333,7 @@ static struct meson_bank meson_g12a_periphs_banks[] = {
 		2,  0,  2,  0,   6,  0,  7,  0,   8,  0,  2, 0),
 };
 
-static struct meson_bank meson_g12a_aobus_banks[] = {
+static const struct meson_bank meson_g12a_aobus_banks[] = {
 	/* name  first  last  irq  pullen  pull  dir  out  in  ds */
 	BANK_DS("AO",   GPIOAO_0, GPIOAO_11, IRQID_GPIOAO_0, IRQID_GPIOAO_11,
 		3,  0,  2,  0,   0,  0,  4,  0,   1,  0,  0, 0),
diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
index 64f43f4bddb2..45d292e339fa 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
@@ -845,7 +845,7 @@ static const struct meson_pmx_func meson_gxbb_aobus_functions[] = {
 	FUNCTION(cec_ao),
 };
 
-static struct meson_bank meson_gxbb_periphs_banks[] = {
+static const struct meson_bank meson_gxbb_periphs_banks[] = {
 	/*   name    first      last       irq       pullen  pull    dir     out     in  */
 	BANK("X",    GPIOX_0,	GPIOX_22,  106, 128, 4,  0,  4,  0,  12, 0,  13, 0,  14, 0),
 	BANK("Y",    GPIOY_0,	GPIOY_16,   89, 105, 1,  0,  1,  0,  3,  0,  4,  0,  5,  0),
@@ -857,7 +857,7 @@ static struct meson_bank meson_gxbb_periphs_banks[] = {
 	BANK("CLK",  GPIOCLK_0,	GPIOCLK_3, 129, 132, 3, 28,  3, 28,  9, 28, 10, 28, 11, 28),
 };
 
-static struct meson_bank meson_gxbb_aobus_banks[] = {
+static const struct meson_bank meson_gxbb_aobus_banks[] = {
 	/*   name    first      last       irq    pullen  pull    dir     out     in  */
 	BANK("AO",   GPIOAO_0,  GPIOAO_13, 0, 13, 0,  16, 0, 0,   0,  0,  0, 16,  1,  0),
 };
diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
index f812393e5b2c..8744750be015 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
@@ -807,7 +807,7 @@ static const struct meson_pmx_func meson_gxl_aobus_functions[] = {
 	FUNCTION(cec_ao),
 };
 
-static struct meson_bank meson_gxl_periphs_banks[] = {
+static const struct meson_bank meson_gxl_periphs_banks[] = {
 	/*   name    first      last       irq	     pullen  pull    dir     out     in  */
 	BANK("X",    GPIOX_0,	GPIOX_18,   89, 107, 4,  0,  4,  0,  12, 0,  13, 0,  14, 0),
 	BANK("DV",   GPIODV_0,	GPIODV_29,  83,  88, 0,  0,  0,  0,  0,  0,  1,  0,  2,  0),
@@ -818,7 +818,7 @@ static struct meson_bank meson_gxl_periphs_banks[] = {
 	BANK("CLK",  GPIOCLK_0,	GPIOCLK_1, 108, 109, 3, 28,  3, 28,  9, 28, 10, 28, 11, 28),
 };
 
-static struct meson_bank meson_gxl_aobus_banks[] = {
+static const struct meson_bank meson_gxl_aobus_banks[] = {
 	/*   name    first      last      irq	pullen  pull    dir     out     in  */
 	BANK("AO",   GPIOAO_0,  GPIOAO_9, 0, 9, 0,  16, 0, 0,   0,  0,  0, 16,  1,  0),
 };
diff --git a/drivers/pinctrl/meson/pinctrl-meson-s4.c b/drivers/pinctrl/meson/pinctrl-meson-s4.c
index 6a6bd767ae0a..6641bef76e58 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-s4.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-s4.c
@@ -1160,7 +1160,7 @@ static const struct meson_pmx_func meson_s4_periphs_functions[] = {
 	FUNCTION(s2_demod),
 };
 
-static struct meson_bank meson_s4_periphs_banks[] = {
+static const struct meson_bank meson_s4_periphs_banks[] = {
 	/* name  first  last  irq  pullen  pull  dir  out  in */
 	BANK_DS("B", GPIOB_0,    GPIOB_13,  0, 13,
 		0x63,  0,  0x64,  0,  0x62, 0,  0x61, 0,  0x60, 0, 0x67, 0),
diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c
index 1a58f135aca9..253a0cc57e39 100644
--- a/drivers/pinctrl/meson/pinctrl-meson.c
+++ b/drivers/pinctrl/meson/pinctrl-meson.c
@@ -70,7 +70,7 @@ static const unsigned int meson_bit_strides[] = {
  * Return:	0 on success, a negative value on error
  */
 static int meson_get_bank(struct meson_pinctrl *pc, unsigned int pin,
-			  struct meson_bank **bank)
+			  const struct meson_bank **bank)
 {
 	int i;
 
@@ -94,11 +94,12 @@ static int meson_get_bank(struct meson_pinctrl *pc, unsigned int pin,
  * @reg:	the computed register offset
  * @bit:	the computed bit
  */
-static void meson_calc_reg_and_bit(struct meson_bank *bank, unsigned int pin,
+static void meson_calc_reg_and_bit(const struct meson_bank *bank,
+				   unsigned int pin,
 				   enum meson_reg_type reg_type,
 				   unsigned int *reg, unsigned int *bit)
 {
-	struct meson_reg_desc *desc = &bank->regs[reg_type];
+	const struct meson_reg_desc *desc = &bank->regs[reg_type];
 
 	*bit = (desc->bit + pin - bank->first) * meson_bit_strides[reg_type];
 	*reg = (desc->reg + (*bit / 32)) * 4;
@@ -181,7 +182,7 @@ static int meson_pinconf_set_gpio_bit(struct meson_pinctrl *pc,
 				      unsigned int reg_type,
 				      bool arg)
 {
-	struct meson_bank *bank;
+	const struct meson_bank *bank;
 	unsigned int reg, bit;
 	int ret;
 
@@ -198,7 +199,7 @@ static int meson_pinconf_get_gpio_bit(struct meson_pinctrl *pc,
 				      unsigned int pin,
 				      unsigned int reg_type)
 {
-	struct meson_bank *bank;
+	const struct meson_bank *bank;
 	unsigned int reg, bit, val;
 	int ret;
 
@@ -261,7 +262,7 @@ static int meson_pinconf_set_output_drive(struct meson_pinctrl *pc,
 static int meson_pinconf_disable_bias(struct meson_pinctrl *pc,
 				      unsigned int pin)
 {
-	struct meson_bank *bank;
+	const struct meson_bank *bank;
 	unsigned int reg, bit = 0;
 	int ret;
 
@@ -280,7 +281,7 @@ static int meson_pinconf_disable_bias(struct meson_pinctrl *pc,
 static int meson_pinconf_enable_bias(struct meson_pinctrl *pc, unsigned int pin,
 				     bool pull_up)
 {
-	struct meson_bank *bank;
+	const struct meson_bank *bank;
 	unsigned int reg, bit, val = 0;
 	int ret;
 
@@ -308,7 +309,7 @@ static int meson_pinconf_set_drive_strength(struct meson_pinctrl *pc,
 					    unsigned int pin,
 					    u16 drive_strength_ua)
 {
-	struct meson_bank *bank;
+	const struct meson_bank *bank;
 	unsigned int reg, bit, ds_val;
 	int ret;
 
@@ -399,7 +400,7 @@ static int meson_pinconf_set(struct pinctrl_dev *pcdev, unsigned int pin,
 
 static int meson_pinconf_get_pull(struct meson_pinctrl *pc, unsigned int pin)
 {
-	struct meson_bank *bank;
+	const struct meson_bank *bank;
 	unsigned int reg, bit, val;
 	int ret, conf;
 
@@ -435,7 +436,7 @@ static int meson_pinconf_get_drive_strength(struct meson_pinctrl *pc,
 					    unsigned int pin,
 					    u16 *drive_strength_ua)
 {
-	struct meson_bank *bank;
+	const struct meson_bank *bank;
 	unsigned int reg, bit;
 	unsigned int val;
 	int ret;
@@ -587,8 +588,8 @@ static void meson_gpio_set(struct gpio_chip *chip, unsigned gpio, int value)
 static int meson_gpio_get(struct gpio_chip *chip, unsigned gpio)
 {
 	struct meson_pinctrl *pc = gpiochip_get_data(chip);
+	const struct meson_bank *bank;
 	unsigned int reg, bit, val;
-	struct meson_bank *bank;
 	int ret;
 
 	ret = meson_get_bank(pc, gpio, &bank);
diff --git a/drivers/pinctrl/meson/pinctrl-meson.h b/drivers/pinctrl/meson/pinctrl-meson.h
index 395362c33d59..d94d9d9fa5e9 100644
--- a/drivers/pinctrl/meson/pinctrl-meson.h
+++ b/drivers/pinctrl/meson/pinctrl-meson.h
@@ -115,7 +115,7 @@ struct meson_pinctrl_data {
 	unsigned int num_pins;
 	unsigned int num_groups;
 	unsigned int num_funcs;
-	struct meson_bank *banks;
+	const struct meson_bank *banks;
 	unsigned int num_banks;
 	const struct pinmux_ops *pmx_ops;
 	void *pmx_data;
diff --git a/drivers/pinctrl/meson/pinctrl-meson8.c b/drivers/pinctrl/meson/pinctrl-meson8.c
index af479d4b3e2a..c0db0b1c8564 100644
--- a/drivers/pinctrl/meson/pinctrl-meson8.c
+++ b/drivers/pinctrl/meson/pinctrl-meson8.c
@@ -1063,7 +1063,7 @@ static const struct meson_pmx_func meson8_aobus_functions[] = {
 	FUNCTION(hdmi_cec_ao),
 };
 
-static struct meson_bank meson8_cbus_banks[] = {
+static const struct meson_bank meson8_cbus_banks[] = {
 	/*   name    first     last         irq       pullen  pull    dir     out     in  */
 	BANK("X",    GPIOX_0,  GPIOX_21,    112, 133, 4,  0,  4,  0,  0,  0,  1,  0,  2,  0),
 	BANK("Y",    GPIOY_0,  GPIOY_16,    95,  111, 3,  0,  3,  0,  3,  0,  4,  0,  5,  0),
@@ -1074,7 +1074,7 @@ static struct meson_bank meson8_cbus_banks[] = {
 	BANK("BOOT", BOOT_0,   BOOT_18,     39,   57, 2,  0,  2,  0,  9,  0, 10,  0, 11,  0),
 };
 
-static struct meson_bank meson8_aobus_banks[] = {
+static const struct meson_bank meson8_aobus_banks[] = {
 	/*   name    first     last         irq    pullen  pull    dir     out     in  */
 	BANK("AO",   GPIOAO_0, GPIO_TEST_N, 0, 13, 0, 16,  0,  0,  0,  0,  0, 16,  1,  0),
 };
diff --git a/drivers/pinctrl/meson/pinctrl-meson8b.c b/drivers/pinctrl/meson/pinctrl-meson8b.c
index f1a8950d0bde..5b9042849966 100644
--- a/drivers/pinctrl/meson/pinctrl-meson8b.c
+++ b/drivers/pinctrl/meson/pinctrl-meson8b.c
@@ -917,7 +917,7 @@ static const struct meson_pmx_func meson8b_aobus_functions[] = {
 	FUNCTION(hdmi_cec),
 };
 
-static struct meson_bank meson8b_cbus_banks[] = {
+static const struct meson_bank meson8b_cbus_banks[] = {
 	/*   name        first          last        irq       pullen   pull     dir      out      in   */
 	BANK("X0..11",	 GPIOX_0,	GPIOX_11,   97, 108,  4,  0,   4,  0,   0,  0,   1,  0,   2,  0),
 	BANK("X16..21",	 GPIOX_16,	GPIOX_21,  113, 118,  4, 16,   4, 16,   0, 16,   1, 16,   2, 16),
@@ -938,7 +938,7 @@ static struct meson_bank meson8b_cbus_banks[] = {
 	BANK("DIF",	 DIF_0_P,	DIF_4_N,    -1,  -1,  5,  8,   5,  8,  12, 12,  13, 12,  14, 12),
 };
 
-static struct meson_bank meson8b_aobus_banks[] = {
+static const struct meson_bank meson8b_aobus_banks[] = {
 	/*   name    first     lastc        irq    pullen  pull    dir     out     in  */
 	BANK("AO",   GPIOAO_0, GPIO_TEST_N, 0, 13, 0,  16, 0, 0,  0,  0,  0, 16,  1,  0),
 };
-- 
2.45.2



From christophe.jaillet at wanadoo.fr  Wed Aug  7 02:30:57 2024
From: christophe.jaillet at wanadoo.fr (Christophe JAILLET)
Date: Wed,  7 Aug 2024 11:30:57 +0200
Subject: [PATCH 3/3] pinctrl: meson: Constify struct meson_pmx_bank
In-Reply-To: <cover.1723022467.git.christophe.jaillet@wanadoo.fr>
References: <cover.1723022467.git.christophe.jaillet@wanadoo.fr>
Message-ID: <00e8dec399bd188a241eff694b334e27da096aed.1723022467.git.christophe.jaillet@wanadoo.fr>

'struct meson_pmx_bank' are not modified in these drivers.

Constifying these structures moves some data to a read-only section, so
increase overall security.


On a x86_64, with allmodconfig:
Before:
======
   text	   data	    bss	    dec	    hex	filename
  21922	    568	      0	  22490	   57da	drivers/pinctrl/meson/pinctrl-amlogic-c3.o
  34222	    688	      0	  34910	   885e	drivers/pinctrl/meson/pinctrl-amlogic-t7.o
  24945	    440	      0	  25385	   6329	drivers/pinctrl/meson/pinctrl-meson8b.o
  29412	    440	      0	  29852	   749c	drivers/pinctrl/meson/pinctrl-meson8.o
   3070	    324	      0	   3394	    d42	drivers/pinctrl/meson/pinctrl-meson8-pmx.o
  18469	    520	      0	  18989	   4a2d	drivers/pinctrl/meson/pinctrl-meson-a1.o
  23155	    648	      0	  23803	   5cfb	drivers/pinctrl/meson/pinctrl-meson-axg.o
   2470	    120	      0	   2590	    a1e	drivers/pinctrl/meson/pinctrl-meson-axg-pmx.o
  29653	    712	      0	  30365	   769d	drivers/pinctrl/meson/pinctrl-meson-g12a.o
  23496	    456	      0	  23952	   5d90	drivers/pinctrl/meson/pinctrl-meson-gxbb.o
  22224	    456	      0	  22680	   5898	drivers/pinctrl/meson/pinctrl-meson-gxl.o
  20507	   1132	     48	  21687	   54b7	drivers/pinctrl/meson/pinctrl-meson.o
  24500	    592	      0	  25092	   6204	drivers/pinctrl/meson/pinctrl-meson-s4.o

After:
=====
   text	   data	    bss	    dec	    hex	filename
  22114	    384	      0	  22498	   57e2	drivers/pinctrl/meson/pinctrl-amlogic-c3.o
  34510	    384	      0	  34894	   884e	drivers/pinctrl/meson/pinctrl-amlogic-t7.o
  24945	    440	      0	  25385	   6329	drivers/pinctrl/meson/pinctrl-meson8b.o
  29412	    440	      0	  29852	   749c	drivers/pinctrl/meson/pinctrl-meson8.o
   3070	    324	      0	   3394	    d42	drivers/pinctrl/meson/pinctrl-meson8-pmx.o
  18597	    384	      0	  18981	   4a25	drivers/pinctrl/meson/pinctrl-meson-a1.o
  23315	    496	      0	  23811	   5d03	drivers/pinctrl/meson/pinctrl-meson-axg.o
   2470	    120	      0	   2590	    a1e	drivers/pinctrl/meson/pinctrl-meson-axg-pmx.o
  29877	    504	      0	  30381	   76ad	drivers/pinctrl/meson/pinctrl-meson-g12a.o
  23496	    456	      0	  23952	   5d90	drivers/pinctrl/meson/pinctrl-meson-gxbb.o
  22224	    456	      0	  22680	   5898	drivers/pinctrl/meson/pinctrl-meson-gxl.o
  20507	   1132	     48	  21687	   54b7	drivers/pinctrl/meson/pinctrl-meson.o
  24692	    384	      0	  25076	   61f4	drivers/pinctrl/meson/pinctrl-meson-s4.o

Signed-off-by: Christophe JAILLET <christophe.jaillet at wanadoo.fr>
---
Compile tested-only.
---
 drivers/pinctrl/meson/pinctrl-amlogic-c3.c    | 2 +-
 drivers/pinctrl/meson/pinctrl-amlogic-t7.c    | 2 +-
 drivers/pinctrl/meson/pinctrl-meson-a1.c      | 2 +-
 drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c | 8 ++++----
 drivers/pinctrl/meson/pinctrl-meson-axg-pmx.h | 2 +-
 drivers/pinctrl/meson/pinctrl-meson-axg.c     | 4 ++--
 drivers/pinctrl/meson/pinctrl-meson-g12a.c    | 4 ++--
 drivers/pinctrl/meson/pinctrl-meson-s4.c      | 2 +-
 8 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/drivers/pinctrl/meson/pinctrl-amlogic-c3.c b/drivers/pinctrl/meson/pinctrl-amlogic-c3.c
index aeaa810e855b..b94c494249e9 100644
--- a/drivers/pinctrl/meson/pinctrl-amlogic-c3.c
+++ b/drivers/pinctrl/meson/pinctrl-amlogic-c3.c
@@ -1054,7 +1054,7 @@ static const struct meson_bank c3_periphs_banks[] = {
 		0x73, 0,  0x74, 0,  0x72, 0,  0x71, 0, 0x70, 0, 0x77, 0),
 };
 
-static struct meson_pmx_bank c3_periphs_pmx_banks[] = {
+static const struct meson_pmx_bank c3_periphs_pmx_banks[] = {
 	/* name	            first	 last        reg offset */
 	BANK_PMX("B",      GPIOB_0,     GPIOB_14,    0x00, 0),
 	BANK_PMX("X",      GPIOX_0,     GPIOX_13,    0x03, 0),
diff --git a/drivers/pinctrl/meson/pinctrl-amlogic-t7.c b/drivers/pinctrl/meson/pinctrl-amlogic-t7.c
index f880b36c3b54..51128ade05c6 100644
--- a/drivers/pinctrl/meson/pinctrl-amlogic-t7.c
+++ b/drivers/pinctrl/meson/pinctrl-amlogic-t7.c
@@ -1552,7 +1552,7 @@ static const struct meson_bank t7_periphs_banks[] = {
 		0x83, 0,  0x84,  0,  0x82, 0,  0x81,  0, 0x80, 0, 0x87, 0),
 };
 
-static struct meson_pmx_bank t7_periphs_pmx_banks[] = {
+static const struct meson_pmx_bank t7_periphs_pmx_banks[] = {
 	/*      name	    first	 last        reg  offset */
 	BANK_PMX("D",      GPIOD_0,     GPIOD_12,    0x0a,  0),
 	BANK_PMX("E",      GPIOE_0,     GPIOE_6,     0x0c,  0),
diff --git a/drivers/pinctrl/meson/pinctrl-meson-a1.c b/drivers/pinctrl/meson/pinctrl-meson-a1.c
index e0589ce8dd2e..ff42301e4c0c 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-a1.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-a1.c
@@ -889,7 +889,7 @@ static const struct meson_bank meson_a1_periphs_banks[] = {
 		0x42,  0,  0x41,  0,  0x40,  0,  0x45,  0),
 };
 
-static struct meson_pmx_bank meson_a1_periphs_pmx_banks[] = {
+static const struct meson_pmx_bank meson_a1_periphs_pmx_banks[] = {
 	/*  name	 first	    lask    reg	offset  */
 	BANK_PMX("P",    GPIOP_0, GPIOP_12, 0x0, 0),
 	BANK_PMX("B",    GPIOB_0, GPIOB_6,  0x2, 0),
diff --git a/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c b/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c
index 2ae802ee8241..00c3829216d6 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c
@@ -27,10 +27,10 @@
 
 static int meson_axg_pmx_get_bank(struct meson_pinctrl *pc,
 			unsigned int pin,
-			struct meson_pmx_bank **bank)
+			const struct meson_pmx_bank **bank)
 {
 	int i;
-	struct meson_axg_pmx_data *pmx = pc->data->pmx_data;
+	const struct meson_axg_pmx_data *pmx = pc->data->pmx_data;
 
 	for (i = 0; i < pmx->num_pmx_banks; i++)
 		if (pin >= pmx->pmx_banks[i].first &&
@@ -42,7 +42,7 @@ static int meson_axg_pmx_get_bank(struct meson_pinctrl *pc,
 	return -EINVAL;
 }
 
-static int meson_pmx_calc_reg_and_offset(struct meson_pmx_bank *bank,
+static int meson_pmx_calc_reg_and_offset(const struct meson_pmx_bank *bank,
 			unsigned int pin, unsigned int *reg,
 			unsigned int *offset)
 {
@@ -59,10 +59,10 @@ static int meson_pmx_calc_reg_and_offset(struct meson_pmx_bank *bank,
 static int meson_axg_pmx_update_function(struct meson_pinctrl *pc,
 			unsigned int pin, unsigned int func)
 {
+	const struct meson_pmx_bank *bank;
 	int ret;
 	int reg;
 	int offset;
-	struct meson_pmx_bank *bank;
 
 	ret = meson_axg_pmx_get_bank(pc, pin, &bank);
 	if (ret)
diff --git a/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.h b/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.h
index 67147ebaef1b..63b9d471e980 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.h
+++ b/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.h
@@ -17,7 +17,7 @@ struct meson_pmx_bank {
 };
 
 struct meson_axg_pmx_data {
-	struct meson_pmx_bank *pmx_banks;
+	const struct meson_pmx_bank *pmx_banks;
 	unsigned int num_pmx_banks;
 };
 
diff --git a/drivers/pinctrl/meson/pinctrl-meson-axg.c b/drivers/pinctrl/meson/pinctrl-meson-axg.c
index 9968bd68f129..3b27dec7d858 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-axg.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-axg.c
@@ -1017,7 +1017,7 @@ static const struct meson_bank meson_axg_aobus_banks[] = {
 	BANK("AO",   GPIOAO_0,  GPIOAO_13, 0, 13, 0,  16,  0, 0,  0,  0,  0, 16,  1,  0),
 };
 
-static struct meson_pmx_bank meson_axg_periphs_pmx_banks[] = {
+static const struct meson_pmx_bank meson_axg_periphs_pmx_banks[] = {
 	/*	 name	 first		lask	   reg	offset  */
 	BANK_PMX("Z",	 GPIOZ_0, GPIOZ_10, 0x2, 0),
 	BANK_PMX("BOOT", BOOT_0,  BOOT_14,  0x0, 0),
@@ -1031,7 +1031,7 @@ static struct meson_axg_pmx_data meson_axg_periphs_pmx_banks_data = {
 	.num_pmx_banks = ARRAY_SIZE(meson_axg_periphs_pmx_banks),
 };
 
-static struct meson_pmx_bank meson_axg_aobus_pmx_banks[] = {
+static const struct meson_pmx_bank meson_axg_aobus_pmx_banks[] = {
 	BANK_PMX("AO", GPIOAO_0, GPIOAO_13, 0x0, 0),
 };
 
diff --git a/drivers/pinctrl/meson/pinctrl-meson-g12a.c b/drivers/pinctrl/meson/pinctrl-meson-g12a.c
index 0d901b2d1193..272f713f8787 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-g12a.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-g12a.c
@@ -1342,7 +1342,7 @@ static const struct meson_bank meson_g12a_aobus_banks[] = {
 		3, 16,  2, 16,   0, 16,  4, 16,   1, 16,  1, 0),
 };
 
-static struct meson_pmx_bank meson_g12a_periphs_pmx_banks[] = {
+static const struct meson_pmx_bank meson_g12a_periphs_pmx_banks[] = {
 	/*	 name	 first	  last	    reg	 offset  */
 	BANK_PMX("Z",    GPIOZ_0, GPIOZ_15, 0x6, 0),
 	BANK_PMX("H",    GPIOH_0, GPIOH_8,  0xb, 0),
@@ -1357,7 +1357,7 @@ static struct meson_axg_pmx_data meson_g12a_periphs_pmx_banks_data = {
 	.num_pmx_banks	= ARRAY_SIZE(meson_g12a_periphs_pmx_banks),
 };
 
-static struct meson_pmx_bank meson_g12a_aobus_pmx_banks[] = {
+static const struct meson_pmx_bank meson_g12a_aobus_pmx_banks[] = {
 	BANK_PMX("AO",  GPIOAO_0, GPIOAO_11, 0x0, 0),
 	BANK_PMX("E",   GPIOE_0,  GPIOE_2,   0x1, 16),
 };
diff --git a/drivers/pinctrl/meson/pinctrl-meson-s4.c b/drivers/pinctrl/meson/pinctrl-meson-s4.c
index 6641bef76e58..61d459c46c13 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-s4.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-s4.c
@@ -1180,7 +1180,7 @@ static const struct meson_bank meson_s4_periphs_banks[] = {
 		0x83,  0,  0x84,  0,  0x82, 0,  0x81,  0, 0x80, 0, 0x87, 0),
 };
 
-static struct meson_pmx_bank meson_s4_periphs_pmx_banks[] = {
+static const struct meson_pmx_bank meson_s4_periphs_pmx_banks[] = {
 	/*name	            first	 lask        reg offset*/
 	BANK_PMX("B",      GPIOB_0,     GPIOB_13,    0x00, 0),
 	BANK_PMX("C",      GPIOC_0,     GPIOC_7,     0x9,  0),
-- 
2.45.2



From jbrunet at baylibre.com  Wed Aug  7 07:14:04 2024
From: jbrunet at baylibre.com (Jerome Brunet)
Date: Wed, 07 Aug 2024 16:14:04 +0200
Subject: [PATCH 0/3] pinctrl: meson: Constify some structure
In-Reply-To: <cover.1723022467.git.christophe.jaillet@wanadoo.fr> (Christophe
	JAILLET's message of "Wed, 7 Aug 2024 11:30:54 +0200")
References: <cover.1723022467.git.christophe.jaillet@wanadoo.fr>
Message-ID: <1jy158xvwz.fsf@starbuckisacylon.baylibre.com>

On Wed 07 Aug 2024 at 11:30, Christophe JAILLET <christophe.jaillet at wanadoo.fr> wrote:

> These 3 patches constify some structures in order to move some data to a
> read-only section, so increase overall security.
>
> It is splitted in 3 to ease review.

I'm not entirely sure it eases review in this case.
If a v2 is necessary, I think a single patch would be better.

> Patch 1: struct meson_pmx_group and meson_pmx_func
> patch 2: struct meson_bank
> patch 3: struct meson_pmx_bank

Is there any reason for leaving out 'struct meson_pinctrl_data' and
'struct meson_axg_pmx_data' ? I don't think they get modified but maybe
I missed it.

>
> All patches are only compile tested.

Looks good anyway
Reviewed-by: Jerome Brunet <jbrunet at baylibre.com>

On the vim3l:
Tested-by: Jerome Brunet <jbrunet at baylibre.com>


From christophe.jaillet at wanadoo.fr  Wed Aug  7 08:08:27 2024
From: christophe.jaillet at wanadoo.fr (Christophe JAILLET)
Date: Wed, 7 Aug 2024 17:08:27 +0200
Subject: [PATCH 0/3] pinctrl: meson: Constify some structure
In-Reply-To: <1jy158xvwz.fsf@starbuckisacylon.baylibre.com>
References: <cover.1723022467.git.christophe.jaillet@wanadoo.fr>
 <1jy158xvwz.fsf@starbuckisacylon.baylibre.com>
Message-ID: <c8eca123-8ca8-4dfc-acc6-3e196ff0c844@wanadoo.fr>

Le 07/08/2024 ? 16:14, Jerome Brunet a ?crit?:
> On Wed 07 Aug 2024 at 11:30, Christophe JAILLET <christophe.jaillet at wanadoo.fr> wrote:
> 
>> These 3 patches constify some structures in order to move some data to a
>> read-only section, so increase overall security.
>>
>> It is splitted in 3 to ease review.
> 
> I'm not entirely sure it eases review in this case.
> If a v2 is necessary, I think a single patch would be better.
> 
>> Patch 1: struct meson_pmx_group and meson_pmx_func
>> patch 2: struct meson_bank
>> patch 3: struct meson_pmx_bank
> 
> Is there any reason for leaving out 'struct meson_pinctrl_data' and
> 'struct meson_axg_pmx_data' ? I don't think they get modified but maybe
> I missed it.

No good reasons.

I'll send a v2 with everything constified all at once.

Should I take the R-b and T-b below, for the v2?


Thanks for the review and comment.

CJ

> 
>>
>> All patches are only compile tested.
> 
> Looks good anyway
> Reviewed-by: Jerome Brunet <jbrunet at baylibre.com>
> 
> On the vim3l:
> Tested-by: Jerome Brunet <jbrunet at baylibre.com>
> 
> 



From jbrunet at baylibre.com  Wed Aug  7 08:22:46 2024
From: jbrunet at baylibre.com (Jerome Brunet)
Date: Wed, 07 Aug 2024 17:22:46 +0200
Subject: [PATCH 0/3] pinctrl: meson: Constify some structure
In-Reply-To: <c8eca123-8ca8-4dfc-acc6-3e196ff0c844@wanadoo.fr> (Christophe
	JAILLET's message of "Wed, 7 Aug 2024 17:08:27 +0200")
References: <cover.1723022467.git.christophe.jaillet@wanadoo.fr>
	<1jy158xvwz.fsf@starbuckisacylon.baylibre.com>
	<c8eca123-8ca8-4dfc-acc6-3e196ff0c844@wanadoo.fr>
Message-ID: <1jttfwxsqh.fsf@starbuckisacylon.baylibre.com>

On Wed 07 Aug 2024 at 17:08, Christophe JAILLET <christophe.jaillet at wanadoo.fr> wrote:

> Le 07/08/2024 ? 16:14, Jerome Brunet a ?crit?:
>> On Wed 07 Aug 2024 at 11:30, Christophe JAILLET <christophe.jaillet at wanadoo.fr> wrote:
>> 
>>> These 3 patches constify some structures in order to move some data to a
>>> read-only section, so increase overall security.
>>>
>>> It is splitted in 3 to ease review.
>> I'm not entirely sure it eases review in this case.
>> If a v2 is necessary, I think a single patch would be better.
>> 
>>> Patch 1: struct meson_pmx_group and meson_pmx_func
>>> patch 2: struct meson_bank
>>> patch 3: struct meson_pmx_bank
>> Is there any reason for leaving out 'struct meson_pinctrl_data' and
>> 'struct meson_axg_pmx_data' ? I don't think they get modified but maybe
>> I missed it.
>
> No good reasons.
>
> I'll send a v2 with everything constified all at once.
>
> Should I take the R-b and T-b below, for the v2?
>

Leave them out. I'll test again and report.
Thanks for this

>
> Thanks for the review and comment.
>
> CJ
>
>> 
>>>
>>> All patches are only compile tested.
>> Looks good anyway
>> Reviewed-by: Jerome Brunet <jbrunet at baylibre.com>
>> On the vim3l:
>> Tested-by: Jerome Brunet <jbrunet at baylibre.com>
>> 

-- 
Jerome


From jbrunet at baylibre.com  Wed Aug  7 09:27:03 2024
From: jbrunet at baylibre.com (Jerome Brunet)
Date: Wed,  7 Aug 2024 18:27:03 +0200
Subject: [PATCH v2] ASoC: meson: axg-fifo: fix irq scheduling issue with PREEMPT_RT
Message-ID: <20240807162705.4024136-1-jbrunet@baylibre.com>

With PREEMPT_RT enabled a spinlock_t becomes a sleeping lock.

This is usually not a problem with spinlocks used in IRQ context since
IRQ handlers get threaded. However, if IRQF_ONESHOT is set, the primary
handler won't be force-threaded and runs always in hardirq context. This is
a problem because spinlock_t requires a preemptible context on PREEMPT_RT.

In this particular instance, regmap mmio uses spinlock_t to protect the
register access and IRQF_ONESHOT is set on the IRQ. In this case, it is
actually better to do everything in threaded handler and it solves the
problem with PREEMPT_RT.

Reported-by: Arseniy Krasnov <avkrasnov at salutedevices.com>
Closes: https://lore.kernel.org/linux-amlogic/20240729131652.3012327-1-avkrasnov at salutedevices.com
Suggested-by: Sebastian Andrzej Siewior <bigeasy at linutronix.de>
Fixes: b11d26660dff ("ASoC: meson: axg-fifo: use threaded irq to check periods")
Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
---
 sound/soc/meson/axg-fifo.c | 26 ++++++++++----------------
 1 file changed, 10 insertions(+), 16 deletions(-)

diff --git a/sound/soc/meson/axg-fifo.c b/sound/soc/meson/axg-fifo.c
index 7e6090af720b..75909196b769 100644
--- a/sound/soc/meson/axg-fifo.c
+++ b/sound/soc/meson/axg-fifo.c
@@ -207,25 +207,18 @@ static irqreturn_t axg_fifo_pcm_irq_block(int irq, void *dev_id)
 	status = FIELD_GET(STATUS1_INT_STS, status);
 	axg_fifo_ack_irq(fifo, status);
 
-	/* Use the thread to call period elapsed on nonatomic links */
-	if (status & FIFO_INT_COUNT_REPEAT)
-		return IRQ_WAKE_THREAD;
+	if (status & ~FIFO_INT_COUNT_REPEAT)
+		dev_dbg(axg_fifo_dev(ss), "unexpected irq - STS 0x%02x\n",
+			status);
 
-	dev_dbg(axg_fifo_dev(ss), "unexpected irq - STS 0x%02x\n",
-		status);
+	if (status & FIFO_INT_COUNT_REPEAT) {
+		snd_pcm_period_elapsed(ss);
+		return IRQ_HANDLED;
+	}
 
 	return IRQ_NONE;
 }
 
-static irqreturn_t axg_fifo_pcm_irq_block_thread(int irq, void *dev_id)
-{
-	struct snd_pcm_substream *ss = dev_id;
-
-	snd_pcm_period_elapsed(ss);
-
-	return IRQ_HANDLED;
-}
-
 int axg_fifo_pcm_open(struct snd_soc_component *component,
 		      struct snd_pcm_substream *ss)
 {
@@ -251,8 +244,9 @@ int axg_fifo_pcm_open(struct snd_soc_component *component,
 	if (ret)
 		return ret;
 
-	ret = request_threaded_irq(fifo->irq, axg_fifo_pcm_irq_block,
-				   axg_fifo_pcm_irq_block_thread,
+	/* Use the threaded irq handler only with non-atomic links */
+	ret = request_threaded_irq(fifo->irq, NULL,
+				   axg_fifo_pcm_irq_block,
 				   IRQF_ONESHOT, dev_name(dev), ss);
 	if (ret)
 		return ret;
-- 
2.43.0



From christophe.jaillet at wanadoo.fr  Wed Aug  7 11:05:36 2024
From: christophe.jaillet at wanadoo.fr (Christophe JAILLET)
Date: Wed,  7 Aug 2024 20:05:36 +0200
Subject: [PATCH v2] pinctrl: meson: Constify some structures
Message-ID: <f74e326bd7d48003c06219545bad7c2ef1a84bf8.1723053850.git.christophe.jaillet@wanadoo.fr>

The following structures are not modified in these drivers.
  - struct meson_bank
  - struct meson_pmx_bank
  - struct meson_pmx_func
  - struct meson_pmx_group
  - struct meson_pinctrl_data
  - struct meson_axg_pmx_data

Constifying these structures moves some data to a read-only section, so
increase overall security.

On a x86_64, with allmodconfig:
Before:
======
   text	   data	    bss	    dec	    hex	filename
  10818	  11696	      0	  22514	   57f2	drivers/pinctrl/meson/pinctrl-amlogic-c3.o
  17198	  17680	      0	  34878	   883e	drivers/pinctrl/meson/pinctrl-amlogic-t7.o
  14161	  11200	      0	  25361	   6311	drivers/pinctrl/meson/pinctrl-meson8b.o
  17348	  12512	      0	  29860	   74a4	drivers/pinctrl/meson/pinctrl-meson8.o
   3070	    324	      0	   3394	    d42	drivers/pinctrl/meson/pinctrl-meson8-pmx.o
   9317	   9648	      0	  18965	   4a15	drivers/pinctrl/meson/pinctrl-meson-a1.o
  12115	  11664	      0	  23779	   5ce3	drivers/pinctrl/meson/pinctrl-meson-axg.o
   2470	    120	      0	   2590	    a1e	drivers/pinctrl/meson/pinctrl-meson-axg-pmx.o
  15125	  15224	      0	  30349	   768d	drivers/pinctrl/meson/pinctrl-meson-g12a.o
  13800	  10160	      0	  23960	   5d98	drivers/pinctrl/meson/pinctrl-meson-gxbb.o
  13040	   9648	      0	  22688	   58a0	drivers/pinctrl/meson/pinctrl-meson-gxl.o
  20507	   1132	     48	  21687	   54b7	drivers/pinctrl/meson/pinctrl-meson.o
  12212	  12880	      0	  25092	   6204	drivers/pinctrl/meson/pinctrl-meson-s4.o

After:
=====
   text	   data	    bss	    dec	    hex	filename
  22242	    248	      0	  22490	   57da	drivers/pinctrl/meson/pinctrl-amlogic-c3.o
  34638	    248	      0	  34886	   8846	drivers/pinctrl/meson/pinctrl-amlogic-t7.o
  25137	    232	      0	  25369	   6319	drivers/pinctrl/meson/pinctrl-meson8b.o
  29604	    232	      0	  29836	   748c	drivers/pinctrl/meson/pinctrl-meson8.o
   3070	    324	      0	   3394	    d42	drivers/pinctrl/meson/pinctrl-meson8-pmx.o
  18725	    248	      0	  18973	   4a1d	drivers/pinctrl/meson/pinctrl-meson-a1.o
  23539	    248	      0	  23787	   5ceb	drivers/pinctrl/meson/pinctrl-meson-axg.o
   2470	    120	      0	   2590	    a1e	drivers/pinctrl/meson/pinctrl-meson-axg-pmx.o
  30101	    256	      0	  30357	   7695	drivers/pinctrl/meson/pinctrl-meson-g12a.o
  23688	    248	      0	  23936	   5d80	drivers/pinctrl/meson/pinctrl-meson-gxbb.o
  22416	    248	      0	  22664	   5888	drivers/pinctrl/meson/pinctrl-meson-gxl.o
  20507	   1132	     48	  21687	   54b7	drivers/pinctrl/meson/pinctrl-meson.o
  24820	    248	      0	  25068	   61ec	drivers/pinctrl/meson/pinctrl-meson-s4.o
Signed-off-by: Christophe JAILLET <christophe.jaillet at wanadoo.fr>
---
Compile tested-only.

In order to compile them, I've updated Kconfig to add some "| COMPILE_TEST"
on 'depends' line.
Should it be useful, I can send a patch to add it, but I don't think it
would be that useful.

Changes in v2:
  - Merge 3 patches into only 1   [Jerome Brunet]
  - Add constification of struct meson_pinctrl_data and
    struct meson_axg_pmx_data   [Jerome Brunet]

v1: https://lore.kernel.org/all/cover.1723022467.git.christophe.jaillet at wanadoo.fr/
---
 drivers/pinctrl/meson/pinctrl-amlogic-c3.c    | 12 ++++-----
 drivers/pinctrl/meson/pinctrl-amlogic-t7.c    | 12 ++++-----
 drivers/pinctrl/meson/pinctrl-meson-a1.c      | 12 ++++-----
 drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c | 12 ++++-----
 drivers/pinctrl/meson/pinctrl-meson-axg-pmx.h |  2 +-
 drivers/pinctrl/meson/pinctrl-meson-axg.c     | 24 +++++++++---------
 drivers/pinctrl/meson/pinctrl-meson-g12a.c    | 24 +++++++++---------
 drivers/pinctrl/meson/pinctrl-meson-gxbb.c    | 16 ++++++------
 drivers/pinctrl/meson/pinctrl-meson-gxl.c     | 16 ++++++------
 drivers/pinctrl/meson/pinctrl-meson-s4.c      | 12 ++++-----
 drivers/pinctrl/meson/pinctrl-meson.c         | 25 ++++++++++---------
 drivers/pinctrl/meson/pinctrl-meson.h         |  8 +++---
 drivers/pinctrl/meson/pinctrl-meson8-pmx.c    |  6 ++---
 drivers/pinctrl/meson/pinctrl-meson8.c        | 16 ++++++------
 drivers/pinctrl/meson/pinctrl-meson8b.c       | 16 ++++++------
 15 files changed, 107 insertions(+), 106 deletions(-)

diff --git a/drivers/pinctrl/meson/pinctrl-amlogic-c3.c b/drivers/pinctrl/meson/pinctrl-amlogic-c3.c
index 04f1e87bae99..776d32465ab9 100644
--- a/drivers/pinctrl/meson/pinctrl-amlogic-c3.c
+++ b/drivers/pinctrl/meson/pinctrl-amlogic-c3.c
@@ -375,7 +375,7 @@ static const unsigned int spi_a_mosi_a_pins[]		= { GPIOA_3 };
 static const unsigned int gen_clk_a4_pins[]		= { GPIOA_4 };
 static const unsigned int clk12_24_a_pins[]		= { GPIOA_5 };
 
-static struct meson_pmx_group c3_periphs_groups[] = {
+static const struct meson_pmx_group c3_periphs_groups[] = {
 	GPIO_GROUP(GPIOE_0),
 	GPIO_GROUP(GPIOE_1),
 	GPIO_GROUP(GPIOE_2),
@@ -987,7 +987,7 @@ static const char * const lcd_groups[] = {
 	"lcd_clk_a", "lcd_clk_x", "lcd_hs", "lcd_vs",
 };
 
-static struct meson_pmx_func c3_periphs_functions[] = {
+static const struct meson_pmx_func c3_periphs_functions[] = {
 	FUNCTION(gpio_periphs),
 	FUNCTION(uart_a),
 	FUNCTION(uart_b),
@@ -1036,7 +1036,7 @@ static struct meson_pmx_func c3_periphs_functions[] = {
 	FUNCTION(lcd),
 };
 
-static struct meson_bank c3_periphs_banks[] = {
+static const struct meson_bank c3_periphs_banks[] = {
 	/* name  first  last  irq  pullen  pull  dir  out  in ds */
 	BANK_DS("X",      GPIOX_0,      GPIOX_13,   40, 53,
 		0x03, 0,  0x04, 0,  0x02, 0,  0x01, 0, 0x00, 0, 0x07, 0),
@@ -1054,7 +1054,7 @@ static struct meson_bank c3_periphs_banks[] = {
 		0x73, 0,  0x74, 0,  0x72, 0,  0x71, 0, 0x70, 0, 0x77, 0),
 };
 
-static struct meson_pmx_bank c3_periphs_pmx_banks[] = {
+static const struct meson_pmx_bank c3_periphs_pmx_banks[] = {
 	/* name	            first	 last        reg offset */
 	BANK_PMX("B",      GPIOB_0,     GPIOB_14,    0x00, 0),
 	BANK_PMX("X",      GPIOX_0,     GPIOX_13,    0x03, 0),
@@ -1065,12 +1065,12 @@ static struct meson_pmx_bank c3_periphs_pmx_banks[] = {
 	BANK_PMX("TEST_N", GPIO_TEST_N, GPIO_TEST_N, 0x02, 0),
 };
 
-static struct meson_axg_pmx_data c3_periphs_pmx_banks_data = {
+static const struct meson_axg_pmx_data c3_periphs_pmx_banks_data = {
 	.pmx_banks	= c3_periphs_pmx_banks,
 	.num_pmx_banks	= ARRAY_SIZE(c3_periphs_pmx_banks),
 };
 
-static struct meson_pinctrl_data c3_periphs_pinctrl_data = {
+static const struct meson_pinctrl_data c3_periphs_pinctrl_data = {
 	.name		= "periphs-banks",
 	.pins		= c3_periphs_pins,
 	.groups		= c3_periphs_groups,
diff --git a/drivers/pinctrl/meson/pinctrl-amlogic-t7.c b/drivers/pinctrl/meson/pinctrl-amlogic-t7.c
index 0aed5de3f068..cfd98b9dcb68 100644
--- a/drivers/pinctrl/meson/pinctrl-amlogic-t7.c
+++ b/drivers/pinctrl/meson/pinctrl-amlogic-t7.c
@@ -535,7 +535,7 @@ static const unsigned int i2c0_sck_h_pins[]		= { GPIOH_7 };
 /* Bank H func3 */
 static const unsigned int pcieck_reqn_h_pins[]		= { GPIOH_2 };
 
-static struct meson_pmx_group t7_periphs_groups[] = {
+static const struct meson_pmx_group t7_periphs_groups[] = {
 	GPIO_GROUP(GPIOB_0),
 	GPIO_GROUP(GPIOB_1),
 	GPIO_GROUP(GPIOB_2),
@@ -1443,7 +1443,7 @@ static const char * const mic_mute_groups[] = {
 	"mic_mute_key", "mic_mute_led",
 };
 
-static struct meson_pmx_func t7_periphs_functions[] = {
+static const struct meson_pmx_func t7_periphs_functions[] = {
 	FUNCTION(gpio_periphs),
 	FUNCTION(emmc),
 	FUNCTION(nor),
@@ -1524,7 +1524,7 @@ static struct meson_pmx_func t7_periphs_functions[] = {
 	FUNCTION(mic_mute),
 };
 
-static struct meson_bank t7_periphs_banks[] = {
+static const struct meson_bank t7_periphs_banks[] = {
 	/* name  first  last  irq pullen  pull  dir  out  in  ds */
 	BANK_DS("D",      GPIOD_0,     GPIOD_12, 57, 69,
 		0x03, 0,  0x04,  0,  0x02,  0, 0x01, 0,  0x00, 0, 0x07, 0),
@@ -1552,7 +1552,7 @@ static struct meson_bank t7_periphs_banks[] = {
 		0x83, 0,  0x84,  0,  0x82, 0,  0x81,  0, 0x80, 0, 0x87, 0),
 };
 
-static struct meson_pmx_bank t7_periphs_pmx_banks[] = {
+static const struct meson_pmx_bank t7_periphs_pmx_banks[] = {
 	/*      name	    first	 last        reg  offset */
 	BANK_PMX("D",      GPIOD_0,     GPIOD_12,    0x0a,  0),
 	BANK_PMX("E",      GPIOE_0,     GPIOE_6,     0x0c,  0),
@@ -1568,12 +1568,12 @@ static struct meson_pmx_bank t7_periphs_pmx_banks[] = {
 	BANK_PMX("TEST_N", GPIO_TEST_N, GPIO_TEST_N, 0x09,  0),
 };
 
-static struct meson_axg_pmx_data t7_periphs_pmx_banks_data = {
+static const struct meson_axg_pmx_data t7_periphs_pmx_banks_data = {
 	.pmx_banks	= t7_periphs_pmx_banks,
 	.num_pmx_banks	= ARRAY_SIZE(t7_periphs_pmx_banks),
 };
 
-static struct meson_pinctrl_data t7_periphs_pinctrl_data = {
+static const struct meson_pinctrl_data t7_periphs_pinctrl_data = {
 	.name		= "periphs-banks",
 	.pins		= t7_periphs_pins,
 	.groups		= t7_periphs_groups,
diff --git a/drivers/pinctrl/meson/pinctrl-meson-a1.c b/drivers/pinctrl/meson/pinctrl-meson-a1.c
index d2ac9ca72a3e..20c4323d4223 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-a1.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-a1.c
@@ -339,7 +339,7 @@ static const unsigned int tst_out11_pins[]		= { GPIOA_11 };
 static const unsigned int mute_key_pins[]		= { GPIOA_4 };
 static const unsigned int mute_en_pins[]		= { GPIOA_5 };
 
-static struct meson_pmx_group meson_a1_periphs_groups[] = {
+static const struct meson_pmx_group meson_a1_periphs_groups[] = {
 	GPIO_GROUP(GPIOP_0),
 	GPIO_GROUP(GPIOP_1),
 	GPIO_GROUP(GPIOP_2),
@@ -832,7 +832,7 @@ static const char * const mute_groups[] = {
 	"mute_key", "mute_en",
 };
 
-static struct meson_pmx_func meson_a1_periphs_functions[] = {
+static const struct meson_pmx_func meson_a1_periphs_functions[] = {
 	FUNCTION(gpio_periphs),
 	FUNCTION(psram),
 	FUNCTION(pwm_a),
@@ -875,7 +875,7 @@ static struct meson_pmx_func meson_a1_periphs_functions[] = {
 	FUNCTION(mute),
 };
 
-static struct meson_bank meson_a1_periphs_banks[] = {
+static const struct meson_bank meson_a1_periphs_banks[] = {
 	/* name  first  last  irq  pullen  pull  dir  out  in  ds*/
 	BANK_DS("P",  GPIOP_0,  GPIOP_12,  0,  12, 0x3,  0,  0x4,  0,
 		0x2,  0,  0x1,  0,  0x0,  0,  0x5,  0),
@@ -889,7 +889,7 @@ static struct meson_bank meson_a1_periphs_banks[] = {
 		0x42,  0,  0x41,  0,  0x40,  0,  0x45,  0),
 };
 
-static struct meson_pmx_bank meson_a1_periphs_pmx_banks[] = {
+static const struct meson_pmx_bank meson_a1_periphs_pmx_banks[] = {
 	/*  name	 first	    lask    reg	offset  */
 	BANK_PMX("P",    GPIOP_0, GPIOP_12, 0x0, 0),
 	BANK_PMX("B",    GPIOB_0, GPIOB_6,  0x2, 0),
@@ -898,12 +898,12 @@ static struct meson_pmx_bank meson_a1_periphs_pmx_banks[] = {
 	BANK_PMX("A",    GPIOA_0, GPIOA_11, 0x8, 0),
 };
 
-static struct meson_axg_pmx_data meson_a1_periphs_pmx_banks_data = {
+static const struct meson_axg_pmx_data meson_a1_periphs_pmx_banks_data = {
 	.pmx_banks	= meson_a1_periphs_pmx_banks,
 	.num_pmx_banks	= ARRAY_SIZE(meson_a1_periphs_pmx_banks),
 };
 
-static struct meson_pinctrl_data meson_a1_periphs_pinctrl_data = {
+static const struct meson_pinctrl_data meson_a1_periphs_pinctrl_data = {
 	.name		= "periphs-banks",
 	.pins		= meson_a1_periphs_pins,
 	.groups		= meson_a1_periphs_groups,
diff --git a/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c b/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c
index cad411d90727..00c3829216d6 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c
@@ -27,10 +27,10 @@
 
 static int meson_axg_pmx_get_bank(struct meson_pinctrl *pc,
 			unsigned int pin,
-			struct meson_pmx_bank **bank)
+			const struct meson_pmx_bank **bank)
 {
 	int i;
-	struct meson_axg_pmx_data *pmx = pc->data->pmx_data;
+	const struct meson_axg_pmx_data *pmx = pc->data->pmx_data;
 
 	for (i = 0; i < pmx->num_pmx_banks; i++)
 		if (pin >= pmx->pmx_banks[i].first &&
@@ -42,7 +42,7 @@ static int meson_axg_pmx_get_bank(struct meson_pinctrl *pc,
 	return -EINVAL;
 }
 
-static int meson_pmx_calc_reg_and_offset(struct meson_pmx_bank *bank,
+static int meson_pmx_calc_reg_and_offset(const struct meson_pmx_bank *bank,
 			unsigned int pin, unsigned int *reg,
 			unsigned int *offset)
 {
@@ -59,10 +59,10 @@ static int meson_pmx_calc_reg_and_offset(struct meson_pmx_bank *bank,
 static int meson_axg_pmx_update_function(struct meson_pinctrl *pc,
 			unsigned int pin, unsigned int func)
 {
+	const struct meson_pmx_bank *bank;
 	int ret;
 	int reg;
 	int offset;
-	struct meson_pmx_bank *bank;
 
 	ret = meson_axg_pmx_get_bank(pc, pin, &bank);
 	if (ret)
@@ -82,8 +82,8 @@ static int meson_axg_pmx_set_mux(struct pinctrl_dev *pcdev,
 	int i;
 	int ret;
 	struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
-	struct meson_pmx_func *func = &pc->data->funcs[func_num];
-	struct meson_pmx_group *group = &pc->data->groups[group_num];
+	const struct meson_pmx_func *func = &pc->data->funcs[func_num];
+	const struct meson_pmx_group *group = &pc->data->groups[group_num];
 	struct meson_pmx_axg_data *pmx_data =
 		(struct meson_pmx_axg_data *)group->data;
 
diff --git a/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.h b/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.h
index 67147ebaef1b..63b9d471e980 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.h
+++ b/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.h
@@ -17,7 +17,7 @@ struct meson_pmx_bank {
 };
 
 struct meson_axg_pmx_data {
-	struct meson_pmx_bank *pmx_banks;
+	const struct meson_pmx_bank *pmx_banks;
 	unsigned int num_pmx_banks;
 };
 
diff --git a/drivers/pinctrl/meson/pinctrl-meson-axg.c b/drivers/pinctrl/meson/pinctrl-meson-axg.c
index 8f4e7154b73f..fa2df4896390 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-axg.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-axg.c
@@ -352,7 +352,7 @@ static const unsigned int tdmb_dout2_pins[] = {GPIOA_12};
 static const unsigned int tdmb_din3_pins[] = {GPIOA_13};
 static const unsigned int tdmb_dout3_pins[] = {GPIOA_13};
 
-static struct meson_pmx_group meson_axg_periphs_groups[] = {
+static const struct meson_pmx_group meson_axg_periphs_groups[] = {
 	GPIO_GROUP(GPIOZ_0),
 	GPIO_GROUP(GPIOZ_1),
 	GPIO_GROUP(GPIOZ_2),
@@ -675,7 +675,7 @@ static const unsigned int jtag_ao_tms_pins[] = {GPIOAO_7};
 /* gen_clk */
 static const unsigned int gen_clk_ee_pins[] = {GPIOAO_13};
 
-static struct meson_pmx_group meson_axg_aobus_groups[] = {
+static const struct meson_pmx_group meson_axg_aobus_groups[] = {
 	GPIO_GROUP(GPIOAO_0),
 	GPIO_GROUP(GPIOAO_1),
 	GPIO_GROUP(GPIOAO_2),
@@ -955,7 +955,7 @@ static const char * const gen_clk_ee_groups[] = {
 	"gen_clk_ee",
 };
 
-static struct meson_pmx_func meson_axg_periphs_functions[] = {
+static const struct meson_pmx_func meson_axg_periphs_functions[] = {
 	FUNCTION(gpio_periphs),
 	FUNCTION(emmc),
 	FUNCTION(nor),
@@ -987,7 +987,7 @@ static struct meson_pmx_func meson_axg_periphs_functions[] = {
 	FUNCTION(tdmc),
 };
 
-static struct meson_pmx_func meson_axg_aobus_functions[] = {
+static const struct meson_pmx_func meson_axg_aobus_functions[] = {
 	FUNCTION(gpio_aobus),
 	FUNCTION(uart_ao_a),
 	FUNCTION(uart_ao_b),
@@ -1003,7 +1003,7 @@ static struct meson_pmx_func meson_axg_aobus_functions[] = {
 	FUNCTION(gen_clk_ee),
 };
 
-static struct meson_bank meson_axg_periphs_banks[] = {
+static const struct meson_bank meson_axg_periphs_banks[] = {
 	/*   name    first      last       irq	     pullen  pull    dir     out     in  */
 	BANK("Z",    GPIOZ_0,	GPIOZ_10, 14,  24, 3,  0,  3,  0,  9,  0,  10, 0,  11, 0),
 	BANK("BOOT", BOOT_0,	BOOT_14,  25,  39, 4,  0,  4,  0,  12, 0,  13, 0,  14, 0),
@@ -1012,12 +1012,12 @@ static struct meson_bank meson_axg_periphs_banks[] = {
 	BANK("Y", 	 GPIOY_0,	GPIOY_15, 84,  99, 1,  0,  1,  0,  3,  0,  4,  0,  5,  0),
 };
 
-static struct meson_bank meson_axg_aobus_banks[] = {
+static const struct meson_bank meson_axg_aobus_banks[] = {
 	/*   name    first      last      irq	pullen  pull    dir     out     in  */
 	BANK("AO",   GPIOAO_0,  GPIOAO_13, 0, 13, 0,  16,  0, 0,  0,  0,  0, 16,  1,  0),
 };
 
-static struct meson_pmx_bank meson_axg_periphs_pmx_banks[] = {
+static const struct meson_pmx_bank meson_axg_periphs_pmx_banks[] = {
 	/*	 name	 first		lask	   reg	offset  */
 	BANK_PMX("Z",	 GPIOZ_0, GPIOZ_10, 0x2, 0),
 	BANK_PMX("BOOT", BOOT_0,  BOOT_14,  0x0, 0),
@@ -1026,21 +1026,21 @@ static struct meson_pmx_bank meson_axg_periphs_pmx_banks[] = {
 	BANK_PMX("Y",	 GPIOY_0, GPIOY_15, 0x8, 0),
 };
 
-static struct meson_axg_pmx_data meson_axg_periphs_pmx_banks_data = {
+static const struct meson_axg_pmx_data meson_axg_periphs_pmx_banks_data = {
 	.pmx_banks	= meson_axg_periphs_pmx_banks,
 	.num_pmx_banks = ARRAY_SIZE(meson_axg_periphs_pmx_banks),
 };
 
-static struct meson_pmx_bank meson_axg_aobus_pmx_banks[] = {
+static const struct meson_pmx_bank meson_axg_aobus_pmx_banks[] = {
 	BANK_PMX("AO", GPIOAO_0, GPIOAO_13, 0x0, 0),
 };
 
-static struct meson_axg_pmx_data meson_axg_aobus_pmx_banks_data = {
+static const struct meson_axg_pmx_data meson_axg_aobus_pmx_banks_data = {
 	.pmx_banks	= meson_axg_aobus_pmx_banks,
 	.num_pmx_banks = ARRAY_SIZE(meson_axg_aobus_pmx_banks),
 };
 
-static struct meson_pinctrl_data meson_axg_periphs_pinctrl_data = {
+static const struct meson_pinctrl_data meson_axg_periphs_pinctrl_data = {
 	.name		= "periphs-banks",
 	.pins		= meson_axg_periphs_pins,
 	.groups		= meson_axg_periphs_groups,
@@ -1054,7 +1054,7 @@ static struct meson_pinctrl_data meson_axg_periphs_pinctrl_data = {
 	.pmx_data	= &meson_axg_periphs_pmx_banks_data,
 };
 
-static struct meson_pinctrl_data meson_axg_aobus_pinctrl_data = {
+static const struct meson_pinctrl_data meson_axg_aobus_pinctrl_data = {
 	.name		= "aobus-banks",
 	.pins		= meson_axg_aobus_pins,
 	.groups		= meson_axg_aobus_groups,
diff --git a/drivers/pinctrl/meson/pinctrl-meson-g12a.c b/drivers/pinctrl/meson/pinctrl-meson-g12a.c
index 32830269a5b4..e2788bfc5874 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-g12a.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-g12a.c
@@ -436,7 +436,7 @@ static const unsigned int tdm_c_dout1_z_pins[]		= { GPIOZ_3 };
 static const unsigned int tdm_c_dout2_z_pins[]		= { GPIOZ_4 };
 static const unsigned int tdm_c_dout3_z_pins[]		= { GPIOZ_5 };
 
-static struct meson_pmx_group meson_g12a_periphs_groups[] = {
+static const struct meson_pmx_group meson_g12a_periphs_groups[] = {
 	GPIO_GROUP(GPIOZ_0),
 	GPIO_GROUP(GPIOZ_1),
 	GPIO_GROUP(GPIOZ_2),
@@ -860,7 +860,7 @@ static const unsigned int tdm_ao_b_dout2_pins[]		= { GPIOAO_6 };
 /* mclk0_ao */
 static const unsigned int mclk0_ao_pins[]		= { GPIOAO_9 };
 
-static struct meson_pmx_group meson_g12a_aobus_groups[] = {
+static const struct meson_pmx_group meson_g12a_aobus_groups[] = {
 	GPIO_GROUP(GPIOAO_0),
 	GPIO_GROUP(GPIOAO_1),
 	GPIO_GROUP(GPIOAO_2),
@@ -1253,7 +1253,7 @@ static const char * const mclk0_ao_groups[] = {
 	"mclk0_ao",
 };
 
-static struct meson_pmx_func meson_g12a_periphs_functions[] = {
+static const struct meson_pmx_func meson_g12a_periphs_functions[] = {
 	FUNCTION(gpio_periphs),
 	FUNCTION(emmc),
 	FUNCTION(nor),
@@ -1295,7 +1295,7 @@ static struct meson_pmx_func meson_g12a_periphs_functions[] = {
 	FUNCTION(tdm_c),
 };
 
-static struct meson_pmx_func meson_g12a_aobus_functions[] = {
+static const struct meson_pmx_func meson_g12a_aobus_functions[] = {
 	FUNCTION(gpio_aobus),
 	FUNCTION(uart_ao_a),
 	FUNCTION(uart_ao_b),
@@ -1317,7 +1317,7 @@ static struct meson_pmx_func meson_g12a_aobus_functions[] = {
 	FUNCTION(mclk0_ao),
 };
 
-static struct meson_bank meson_g12a_periphs_banks[] = {
+static const struct meson_bank meson_g12a_periphs_banks[] = {
 	/* name  first  last  irq  pullen  pull  dir  out  in  ds */
 	BANK_DS("Z",    GPIOZ_0,  GPIOZ_15,  IRQID_GPIOZ_0,  IRQID_GPIOZ_15,
 		4,  0,  4,  0,  12,  0, 13,  0,  14,  0,  5, 0),
@@ -1333,7 +1333,7 @@ static struct meson_bank meson_g12a_periphs_banks[] = {
 		2,  0,  2,  0,   6,  0,  7,  0,   8,  0,  2, 0),
 };
 
-static struct meson_bank meson_g12a_aobus_banks[] = {
+static const struct meson_bank meson_g12a_aobus_banks[] = {
 	/* name  first  last  irq  pullen  pull  dir  out  in  ds */
 	BANK_DS("AO",   GPIOAO_0, GPIOAO_11, IRQID_GPIOAO_0, IRQID_GPIOAO_11,
 		3,  0,  2,  0,   0,  0,  4,  0,   1,  0,  0, 0),
@@ -1342,7 +1342,7 @@ static struct meson_bank meson_g12a_aobus_banks[] = {
 		3, 16,  2, 16,   0, 16,  4, 16,   1, 16,  1, 0),
 };
 
-static struct meson_pmx_bank meson_g12a_periphs_pmx_banks[] = {
+static const struct meson_pmx_bank meson_g12a_periphs_pmx_banks[] = {
 	/*	 name	 first	  last	    reg	 offset  */
 	BANK_PMX("Z",    GPIOZ_0, GPIOZ_15, 0x6, 0),
 	BANK_PMX("H",    GPIOH_0, GPIOH_8,  0xb, 0),
@@ -1352,17 +1352,17 @@ static struct meson_pmx_bank meson_g12a_periphs_pmx_banks[] = {
 	BANK_PMX("X",    GPIOX_0, GPIOX_19, 0x3, 0),
 };
 
-static struct meson_axg_pmx_data meson_g12a_periphs_pmx_banks_data = {
+static const struct meson_axg_pmx_data meson_g12a_periphs_pmx_banks_data = {
 	.pmx_banks	= meson_g12a_periphs_pmx_banks,
 	.num_pmx_banks	= ARRAY_SIZE(meson_g12a_periphs_pmx_banks),
 };
 
-static struct meson_pmx_bank meson_g12a_aobus_pmx_banks[] = {
+static const struct meson_pmx_bank meson_g12a_aobus_pmx_banks[] = {
 	BANK_PMX("AO",  GPIOAO_0, GPIOAO_11, 0x0, 0),
 	BANK_PMX("E",   GPIOE_0,  GPIOE_2,   0x1, 16),
 };
 
-static struct meson_axg_pmx_data meson_g12a_aobus_pmx_banks_data = {
+static const struct meson_axg_pmx_data meson_g12a_aobus_pmx_banks_data = {
 	.pmx_banks	= meson_g12a_aobus_pmx_banks,
 	.num_pmx_banks	= ARRAY_SIZE(meson_g12a_aobus_pmx_banks),
 };
@@ -1375,7 +1375,7 @@ static int meson_g12a_aobus_parse_dt_extra(struct meson_pinctrl *pc)
 	return 0;
 }
 
-static struct meson_pinctrl_data meson_g12a_periphs_pinctrl_data = {
+static const struct meson_pinctrl_data meson_g12a_periphs_pinctrl_data = {
 	.name		= "periphs-banks",
 	.pins		= meson_g12a_periphs_pins,
 	.groups		= meson_g12a_periphs_groups,
@@ -1389,7 +1389,7 @@ static struct meson_pinctrl_data meson_g12a_periphs_pinctrl_data = {
 	.pmx_data	= &meson_g12a_periphs_pmx_banks_data,
 };
 
-static struct meson_pinctrl_data meson_g12a_aobus_pinctrl_data = {
+static const struct meson_pinctrl_data meson_g12a_aobus_pinctrl_data = {
 	.name		= "aobus-banks",
 	.pins		= meson_g12a_aobus_pins,
 	.groups		= meson_g12a_aobus_groups,
diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
index 2867f397fec6..4e8b9d7c2e4b 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
@@ -307,7 +307,7 @@ static const unsigned int spdif_out_ao_13_pins[] = { GPIOAO_13 };
 static const unsigned int ao_cec_pins[]		= { GPIOAO_12 };
 static const unsigned int ee_cec_pins[]		= { GPIOAO_12 };
 
-static struct meson_pmx_group meson_gxbb_periphs_groups[] = {
+static const struct meson_pmx_group meson_gxbb_periphs_groups[] = {
 	GPIO_GROUP(GPIOZ_0),
 	GPIO_GROUP(GPIOZ_1),
 	GPIO_GROUP(GPIOZ_2),
@@ -541,7 +541,7 @@ static struct meson_pmx_group meson_gxbb_periphs_groups[] = {
 	GROUP(sdcard_clk,	2,	11),
 };
 
-static struct meson_pmx_group meson_gxbb_aobus_groups[] = {
+static const struct meson_pmx_group meson_gxbb_aobus_groups[] = {
 	GPIO_GROUP(GPIOAO_0),
 	GPIO_GROUP(GPIOAO_1),
 	GPIO_GROUP(GPIOAO_2),
@@ -798,7 +798,7 @@ static const char * const cec_ao_groups[] = {
 	"ao_cec", "ee_cec",
 };
 
-static struct meson_pmx_func meson_gxbb_periphs_functions[] = {
+static const struct meson_pmx_func meson_gxbb_periphs_functions[] = {
 	FUNCTION(gpio_periphs),
 	FUNCTION(emmc),
 	FUNCTION(nor),
@@ -829,7 +829,7 @@ static struct meson_pmx_func meson_gxbb_periphs_functions[] = {
 	FUNCTION(tsin_b),
 };
 
-static struct meson_pmx_func meson_gxbb_aobus_functions[] = {
+static const struct meson_pmx_func meson_gxbb_aobus_functions[] = {
 	FUNCTION(gpio_aobus),
 	FUNCTION(uart_ao),
 	FUNCTION(uart_ao_b),
@@ -845,7 +845,7 @@ static struct meson_pmx_func meson_gxbb_aobus_functions[] = {
 	FUNCTION(cec_ao),
 };
 
-static struct meson_bank meson_gxbb_periphs_banks[] = {
+static const struct meson_bank meson_gxbb_periphs_banks[] = {
 	/*   name    first      last       irq       pullen  pull    dir     out     in  */
 	BANK("X",    GPIOX_0,	GPIOX_22,  106, 128, 4,  0,  4,  0,  12, 0,  13, 0,  14, 0),
 	BANK("Y",    GPIOY_0,	GPIOY_16,   89, 105, 1,  0,  1,  0,  3,  0,  4,  0,  5,  0),
@@ -857,12 +857,12 @@ static struct meson_bank meson_gxbb_periphs_banks[] = {
 	BANK("CLK",  GPIOCLK_0,	GPIOCLK_3, 129, 132, 3, 28,  3, 28,  9, 28, 10, 28, 11, 28),
 };
 
-static struct meson_bank meson_gxbb_aobus_banks[] = {
+static const struct meson_bank meson_gxbb_aobus_banks[] = {
 	/*   name    first      last       irq    pullen  pull    dir     out     in  */
 	BANK("AO",   GPIOAO_0,  GPIOAO_13, 0, 13, 0,  16, 0, 0,   0,  0,  0, 16,  1,  0),
 };
 
-static struct meson_pinctrl_data meson_gxbb_periphs_pinctrl_data = {
+static const struct meson_pinctrl_data meson_gxbb_periphs_pinctrl_data = {
 	.name		= "periphs-banks",
 	.pins		= meson_gxbb_periphs_pins,
 	.groups		= meson_gxbb_periphs_groups,
@@ -875,7 +875,7 @@ static struct meson_pinctrl_data meson_gxbb_periphs_pinctrl_data = {
 	.pmx_ops	= &meson8_pmx_ops,
 };
 
-static struct meson_pinctrl_data meson_gxbb_aobus_pinctrl_data = {
+static const struct meson_pinctrl_data meson_gxbb_aobus_pinctrl_data = {
 	.name		= "aobus-banks",
 	.pins		= meson_gxbb_aobus_pins,
 	.groups		= meson_gxbb_aobus_groups,
diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
index a2f25fa02852..9171de657f97 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
@@ -301,7 +301,7 @@ static const unsigned int spdif_out_ao_9_pins[] = { GPIOAO_9 };
 static const unsigned int ao_cec_pins[]		= { GPIOAO_8 };
 static const unsigned int ee_cec_pins[]		= { GPIOAO_8 };
 
-static struct meson_pmx_group meson_gxl_periphs_groups[] = {
+static const struct meson_pmx_group meson_gxl_periphs_groups[] = {
 	GPIO_GROUP(GPIOZ_0),
 	GPIO_GROUP(GPIOZ_1),
 	GPIO_GROUP(GPIOZ_2),
@@ -527,7 +527,7 @@ static struct meson_pmx_group meson_gxl_periphs_groups[] = {
 	GROUP(pwm_f_clk,	8,	30),
 };
 
-static struct meson_pmx_group meson_gxl_aobus_groups[] = {
+static const struct meson_pmx_group meson_gxl_aobus_groups[] = {
 	GPIO_GROUP(GPIOAO_0),
 	GPIO_GROUP(GPIOAO_1),
 	GPIO_GROUP(GPIOAO_2),
@@ -763,7 +763,7 @@ static const char * const cec_ao_groups[] = {
 	"ao_cec", "ee_cec",
 };
 
-static struct meson_pmx_func meson_gxl_periphs_functions[] = {
+static const struct meson_pmx_func meson_gxl_periphs_functions[] = {
 	FUNCTION(gpio_periphs),
 	FUNCTION(emmc),
 	FUNCTION(nor),
@@ -793,7 +793,7 @@ static struct meson_pmx_func meson_gxl_periphs_functions[] = {
 	FUNCTION(tsin_b),
 };
 
-static struct meson_pmx_func meson_gxl_aobus_functions[] = {
+static const struct meson_pmx_func meson_gxl_aobus_functions[] = {
 	FUNCTION(gpio_aobus),
 	FUNCTION(uart_ao),
 	FUNCTION(uart_ao_b),
@@ -807,7 +807,7 @@ static struct meson_pmx_func meson_gxl_aobus_functions[] = {
 	FUNCTION(cec_ao),
 };
 
-static struct meson_bank meson_gxl_periphs_banks[] = {
+static const struct meson_bank meson_gxl_periphs_banks[] = {
 	/*   name    first      last       irq	     pullen  pull    dir     out     in  */
 	BANK("X",    GPIOX_0,	GPIOX_18,   89, 107, 4,  0,  4,  0,  12, 0,  13, 0,  14, 0),
 	BANK("DV",   GPIODV_0,	GPIODV_29,  83,  88, 0,  0,  0,  0,  0,  0,  1,  0,  2,  0),
@@ -818,12 +818,12 @@ static struct meson_bank meson_gxl_periphs_banks[] = {
 	BANK("CLK",  GPIOCLK_0,	GPIOCLK_1, 108, 109, 3, 28,  3, 28,  9, 28, 10, 28, 11, 28),
 };
 
-static struct meson_bank meson_gxl_aobus_banks[] = {
+static const struct meson_bank meson_gxl_aobus_banks[] = {
 	/*   name    first      last      irq	pullen  pull    dir     out     in  */
 	BANK("AO",   GPIOAO_0,  GPIOAO_9, 0, 9, 0,  16, 0, 0,   0,  0,  0, 16,  1,  0),
 };
 
-static struct meson_pinctrl_data meson_gxl_periphs_pinctrl_data = {
+static const struct meson_pinctrl_data meson_gxl_periphs_pinctrl_data = {
 	.name		= "periphs-banks",
 	.pins		= meson_gxl_periphs_pins,
 	.groups		= meson_gxl_periphs_groups,
@@ -836,7 +836,7 @@ static struct meson_pinctrl_data meson_gxl_periphs_pinctrl_data = {
 	.pmx_ops	= &meson8_pmx_ops,
 };
 
-static struct meson_pinctrl_data meson_gxl_aobus_pinctrl_data = {
+static const struct meson_pinctrl_data meson_gxl_aobus_pinctrl_data = {
 	.name		= "aobus-banks",
 	.pins		= meson_gxl_aobus_pins,
 	.groups		= meson_gxl_aobus_groups,
diff --git a/drivers/pinctrl/meson/pinctrl-meson-s4.c b/drivers/pinctrl/meson/pinctrl-meson-s4.c
index 60c7d5003e8a..872948699e9f 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-s4.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-s4.c
@@ -411,7 +411,7 @@ static const unsigned int s2_demod_gpio0_pins[]		= { GPIOZ_12 };
 static const unsigned int gen_clk_z9_pins[]		= { GPIOZ_9 };
 static const unsigned int gen_clk_z12_pins[]		= { GPIOZ_12 };
 
-static struct meson_pmx_group meson_s4_periphs_groups[] = {
+static const struct meson_pmx_group meson_s4_periphs_groups[] = {
 	GPIO_GROUP(GPIOE_0),
 	GPIO_GROUP(GPIOE_1),
 
@@ -1100,7 +1100,7 @@ static const char * const s2_demod_groups[] = {
 	"s2_demod_gpio3", "s2_demod_gpio2", "s2_demod_gpio1", "s2_demod_gpio0",
 };
 
-static struct meson_pmx_func meson_s4_periphs_functions[] = {
+static const struct meson_pmx_func meson_s4_periphs_functions[] = {
 	FUNCTION(gpio_periphs),
 	FUNCTION(i2c0),
 	FUNCTION(i2c1),
@@ -1160,7 +1160,7 @@ static struct meson_pmx_func meson_s4_periphs_functions[] = {
 	FUNCTION(s2_demod),
 };
 
-static struct meson_bank meson_s4_periphs_banks[] = {
+static const struct meson_bank meson_s4_periphs_banks[] = {
 	/* name  first  last  irq  pullen  pull  dir  out  in */
 	BANK_DS("B", GPIOB_0,    GPIOB_13,  0, 13,
 		0x63,  0,  0x64,  0,  0x62, 0,  0x61, 0,  0x60, 0, 0x67, 0),
@@ -1180,7 +1180,7 @@ static struct meson_bank meson_s4_periphs_banks[] = {
 		0x83,  0,  0x84,  0,  0x82, 0,  0x81,  0, 0x80, 0, 0x87, 0),
 };
 
-static struct meson_pmx_bank meson_s4_periphs_pmx_banks[] = {
+static const struct meson_pmx_bank meson_s4_periphs_pmx_banks[] = {
 	/*name	            first	 lask        reg offset*/
 	BANK_PMX("B",      GPIOB_0,     GPIOB_13,    0x00, 0),
 	BANK_PMX("C",      GPIOC_0,     GPIOC_7,     0x9,  0),
@@ -1192,12 +1192,12 @@ static struct meson_pmx_bank meson_s4_periphs_pmx_banks[] = {
 	BANK_PMX("TEST_N", GPIO_TEST_N, GPIO_TEST_N, 0xf,  0)
 };
 
-static struct meson_axg_pmx_data meson_s4_periphs_pmx_banks_data = {
+static const struct meson_axg_pmx_data meson_s4_periphs_pmx_banks_data = {
 	.pmx_banks	= meson_s4_periphs_pmx_banks,
 	.num_pmx_banks	= ARRAY_SIZE(meson_s4_periphs_pmx_banks),
 };
 
-static struct meson_pinctrl_data meson_s4_periphs_pinctrl_data = {
+static const struct meson_pinctrl_data meson_s4_periphs_pinctrl_data = {
 	.name		= "periphs-banks",
 	.pins		= meson_s4_periphs_pins,
 	.groups		= meson_s4_periphs_groups,
diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c
index ef002b9dd464..253a0cc57e39 100644
--- a/drivers/pinctrl/meson/pinctrl-meson.c
+++ b/drivers/pinctrl/meson/pinctrl-meson.c
@@ -70,7 +70,7 @@ static const unsigned int meson_bit_strides[] = {
  * Return:	0 on success, a negative value on error
  */
 static int meson_get_bank(struct meson_pinctrl *pc, unsigned int pin,
-			  struct meson_bank **bank)
+			  const struct meson_bank **bank)
 {
 	int i;
 
@@ -94,11 +94,12 @@ static int meson_get_bank(struct meson_pinctrl *pc, unsigned int pin,
  * @reg:	the computed register offset
  * @bit:	the computed bit
  */
-static void meson_calc_reg_and_bit(struct meson_bank *bank, unsigned int pin,
+static void meson_calc_reg_and_bit(const struct meson_bank *bank,
+				   unsigned int pin,
 				   enum meson_reg_type reg_type,
 				   unsigned int *reg, unsigned int *bit)
 {
-	struct meson_reg_desc *desc = &bank->regs[reg_type];
+	const struct meson_reg_desc *desc = &bank->regs[reg_type];
 
 	*bit = (desc->bit + pin - bank->first) * meson_bit_strides[reg_type];
 	*reg = (desc->reg + (*bit / 32)) * 4;
@@ -181,7 +182,7 @@ static int meson_pinconf_set_gpio_bit(struct meson_pinctrl *pc,
 				      unsigned int reg_type,
 				      bool arg)
 {
-	struct meson_bank *bank;
+	const struct meson_bank *bank;
 	unsigned int reg, bit;
 	int ret;
 
@@ -198,7 +199,7 @@ static int meson_pinconf_get_gpio_bit(struct meson_pinctrl *pc,
 				      unsigned int pin,
 				      unsigned int reg_type)
 {
-	struct meson_bank *bank;
+	const struct meson_bank *bank;
 	unsigned int reg, bit, val;
 	int ret;
 
@@ -261,7 +262,7 @@ static int meson_pinconf_set_output_drive(struct meson_pinctrl *pc,
 static int meson_pinconf_disable_bias(struct meson_pinctrl *pc,
 				      unsigned int pin)
 {
-	struct meson_bank *bank;
+	const struct meson_bank *bank;
 	unsigned int reg, bit = 0;
 	int ret;
 
@@ -280,7 +281,7 @@ static int meson_pinconf_disable_bias(struct meson_pinctrl *pc,
 static int meson_pinconf_enable_bias(struct meson_pinctrl *pc, unsigned int pin,
 				     bool pull_up)
 {
-	struct meson_bank *bank;
+	const struct meson_bank *bank;
 	unsigned int reg, bit, val = 0;
 	int ret;
 
@@ -308,7 +309,7 @@ static int meson_pinconf_set_drive_strength(struct meson_pinctrl *pc,
 					    unsigned int pin,
 					    u16 drive_strength_ua)
 {
-	struct meson_bank *bank;
+	const struct meson_bank *bank;
 	unsigned int reg, bit, ds_val;
 	int ret;
 
@@ -399,7 +400,7 @@ static int meson_pinconf_set(struct pinctrl_dev *pcdev, unsigned int pin,
 
 static int meson_pinconf_get_pull(struct meson_pinctrl *pc, unsigned int pin)
 {
-	struct meson_bank *bank;
+	const struct meson_bank *bank;
 	unsigned int reg, bit, val;
 	int ret, conf;
 
@@ -435,7 +436,7 @@ static int meson_pinconf_get_drive_strength(struct meson_pinctrl *pc,
 					    unsigned int pin,
 					    u16 *drive_strength_ua)
 {
-	struct meson_bank *bank;
+	const struct meson_bank *bank;
 	unsigned int reg, bit;
 	unsigned int val;
 	int ret;
@@ -528,7 +529,7 @@ static int meson_pinconf_group_set(struct pinctrl_dev *pcdev,
 				   unsigned long *configs, unsigned num_configs)
 {
 	struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
-	struct meson_pmx_group *group = &pc->data->groups[num_group];
+	const struct meson_pmx_group *group = &pc->data->groups[num_group];
 	int i;
 
 	dev_dbg(pc->dev, "set pinconf for group %s\n", group->name);
@@ -587,8 +588,8 @@ static void meson_gpio_set(struct gpio_chip *chip, unsigned gpio, int value)
 static int meson_gpio_get(struct gpio_chip *chip, unsigned gpio)
 {
 	struct meson_pinctrl *pc = gpiochip_get_data(chip);
+	const struct meson_bank *bank;
 	unsigned int reg, bit, val;
-	struct meson_bank *bank;
 	int ret;
 
 	ret = meson_get_bank(pc, gpio, &bank);
diff --git a/drivers/pinctrl/meson/pinctrl-meson.h b/drivers/pinctrl/meson/pinctrl-meson.h
index 34fc4e8612e4..7883ea31a001 100644
--- a/drivers/pinctrl/meson/pinctrl-meson.h
+++ b/drivers/pinctrl/meson/pinctrl-meson.h
@@ -110,15 +110,15 @@ struct meson_bank {
 struct meson_pinctrl_data {
 	const char *name;
 	const struct pinctrl_pin_desc *pins;
-	struct meson_pmx_group *groups;
-	struct meson_pmx_func *funcs;
+	const struct meson_pmx_group *groups;
+	const struct meson_pmx_func *funcs;
 	unsigned int num_pins;
 	unsigned int num_groups;
 	unsigned int num_funcs;
-	struct meson_bank *banks;
+	const struct meson_bank *banks;
 	unsigned int num_banks;
 	const struct pinmux_ops *pmx_ops;
-	void *pmx_data;
+	const void *pmx_data;
 	int (*parse_dt)(struct meson_pinctrl *pc);
 };
 
diff --git a/drivers/pinctrl/meson/pinctrl-meson8-pmx.c b/drivers/pinctrl/meson/pinctrl-meson8-pmx.c
index 7f22aa0f8e36..10adf52edda6 100644
--- a/drivers/pinctrl/meson/pinctrl-meson8-pmx.c
+++ b/drivers/pinctrl/meson/pinctrl-meson8-pmx.c
@@ -32,7 +32,7 @@
 static void meson8_pmx_disable_other_groups(struct meson_pinctrl *pc,
 					    unsigned int pin, int sel_group)
 {
-	struct meson_pmx_group *group;
+	const struct meson_pmx_group *group;
 	struct meson8_pmx_data *pmx_data;
 	int i, j;
 
@@ -57,8 +57,8 @@ static int meson8_pmx_set_mux(struct pinctrl_dev *pcdev, unsigned func_num,
 			      unsigned group_num)
 {
 	struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
-	struct meson_pmx_func *func = &pc->data->funcs[func_num];
-	struct meson_pmx_group *group = &pc->data->groups[group_num];
+	const struct meson_pmx_func *func = &pc->data->funcs[func_num];
+	const struct meson_pmx_group *group = &pc->data->groups[group_num];
 	struct meson8_pmx_data *pmx_data =
 		(struct meson8_pmx_data *)group->data;
 	int i, ret = 0;
diff --git a/drivers/pinctrl/meson/pinctrl-meson8.c b/drivers/pinctrl/meson/pinctrl-meson8.c
index dd17100efdcf..3da7f3799c3f 100644
--- a/drivers/pinctrl/meson/pinctrl-meson8.c
+++ b/drivers/pinctrl/meson/pinctrl-meson8.c
@@ -405,7 +405,7 @@ static const unsigned int i2s_out_ch01_ao_pins[] = { GPIOAO_11 };
 
 static const unsigned int hdmi_cec_ao_pins[]	= { GPIOAO_12 };
 
-static struct meson_pmx_group meson8_cbus_groups[] = {
+static const struct meson_pmx_group meson8_cbus_groups[] = {
 	GPIO_GROUP(GPIOX_0),
 	GPIO_GROUP(GPIOX_1),
 	GPIO_GROUP(GPIOX_2),
@@ -745,7 +745,7 @@ static struct meson_pmx_group meson8_cbus_groups[] = {
 	GROUP(sdxc_cmd_b,	2,	4),
 };
 
-static struct meson_pmx_group meson8_aobus_groups[] = {
+static const struct meson_pmx_group meson8_aobus_groups[] = {
 	GPIO_GROUP(GPIOAO_0),
 	GPIO_GROUP(GPIOAO_1),
 	GPIO_GROUP(GPIOAO_2),
@@ -1015,7 +1015,7 @@ static const char * const hdmi_cec_ao_groups[] = {
 	"hdmi_cec_ao"
 };
 
-static struct meson_pmx_func meson8_cbus_functions[] = {
+static const struct meson_pmx_func meson8_cbus_functions[] = {
 	FUNCTION(gpio_periphs),
 	FUNCTION(sd_a),
 	FUNCTION(sdxc_a),
@@ -1051,7 +1051,7 @@ static struct meson_pmx_func meson8_cbus_functions[] = {
 	FUNCTION(spdif),
 };
 
-static struct meson_pmx_func meson8_aobus_functions[] = {
+static const struct meson_pmx_func meson8_aobus_functions[] = {
 	FUNCTION(gpio_aobus),
 	FUNCTION(uart_ao),
 	FUNCTION(remote),
@@ -1063,7 +1063,7 @@ static struct meson_pmx_func meson8_aobus_functions[] = {
 	FUNCTION(hdmi_cec_ao),
 };
 
-static struct meson_bank meson8_cbus_banks[] = {
+static const struct meson_bank meson8_cbus_banks[] = {
 	/*   name    first     last         irq       pullen  pull    dir     out     in  */
 	BANK("X",    GPIOX_0,  GPIOX_21,    112, 133, 4,  0,  4,  0,  0,  0,  1,  0,  2,  0),
 	BANK("Y",    GPIOY_0,  GPIOY_16,    95,  111, 3,  0,  3,  0,  3,  0,  4,  0,  5,  0),
@@ -1074,12 +1074,12 @@ static struct meson_bank meson8_cbus_banks[] = {
 	BANK("BOOT", BOOT_0,   BOOT_18,     39,   57, 2,  0,  2,  0,  9,  0, 10,  0, 11,  0),
 };
 
-static struct meson_bank meson8_aobus_banks[] = {
+static const struct meson_bank meson8_aobus_banks[] = {
 	/*   name    first     last         irq    pullen  pull    dir     out     in  */
 	BANK("AO",   GPIOAO_0, GPIO_TEST_N, 0, 13, 0, 16,  0,  0,  0,  0,  0, 16,  1,  0),
 };
 
-static struct meson_pinctrl_data meson8_cbus_pinctrl_data = {
+static const struct meson_pinctrl_data meson8_cbus_pinctrl_data = {
 	.name		= "cbus-banks",
 	.pins		= meson8_cbus_pins,
 	.groups		= meson8_cbus_groups,
@@ -1092,7 +1092,7 @@ static struct meson_pinctrl_data meson8_cbus_pinctrl_data = {
 	.pmx_ops	= &meson8_pmx_ops,
 };
 
-static struct meson_pinctrl_data meson8_aobus_pinctrl_data = {
+static const struct meson_pinctrl_data meson8_aobus_pinctrl_data = {
 	.name		= "ao-bank",
 	.pins		= meson8_aobus_pins,
 	.groups		= meson8_aobus_groups,
diff --git a/drivers/pinctrl/meson/pinctrl-meson8b.c b/drivers/pinctrl/meson/pinctrl-meson8b.c
index 6cd4b3ec1b40..a71e1f41358a 100644
--- a/drivers/pinctrl/meson/pinctrl-meson8b.c
+++ b/drivers/pinctrl/meson/pinctrl-meson8b.c
@@ -349,7 +349,7 @@ static const unsigned int eth_ref_clk_pins[]	= { DIF_3_N };
 static const unsigned int eth_mdc_pins[]	= { DIF_4_P };
 static const unsigned int eth_mdio_en_pins[]	= { DIF_4_N };
 
-static struct meson_pmx_group meson8b_cbus_groups[] = {
+static const struct meson_pmx_group meson8b_cbus_groups[] = {
 	GPIO_GROUP(GPIOX_0),
 	GPIO_GROUP(GPIOX_1),
 	GPIO_GROUP(GPIOX_2),
@@ -603,7 +603,7 @@ static struct meson_pmx_group meson8b_cbus_groups[] = {
 	GROUP(eth_rxd2,		7,	23),
 };
 
-static struct meson_pmx_group meson8b_aobus_groups[] = {
+static const struct meson_pmx_group meson8b_aobus_groups[] = {
 	GPIO_GROUP(GPIOAO_0),
 	GPIO_GROUP(GPIOAO_1),
 	GPIO_GROUP(GPIOAO_2),
@@ -869,7 +869,7 @@ static const char * const tsin_b_groups[] = {
 	"tsin_d0_b", "tsin_clk_b", "tsin_sop_b", "tsin_d_valid_b"
 };
 
-static struct meson_pmx_func meson8b_cbus_functions[] = {
+static const struct meson_pmx_func meson8b_cbus_functions[] = {
 	FUNCTION(gpio_periphs),
 	FUNCTION(sd_a),
 	FUNCTION(sdxc_a),
@@ -903,7 +903,7 @@ static struct meson_pmx_func meson8b_cbus_functions[] = {
 	FUNCTION(clk_24m),
 };
 
-static struct meson_pmx_func meson8b_aobus_functions[] = {
+static const struct meson_pmx_func meson8b_aobus_functions[] = {
 	FUNCTION(gpio_aobus),
 	FUNCTION(uart_ao),
 	FUNCTION(uart_ao_b),
@@ -917,7 +917,7 @@ static struct meson_pmx_func meson8b_aobus_functions[] = {
 	FUNCTION(hdmi_cec),
 };
 
-static struct meson_bank meson8b_cbus_banks[] = {
+static const struct meson_bank meson8b_cbus_banks[] = {
 	/*   name        first          last        irq       pullen   pull     dir      out      in   */
 	BANK("X0..11",	 GPIOX_0,	GPIOX_11,   97, 108,  4,  0,   4,  0,   0,  0,   1,  0,   2,  0),
 	BANK("X16..21",	 GPIOX_16,	GPIOX_21,  113, 118,  4, 16,   4, 16,   0, 16,   1, 16,   2, 16),
@@ -938,12 +938,12 @@ static struct meson_bank meson8b_cbus_banks[] = {
 	BANK("DIF",	 DIF_0_P,	DIF_4_N,    -1,  -1,  5,  8,   5,  8,  12, 12,  13, 12,  14, 12),
 };
 
-static struct meson_bank meson8b_aobus_banks[] = {
+static const struct meson_bank meson8b_aobus_banks[] = {
 	/*   name    first     lastc        irq    pullen  pull    dir     out     in  */
 	BANK("AO",   GPIOAO_0, GPIO_TEST_N, 0, 13, 0,  16, 0, 0,  0,  0,  0, 16,  1,  0),
 };
 
-static struct meson_pinctrl_data meson8b_cbus_pinctrl_data = {
+static const struct meson_pinctrl_data meson8b_cbus_pinctrl_data = {
 	.name		= "cbus-banks",
 	.pins		= meson8b_cbus_pins,
 	.groups		= meson8b_cbus_groups,
@@ -956,7 +956,7 @@ static struct meson_pinctrl_data meson8b_cbus_pinctrl_data = {
 	.pmx_ops	= &meson8_pmx_ops,
 };
 
-static struct meson_pinctrl_data meson8b_aobus_pinctrl_data = {
+static const struct meson_pinctrl_data meson8b_aobus_pinctrl_data = {
 	.name		= "aobus-banks",
 	.pins		= meson8b_aobus_pins,
 	.groups		= meson8b_aobus_groups,
-- 
2.45.2



From bigeasy at linutronix.de  Wed Aug  7 23:46:40 2024
From: bigeasy at linutronix.de (Sebastian Andrzej Siewior)
Date: Thu, 8 Aug 2024 08:46:40 +0200
Subject: [PATCH v2] ASoC: meson: axg-fifo: fix irq scheduling issue with
 PREEMPT_RT
In-Reply-To: <20240807162705.4024136-1-jbrunet@baylibre.com>
References: <20240807162705.4024136-1-jbrunet@baylibre.com>
Message-ID: <20240808064640.8-BmbtlX@linutronix.de>

On 2024-08-07 18:27:03 [+0200], Jerome Brunet wrote:
> With PREEMPT_RT enabled a spinlock_t becomes a sleeping lock.
> 
> This is usually not a problem with spinlocks used in IRQ context since
> IRQ handlers get threaded. However, if IRQF_ONESHOT is set, the primary
> handler won't be force-threaded and runs always in hardirq context. This is
> a problem because spinlock_t requires a preemptible context on PREEMPT_RT.
> 
> In this particular instance, regmap mmio uses spinlock_t to protect the
> register access and IRQF_ONESHOT is set on the IRQ. In this case, it is
> actually better to do everything in threaded handler and it solves the
> problem with PREEMPT_RT.
> 
> Reported-by: Arseniy Krasnov <avkrasnov at salutedevices.com>
> Closes: https://lore.kernel.org/linux-amlogic/20240729131652.3012327-1-avkrasnov at salutedevices.com
> Suggested-by: Sebastian Andrzej Siewior <bigeasy at linutronix.de>
> Fixes: b11d26660dff ("ASoC: meson: axg-fifo: use threaded irq to check periods")
> Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>

Reviewed-by: Sebastian Andrzej Siewior <bigeasy at linutronix.de>

Sebastian


From jbrunet at baylibre.com  Thu Aug  8 03:05:57 2024
From: jbrunet at baylibre.com (Jerome Brunet)
Date: Thu, 08 Aug 2024 12:05:57 +0200
Subject: [PATCH v2] pinctrl: meson: Constify some structures
In-Reply-To: <f74e326bd7d48003c06219545bad7c2ef1a84bf8.1723053850.git.christophe.jaillet@wanadoo.fr>
	(Christophe JAILLET's message of "Wed, 7 Aug 2024 20:05:36 +0200")
References: <f74e326bd7d48003c06219545bad7c2ef1a84bf8.1723053850.git.christophe.jaillet@wanadoo.fr>
Message-ID: <1jplqjxray.fsf@starbuckisacylon.baylibre.com>

On Wed 07 Aug 2024 at 20:05, Christophe JAILLET <christophe.jaillet at wanadoo.fr> wrote:

> The following structures are not modified in these drivers.
>   - struct meson_bank
>   - struct meson_pmx_bank
>   - struct meson_pmx_func
>   - struct meson_pmx_group
>   - struct meson_pinctrl_data
>   - struct meson_axg_pmx_data
>
> Constifying these structures moves some data to a read-only section, so
> increase overall security.
>

Reviewed-by: Jerome Brunet <jbrunet at baylibre.com>

On the vim3l:
Tested-by: Jerome Brunet <jbrunet at baylibre.com>


From jbrunet at baylibre.com  Thu Aug  8 03:15:16 2024
From: jbrunet at baylibre.com (Jerome Brunet)
Date: Thu, 08 Aug 2024 12:15:16 +0200
Subject: [PATCH 1/8] reset: amlogic: convert driver to regmap
In-Reply-To: <11e8dd92e07674133d8a291cc016c314.sboyd@kernel.org> (Stephen
	Boyd's message of "Thu, 18 Jul 2024 12:29:13 -0700")
References: <20240710162526.2341399-1-jbrunet@baylibre.com>
	<20240710162526.2341399-2-jbrunet@baylibre.com>
	<b12ac6b2-cb46-4410-9846-86ed4c3aea1f@salutedevices.com>
	<1jv813makr.fsf@starbuckisacylon.baylibre.com>
	<f5bc9590-f37e-491e-9978-c1eab8914c30@salutedevices.com>
	<11e8dd92e07674133d8a291cc016c314.sboyd@kernel.org>
Message-ID: <1jle17xqvf.fsf@starbuckisacylon.baylibre.com>

On Thu 18 Jul 2024 at 12:29, Stephen Boyd <sboyd at kernel.org> wrote:

>> 
>> Full analysis is following:
>> - using regmap_update_bits() instead of writel() is incorrect because
>> this changes the behavior of the driver
>> - regmap_update_bits() should not be used here because default value of
>> regs isn't taken into account and (_apparently_, the doc is terse) these
>> regs could be updated by hw itself.
>
> Maybe use regmap_write_bits() instead.

Actually regmap_write_bits() performs an update behind the scene.
You'd still get the undefined read value making a mess AFAICT.

I'll stick to the usual regmap_write().

-- 
Jerome


From jbrunet at baylibre.com  Thu Aug  8 03:27:31 2024
From: jbrunet at baylibre.com (Jerome Brunet)
Date: Thu,  8 Aug 2024 12:27:31 +0200
Subject: [PATCH v3 1/9] reset: amlogic: convert driver to regmap
In-Reply-To: <20240808102742.4095904-1-jbrunet@baylibre.com>
References: <20240808102742.4095904-1-jbrunet@baylibre.com>
Message-ID: <20240808102742.4095904-2-jbrunet@baylibre.com>

To allow using the same driver for the main reset controller and the
auxiliary ones embedded in the clock controllers, convert the
the Amlogic reset driver to regmap.

Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
---
 drivers/reset/reset-meson.c | 79 ++++++++++++++++++++-----------------
 1 file changed, 43 insertions(+), 36 deletions(-)

diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c
index f78be97898bc..b47431a21b86 100644
--- a/drivers/reset/reset-meson.c
+++ b/drivers/reset/reset-meson.c
@@ -11,36 +11,43 @@
 #include <linux/of.h>
 #include <linux/module.h>
 #include <linux/platform_device.h>
+#include <linux/regmap.h>
 #include <linux/reset-controller.h>
 #include <linux/slab.h>
 #include <linux/types.h>
 
-#define BITS_PER_REG	32
-
 struct meson_reset_param {
 	int reg_count;
 	int level_offset;
 };
 
 struct meson_reset {
-	void __iomem *reg_base;
 	const struct meson_reset_param *param;
 	struct reset_controller_dev rcdev;
-	spinlock_t lock;
+	struct regmap *map;
 };
 
+static void meson_reset_offset_and_bit(struct meson_reset *data,
+				       unsigned long id,
+				       unsigned int *offset,
+				       unsigned int *bit)
+{
+	unsigned int stride = regmap_get_reg_stride(data->map);
+
+	*offset = (id / (stride * BITS_PER_BYTE)) * stride;
+	*bit = id % (stride * BITS_PER_BYTE);
+}
+
 static int meson_reset_reset(struct reset_controller_dev *rcdev,
-			      unsigned long id)
+			     unsigned long id)
 {
 	struct meson_reset *data =
 		container_of(rcdev, struct meson_reset, rcdev);
-	unsigned int bank = id / BITS_PER_REG;
-	unsigned int offset = id % BITS_PER_REG;
-	void __iomem *reg_addr = data->reg_base + (bank << 2);
+	unsigned int offset, bit;
 
-	writel(BIT(offset), reg_addr);
+	meson_reset_offset_and_bit(data, id, &offset, &bit);
 
-	return 0;
+	return regmap_write(data->map, offset, BIT(bit));
 }
 
 static int meson_reset_level(struct reset_controller_dev *rcdev,
@@ -48,25 +55,13 @@ static int meson_reset_level(struct reset_controller_dev *rcdev,
 {
 	struct meson_reset *data =
 		container_of(rcdev, struct meson_reset, rcdev);
-	unsigned int bank = id / BITS_PER_REG;
-	unsigned int offset = id % BITS_PER_REG;
-	void __iomem *reg_addr;
-	unsigned long flags;
-	u32 reg;
+	unsigned int offset, bit;
 
-	reg_addr = data->reg_base + data->param->level_offset + (bank << 2);
+	meson_reset_offset_and_bit(data, id, &offset, &bit);
+	offset += data->param->level_offset;
 
-	spin_lock_irqsave(&data->lock, flags);
-
-	reg = readl(reg_addr);
-	if (assert)
-		writel(reg & ~BIT(offset), reg_addr);
-	else
-		writel(reg | BIT(offset), reg_addr);
-
-	spin_unlock_irqrestore(&data->lock, flags);
-
-	return 0;
+	return regmap_update_bits(data->map, offset,
+				  BIT(bit), assert ? 0 : BIT(bit));
 }
 
 static int meson_reset_assert(struct reset_controller_dev *rcdev,
@@ -113,30 +108,42 @@ static const struct of_device_id meson_reset_dt_ids[] = {
 };
 MODULE_DEVICE_TABLE(of, meson_reset_dt_ids);
 
+static const struct regmap_config regmap_config = {
+	.reg_bits   = 32,
+	.val_bits   = 32,
+	.reg_stride = 4,
+};
+
 static int meson_reset_probe(struct platform_device *pdev)
 {
+	struct device *dev = &pdev->dev;
 	struct meson_reset *data;
+	void __iomem *base;
 
-	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
+	data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
 	if (!data)
 		return -ENOMEM;
 
-	data->reg_base = devm_platform_ioremap_resource(pdev, 0);
-	if (IS_ERR(data->reg_base))
-		return PTR_ERR(data->reg_base);
+	base = devm_platform_ioremap_resource(pdev, 0);
+	if (IS_ERR(base))
+		return PTR_ERR(base);
 
-	data->param = of_device_get_match_data(&pdev->dev);
+	data->param = of_device_get_match_data(dev);
 	if (!data->param)
 		return -ENODEV;
 
-	spin_lock_init(&data->lock);
+	data->map = devm_regmap_init_mmio(dev, base, &regmap_config);
+	if (IS_ERR(data->map))
+		return dev_err_probe(dev, PTR_ERR(data->map),
+				     "can't init regmap mmio region\n");
 
 	data->rcdev.owner = THIS_MODULE;
-	data->rcdev.nr_resets = data->param->reg_count * BITS_PER_REG;
+	data->rcdev.nr_resets = data->param->reg_count * BITS_PER_BYTE
+		* regmap_config.reg_stride;
 	data->rcdev.ops = &meson_reset_ops;
-	data->rcdev.of_node = pdev->dev.of_node;
+	data->rcdev.of_node = dev->of_node;
 
-	return devm_reset_controller_register(&pdev->dev, &data->rcdev);
+	return devm_reset_controller_register(dev, &data->rcdev);
 }
 
 static struct platform_driver meson_reset_driver = {
-- 
2.43.0



From jbrunet at baylibre.com  Thu Aug  8 03:27:30 2024
From: jbrunet at baylibre.com (Jerome Brunet)
Date: Thu,  8 Aug 2024 12:27:30 +0200
Subject: [PATCH v3 0/9] reset: amlogic: move audio reset drivers out of CCF
Message-ID: <20240808102742.4095904-1-jbrunet@baylibre.com>

This patchset follows the discussion about having reset driver in the
clock tree [1]. Ideally those should reside in the reset part of tree.

Also the code of the amlogic reset driver is very similar between the 2
trees and could use the same driver code.

This patcheset alignes the reset drivers present in the reset and clock
then adds support for the reset driver of audio clock controller found in
the g12 and sm1 SoC family to the reset tree, using the auxiliary bus.

The infrastructure put in place is meant to be generic enough so we may
eventually also move the reset drivers in the meson8b and aoclk clock
controllers.

This was tested on sm1 vim3l and gxl aml-s905x-cc.

Changes since v2 [4]:
 * Fix undefined read access of the reset register
 * Fix Kconfig symbol description

Changes since v1 [3]:
 * Fixes formatting errors reported by Stephen.
 * Changed parameters type to unsigned
 * Fix usage of ops passed as parameters, previously ignored.
 * Return 0 instead of an error if reset support is absent
   to properly decouple from the clock and have a weak
   dependency
 * Split the platform and auxiliary modules in 2 distinct modules
   to fix the COMPILE_TEST error reported by ktest robot.

Change since RFC [2]:
 * Move the aux registration helper out of clock too.

[1] https://lore.kernel.org/linux-clk/e3a85852b911fdf16dd9ae158f42b3ef.sboyd at kernel.org
[2] https://lore.kernel.org/linux-clk/20240516150842.705844-1-jbrunet at baylibre.com
[3] https://lore.kernel.org/linux-clk/20240710162526.2341399-1-jbrunet at baylibre.com
[4] https://lore.kernel.org/linux-clk/20240718095755.3511992-1-jbrunet at baylibre.com

Jerome Brunet (9):
  reset: amlogic: convert driver to regmap
  reset: amlogic: use generic data matching function
  reset: amlogic: make parameters unsigned
  reset: amlogic: add driver parameters
  reset: amlogic: use reset number instead of register count
  reset: amlogic: add reset status support
  reset: amlogic: move drivers to a dedicated directory
  reset: amlogic: split the device core and platform probe
  reset: amlogic: add auxiliary reset driver support

 drivers/reset/Kconfig                         |  15 +-
 drivers/reset/Makefile                        |   3 +-
 drivers/reset/amlogic/Kconfig                 |  27 ++++
 drivers/reset/amlogic/Makefile                |   4 +
 .../{ => amlogic}/reset-meson-audio-arb.c     |   0
 drivers/reset/amlogic/reset-meson-aux.c       | 136 ++++++++++++++++
 drivers/reset/amlogic/reset-meson-core.c      | 139 ++++++++++++++++
 drivers/reset/amlogic/reset-meson-pltf.c      |  95 +++++++++++
 drivers/reset/amlogic/reset-meson.h           |  28 ++++
 drivers/reset/reset-meson.c                   | 153 ------------------
 include/soc/amlogic/meson-auxiliary-reset.h   |  23 +++
 11 files changed, 454 insertions(+), 169 deletions(-)
 create mode 100644 drivers/reset/amlogic/Kconfig
 create mode 100644 drivers/reset/amlogic/Makefile
 rename drivers/reset/{ => amlogic}/reset-meson-audio-arb.c (100%)
 create mode 100644 drivers/reset/amlogic/reset-meson-aux.c
 create mode 100644 drivers/reset/amlogic/reset-meson-core.c
 create mode 100644 drivers/reset/amlogic/reset-meson-pltf.c
 create mode 100644 drivers/reset/amlogic/reset-meson.h
 delete mode 100644 drivers/reset/reset-meson.c
 create mode 100644 include/soc/amlogic/meson-auxiliary-reset.h

-- 
2.43.0



From jbrunet at baylibre.com  Thu Aug  8 03:27:32 2024
From: jbrunet at baylibre.com (Jerome Brunet)
Date: Thu,  8 Aug 2024 12:27:32 +0200
Subject: [PATCH v3 2/9] reset: amlogic: use generic data matching function
In-Reply-To: <20240808102742.4095904-1-jbrunet@baylibre.com>
References: <20240808102742.4095904-1-jbrunet@baylibre.com>
Message-ID: <20240808102742.4095904-3-jbrunet@baylibre.com>

There is no need to use the DT specific function to get
matching data, use the generic one instead

Suggested-by: Stephen Boyd <sboyd at kernel.org>
Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
---
 drivers/reset/reset-meson.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c
index b47431a21b86..820905779acd 100644
--- a/drivers/reset/reset-meson.c
+++ b/drivers/reset/reset-meson.c
@@ -128,7 +128,7 @@ static int meson_reset_probe(struct platform_device *pdev)
 	if (IS_ERR(base))
 		return PTR_ERR(base);
 
-	data->param = of_device_get_match_data(dev);
+	data->param = device_get_match_data(dev);
 	if (!data->param)
 		return -ENODEV;
 
-- 
2.43.0



From jbrunet at baylibre.com  Thu Aug  8 03:27:33 2024
From: jbrunet at baylibre.com (Jerome Brunet)
Date: Thu,  8 Aug 2024 12:27:33 +0200
Subject: [PATCH v3 3/9] reset: amlogic: make parameters unsigned
In-Reply-To: <20240808102742.4095904-1-jbrunet@baylibre.com>
References: <20240808102742.4095904-1-jbrunet@baylibre.com>
Message-ID: <20240808102742.4095904-4-jbrunet@baylibre.com>

register count and offset cannot be negative. Use unsigned integer
for this.

Suggested-by: Stephen Boyd <sboyd at kernel.org>
Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
---
 drivers/reset/reset-meson.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c
index 820905779acd..460ad2f8360f 100644
--- a/drivers/reset/reset-meson.c
+++ b/drivers/reset/reset-meson.c
@@ -17,8 +17,8 @@
 #include <linux/types.h>
 
 struct meson_reset_param {
-	int reg_count;
-	int level_offset;
+	unsigned int reg_count;
+	unsigned int level_offset;
 };
 
 struct meson_reset {
-- 
2.43.0



From jbrunet at baylibre.com  Thu Aug  8 03:27:34 2024
From: jbrunet at baylibre.com (Jerome Brunet)
Date: Thu,  8 Aug 2024 12:27:34 +0200
Subject: [PATCH v3 4/9] reset: amlogic: add driver parameters
In-Reply-To: <20240808102742.4095904-1-jbrunet@baylibre.com>
References: <20240808102742.4095904-1-jbrunet@baylibre.com>
Message-ID: <20240808102742.4095904-5-jbrunet@baylibre.com>

To allow using the same driver for the main reset controller and the
auxiliary ones embedded in the clock controllers, allow to customise
the reset offset, same as the level offset. Also add an option to make
the level reset active low or high.

Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
---
 drivers/reset/reset-meson.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c
index 460ad2f8360f..8addd100e601 100644
--- a/drivers/reset/reset-meson.c
+++ b/drivers/reset/reset-meson.c
@@ -18,7 +18,9 @@
 
 struct meson_reset_param {
 	unsigned int reg_count;
+	unsigned int reset_offset;
 	unsigned int level_offset;
+	bool level_low_reset;
 };
 
 struct meson_reset {
@@ -46,6 +48,7 @@ static int meson_reset_reset(struct reset_controller_dev *rcdev,
 	unsigned int offset, bit;
 
 	meson_reset_offset_and_bit(data, id, &offset, &bit);
+	offset += data->param->reset_offset;
 
 	return regmap_write(data->map, offset, BIT(bit));
 }
@@ -59,9 +62,10 @@ static int meson_reset_level(struct reset_controller_dev *rcdev,
 
 	meson_reset_offset_and_bit(data, id, &offset, &bit);
 	offset += data->param->level_offset;
+	assert ^= data->param->level_low_reset;
 
 	return regmap_update_bits(data->map, offset,
-				  BIT(bit), assert ? 0 : BIT(bit));
+				  BIT(bit), assert ? BIT(bit) : 0);
 }
 
 static int meson_reset_assert(struct reset_controller_dev *rcdev,
@@ -84,17 +88,23 @@ static const struct reset_control_ops meson_reset_ops = {
 
 static const struct meson_reset_param meson8b_param = {
 	.reg_count	= 8,
+	.reset_offset	= 0x0,
 	.level_offset	= 0x7c,
+	.level_low_reset = true,
 };
 
 static const struct meson_reset_param meson_a1_param = {
 	.reg_count	= 3,
+	.reset_offset	= 0x0,
 	.level_offset	= 0x40,
+	.level_low_reset = true,
 };
 
 static const struct meson_reset_param meson_s4_param = {
 	.reg_count	= 6,
+	.reset_offset	= 0x0,
 	.level_offset	= 0x40,
+	.level_low_reset = true,
 };
 
 static const struct of_device_id meson_reset_dt_ids[] = {
-- 
2.43.0



From jbrunet at baylibre.com  Thu Aug  8 03:27:35 2024
From: jbrunet at baylibre.com (Jerome Brunet)
Date: Thu,  8 Aug 2024 12:27:35 +0200
Subject: [PATCH v3 5/9] reset: amlogic: use reset number instead of register count
In-Reply-To: <20240808102742.4095904-1-jbrunet@baylibre.com>
References: <20240808102742.4095904-1-jbrunet@baylibre.com>
Message-ID: <20240808102742.4095904-6-jbrunet@baylibre.com>

The reset driver from audio clock controller may register less
reset than a register can hold. To avoid making any change while
switching to auxiliary support, use the number of reset instead of the
register count to define the bounds of the reset controller.

Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
---
 drivers/reset/reset-meson.c | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c
index 8addd100e601..5b6f934c0265 100644
--- a/drivers/reset/reset-meson.c
+++ b/drivers/reset/reset-meson.c
@@ -17,7 +17,7 @@
 #include <linux/types.h>
 
 struct meson_reset_param {
-	unsigned int reg_count;
+	unsigned int reset_num;
 	unsigned int reset_offset;
 	unsigned int level_offset;
 	bool level_low_reset;
@@ -87,21 +87,21 @@ static const struct reset_control_ops meson_reset_ops = {
 };
 
 static const struct meson_reset_param meson8b_param = {
-	.reg_count	= 8,
+	.reset_num	= 256,
 	.reset_offset	= 0x0,
 	.level_offset	= 0x7c,
 	.level_low_reset = true,
 };
 
 static const struct meson_reset_param meson_a1_param = {
-	.reg_count	= 3,
+	.reset_num	= 96,
 	.reset_offset	= 0x0,
 	.level_offset	= 0x40,
 	.level_low_reset = true,
 };
 
 static const struct meson_reset_param meson_s4_param = {
-	.reg_count	= 6,
+	.reset_num	= 192,
 	.reset_offset	= 0x0,
 	.level_offset	= 0x40,
 	.level_low_reset = true,
@@ -148,8 +148,7 @@ static int meson_reset_probe(struct platform_device *pdev)
 				     "can't init regmap mmio region\n");
 
 	data->rcdev.owner = THIS_MODULE;
-	data->rcdev.nr_resets = data->param->reg_count * BITS_PER_BYTE
-		* regmap_config.reg_stride;
+	data->rcdev.nr_resets = data->param->reset_num;
 	data->rcdev.ops = &meson_reset_ops;
 	data->rcdev.of_node = dev->of_node;
 
-- 
2.43.0



From jbrunet at baylibre.com  Thu Aug  8 03:27:36 2024
From: jbrunet at baylibre.com (Jerome Brunet)
Date: Thu,  8 Aug 2024 12:27:36 +0200
Subject: [PATCH v3 6/9] reset: amlogic: add reset status support
In-Reply-To: <20240808102742.4095904-1-jbrunet@baylibre.com>
References: <20240808102742.4095904-1-jbrunet@baylibre.com>
Message-ID: <20240808102742.4095904-7-jbrunet@baylibre.com>

Add a callback to check the status of the level reset, as done in
the reset driver of the audio clock controller.

This is done keep the functionality when the audio reset controller
get migrated to meson-reset.

Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
---
 drivers/reset/reset-meson.c | 20 ++++++++++++++++++--
 1 file changed, 18 insertions(+), 2 deletions(-)

diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c
index 5b6f934c0265..b16d9c32adb1 100644
--- a/drivers/reset/reset-meson.c
+++ b/drivers/reset/reset-meson.c
@@ -56,8 +56,7 @@ static int meson_reset_reset(struct reset_controller_dev *rcdev,
 static int meson_reset_level(struct reset_controller_dev *rcdev,
 			    unsigned long id, bool assert)
 {
-	struct meson_reset *data =
-		container_of(rcdev, struct meson_reset, rcdev);
+	struct meson_reset *data = container_of(rcdev, struct meson_reset, rcdev);
 	unsigned int offset, bit;
 
 	meson_reset_offset_and_bit(data, id, &offset, &bit);
@@ -68,6 +67,22 @@ static int meson_reset_level(struct reset_controller_dev *rcdev,
 				  BIT(bit), assert ? BIT(bit) : 0);
 }
 
+static int meson_reset_status(struct reset_controller_dev *rcdev,
+			      unsigned long id)
+{
+	struct meson_reset *data =
+		container_of(rcdev, struct meson_reset, rcdev);
+	unsigned int val, offset, bit;
+
+	meson_reset_offset_and_bit(data, id, &offset, &bit);
+	offset += data->param->level_offset;
+
+	regmap_read(data->map, offset, &val);
+	val = !!(BIT(bit) & val);
+
+	return val ^ data->param->level_low_reset;
+}
+
 static int meson_reset_assert(struct reset_controller_dev *rcdev,
 			      unsigned long id)
 {
@@ -84,6 +99,7 @@ static const struct reset_control_ops meson_reset_ops = {
 	.reset		= meson_reset_reset,
 	.assert		= meson_reset_assert,
 	.deassert	= meson_reset_deassert,
+	.status		= meson_reset_status,
 };
 
 static const struct meson_reset_param meson8b_param = {
-- 
2.43.0



From jbrunet at baylibre.com  Thu Aug  8 03:27:37 2024
From: jbrunet at baylibre.com (Jerome Brunet)
Date: Thu,  8 Aug 2024 12:27:37 +0200
Subject: [PATCH v3 7/9] reset: amlogic: move drivers to a dedicated directory
In-Reply-To: <20240808102742.4095904-1-jbrunet@baylibre.com>
References: <20240808102742.4095904-1-jbrunet@baylibre.com>
Message-ID: <20240808102742.4095904-8-jbrunet@baylibre.com>

The meson reset driver will be split in two part, one implemeting the ops,
the other providing the platform driver support. This will be done to
facilitate the addition of the auxiliary bus support.

To avoid making a mess in drivers/reset/ while doing so, move the amlogic
reset drivers to a dedicated directory.

Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
---
 drivers/reset/Kconfig                             | 15 +--------------
 drivers/reset/Makefile                            |  3 +--
 drivers/reset/amlogic/Kconfig                     | 13 +++++++++++++
 drivers/reset/amlogic/Makefile                    |  2 ++
 .../reset/{ => amlogic}/reset-meson-audio-arb.c   |  0
 drivers/reset/{ => amlogic}/reset-meson.c         |  0
 6 files changed, 17 insertions(+), 16 deletions(-)
 create mode 100644 drivers/reset/amlogic/Kconfig
 create mode 100644 drivers/reset/amlogic/Makefile
 rename drivers/reset/{ => amlogic}/reset-meson-audio-arb.c (100%)
 rename drivers/reset/{ => amlogic}/reset-meson.c (100%)

diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 67bce340a87e..0c092ae1b411 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -140,20 +140,6 @@ config RESET_MCHP_SPARX5
 	help
 	  This driver supports switch core reset for the Microchip Sparx5 SoC.
 
-config RESET_MESON
-	tristate "Meson Reset Driver"
-	depends on ARCH_MESON || COMPILE_TEST
-	default ARCH_MESON
-	help
-	  This enables the reset driver for Amlogic Meson SoCs.
-
-config RESET_MESON_AUDIO_ARB
-	tristate "Meson Audio Memory Arbiter Reset Driver"
-	depends on ARCH_MESON || COMPILE_TEST
-	help
-	  This enables the reset driver for Audio Memory Arbiter of
-	  Amlogic's A113 based SoCs
-
 config RESET_NPCM
 	bool "NPCM BMC Reset Driver" if COMPILE_TEST
 	default ARCH_NPCM
@@ -343,6 +329,7 @@ config RESET_ZYNQMP
 	help
 	  This enables the reset controller driver for Xilinx ZynqMP SoCs.
 
+source "drivers/reset/amlogic/Kconfig"
 source "drivers/reset/starfive/Kconfig"
 source "drivers/reset/sti/Kconfig"
 source "drivers/reset/hisilicon/Kconfig"
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 27b0bbdfcc04..bf089176c9f4 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -1,5 +1,6 @@
 # SPDX-License-Identifier: GPL-2.0
 obj-y += core.o
+obj-y += amlogic/
 obj-y += hisilicon/
 obj-y += starfive/
 obj-y += sti/
@@ -20,8 +21,6 @@ obj-$(CONFIG_RESET_K210) += reset-k210.o
 obj-$(CONFIG_RESET_LANTIQ) += reset-lantiq.o
 obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o
 obj-$(CONFIG_RESET_MCHP_SPARX5) += reset-microchip-sparx5.o
-obj-$(CONFIG_RESET_MESON) += reset-meson.o
-obj-$(CONFIG_RESET_MESON_AUDIO_ARB) += reset-meson-audio-arb.o
 obj-$(CONFIG_RESET_NPCM) += reset-npcm.o
 obj-$(CONFIG_RESET_NUVOTON_MA35D1) += reset-ma35d1.o
 obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o
diff --git a/drivers/reset/amlogic/Kconfig b/drivers/reset/amlogic/Kconfig
new file mode 100644
index 000000000000..7ed9cf50f038
--- /dev/null
+++ b/drivers/reset/amlogic/Kconfig
@@ -0,0 +1,13 @@
+config RESET_MESON
+	tristate "Meson Reset Driver"
+	depends on ARCH_MESON || COMPILE_TEST
+	default ARCH_MESON
+	help
+	  This enables the reset driver for Amlogic Meson SoCs.
+
+config RESET_MESON_AUDIO_ARB
+	tristate "Meson Audio Memory Arbiter Reset Driver"
+	depends on ARCH_MESON || COMPILE_TEST
+	help
+	  This enables the reset driver for Audio Memory Arbiter of
+	  Amlogic's A113 based SoCs
diff --git a/drivers/reset/amlogic/Makefile b/drivers/reset/amlogic/Makefile
new file mode 100644
index 000000000000..55509fc78513
--- /dev/null
+++ b/drivers/reset/amlogic/Makefile
@@ -0,0 +1,2 @@
+obj-$(CONFIG_RESET_MESON) += reset-meson.o
+obj-$(CONFIG_RESET_MESON_AUDIO_ARB) += reset-meson-audio-arb.o
diff --git a/drivers/reset/reset-meson-audio-arb.c b/drivers/reset/amlogic/reset-meson-audio-arb.c
similarity index 100%
rename from drivers/reset/reset-meson-audio-arb.c
rename to drivers/reset/amlogic/reset-meson-audio-arb.c
diff --git a/drivers/reset/reset-meson.c b/drivers/reset/amlogic/reset-meson.c
similarity index 100%
rename from drivers/reset/reset-meson.c
rename to drivers/reset/amlogic/reset-meson.c
-- 
2.43.0



From jbrunet at baylibre.com  Thu Aug  8 03:27:39 2024
From: jbrunet at baylibre.com (Jerome Brunet)
Date: Thu,  8 Aug 2024 12:27:39 +0200
Subject: [PATCH v3 9/9] reset: amlogic: add auxiliary reset driver support
In-Reply-To: <20240808102742.4095904-1-jbrunet@baylibre.com>
References: <20240808102742.4095904-1-jbrunet@baylibre.com>
Message-ID: <20240808102742.4095904-10-jbrunet@baylibre.com>

Add support for the reset controller present in the audio clock
controller of the g12 and sm1 SoC families, using the auxiliary bus.

This is expected to replace the driver currently present directly
within the related clock driver.

Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
---
 drivers/reset/amlogic/Kconfig               |   8 ++
 drivers/reset/amlogic/Makefile              |   1 +
 drivers/reset/amlogic/reset-meson-aux.c     | 136 ++++++++++++++++++++
 drivers/reset/amlogic/reset-meson-core.c    |  25 +++-
 drivers/reset/amlogic/reset-meson-pltf.c    |   3 +
 drivers/reset/amlogic/reset-meson.h         |   4 +
 include/soc/amlogic/meson-auxiliary-reset.h |  23 ++++
 7 files changed, 198 insertions(+), 2 deletions(-)
 create mode 100644 drivers/reset/amlogic/reset-meson-aux.c
 create mode 100644 include/soc/amlogic/meson-auxiliary-reset.h

diff --git a/drivers/reset/amlogic/Kconfig b/drivers/reset/amlogic/Kconfig
index 04c7be0f3165..ee1c7620a2b1 100644
--- a/drivers/reset/amlogic/Kconfig
+++ b/drivers/reset/amlogic/Kconfig
@@ -11,6 +11,14 @@ config RESET_MESON
 	help
 	  This enables the reset platform driver for Amlogic SoCs.
 
+config RESET_MESON_AUX
+	tristate "Meson Reset Platform Driver"
+	depends on ARCH_MESON || COMPILE_TEST
+	select AUXILIARY_BUS
+	select RESET_MESON_CORE
+	help
+	  This enables the reset auxiliary driver for Amlogic SoCs.
+
 config RESET_MESON_AUDIO_ARB
 	tristate "Meson Audio Memory Arbiter Reset Driver"
 	depends on ARCH_MESON || COMPILE_TEST
diff --git a/drivers/reset/amlogic/Makefile b/drivers/reset/amlogic/Makefile
index 0f8f9121b566..5d53a4b11ed9 100644
--- a/drivers/reset/amlogic/Makefile
+++ b/drivers/reset/amlogic/Makefile
@@ -1,3 +1,4 @@
 obj-$(CONFIG_RESET_MESON) += reset-meson-pltf.o
+obj-$(CONFIG_RESET_MESON_AUX) += reset-meson-aux.o
 obj-$(CONFIG_RESET_MESON_CORE) += reset-meson-core.o
 obj-$(CONFIG_RESET_MESON_AUDIO_ARB) += reset-meson-audio-arb.o
diff --git a/drivers/reset/amlogic/reset-meson-aux.c b/drivers/reset/amlogic/reset-meson-aux.c
new file mode 100644
index 000000000000..caf26eb67c14
--- /dev/null
+++ b/drivers/reset/amlogic/reset-meson-aux.c
@@ -0,0 +1,136 @@
+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
+/*
+ * Amlogic Meson Reset Auxiliary driver
+ *
+ * Copyright (c) 2024 BayLibre, SAS.
+ * Author: Jerome Brunet <jbrunet at baylibre.com>
+ */
+
+#include <linux/err.h>
+#include <linux/module.h>
+#include <linux/auxiliary_bus.h>
+#include <linux/regmap.h>
+#include <linux/reset-controller.h>
+#include <linux/slab.h>
+
+#include "reset-meson.h"
+#include <soc/amlogic/meson-auxiliary-reset.h>
+
+static DEFINE_IDA(meson_rst_aux_ida);
+
+struct meson_reset_adev {
+	struct auxiliary_device adev;
+	struct regmap *map;
+};
+
+#define to_meson_reset_adev(_adev) \
+	container_of((_adev), struct meson_reset_adev, adev)
+
+static const struct meson_reset_param meson_g12a_audio_param = {
+	.reset_ops	= &meson_reset_toggle_ops,
+	.reset_num	= 26,
+	.level_offset	= 0x24,
+};
+
+static const struct meson_reset_param meson_sm1_audio_param = {
+	.reset_ops	= &meson_reset_toggle_ops,
+	.reset_num	= 39,
+	.level_offset	= 0x28,
+};
+
+static const struct auxiliary_device_id meson_reset_aux_ids[] = {
+	{
+		.name = "axg-audio-clkc.rst-g12a",
+		.driver_data = (kernel_ulong_t)&meson_g12a_audio_param,
+	}, {
+		.name = "axg-audio-clkc.rst-sm1",
+		.driver_data = (kernel_ulong_t)&meson_sm1_audio_param,
+	}, {}
+};
+MODULE_DEVICE_TABLE(auxiliary, meson_reset_aux_ids);
+
+static int meson_reset_aux_probe(struct auxiliary_device *adev,
+				 const struct auxiliary_device_id *id)
+{
+	const struct meson_reset_param *param =
+		(const struct meson_reset_param *)(id->driver_data);
+	struct meson_reset_adev *raux =
+		to_meson_reset_adev(adev);
+
+	return meson_reset_probe(&adev->dev, raux->map, param);
+}
+
+static struct auxiliary_driver meson_reset_aux_driver = {
+	.probe		= meson_reset_aux_probe,
+	.id_table	= meson_reset_aux_ids,
+};
+module_auxiliary_driver(meson_reset_aux_driver);
+
+static void meson_rst_aux_release(struct device *dev)
+{
+	struct auxiliary_device *adev = to_auxiliary_dev(dev);
+	struct meson_reset_adev *raux =
+		to_meson_reset_adev(adev);
+
+	ida_free(&meson_rst_aux_ida, adev->id);
+	kfree(raux);
+}
+
+static void meson_rst_aux_unregister_adev(void *_adev)
+{
+	struct auxiliary_device *adev = _adev;
+
+	auxiliary_device_delete(adev);
+	auxiliary_device_uninit(adev);
+}
+
+int devm_meson_rst_aux_register(struct device *dev,
+				struct regmap *map,
+				const char *adev_name)
+{
+	struct meson_reset_adev *raux;
+	struct auxiliary_device *adev;
+	int ret;
+
+	raux = kzalloc(sizeof(*raux), GFP_KERNEL);
+	if (!raux)
+		return -ENOMEM;
+
+	ret = ida_alloc(&meson_rst_aux_ida, GFP_KERNEL);
+	if (ret < 0)
+		goto raux_free;
+
+	raux->map = map;
+
+	adev = &raux->adev;
+	adev->id = ret;
+	adev->name = adev_name;
+	adev->dev.parent = dev;
+	adev->dev.release = meson_rst_aux_release;
+	device_set_of_node_from_dev(&adev->dev, dev);
+
+	ret = auxiliary_device_init(adev);
+	if (ret)
+		goto ida_free;
+
+	ret = __auxiliary_device_add(adev, dev->driver->name);
+	if (ret) {
+		auxiliary_device_uninit(adev);
+		return ret;
+	}
+
+	return devm_add_action_or_reset(dev, meson_rst_aux_unregister_adev,
+					adev);
+
+ida_free:
+	ida_free(&meson_rst_aux_ida, adev->id);
+raux_free:
+	kfree(raux);
+	return ret;
+}
+EXPORT_SYMBOL_GPL(devm_meson_rst_aux_register);
+
+MODULE_DESCRIPTION("Amlogic Meson Reset Auxiliary driver");
+MODULE_AUTHOR("Jerome Brunet <jbrunet at baylibre.com>");
+MODULE_LICENSE("Dual BSD/GPL");
+MODULE_IMPORT_NS(MESON_RESET);
diff --git a/drivers/reset/amlogic/reset-meson-core.c b/drivers/reset/amlogic/reset-meson-core.c
index ea4fc562f7e6..774902527d17 100644
--- a/drivers/reset/amlogic/reset-meson-core.c
+++ b/drivers/reset/amlogic/reset-meson-core.c
@@ -85,12 +85,33 @@ static int meson_reset_deassert(struct reset_controller_dev *rcdev,
 	return meson_reset_level(rcdev, id, false);
 }
 
-static const struct reset_control_ops meson_reset_ops = {
+static int meson_reset_level_toggle(struct reset_controller_dev *rcdev,
+				    unsigned long id)
+{
+	int ret;
+
+	ret = meson_reset_assert(rcdev, id);
+	if (ret)
+		return ret;
+
+	return meson_reset_deassert(rcdev, id);
+}
+
+const struct reset_control_ops meson_reset_ops = {
 	.reset		= meson_reset_reset,
 	.assert		= meson_reset_assert,
 	.deassert	= meson_reset_deassert,
 	.status		= meson_reset_status,
 };
+EXPORT_SYMBOL_NS_GPL(meson_reset_ops, MESON_RESET);
+
+const struct reset_control_ops meson_reset_toggle_ops = {
+	.reset		= meson_reset_level_toggle,
+	.assert		= meson_reset_assert,
+	.deassert	= meson_reset_deassert,
+	.status		= meson_reset_status,
+};
+EXPORT_SYMBOL_NS_GPL(meson_reset_toggle_ops, MESON_RESET);
 
 int meson_reset_probe(struct device *dev, struct regmap *map,
 		      const struct meson_reset_param *param)
@@ -105,7 +126,7 @@ int meson_reset_probe(struct device *dev, struct regmap *map,
 	data->map = map;
 	data->rcdev.owner = dev->driver->owner;
 	data->rcdev.nr_resets = param->reset_num;
-	data->rcdev.ops = &meson_reset_ops;
+	data->rcdev.ops = data->param->reset_ops;
 	data->rcdev.of_node = dev->of_node;
 
 	return devm_reset_controller_register(dev, &data->rcdev);
diff --git a/drivers/reset/amlogic/reset-meson-pltf.c b/drivers/reset/amlogic/reset-meson-pltf.c
index 97e933b4aa34..2bc3ea42c6ec 100644
--- a/drivers/reset/amlogic/reset-meson-pltf.c
+++ b/drivers/reset/amlogic/reset-meson-pltf.c
@@ -16,6 +16,7 @@
 #include "reset-meson.h"
 
 static const struct meson_reset_param meson8b_param = {
+	.reset_ops	= &meson_reset_ops,
 	.reset_num	= 256,
 	.reset_offset	= 0x0,
 	.level_offset	= 0x7c,
@@ -23,6 +24,7 @@ static const struct meson_reset_param meson8b_param = {
 };
 
 static const struct meson_reset_param meson_a1_param = {
+	.reset_ops	= &meson_reset_ops,
 	.reset_num	= 96,
 	.reset_offset	= 0x0,
 	.level_offset	= 0x40,
@@ -30,6 +32,7 @@ static const struct meson_reset_param meson_a1_param = {
 };
 
 static const struct meson_reset_param meson_s4_param = {
+	.reset_ops	= &meson_reset_ops,
 	.reset_num	= 192,
 	.reset_offset	= 0x0,
 	.level_offset	= 0x40,
diff --git a/drivers/reset/amlogic/reset-meson.h b/drivers/reset/amlogic/reset-meson.h
index c2e8a5cf2e46..5ab2ac9ab2e5 100644
--- a/drivers/reset/amlogic/reset-meson.h
+++ b/drivers/reset/amlogic/reset-meson.h
@@ -12,6 +12,7 @@
 #include <linux/reset-controller.h>
 
 struct meson_reset_param {
+	const struct reset_control_ops *reset_ops;
 	unsigned int reset_num;
 	unsigned int reset_offset;
 	unsigned int level_offset;
@@ -21,4 +22,7 @@ struct meson_reset_param {
 int meson_reset_probe(struct device *dev, struct regmap *map,
 		      const struct meson_reset_param *param);
 
+extern const struct reset_control_ops meson_reset_ops;
+extern const struct reset_control_ops meson_reset_toggle_ops;
+
 #endif /* __MESON_RESET_CORE_H */
diff --git a/include/soc/amlogic/meson-auxiliary-reset.h b/include/soc/amlogic/meson-auxiliary-reset.h
new file mode 100644
index 000000000000..f70dd864ef6a
--- /dev/null
+++ b/include/soc/amlogic/meson-auxiliary-reset.h
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __SOC_AMLOGIC_MESON_AUX_RESET_H
+#define __SOC_AMLOGIC_MESON_AUX_RESET_H
+
+#include <linux/err.h>
+
+struct device;
+struct regmap;
+
+#if IS_ENABLED(CONFIG_RESET_MESON_AUX)
+int devm_meson_rst_aux_register(struct device *dev,
+				struct regmap *map,
+				const char *adev_name);
+#else
+static inline int devm_meson_rst_aux_register(struct device *dev,
+					      struct regmap *map,
+					      const char *adev_name)
+{
+	return 0;
+}
+#endif
+
+#endif /* __SOC_AMLOGIC_MESON_AUX_RESET_H */
-- 
2.43.0



From jbrunet at baylibre.com  Thu Aug  8 03:27:38 2024
From: jbrunet at baylibre.com (Jerome Brunet)
Date: Thu,  8 Aug 2024 12:27:38 +0200
Subject: [PATCH v3 8/9] reset: amlogic: split the device core and platform probe
In-Reply-To: <20240808102742.4095904-1-jbrunet@baylibre.com>
References: <20240808102742.4095904-1-jbrunet@baylibre.com>
Message-ID: <20240808102742.4095904-9-jbrunet@baylibre.com>

To prepare the addition of the auxiliary device support, split
out the device core function from the probe of the platform device.

The device core function will be common to both the platform and auxiliary
driver.

Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
---
 drivers/reset/amlogic/Kconfig                 |  10 +-
 drivers/reset/amlogic/Makefile                |   3 +-
 .../{reset-meson.c => reset-meson-core.c}     | 101 +++---------------
 drivers/reset/amlogic/reset-meson-pltf.c      |  92 ++++++++++++++++
 drivers/reset/amlogic/reset-meson.h           |  24 +++++
 5 files changed, 143 insertions(+), 87 deletions(-)
 rename drivers/reset/amlogic/{reset-meson.c => reset-meson-core.c} (51%)
 create mode 100644 drivers/reset/amlogic/reset-meson-pltf.c
 create mode 100644 drivers/reset/amlogic/reset-meson.h

diff --git a/drivers/reset/amlogic/Kconfig b/drivers/reset/amlogic/Kconfig
index 7ed9cf50f038..04c7be0f3165 100644
--- a/drivers/reset/amlogic/Kconfig
+++ b/drivers/reset/amlogic/Kconfig
@@ -1,9 +1,15 @@
+config RESET_MESON_CORE
+	tristate
+	select REGMAP
+
 config RESET_MESON
-	tristate "Meson Reset Driver"
+	tristate "Meson Reset Platform Driver"
 	depends on ARCH_MESON || COMPILE_TEST
 	default ARCH_MESON
+	select REGMAP_MMIO
+	select RESET_MESON_CORE
 	help
-	  This enables the reset driver for Amlogic Meson SoCs.
+	  This enables the reset platform driver for Amlogic SoCs.
 
 config RESET_MESON_AUDIO_ARB
 	tristate "Meson Audio Memory Arbiter Reset Driver"
diff --git a/drivers/reset/amlogic/Makefile b/drivers/reset/amlogic/Makefile
index 55509fc78513..0f8f9121b566 100644
--- a/drivers/reset/amlogic/Makefile
+++ b/drivers/reset/amlogic/Makefile
@@ -1,2 +1,3 @@
-obj-$(CONFIG_RESET_MESON) += reset-meson.o
+obj-$(CONFIG_RESET_MESON) += reset-meson-pltf.o
+obj-$(CONFIG_RESET_MESON_CORE) += reset-meson-core.o
 obj-$(CONFIG_RESET_MESON_AUDIO_ARB) += reset-meson-audio-arb.o
diff --git a/drivers/reset/amlogic/reset-meson.c b/drivers/reset/amlogic/reset-meson-core.c
similarity index 51%
rename from drivers/reset/amlogic/reset-meson.c
rename to drivers/reset/amlogic/reset-meson-core.c
index b16d9c32adb1..ea4fc562f7e6 100644
--- a/drivers/reset/amlogic/reset-meson.c
+++ b/drivers/reset/amlogic/reset-meson-core.c
@@ -1,27 +1,17 @@
 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
 /*
- * Amlogic Meson Reset Controller driver
+ * Amlogic Meson Reset core functions
  *
- * Copyright (c) 2016 BayLibre, SAS.
- * Author: Neil Armstrong <narmstrong at baylibre.com>
+ * Copyright (c) 2024 BayLibre, SAS.
+ * Author: Jerome Brunet <jbrunet at baylibre.com>
  */
-#include <linux/err.h>
-#include <linux/init.h>
-#include <linux/io.h>
-#include <linux/of.h>
+
+#include <linux/device.h>
 #include <linux/module.h>
-#include <linux/platform_device.h>
 #include <linux/regmap.h>
 #include <linux/reset-controller.h>
-#include <linux/slab.h>
-#include <linux/types.h>
-
-struct meson_reset_param {
-	unsigned int reset_num;
-	unsigned int reset_offset;
-	unsigned int level_offset;
-	bool level_low_reset;
-};
+
+#include "reset-meson.h"
 
 struct meson_reset {
 	const struct meson_reset_param *param;
@@ -102,84 +92,27 @@ static const struct reset_control_ops meson_reset_ops = {
 	.status		= meson_reset_status,
 };
 
-static const struct meson_reset_param meson8b_param = {
-	.reset_num	= 256,
-	.reset_offset	= 0x0,
-	.level_offset	= 0x7c,
-	.level_low_reset = true,
-};
-
-static const struct meson_reset_param meson_a1_param = {
-	.reset_num	= 96,
-	.reset_offset	= 0x0,
-	.level_offset	= 0x40,
-	.level_low_reset = true,
-};
-
-static const struct meson_reset_param meson_s4_param = {
-	.reset_num	= 192,
-	.reset_offset	= 0x0,
-	.level_offset	= 0x40,
-	.level_low_reset = true,
-};
-
-static const struct of_device_id meson_reset_dt_ids[] = {
-	 { .compatible = "amlogic,meson8b-reset",    .data = &meson8b_param},
-	 { .compatible = "amlogic,meson-gxbb-reset", .data = &meson8b_param},
-	 { .compatible = "amlogic,meson-axg-reset",  .data = &meson8b_param},
-	 { .compatible = "amlogic,meson-a1-reset",   .data = &meson_a1_param},
-	 { .compatible = "amlogic,meson-s4-reset",   .data = &meson_s4_param},
-	 { .compatible = "amlogic,c3-reset",   .data = &meson_s4_param},
-	 { /* sentinel */ },
-};
-MODULE_DEVICE_TABLE(of, meson_reset_dt_ids);
-
-static const struct regmap_config regmap_config = {
-	.reg_bits   = 32,
-	.val_bits   = 32,
-	.reg_stride = 4,
-};
-
-static int meson_reset_probe(struct platform_device *pdev)
+int meson_reset_probe(struct device *dev, struct regmap *map,
+		      const struct meson_reset_param *param)
 {
-	struct device *dev = &pdev->dev;
 	struct meson_reset *data;
-	void __iomem *base;
 
 	data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
 	if (!data)
 		return -ENOMEM;
 
-	base = devm_platform_ioremap_resource(pdev, 0);
-	if (IS_ERR(base))
-		return PTR_ERR(base);
-
-	data->param = device_get_match_data(dev);
-	if (!data->param)
-		return -ENODEV;
-
-	data->map = devm_regmap_init_mmio(dev, base, &regmap_config);
-	if (IS_ERR(data->map))
-		return dev_err_probe(dev, PTR_ERR(data->map),
-				     "can't init regmap mmio region\n");
-
-	data->rcdev.owner = THIS_MODULE;
-	data->rcdev.nr_resets = data->param->reset_num;
+	data->param = param;
+	data->map = map;
+	data->rcdev.owner = dev->driver->owner;
+	data->rcdev.nr_resets = param->reset_num;
 	data->rcdev.ops = &meson_reset_ops;
 	data->rcdev.of_node = dev->of_node;
 
 	return devm_reset_controller_register(dev, &data->rcdev);
 }
+EXPORT_SYMBOL_NS_GPL(meson_reset_probe, MESON_RESET);
 
-static struct platform_driver meson_reset_driver = {
-	.probe	= meson_reset_probe,
-	.driver = {
-		.name		= "meson_reset",
-		.of_match_table	= meson_reset_dt_ids,
-	},
-};
-module_platform_driver(meson_reset_driver);
-
-MODULE_DESCRIPTION("Amlogic Meson Reset Controller driver");
+MODULE_DESCRIPTION("Amlogic Meson Reset Core function");
 MODULE_AUTHOR("Neil Armstrong <narmstrong at baylibre.com>");
-MODULE_LICENSE("Dual BSD/GPL");
+MODULE_AUTHOR("Jerome Brunet <jbrunet at baylibre.com>");
+MODULE_IMPORT_NS(MESON_RESET);
diff --git a/drivers/reset/amlogic/reset-meson-pltf.c b/drivers/reset/amlogic/reset-meson-pltf.c
new file mode 100644
index 000000000000..97e933b4aa34
--- /dev/null
+++ b/drivers/reset/amlogic/reset-meson-pltf.c
@@ -0,0 +1,92 @@
+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
+/*
+ * Amlogic Meson Reset platform driver
+ *
+ * Copyright (c) 2016 BayLibre, SAS.
+ * Author: Neil Armstrong <narmstrong at baylibre.com>
+ */
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/reset-controller.h>
+
+#include "reset-meson.h"
+
+static const struct meson_reset_param meson8b_param = {
+	.reset_num	= 256,
+	.reset_offset	= 0x0,
+	.level_offset	= 0x7c,
+	.level_low_reset = true,
+};
+
+static const struct meson_reset_param meson_a1_param = {
+	.reset_num	= 96,
+	.reset_offset	= 0x0,
+	.level_offset	= 0x40,
+	.level_low_reset = true,
+};
+
+static const struct meson_reset_param meson_s4_param = {
+	.reset_num	= 192,
+	.reset_offset	= 0x0,
+	.level_offset	= 0x40,
+	.level_low_reset = true,
+};
+
+static const struct of_device_id meson_reset_dt_ids[] = {
+	 { .compatible = "amlogic,meson8b-reset",    .data = &meson8b_param},
+	 { .compatible = "amlogic,meson-gxbb-reset", .data = &meson8b_param},
+	 { .compatible = "amlogic,meson-axg-reset",  .data = &meson8b_param},
+	 { .compatible = "amlogic,meson-a1-reset",   .data = &meson_a1_param},
+	 { .compatible = "amlogic,meson-s4-reset",   .data = &meson_s4_param},
+	 { .compatible = "amlogic,c3-reset",   .data = &meson_s4_param},
+	 { /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, meson_reset_dt_ids);
+
+static const struct regmap_config regmap_config = {
+	.reg_bits   = 32,
+	.val_bits   = 32,
+	.reg_stride = 4,
+};
+
+static int meson_reset_pltf_probe(struct platform_device *pdev)
+{
+	const struct meson_reset_param *param;
+	struct device *dev = &pdev->dev;
+	struct regmap *map;
+	void __iomem *base;
+
+	base = devm_platform_ioremap_resource(pdev, 0);
+	if (IS_ERR(base))
+		return PTR_ERR(base);
+
+	param = device_get_match_data(dev);
+	if (!param)
+		return -ENODEV;
+
+	map = devm_regmap_init_mmio(dev, base, &regmap_config);
+	if (IS_ERR(map))
+		return dev_err_probe(dev, PTR_ERR(map),
+				     "can't init regmap mmio region\n");
+
+	return meson_reset_probe(dev, map, param);
+}
+
+static struct platform_driver meson_reset_pltf_driver = {
+	.probe	= meson_reset_pltf_probe,
+	.driver = {
+		.name		= "meson_reset",
+		.of_match_table	= meson_reset_dt_ids,
+	},
+};
+module_platform_driver(meson_reset_pltf_driver);
+
+MODULE_DESCRIPTION("Amlogic Meson Reset Platform Controller driver");
+MODULE_AUTHOR("Neil Armstrong <narmstrong at baylibre.com>");
+MODULE_AUTHOR("Jerome Brunet <jbrunet at baylibre.com>");
+MODULE_LICENSE("Dual BSD/GPL");
+MODULE_IMPORT_NS(MESON_RESET);
diff --git a/drivers/reset/amlogic/reset-meson.h b/drivers/reset/amlogic/reset-meson.h
new file mode 100644
index 000000000000..c2e8a5cf2e46
--- /dev/null
+++ b/drivers/reset/amlogic/reset-meson.h
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
+/*
+ * Copyright (c) 2024 BayLibre, SAS.
+ * Author: Jerome Brunet <jbrunet at baylibre.com>
+ */
+
+#ifndef __MESON_RESET_CORE_H
+#define __MESON_RESET_CORE_H
+
+#include <linux/module.h>
+#include <linux/regmap.h>
+#include <linux/reset-controller.h>
+
+struct meson_reset_param {
+	unsigned int reset_num;
+	unsigned int reset_offset;
+	unsigned int level_offset;
+	bool level_low_reset;
+};
+
+int meson_reset_probe(struct device *dev, struct regmap *map,
+		      const struct meson_reset_param *param);
+
+#endif /* __MESON_RESET_CORE_H */
-- 
2.43.0



From broonie at kernel.org  Thu Aug  8 14:47:04 2024
From: broonie at kernel.org (Mark Brown)
Date: Thu, 08 Aug 2024 22:47:04 +0100
Subject: [PATCH v2] ASoC: meson: axg-fifo: fix irq scheduling issue
 with PREEMPT_RT
In-Reply-To: <20240807162705.4024136-1-jbrunet@baylibre.com>
References: <20240807162705.4024136-1-jbrunet@baylibre.com>
Message-ID: <172315362437.480667.7263502304351371986.b4-ty@kernel.org>

On Wed, 07 Aug 2024 18:27:03 +0200, Jerome Brunet wrote:
> With PREEMPT_RT enabled a spinlock_t becomes a sleeping lock.
> 
> This is usually not a problem with spinlocks used in IRQ context since
> IRQ handlers get threaded. However, if IRQF_ONESHOT is set, the primary
> handler won't be force-threaded and runs always in hardirq context. This is
> a problem because spinlock_t requires a preemptible context on PREEMPT_RT.
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next

Thanks!

[1/1] ASoC: meson: axg-fifo: fix irq scheduling issue with PREEMPT_RT
      commit: 5003d0ce5c7da3a02c0aff771f516f99731e7390

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark



From abelova at astralinux.ru  Fri Aug  9 05:47:25 2024
From: abelova at astralinux.ru (Anastasia Belova)
Date: Fri,  9 Aug 2024 15:47:25 +0300
Subject: [PATCH] drm/meson: add check to prevent dereference of NULL
Message-ID: <20240809124725.17956-1-abelova@astralinux.ru>

If devm_kzalloc gives NULL instead of allocating priv,
execution goes to free_drm where priv is dereferenced
calling meson_encoder_dsi_remove, meson_encoder_hdmi_remove
and meson_encoder_cvbs_remove.

Add NULL-check for priv.

Found by Linux Verification Center (linuxtesting.org) with SVACE.

Signed-off-by: Anastasia Belova <abelova at astralinux.ru>
---
 drivers/gpu/drm/meson/meson_drv.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c
index 4bd0baa2a4f5..3d143340e3f7 100644
--- a/drivers/gpu/drm/meson/meson_drv.c
+++ b/drivers/gpu/drm/meson/meson_drv.c
@@ -373,9 +373,11 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
 free_drm:
 	drm_dev_put(drm);
 
-	meson_encoder_dsi_remove(priv);
-	meson_encoder_hdmi_remove(priv);
-	meson_encoder_cvbs_remove(priv);
+	if (priv) {
+		meson_encoder_dsi_remove(priv);
+		meson_encoder_hdmi_remove(priv);
+		meson_encoder_cvbs_remove(priv);
+	}
 
 	if (has_components)
 		component_unbind_all(dev, drm);
-- 
2.30.2



From martin.blumenstingl at googlemail.com  Sat Aug 10 02:09:40 2024
From: martin.blumenstingl at googlemail.com (Martin Blumenstingl)
Date: Sat, 10 Aug 2024 11:09:40 +0200
Subject: [PATCH] drm/meson: add check to prevent dereference of NULL
In-Reply-To: <20240809124725.17956-1-abelova@astralinux.ru>
References: <20240809124725.17956-1-abelova@astralinux.ru>
Message-ID: <CAFBinCATiUnR=P9VRBxWeQhf49k6PVxK+nU95G7w94f-mR2HWQ@mail.gmail.com>

Hello Anastasia,

Thank you for working on this!

On Fri, Aug 9, 2024 at 2:48?PM Anastasia Belova <abelova at astralinux.ru> wrote:
[...]
> @@ -373,9 +373,11 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
>  free_drm:
>         drm_dev_put(drm);
>
> -       meson_encoder_dsi_remove(priv);
> -       meson_encoder_hdmi_remove(priv);
> -       meson_encoder_cvbs_remove(priv);
> +       if (priv) {
> +               meson_encoder_dsi_remove(priv);
> +               meson_encoder_hdmi_remove(priv);
> +               meson_encoder_cvbs_remove(priv);
> +       }
This is the straight-forward approach.

There's been conversions from non-devm_ functions to their devm_*
counterparts in the past in various subsystems.
I just found that there's a devm_drm_dev_alloc() which seems to be
calling drm_dev_put() automatically - but I have never used it myself
before.
As an alternative to your suggested approach: could you please look
into whether devm_drm_dev_alloc() is a suitable replacement (if not:
just explain why - then this patch is good to be merged)?


Thank you!
Martin


From abelova at astralinux.ru  Mon Aug 12 02:30:57 2024
From: abelova at astralinux.ru (Anastasia Belova)
Date: Mon, 12 Aug 2024 12:30:57 +0300
Subject: [PATCH] drm/meson: add check to prevent dereference of NULL
In-Reply-To: <CAFBinCATiUnR=P9VRBxWeQhf49k6PVxK+nU95G7w94f-mR2HWQ@mail.gmail.com>
References: <20240809124725.17956-1-abelova@astralinux.ru>
 <CAFBinCATiUnR=P9VRBxWeQhf49k6PVxK+nU95G7w94f-mR2HWQ@mail.gmail.com>
Message-ID: <bb45ed80-7871-47ba-a1fd-ee71dc21a409@astralinux.ru>

Hello Martin,


10/08/24 12:09, Martin Blumenstingl ?????:
> Hello Anastasia,
>
> Thank you for working on this!
>
> On Fri, Aug 9, 2024 at 2:48?PM Anastasia Belova <abelova at astralinux.ru> wrote:
> [...]
>> @@ -373,9 +373,11 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
>>   free_drm:
>>          drm_dev_put(drm);
>>
>> -       meson_encoder_dsi_remove(priv);
>> -       meson_encoder_hdmi_remove(priv);
>> -       meson_encoder_cvbs_remove(priv);
>> +       if (priv) {
>> +               meson_encoder_dsi_remove(priv);
>> +               meson_encoder_hdmi_remove(priv);
>> +               meson_encoder_cvbs_remove(priv);
>> +       }
> This is the straight-forward approach.
>
> There's been conversions from non-devm_ functions to their devm_*
> counterparts in the past in various subsystems.
> I just found that there's a devm_drm_dev_alloc() which seems to be
> calling drm_dev_put() automatically - but I have never used it myself
> before.
> As an alternative to your suggested approach: could you please look
> into whether devm_drm_dev_alloc() is a suitable replacement (if not:
> just explain why - then this patch is good to be merged)?

If I understood correctly, devm_drm_dev_alloc allows to delete drm_dev_put
from error path in meson_drv_bind_master and in meson_drv_unbind.

Then the proposed check may be ommited and function may just return
instead of jumping to free_drm.

And would it be better to rename free_drm to remove_encoders?

Thank you,
Anastasia Belova


From ansuelsmth at gmail.com  Mon Aug 12 04:55:10 2024
From: ansuelsmth at gmail.com (Christian Marangi)
Date: Mon, 12 Aug 2024 13:55:10 +0200
Subject: [PATCH] mmc: meson-gx: fix wrong conversion of __bf_shf to __ffs
Message-ID: <20240812115515.20158-1-ansuelsmth@gmail.com>

Commit 795c633f6093 ("mmc: meson-gx: fix __ffsdi2 undefined on arm32")
changed __bf_shf to __ffs to fix a compile error on 32bit arch that have
problems with __ffsdi2. This comes from the fact that __bf_shf use
__builtin_ffsll and on 32bit __ffsdi2 is missing.

Problem is that __bf_shf is defined as

  #define __bf_shf(x) (__builtin_ffsll(x) - 1)

but the patch doesn't account for the - 1.

Fix this by using the __builtin_ffs and add the - 1 to reflect the
original implementation.

The commit also converted other entry of __bf_shf in the code but those
got dropped in later patches.

Fixes: 795c633f6093 ("mmc: meson-gx: fix __ffsdi2 undefined on arm32")
Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
Cc: stable at vger.kernel.org # see patch description, needs adjustements for < 5.2
---
 drivers/mmc/host/meson-gx-mmc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/host/meson-gx-mmc.c b/drivers/mmc/host/meson-gx-mmc.c
index c7c067b9415a..8f64083a08fa 100644
--- a/drivers/mmc/host/meson-gx-mmc.c
+++ b/drivers/mmc/host/meson-gx-mmc.c
@@ -464,7 +464,7 @@ static int meson_mmc_clk_init(struct meson_host *host)
 	init.num_parents = MUX_CLK_NUM_PARENTS;
 
 	mux->reg = host->regs + SD_EMMC_CLOCK;
-	mux->shift = __ffs(CLK_SRC_MASK);
+	mux->shift = __builtin_ffs(CLK_SRC_MASK) - 1;
 	mux->mask = CLK_SRC_MASK >> mux->shift;
 	mux->hw.init = &init;
 
@@ -486,7 +486,7 @@ static int meson_mmc_clk_init(struct meson_host *host)
 	init.num_parents = 1;
 
 	div->reg = host->regs + SD_EMMC_CLOCK;
-	div->shift = __ffs(CLK_DIV_MASK);
+	div->shift = __builtin_ffs(CLK_DIV_MASK) - 1;
 	div->width = __builtin_popcountl(CLK_DIV_MASK);
 	div->hw.init = &init;
 	div->flags = CLK_DIVIDER_ONE_BASED;
-- 
2.45.2



From jbrunet at baylibre.com  Mon Aug 12 05:23:48 2024
From: jbrunet at baylibre.com (Jerome Brunet)
Date: Mon, 12 Aug 2024 14:23:48 +0200
Subject: [PATCH] mmc: meson-gx: fix wrong conversion of __bf_shf to __ffs
In-Reply-To: <20240812115515.20158-1-ansuelsmth@gmail.com> (Christian
	Marangi's message of "Mon, 12 Aug 2024 13:55:10 +0200")
References: <20240812115515.20158-1-ansuelsmth@gmail.com>
Message-ID: <1j8qx2x73f.fsf@starbuckisacylon.baylibre.com>

On Mon 12 Aug 2024 at 13:55, Christian Marangi <ansuelsmth at gmail.com> wrote:

> Commit 795c633f6093 ("mmc: meson-gx: fix __ffsdi2 undefined on arm32")
> changed __bf_shf to __ffs to fix a compile error on 32bit arch that have
> problems with __ffsdi2. This comes from the fact that __bf_shf use
> __builtin_ffsll and on 32bit __ffsdi2 is missing.
>
> Problem is that __bf_shf is defined as
>
>   #define __bf_shf(x) (__builtin_ffsll(x) - 1)
>
> but the patch doesn't account for the - 1.
>
> Fix this by using the __builtin_ffs and add the - 1 to reflect the
> original implementation.
>
> The commit also converted other entry of __bf_shf in the code but those
> got dropped in later patches.
>
> Fixes: 795c633f6093 ("mmc: meson-gx: fix __ffsdi2 undefined on arm32")
> Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>

Hi Christian,

Are you fixing an actual problem you've seen with the platform and or
this solely based on the original commit description ?

If I dump the shift values with what we have right now, on sm1 at least
* Mux shift is 6
* Div shift is 0

This is aligned with the datasheet and has been working for while now.

> Cc: stable at vger.kernel.org # see patch description, needs adjustements for < 5.2
> ---
>  drivers/mmc/host/meson-gx-mmc.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mmc/host/meson-gx-mmc.c b/drivers/mmc/host/meson-gx-mmc.c
> index c7c067b9415a..8f64083a08fa 100644
> --- a/drivers/mmc/host/meson-gx-mmc.c
> +++ b/drivers/mmc/host/meson-gx-mmc.c
> @@ -464,7 +464,7 @@ static int meson_mmc_clk_init(struct meson_host *host)
>  	init.num_parents = MUX_CLK_NUM_PARENTS;
>  
>  	mux->reg = host->regs + SD_EMMC_CLOCK;
> -	mux->shift = __ffs(CLK_SRC_MASK);
> +	mux->shift = __builtin_ffs(CLK_SRC_MASK) - 1;
>  	mux->mask = CLK_SRC_MASK >> mux->shift;
>  	mux->hw.init = &init;
>  
> @@ -486,7 +486,7 @@ static int meson_mmc_clk_init(struct meson_host *host)
>  	init.num_parents = 1;
>  
>  	div->reg = host->regs + SD_EMMC_CLOCK;
> -	div->shift = __ffs(CLK_DIV_MASK);
> +	div->shift = __builtin_ffs(CLK_DIV_MASK) - 1;
>  	div->width = __builtin_popcountl(CLK_DIV_MASK);
>  	div->hw.init = &init;
>  	div->flags = CLK_DIVIDER_ONE_BASED;

-- 
Jerome


From ribalda at chromium.org  Tue Aug 13 05:13:47 2024
From: ribalda at chromium.org (Ricardo Ribalda)
Date: Tue, 13 Aug 2024 12:13:47 +0000
Subject: [PATCH 0/6] media: Fix last smatch warnings
Message-ID: <20240813-smatch-clock-v1-0-664c84295b1c@chromium.org>

This series completes the smatch warning cleanout.

Signed-off-by: Ricardo Ribalda <ribalda at chromium.org>
---
Ricardo Ribalda (6):
      media: ar0521: Refactor ar0521_power_off()
      media: i2c: ov5645: Refactor ov5645_set_power_off()
      media: i2c: s5c73m3: Move clk_prepare to its own function
      media: tc358746: Move clk_prepare to its own function
      media: meson: vdec_1: Refactor vdec_1_stop()
      media: meson: vdec: hevc: Refactor vdec_hevc_start and vdec_hevc_stop

 drivers/media/i2c/ar0521.c                   | 15 ++++++++--
 drivers/media/i2c/ov5645.c                   | 15 ++++++++--
 drivers/media/i2c/s5c73m3/s5c73m3-core.c     | 13 ++++++++-
 drivers/media/i2c/tc358746.c                 | 12 +++++++-
 drivers/staging/media/meson/vdec/vdec_1.c    | 16 ++++++++---
 drivers/staging/media/meson/vdec/vdec_hevc.c | 43 +++++++++++++++++++++-------
 6 files changed, 92 insertions(+), 22 deletions(-)
---
base-commit: c80bfa4f9e0ebfce6ac909488d412347acbcb4f9
change-id: 20240813-smatch-clock-2fa3b1174857

Best regards,
-- 
Ricardo Ribalda <ribalda at chromium.org>



From ribalda at chromium.org  Tue Aug 13 05:13:48 2024
From: ribalda at chromium.org (Ricardo Ribalda)
Date: Tue, 13 Aug 2024 12:13:48 +0000
Subject: [PATCH 1/6] media: ar0521: Refactor ar0521_power_off()
In-Reply-To: <20240813-smatch-clock-v1-0-664c84295b1c@chromium.org>
References: <20240813-smatch-clock-v1-0-664c84295b1c@chromium.org>
Message-ID: <20240813-smatch-clock-v1-1-664c84295b1c@chromium.org>

Factor out all the power off logic, except the clk_disable_unprepare(),
to a new function __ar0521_power_off().

This allows ar0521_power_on() to explicitly clean-out the clock during
the error-path.

The following smatch warning is fixed:
drivers/media/i2c/ar0521.c:912 ar0521_power_on() warn: 'sensor->extclk' from clk_prepare_enable() not released on lines: 912.

Signed-off-by: Ricardo Ribalda <ribalda at chromium.org>
---
 drivers/media/i2c/ar0521.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/drivers/media/i2c/ar0521.c b/drivers/media/i2c/ar0521.c
index 09331cf95c62..2c528db31ba6 100644
--- a/drivers/media/i2c/ar0521.c
+++ b/drivers/media/i2c/ar0521.c
@@ -835,7 +835,7 @@ static const struct initial_reg {
 	     be(0x0707)), /* 3F44: couple k factor 2 */
 };
 
-static int ar0521_power_off(struct device *dev)
+static void __ar0521_power_off(struct device *dev)
 {
 	struct v4l2_subdev *sd = dev_get_drvdata(dev);
 	struct ar0521_dev *sensor = to_ar0521_dev(sd);
@@ -850,6 +850,16 @@ static int ar0521_power_off(struct device *dev)
 		if (sensor->supplies[i])
 			regulator_disable(sensor->supplies[i]);
 	}
+}
+
+static int ar0521_power_off(struct device *dev)
+{
+	struct v4l2_subdev *sd = dev_get_drvdata(dev);
+	struct ar0521_dev *sensor = to_ar0521_dev(sd);
+
+	clk_disable_unprepare(sensor->extclk);
+	__ar0521_power_off(dev);
+
 	return 0;
 }
 
@@ -908,7 +918,8 @@ static int ar0521_power_on(struct device *dev)
 
 	return 0;
 off:
-	ar0521_power_off(dev);
+	clk_disable_unprepare(sensor->extclk);
+	__ar0521_power_off(dev);
 	return ret;
 }
 

-- 
2.46.0.76.ge559c4bf1a-goog



From ribalda at chromium.org  Tue Aug 13 05:13:49 2024
From: ribalda at chromium.org (Ricardo Ribalda)
Date: Tue, 13 Aug 2024 12:13:49 +0000
Subject: [PATCH 2/6] media: i2c: ov5645: Refactor ov5645_set_power_off()
In-Reply-To: <20240813-smatch-clock-v1-0-664c84295b1c@chromium.org>
References: <20240813-smatch-clock-v1-0-664c84295b1c@chromium.org>
Message-ID: <20240813-smatch-clock-v1-2-664c84295b1c@chromium.org>

Factor out all the power off logic, except clk_disable_unprepare(), to a
new function __ov5645_set_power_off().

This allows ov5645_set_power_on() to excplicitly clean-out the clock
during the error-path.

The following smatch warning is fixed:
drivers/media/i2c/ov5645.c:690 ov5645_set_power_on() warn: 'ov5645->xclk' from clk_prepare_enable() not released on lines: 690.

Signed-off-by: Ricardo Ribalda <ribalda at chromium.org>
---
 drivers/media/i2c/ov5645.c | 15 ++++++++++++---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/drivers/media/i2c/ov5645.c b/drivers/media/i2c/ov5645.c
index 6c2d221f6973..0c32bd2940ec 100644
--- a/drivers/media/i2c/ov5645.c
+++ b/drivers/media/i2c/ov5645.c
@@ -635,7 +635,7 @@ static int ov5645_set_register_array(struct ov5645 *ov5645,
 	return 0;
 }
 
-static int ov5645_set_power_off(struct device *dev)
+static void __ov5645_set_power_off(struct device *dev)
 {
 	struct v4l2_subdev *sd = dev_get_drvdata(dev);
 	struct ov5645 *ov5645 = to_ov5645(sd);
@@ -643,8 +643,16 @@ static int ov5645_set_power_off(struct device *dev)
 	ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x58);
 	gpiod_set_value_cansleep(ov5645->rst_gpio, 1);
 	gpiod_set_value_cansleep(ov5645->enable_gpio, 0);
-	clk_disable_unprepare(ov5645->xclk);
 	regulator_bulk_disable(OV5645_NUM_SUPPLIES, ov5645->supplies);
+}
+
+static int ov5645_set_power_off(struct device *dev)
+{
+	struct v4l2_subdev *sd = dev_get_drvdata(dev);
+	struct ov5645 *ov5645 = to_ov5645(sd);
+
+	__ov5645_set_power_off(dev);
+	clk_disable_unprepare(ov5645->xclk);
 
 	return 0;
 }
@@ -686,7 +694,8 @@ static int ov5645_set_power_on(struct device *dev)
 	return 0;
 
 exit:
-	ov5645_set_power_off(dev);
+	__ov5645_set_power_off(dev);
+	clk_disable_unprepare(ov5645->xclk);
 	return ret;
 }
 

-- 
2.46.0.76.ge559c4bf1a-goog



From ribalda at chromium.org  Tue Aug 13 05:13:50 2024
From: ribalda at chromium.org (Ricardo Ribalda)
Date: Tue, 13 Aug 2024 12:13:50 +0000
Subject: [PATCH 3/6] media: i2c: s5c73m3: Move clk_prepare to its own
 function
In-Reply-To: <20240813-smatch-clock-v1-0-664c84295b1c@chromium.org>
References: <20240813-smatch-clock-v1-0-664c84295b1c@chromium.org>
Message-ID: <20240813-smatch-clock-v1-3-664c84295b1c@chromium.org>

Smatch is very confused by a clk_prepare_enable() being called in an
error-path. Fix this warning by moving the clk_prepare_enable() to its
own function.

drivers/media/i2c/s5c73m3/s5c73m3-core.c:1425 __s5c73m3_power_off() warn: 'state->clock' from clk_prepare_enable() not released on lines: 1425.

Signed-off-by: Ricardo Ribalda <ribalda at chromium.org>
---
 drivers/media/i2c/s5c73m3/s5c73m3-core.c | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/drivers/media/i2c/s5c73m3/s5c73m3-core.c b/drivers/media/i2c/s5c73m3/s5c73m3-core.c
index e89e888f028e..7716dfe2b8c9 100644
--- a/drivers/media/i2c/s5c73m3/s5c73m3-core.c
+++ b/drivers/media/i2c/s5c73m3/s5c73m3-core.c
@@ -1392,6 +1392,16 @@ static int __s5c73m3_power_on(struct s5c73m3 *state)
 	return ret;
 }
 
+/*
+ * This function has been created just to avoid a smatch warning,
+ * please do not merge into __s5c73m3_power_off() until you have
+ * confirmed that it does not introduce a new warning.
+ */
+static void s5c73m3_enable_clk(struct s5c73m3 *state)
+{
+	clk_prepare_enable(state->clock);
+}
+
 static int __s5c73m3_power_off(struct s5c73m3 *state)
 {
 	int i, ret;
@@ -1421,7 +1431,8 @@ static int __s5c73m3_power_off(struct s5c73m3 *state)
 				 state->supplies[i].supply, r);
 	}
 
-	clk_prepare_enable(state->clock);
+	s5c73m3_enable_clk(state);
+
 	return ret;
 }
 

-- 
2.46.0.76.ge559c4bf1a-goog



From ribalda at chromium.org  Tue Aug 13 05:13:51 2024
From: ribalda at chromium.org (Ricardo Ribalda)
Date: Tue, 13 Aug 2024 12:13:51 +0000
Subject: [PATCH 4/6] media: tc358746: Move clk_prepare to its own function
In-Reply-To: <20240813-smatch-clock-v1-0-664c84295b1c@chromium.org>
References: <20240813-smatch-clock-v1-0-664c84295b1c@chromium.org>
Message-ID: <20240813-smatch-clock-v1-4-664c84295b1c@chromium.org>

Smatch is very confused by a clk_prepare_enable() being called in an
error-path. Fix this warning by moving the clk_prepare_enable() to its
own function.

drivers/media/i2c/tc358746.c:1631 tc358746_suspend() warn: 'tc358746->refclk' from clk_prepare_enable() not released on lines: 1631.

Signed-off-by: Ricardo Ribalda <ribalda at chromium.org>
---
 drivers/media/i2c/tc358746.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/media/i2c/tc358746.c b/drivers/media/i2c/tc358746.c
index edf79107adc5..389582420ba7 100644
--- a/drivers/media/i2c/tc358746.c
+++ b/drivers/media/i2c/tc358746.c
@@ -1616,6 +1616,16 @@ static void tc358746_remove(struct i2c_client *client)
 	pm_runtime_dont_use_autosuspend(sd->dev);
 }
 
+/*
+ * This function has been created just to avoid a smatch warning,
+ * please do not merge it into tc358746_suspend until you have
+ * confirmed that it does not introduce a new warning.
+ */
+static void tc358746_clk_enable(struct tc358746 *tc358746)
+{
+	clk_prepare_enable(tc358746->refclk);
+}
+
 static int tc358746_suspend(struct device *dev)
 {
 	struct tc358746 *tc358746 = dev_get_drvdata(dev);
@@ -1626,7 +1636,7 @@ static int tc358746_suspend(struct device *dev)
 	err = regulator_bulk_disable(ARRAY_SIZE(tc358746_supplies),
 				     tc358746->supplies);
 	if (err)
-		clk_prepare_enable(tc358746->refclk);
+		tc358746_clk_enable(tc358746);
 
 	return err;
 }

-- 
2.46.0.76.ge559c4bf1a-goog



From ribalda at chromium.org  Tue Aug 13 05:13:52 2024
From: ribalda at chromium.org (Ricardo Ribalda)
Date: Tue, 13 Aug 2024 12:13:52 +0000
Subject: [PATCH 5/6] media: meson: vdec_1: Refactor vdec_1_stop()
In-Reply-To: <20240813-smatch-clock-v1-0-664c84295b1c@chromium.org>
References: <20240813-smatch-clock-v1-0-664c84295b1c@chromium.org>
Message-ID: <20240813-smatch-clock-v1-5-664c84295b1c@chromium.org>

Factor out all the power off logic, except the clk_disable_unprepare(),
to a new function __vdec_1_stop().

This allows vdec_1_start() to explicitly clean-out the clock during the
error-path.

The following smatch warning is fixed:
drivers/staging/media/meson/vdec/vdec_1.c:239 vdec_1_start() warn: 'core->vdec_1_clk' from clk_prepare_enable() not released on lines: 239.

Signed-off-by: Ricardo Ribalda <ribalda at chromium.org>
---
 drivers/staging/media/meson/vdec/vdec_1.c | 16 ++++++++++++----
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/drivers/staging/media/meson/vdec/vdec_1.c b/drivers/staging/media/meson/vdec/vdec_1.c
index 3fe2de0c9331..a65cb4959446 100644
--- a/drivers/staging/media/meson/vdec/vdec_1.c
+++ b/drivers/staging/media/meson/vdec/vdec_1.c
@@ -129,7 +129,7 @@ static u32 vdec_1_vififo_level(struct amvdec_session *sess)
 	return amvdec_read_dos(core, VLD_MEM_VIFIFO_LEVEL);
 }
 
-static int vdec_1_stop(struct amvdec_session *sess)
+static void __vdec_1_stop(struct amvdec_session *sess)
 {
 	struct amvdec_core *core = sess->core;
 	struct amvdec_codec_ops *codec_ops = sess->fmt_out->codec_ops;
@@ -158,10 +158,17 @@ static int vdec_1_stop(struct amvdec_session *sess)
 		regmap_update_bits(core->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
 				   GEN_PWR_VDEC_1, GEN_PWR_VDEC_1);
 
-	clk_disable_unprepare(core->vdec_1_clk);
-
 	if (sess->priv)
 		codec_ops->stop(sess);
+}
+
+static int vdec_1_stop(struct amvdec_session *sess)
+{
+	struct amvdec_core *core = sess->core;
+
+	__vdec_1_stop(sess);
+
+	clk_disable_unprepare(core->vdec_1_clk);
 
 	return 0;
 }
@@ -235,7 +242,8 @@ static int vdec_1_start(struct amvdec_session *sess)
 	return 0;
 
 stop:
-	vdec_1_stop(sess);
+	__vdec_1_stop(sess);
+	clk_disable_unprepare(core->vdec_1_clk);
 	return ret;
 }
 

-- 
2.46.0.76.ge559c4bf1a-goog



From ribalda at chromium.org  Tue Aug 13 05:13:53 2024
From: ribalda at chromium.org (Ricardo Ribalda)
Date: Tue, 13 Aug 2024 12:13:53 +0000
Subject: [PATCH 6/6] media: meson: vdec: hevc: Refactor vdec_hevc_start and
 vdec_hevc_stop
In-Reply-To: <20240813-smatch-clock-v1-0-664c84295b1c@chromium.org>
References: <20240813-smatch-clock-v1-0-664c84295b1c@chromium.org>
Message-ID: <20240813-smatch-clock-v1-6-664c84295b1c@chromium.org>

Make a new function __vdec_hevc_start(), that does all the
initialization, except the clock initialization for G12A and SM1.

Factor out all the stop logic, except the clk_disable_unprepare(), to a
new function __vdec_hevc_stop. This allows vdec_hevc_start() to
explicitly celan-out the clock during the error-path.

The following smatch warnings are fixed:

drivers/staging/media/meson/vdec/vdec_hevc.c:227 vdec_hevc_start() warn: 'core->vdec_hevc_clk' from clk_prepare_enable() not released on lines: 227.
drivers/staging/media/meson/vdec/vdec_hevc.c:227 vdec_hevc_start() warn: 'core->vdec_hevcf_clk' from clk_prepare_enable() not released on lines: 227.

Signed-off-by: Ricardo Ribalda <ribalda at chromium.org>
---
 drivers/staging/media/meson/vdec/vdec_hevc.c | 43 +++++++++++++++++++++-------
 1 file changed, 32 insertions(+), 11 deletions(-)

diff --git a/drivers/staging/media/meson/vdec/vdec_hevc.c b/drivers/staging/media/meson/vdec/vdec_hevc.c
index afced435c907..1939c47def58 100644
--- a/drivers/staging/media/meson/vdec/vdec_hevc.c
+++ b/drivers/staging/media/meson/vdec/vdec_hevc.c
@@ -110,7 +110,7 @@ static u32 vdec_hevc_vififo_level(struct amvdec_session *sess)
 	return readl_relaxed(sess->core->dos_base + HEVC_STREAM_LEVEL);
 }
 
-static int vdec_hevc_stop(struct amvdec_session *sess)
+static void __vdec_hevc_stop(struct amvdec_session *sess)
 {
 	struct amvdec_core *core = sess->core;
 	struct amvdec_codec_ops *codec_ops = sess->fmt_out->codec_ops;
@@ -142,6 +142,13 @@ static int vdec_hevc_stop(struct amvdec_session *sess)
 	else
 		regmap_update_bits(core->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
 				   GEN_PWR_VDEC_HEVC, GEN_PWR_VDEC_HEVC);
+}
+
+static int vdec_hevc_stop(struct amvdec_session *sess)
+{
+	struct amvdec_core *core = sess->core;
+
+	__vdec_hevc_stop(sess);
 
 	clk_disable_unprepare(core->vdec_hevc_clk);
 	if (core->platform->revision == VDEC_REVISION_G12A ||
@@ -151,20 +158,12 @@ static int vdec_hevc_stop(struct amvdec_session *sess)
 	return 0;
 }
 
-static int vdec_hevc_start(struct amvdec_session *sess)
+static int __vdec_hevc_start(struct amvdec_session *sess)
 {
 	int ret;
 	struct amvdec_core *core = sess->core;
 	struct amvdec_codec_ops *codec_ops = sess->fmt_out->codec_ops;
 
-	if (core->platform->revision == VDEC_REVISION_G12A ||
-	    core->platform->revision == VDEC_REVISION_SM1) {
-		clk_set_rate(core->vdec_hevcf_clk, 666666666);
-		ret = clk_prepare_enable(core->vdec_hevcf_clk);
-		if (ret)
-			return ret;
-	}
-
 	clk_set_rate(core->vdec_hevc_clk, 666666666);
 	ret = clk_prepare_enable(core->vdec_hevc_clk);
 	if (ret) {
@@ -223,10 +222,32 @@ static int vdec_hevc_start(struct amvdec_session *sess)
 	return 0;
 
 stop:
-	vdec_hevc_stop(sess);
+	__vdec_hevc_stop(sess);
+	clk_disable_unprepare(core->vdec_hevc_clk);
 	return ret;
 }
 
+static int vdec_hevc_start(struct amvdec_session *sess)
+{
+	struct amvdec_core *core = sess->core;
+	int ret;
+
+	if (core->platform->revision == VDEC_REVISION_G12A ||
+	    core->platform->revision == VDEC_REVISION_SM1) {
+		clk_set_rate(core->vdec_hevcf_clk, 666666666);
+		ret = clk_prepare_enable(core->vdec_hevcf_clk);
+		if (ret)
+			return ret;
+
+		ret = __vdec_hevc_start(sess);
+		if (ret)
+			clk_disable_unprepare(core->vdec_hevcf_clk);
+		return ret;
+	}
+
+	return __vdec_hevc_start(sess);
+}
+
 struct amvdec_ops vdec_hevc_ops = {
 	.start = vdec_hevc_start,
 	.stop = vdec_hevc_stop,

-- 
2.46.0.76.ge559c4bf1a-goog



From dan.carpenter at linaro.org  Tue Aug 13 05:54:35 2024
From: dan.carpenter at linaro.org (Dan Carpenter)
Date: Tue, 13 Aug 2024 15:54:35 +0300
Subject: [PATCH 1/6] media: ar0521: Refactor ar0521_power_off()
In-Reply-To: <20240813-smatch-clock-v1-1-664c84295b1c@chromium.org>
References: <20240813-smatch-clock-v1-0-664c84295b1c@chromium.org>
 <20240813-smatch-clock-v1-1-664c84295b1c@chromium.org>
Message-ID: <ce0ed949-5e57-4193-8190-9e4aa9cb62be@stanley.mountain>

On Tue, Aug 13, 2024 at 12:13:48PM +0000, Ricardo Ribalda wrote:
> Factor out all the power off logic, except the clk_disable_unprepare(),
> to a new function __ar0521_power_off().
> 
> This allows ar0521_power_on() to explicitly clean-out the clock during
> the error-path.
> 
> The following smatch warning is fixed:
> drivers/media/i2c/ar0521.c:912 ar0521_power_on() warn: 'sensor->extclk' from clk_prepare_enable() not released on lines: 912.
> 
> Signed-off-by: Ricardo Ribalda <ribalda at chromium.org>
> ---

It's better to just ignore false positives...  The problem here is that
Smatch can't track that to_ar0521_dev(dev_get_drvdata(dev))->sensor is the same
as sensor.  What I could do is say that "this frees *something* unknown" so
let's silence the warning."

The problem is that check_unwind.c is not very granular.  It just marks things
as allocated and freed.  I could make it more granular so the free and the
alloc have to match.  Or we could match based on the type.  This frees a
"struct ar0521_dev" so mark all those as freed in the caller.

>  drivers/media/i2c/ar0521.c | 15 +++++++++++++--
>  1 file changed, 13 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/media/i2c/ar0521.c b/drivers/media/i2c/ar0521.c
> index 09331cf95c62..2c528db31ba6 100644
> --- a/drivers/media/i2c/ar0521.c
> +++ b/drivers/media/i2c/ar0521.c
> @@ -835,7 +835,7 @@ static const struct initial_reg {
>  	     be(0x0707)), /* 3F44: couple k factor 2 */
>  };
>  
> -static int ar0521_power_off(struct device *dev)
> +static void __ar0521_power_off(struct device *dev)
>  {
>  	struct v4l2_subdev *sd = dev_get_drvdata(dev);
>  	struct ar0521_dev *sensor = to_ar0521_dev(sd);
> @@ -850,6 +850,16 @@ static int ar0521_power_off(struct device *dev)
>  		if (sensor->supplies[i])
>  			regulator_disable(sensor->supplies[i]);
>  	}
> +}
> +
> +static int ar0521_power_off(struct device *dev)
> +{
> +	struct v4l2_subdev *sd = dev_get_drvdata(dev);
> +	struct ar0521_dev *sensor = to_ar0521_dev(sd);
> +
> +	clk_disable_unprepare(sensor->extclk);
> +	__ar0521_power_off(dev);

You had intended to remove the clk_disable_unprepare() from __ar0521_power_off()
but forgot so these are double unprepares.

regards,
dan carpenter

> +
>  	return 0;
>  }
>  
> @@ -908,7 +918,8 @@ static int ar0521_power_on(struct device *dev)
>  
>  	return 0;
>  off:
> -	ar0521_power_off(dev);
> +	clk_disable_unprepare(sensor->extclk);
> +	__ar0521_power_off(dev);
>  	return ret;
>  }
>  
> 
> -- 
> 2.46.0.76.ge559c4bf1a-goog
> 


From dan.carpenter at linaro.org  Tue Aug 13 05:56:59 2024
From: dan.carpenter at linaro.org (Dan Carpenter)
Date: Tue, 13 Aug 2024 15:56:59 +0300
Subject: [PATCH 3/6] media: i2c: s5c73m3: Move clk_prepare to its own
 function
In-Reply-To: <20240813-smatch-clock-v1-3-664c84295b1c@chromium.org>
References: <20240813-smatch-clock-v1-0-664c84295b1c@chromium.org>
 <20240813-smatch-clock-v1-3-664c84295b1c@chromium.org>
Message-ID: <5282172f-f8b4-4706-af30-f5bf9a2a3f8a@stanley.mountain>

On Tue, Aug 13, 2024 at 12:13:50PM +0000, Ricardo Ribalda wrote:
> Smatch is very confused by a clk_prepare_enable() being called in an
> error-path. Fix this warning by moving the clk_prepare_enable() to its
> own function.
> 
> drivers/media/i2c/s5c73m3/s5c73m3-core.c:1425 __s5c73m3_power_off() warn: 'state->clock' from clk_prepare_enable() not released on lines: 1425.
> 
> Signed-off-by: Ricardo Ribalda <ribalda at chromium.org>
> ---

To be honest, maybe I should remove the clk_prepare_enable/disable() from the
check_unwind.c.  Or at least move them into their own check so that I can
tweak this kind of thing more easily.

regards,
dan carpenter



From ribalda at chromium.org  Tue Aug 13 06:01:37 2024
From: ribalda at chromium.org (Ricardo Ribalda)
Date: Tue, 13 Aug 2024 15:01:37 +0200
Subject: [PATCH 1/6] media: ar0521: Refactor ar0521_power_off()
In-Reply-To: <ce0ed949-5e57-4193-8190-9e4aa9cb62be@stanley.mountain>
References: <20240813-smatch-clock-v1-0-664c84295b1c@chromium.org>
 <20240813-smatch-clock-v1-1-664c84295b1c@chromium.org> <ce0ed949-5e57-4193-8190-9e4aa9cb62be@stanley.mountain>
Message-ID: <CANiDSCu6BUdJt1sjmbOq2s4KU1JUN9D+HfnvSG6OqMhD-dKekw@mail.gmail.com>

Hi Dan

On Tue, 13 Aug 2024 at 14:54, Dan Carpenter <dan.carpenter at linaro.org> wrote:
>
> On Tue, Aug 13, 2024 at 12:13:48PM +0000, Ricardo Ribalda wrote:
> > Factor out all the power off logic, except the clk_disable_unprepare(),
> > to a new function __ar0521_power_off().
> >
> > This allows ar0521_power_on() to explicitly clean-out the clock during
> > the error-path.
> >
> > The following smatch warning is fixed:
> > drivers/media/i2c/ar0521.c:912 ar0521_power_on() warn: 'sensor->extclk' from clk_prepare_enable() not released on lines: 912.
> >
> > Signed-off-by: Ricardo Ribalda <ribalda at chromium.org>
> > ---
>
> It's better to just ignore false positives...  The problem here is that
> Smatch can't track that to_ar0521_dev(dev_get_drvdata(dev))->sensor is the same
> as sensor.  What I could do is say that "this frees *something* unknown" so
> let's silence the warning."
>
> The problem is that check_unwind.c is not very granular.  It just marks things
> as allocated and freed.  I could make it more granular so the free and the
> alloc have to match.  Or we could match based on the type.  This frees a
> "struct ar0521_dev" so mark all those as freed in the caller.
>
> >  drivers/media/i2c/ar0521.c | 15 +++++++++++++--
> >  1 file changed, 13 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/media/i2c/ar0521.c b/drivers/media/i2c/ar0521.c
> > index 09331cf95c62..2c528db31ba6 100644
> > --- a/drivers/media/i2c/ar0521.c
> > +++ b/drivers/media/i2c/ar0521.c
> > @@ -835,7 +835,7 @@ static const struct initial_reg {
> >            be(0x0707)), /* 3F44: couple k factor 2 */
> >  };
> >
> > -static int ar0521_power_off(struct device *dev)
> > +static void __ar0521_power_off(struct device *dev)
> >  {
> >       struct v4l2_subdev *sd = dev_get_drvdata(dev);
> >       struct ar0521_dev *sensor = to_ar0521_dev(sd);
> > @@ -850,6 +850,16 @@ static int ar0521_power_off(struct device *dev)
> >               if (sensor->supplies[i])
> >                       regulator_disable(sensor->supplies[i]);
> >       }
> > +}
> > +
> > +static int ar0521_power_off(struct device *dev)
> > +{
> > +     struct v4l2_subdev *sd = dev_get_drvdata(dev);
> > +     struct ar0521_dev *sensor = to_ar0521_dev(sd);
> > +
> > +     clk_disable_unprepare(sensor->extclk);
> > +     __ar0521_power_off(dev);
>
> You had intended to remove the clk_disable_unprepare() from __ar0521_power_off()
> but forgot so these are double unprepares.

Ups, thanks for catching it :)

Will send as v2, unless you fix it in smatch first ;P

Regards!

>
> regards,
> dan carpenter
>
> > +
> >       return 0;
> >  }
> >
> > @@ -908,7 +918,8 @@ static int ar0521_power_on(struct device *dev)
> >
> >       return 0;
> >  off:
> > -     ar0521_power_off(dev);
> > +     clk_disable_unprepare(sensor->extclk);
> > +     __ar0521_power_off(dev);
> >       return ret;
> >  }
> >
> >
> > --
> > 2.46.0.76.ge559c4bf1a-goog
> >



-- 
Ricardo Ribalda


From broonie at kernel.org  Tue Aug 13 07:43:54 2024
From: broonie at kernel.org (Mark Brown)
Date: Tue, 13 Aug 2024 15:43:54 +0100
Subject: [PATCH] ASoC: meson: axg-fifo: fix irq scheduling issue with
 PREEMPT_RT
In-Reply-To: <20240806102707.3825703-1-jbrunet@baylibre.com>
References: <20240806102707.3825703-1-jbrunet@baylibre.com>
Message-ID: <172356023429.57695.4053614993109219592.b4-ty@kernel.org>

On Tue, 06 Aug 2024 12:27:03 +0200, Jerome Brunet wrote:
> With PREEMPT_RT enabled, spinlocks become preemptible.
> This is usually not a problem with spinlocks used in IRQ context since
> IRQ handlers get threaded. However, if IRQF_ONESHOT is set, the upper half
> of a threaded irq handler won't be threaded and this causes scheduling
> problems if spinlocks are used in the upper half, like with regmap when
> '.fast_io' is set.
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next

Thanks!

[1/1] ASoC: meson: axg-fifo: fix irq scheduling issue with PREEMPT_RT
      commit: 5003d0ce5c7da3a02c0aff771f516f99731e7390

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark



From bigeasy at linutronix.de  Tue Aug 13 08:22:43 2024
From: bigeasy at linutronix.de (Sebastian Andrzej Siewior)
Date: Tue, 13 Aug 2024 17:22:43 +0200
Subject: [PATCH] ASoC: meson: axg-fifo: fix irq scheduling issue with
 PREEMPT_RT
In-Reply-To: <172356023429.57695.4053614993109219592.b4-ty@kernel.org>
References: <20240806102707.3825703-1-jbrunet@baylibre.com>
 <172356023429.57695.4053614993109219592.b4-ty@kernel.org>
Message-ID: <20240813152243.2H3-mnx5@linutronix.de>

On 2024-08-13 15:43:54 [+0100], Mark Brown wrote:
> On Tue, 06 Aug 2024 12:27:03 +0200, Jerome Brunet wrote:
> > With PREEMPT_RT enabled, spinlocks become preemptible.
> > This is usually not a problem with spinlocks used in IRQ context since
> > IRQ handlers get threaded. However, if IRQF_ONESHOT is set, the upper half
> > of a threaded irq handler won't be threaded and this causes scheduling
> > problems if spinlocks are used in the upper half, like with regmap when
> > '.fast_io' is set.
> > 
> > [...]
> 
> Applied to
> 
>    https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
> 
> Thanks!
> 
> [1/1] ASoC: meson: axg-fifo: fix irq scheduling issue with PREEMPT_RT
>       commit: 5003d0ce5c7da3a02c0aff771f516f99731e7390

Didn't you already apply v2 of this?

Sebastian


From broonie at kernel.org  Tue Aug 13 10:03:13 2024
From: broonie at kernel.org (Mark Brown)
Date: Tue, 13 Aug 2024 18:03:13 +0100
Subject: [PATCH] ASoC: meson: axg-fifo: fix irq scheduling issue with
 PREEMPT_RT
In-Reply-To: <20240813152243.2H3-mnx5@linutronix.de>
References: <20240806102707.3825703-1-jbrunet@baylibre.com>
 <172356023429.57695.4053614993109219592.b4-ty@kernel.org>
 <20240813152243.2H3-mnx5@linutronix.de>
Message-ID: <1ce67190-0905-4895-af42-13f44b4b638d@sirena.org.uk>

On Tue, Aug 13, 2024 at 05:22:43PM +0200, Sebastian Andrzej Siewior wrote:
> On 2024-08-13 15:43:54 [+0100], Mark Brown wrote:

> > [1/1] ASoC: meson: axg-fifo: fix irq scheduling issue with PREEMPT_RT
> >       commit: 5003d0ce5c7da3a02c0aff771f516f99731e7390

> Didn't you already apply v2 of this?

Perhaps?  There's a decent chance my copy of b4 just didn't spot a
difference between the two versions and acked both.
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From ribalda at chromium.org  Fri Aug 16 05:31:58 2024
From: ribalda at chromium.org (Ricardo Ribalda)
Date: Fri, 16 Aug 2024 12:31:58 +0000
Subject: [PATCH v2 0/6] media: Fix last smatch warnings
Message-ID: <20240816-smatch-clock-v2-0-c63105db07e8@chromium.org>

This series completes the smatch warning cleanout.

Signed-off-by: Ricardo Ribalda <ribalda at chromium.org>
---
Changes in v2:
- Fix double free in ar0251 patch. Thanks Dan!
- Link to v1: https://lore.kernel.org/r/20240813-smatch-clock-v1-0-664c84295b1c at chromium.org

---
Ricardo Ribalda (6):
      media: ar0521: Refactor ar0521_power_off()
      media: i2c: ov5645: Refactor ov5645_set_power_off()
      media: i2c: s5c73m3: Move clk_prepare to its own function
      media: tc358746: Move clk_prepare to its own function
      media: meson: vdec_1: Refactor vdec_1_stop()
      media: meson: vdec: hevc: Refactor vdec_hevc_start and vdec_hevc_stop

 drivers/media/i2c/ar0521.c                   | 17 ++++++++---
 drivers/media/i2c/ov5645.c                   | 15 ++++++++--
 drivers/media/i2c/s5c73m3/s5c73m3-core.c     | 13 ++++++++-
 drivers/media/i2c/tc358746.c                 | 12 +++++++-
 drivers/staging/media/meson/vdec/vdec_1.c    | 16 ++++++++---
 drivers/staging/media/meson/vdec/vdec_hevc.c | 43 +++++++++++++++++++++-------
 6 files changed, 92 insertions(+), 24 deletions(-)
---
base-commit: c80bfa4f9e0ebfce6ac909488d412347acbcb4f9
change-id: 20240813-smatch-clock-2fa3b1174857

Best regards,
-- 
Ricardo Ribalda <ribalda at chromium.org>



From ribalda at chromium.org  Fri Aug 16 05:32:00 2024
From: ribalda at chromium.org (Ricardo Ribalda)
Date: Fri, 16 Aug 2024 12:32:00 +0000
Subject: [PATCH v2 2/6] media: i2c: ov5645: Refactor ov5645_set_power_off()
In-Reply-To: <20240816-smatch-clock-v2-0-c63105db07e8@chromium.org>
References: <20240816-smatch-clock-v2-0-c63105db07e8@chromium.org>
Message-ID: <20240816-smatch-clock-v2-2-c63105db07e8@chromium.org>

Factor out all the power off logic, except clk_disable_unprepare(), to a
new function __ov5645_set_power_off().

This allows ov5645_set_power_on() to excplicitly clean-out the clock
during the error-path.

The following smatch warning is fixed:
drivers/media/i2c/ov5645.c:690 ov5645_set_power_on() warn: 'ov5645->xclk' from clk_prepare_enable() not released on lines: 690.

Signed-off-by: Ricardo Ribalda <ribalda at chromium.org>
---
 drivers/media/i2c/ov5645.c | 15 ++++++++++++---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/drivers/media/i2c/ov5645.c b/drivers/media/i2c/ov5645.c
index 6c2d221f6973..0c32bd2940ec 100644
--- a/drivers/media/i2c/ov5645.c
+++ b/drivers/media/i2c/ov5645.c
@@ -635,7 +635,7 @@ static int ov5645_set_register_array(struct ov5645 *ov5645,
 	return 0;
 }
 
-static int ov5645_set_power_off(struct device *dev)
+static void __ov5645_set_power_off(struct device *dev)
 {
 	struct v4l2_subdev *sd = dev_get_drvdata(dev);
 	struct ov5645 *ov5645 = to_ov5645(sd);
@@ -643,8 +643,16 @@ static int ov5645_set_power_off(struct device *dev)
 	ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x58);
 	gpiod_set_value_cansleep(ov5645->rst_gpio, 1);
 	gpiod_set_value_cansleep(ov5645->enable_gpio, 0);
-	clk_disable_unprepare(ov5645->xclk);
 	regulator_bulk_disable(OV5645_NUM_SUPPLIES, ov5645->supplies);
+}
+
+static int ov5645_set_power_off(struct device *dev)
+{
+	struct v4l2_subdev *sd = dev_get_drvdata(dev);
+	struct ov5645 *ov5645 = to_ov5645(sd);
+
+	__ov5645_set_power_off(dev);
+	clk_disable_unprepare(ov5645->xclk);
 
 	return 0;
 }
@@ -686,7 +694,8 @@ static int ov5645_set_power_on(struct device *dev)
 	return 0;
 
 exit:
-	ov5645_set_power_off(dev);
+	__ov5645_set_power_off(dev);
+	clk_disable_unprepare(ov5645->xclk);
 	return ret;
 }
 

-- 
2.46.0.184.g6999bdac58-goog



From ribalda at chromium.org  Fri Aug 16 05:31:59 2024
From: ribalda at chromium.org (Ricardo Ribalda)
Date: Fri, 16 Aug 2024 12:31:59 +0000
Subject: [PATCH v2 1/6] media: ar0521: Refactor ar0521_power_off()
In-Reply-To: <20240816-smatch-clock-v2-0-c63105db07e8@chromium.org>
References: <20240816-smatch-clock-v2-0-c63105db07e8@chromium.org>
Message-ID: <20240816-smatch-clock-v2-1-c63105db07e8@chromium.org>

Factor out all the power off logic, except the clk_disable_unprepare(),
to a new function __ar0521_power_off().

This allows ar0521_power_on() to explicitly clean-out the clock during
the error-path.

The following smatch warning is fixed:
drivers/media/i2c/ar0521.c:912 ar0521_power_on() warn: 'sensor->extclk' from clk_prepare_enable() not released on lines: 912.

Signed-off-by: Ricardo Ribalda <ribalda at chromium.org>
---
 drivers/media/i2c/ar0521.c | 17 +++++++++++++----
 1 file changed, 13 insertions(+), 4 deletions(-)

diff --git a/drivers/media/i2c/ar0521.c b/drivers/media/i2c/ar0521.c
index 09331cf95c62..56a724b4d47e 100644
--- a/drivers/media/i2c/ar0521.c
+++ b/drivers/media/i2c/ar0521.c
@@ -835,14 +835,12 @@ static const struct initial_reg {
 	     be(0x0707)), /* 3F44: couple k factor 2 */
 };
 
-static int ar0521_power_off(struct device *dev)
+static void __ar0521_power_off(struct device *dev)
 {
 	struct v4l2_subdev *sd = dev_get_drvdata(dev);
 	struct ar0521_dev *sensor = to_ar0521_dev(sd);
 	int i;
 
-	clk_disable_unprepare(sensor->extclk);
-
 	if (sensor->reset_gpio)
 		gpiod_set_value(sensor->reset_gpio, 1); /* assert RESET signal */
 
@@ -850,6 +848,16 @@ static int ar0521_power_off(struct device *dev)
 		if (sensor->supplies[i])
 			regulator_disable(sensor->supplies[i]);
 	}
+}
+
+static int ar0521_power_off(struct device *dev)
+{
+	struct v4l2_subdev *sd = dev_get_drvdata(dev);
+	struct ar0521_dev *sensor = to_ar0521_dev(sd);
+
+	clk_disable_unprepare(sensor->extclk);
+	__ar0521_power_off(dev);
+
 	return 0;
 }
 
@@ -908,7 +916,8 @@ static int ar0521_power_on(struct device *dev)
 
 	return 0;
 off:
-	ar0521_power_off(dev);
+	clk_disable_unprepare(sensor->extclk);
+	__ar0521_power_off(dev);
 	return ret;
 }
 

-- 
2.46.0.184.g6999bdac58-goog



From ribalda at chromium.org  Fri Aug 16 05:32:04 2024
From: ribalda at chromium.org (Ricardo Ribalda)
Date: Fri, 16 Aug 2024 12:32:04 +0000
Subject: [PATCH v2 6/6] media: meson: vdec: hevc: Refactor vdec_hevc_start
 and vdec_hevc_stop
In-Reply-To: <20240816-smatch-clock-v2-0-c63105db07e8@chromium.org>
References: <20240816-smatch-clock-v2-0-c63105db07e8@chromium.org>
Message-ID: <20240816-smatch-clock-v2-6-c63105db07e8@chromium.org>

Make a new function __vdec_hevc_start(), that does all the
initialization, except the clock initialization for G12A and SM1.

Factor out all the stop logic, except the clk_disable_unprepare(), to a
new function __vdec_hevc_stop. This allows vdec_hevc_start() to
explicitly celan-out the clock during the error-path.

The following smatch warnings are fixed:

drivers/staging/media/meson/vdec/vdec_hevc.c:227 vdec_hevc_start() warn: 'core->vdec_hevc_clk' from clk_prepare_enable() not released on lines: 227.
drivers/staging/media/meson/vdec/vdec_hevc.c:227 vdec_hevc_start() warn: 'core->vdec_hevcf_clk' from clk_prepare_enable() not released on lines: 227.

Signed-off-by: Ricardo Ribalda <ribalda at chromium.org>
---
 drivers/staging/media/meson/vdec/vdec_hevc.c | 43 +++++++++++++++++++++-------
 1 file changed, 32 insertions(+), 11 deletions(-)

diff --git a/drivers/staging/media/meson/vdec/vdec_hevc.c b/drivers/staging/media/meson/vdec/vdec_hevc.c
index afced435c907..1939c47def58 100644
--- a/drivers/staging/media/meson/vdec/vdec_hevc.c
+++ b/drivers/staging/media/meson/vdec/vdec_hevc.c
@@ -110,7 +110,7 @@ static u32 vdec_hevc_vififo_level(struct amvdec_session *sess)
 	return readl_relaxed(sess->core->dos_base + HEVC_STREAM_LEVEL);
 }
 
-static int vdec_hevc_stop(struct amvdec_session *sess)
+static void __vdec_hevc_stop(struct amvdec_session *sess)
 {
 	struct amvdec_core *core = sess->core;
 	struct amvdec_codec_ops *codec_ops = sess->fmt_out->codec_ops;
@@ -142,6 +142,13 @@ static int vdec_hevc_stop(struct amvdec_session *sess)
 	else
 		regmap_update_bits(core->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
 				   GEN_PWR_VDEC_HEVC, GEN_PWR_VDEC_HEVC);
+}
+
+static int vdec_hevc_stop(struct amvdec_session *sess)
+{
+	struct amvdec_core *core = sess->core;
+
+	__vdec_hevc_stop(sess);
 
 	clk_disable_unprepare(core->vdec_hevc_clk);
 	if (core->platform->revision == VDEC_REVISION_G12A ||
@@ -151,20 +158,12 @@ static int vdec_hevc_stop(struct amvdec_session *sess)
 	return 0;
 }
 
-static int vdec_hevc_start(struct amvdec_session *sess)
+static int __vdec_hevc_start(struct amvdec_session *sess)
 {
 	int ret;
 	struct amvdec_core *core = sess->core;
 	struct amvdec_codec_ops *codec_ops = sess->fmt_out->codec_ops;
 
-	if (core->platform->revision == VDEC_REVISION_G12A ||
-	    core->platform->revision == VDEC_REVISION_SM1) {
-		clk_set_rate(core->vdec_hevcf_clk, 666666666);
-		ret = clk_prepare_enable(core->vdec_hevcf_clk);
-		if (ret)
-			return ret;
-	}
-
 	clk_set_rate(core->vdec_hevc_clk, 666666666);
 	ret = clk_prepare_enable(core->vdec_hevc_clk);
 	if (ret) {
@@ -223,10 +222,32 @@ static int vdec_hevc_start(struct amvdec_session *sess)
 	return 0;
 
 stop:
-	vdec_hevc_stop(sess);
+	__vdec_hevc_stop(sess);
+	clk_disable_unprepare(core->vdec_hevc_clk);
 	return ret;
 }
 
+static int vdec_hevc_start(struct amvdec_session *sess)
+{
+	struct amvdec_core *core = sess->core;
+	int ret;
+
+	if (core->platform->revision == VDEC_REVISION_G12A ||
+	    core->platform->revision == VDEC_REVISION_SM1) {
+		clk_set_rate(core->vdec_hevcf_clk, 666666666);
+		ret = clk_prepare_enable(core->vdec_hevcf_clk);
+		if (ret)
+			return ret;
+
+		ret = __vdec_hevc_start(sess);
+		if (ret)
+			clk_disable_unprepare(core->vdec_hevcf_clk);
+		return ret;
+	}
+
+	return __vdec_hevc_start(sess);
+}
+
 struct amvdec_ops vdec_hevc_ops = {
 	.start = vdec_hevc_start,
 	.stop = vdec_hevc_stop,

-- 
2.46.0.184.g6999bdac58-goog



From ribalda at chromium.org  Fri Aug 16 05:32:01 2024
From: ribalda at chromium.org (Ricardo Ribalda)
Date: Fri, 16 Aug 2024 12:32:01 +0000
Subject: [PATCH v2 3/6] media: i2c: s5c73m3: Move clk_prepare to its own
 function
In-Reply-To: <20240816-smatch-clock-v2-0-c63105db07e8@chromium.org>
References: <20240816-smatch-clock-v2-0-c63105db07e8@chromium.org>
Message-ID: <20240816-smatch-clock-v2-3-c63105db07e8@chromium.org>

Smatch is very confused by a clk_prepare_enable() being called in an
error-path. Fix this warning by moving the clk_prepare_enable() to its
own function.

drivers/media/i2c/s5c73m3/s5c73m3-core.c:1425 __s5c73m3_power_off() warn: 'state->clock' from clk_prepare_enable() not released on lines: 1425.

Signed-off-by: Ricardo Ribalda <ribalda at chromium.org>
---
 drivers/media/i2c/s5c73m3/s5c73m3-core.c | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/drivers/media/i2c/s5c73m3/s5c73m3-core.c b/drivers/media/i2c/s5c73m3/s5c73m3-core.c
index e89e888f028e..7716dfe2b8c9 100644
--- a/drivers/media/i2c/s5c73m3/s5c73m3-core.c
+++ b/drivers/media/i2c/s5c73m3/s5c73m3-core.c
@@ -1392,6 +1392,16 @@ static int __s5c73m3_power_on(struct s5c73m3 *state)
 	return ret;
 }
 
+/*
+ * This function has been created just to avoid a smatch warning,
+ * please do not merge into __s5c73m3_power_off() until you have
+ * confirmed that it does not introduce a new warning.
+ */
+static void s5c73m3_enable_clk(struct s5c73m3 *state)
+{
+	clk_prepare_enable(state->clock);
+}
+
 static int __s5c73m3_power_off(struct s5c73m3 *state)
 {
 	int i, ret;
@@ -1421,7 +1431,8 @@ static int __s5c73m3_power_off(struct s5c73m3 *state)
 				 state->supplies[i].supply, r);
 	}
 
-	clk_prepare_enable(state->clock);
+	s5c73m3_enable_clk(state);
+
 	return ret;
 }
 

-- 
2.46.0.184.g6999bdac58-goog



From ribalda at chromium.org  Fri Aug 16 05:32:02 2024
From: ribalda at chromium.org (Ricardo Ribalda)
Date: Fri, 16 Aug 2024 12:32:02 +0000
Subject: [PATCH v2 4/6] media: tc358746: Move clk_prepare to its own
 function
In-Reply-To: <20240816-smatch-clock-v2-0-c63105db07e8@chromium.org>
References: <20240816-smatch-clock-v2-0-c63105db07e8@chromium.org>
Message-ID: <20240816-smatch-clock-v2-4-c63105db07e8@chromium.org>

Smatch is very confused by a clk_prepare_enable() being called in an
error-path. Fix this warning by moving the clk_prepare_enable() to its
own function.

drivers/media/i2c/tc358746.c:1631 tc358746_suspend() warn: 'tc358746->refclk' from clk_prepare_enable() not released on lines: 1631.

Signed-off-by: Ricardo Ribalda <ribalda at chromium.org>
---
 drivers/media/i2c/tc358746.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/media/i2c/tc358746.c b/drivers/media/i2c/tc358746.c
index edf79107adc5..389582420ba7 100644
--- a/drivers/media/i2c/tc358746.c
+++ b/drivers/media/i2c/tc358746.c
@@ -1616,6 +1616,16 @@ static void tc358746_remove(struct i2c_client *client)
 	pm_runtime_dont_use_autosuspend(sd->dev);
 }
 
+/*
+ * This function has been created just to avoid a smatch warning,
+ * please do not merge it into tc358746_suspend until you have
+ * confirmed that it does not introduce a new warning.
+ */
+static void tc358746_clk_enable(struct tc358746 *tc358746)
+{
+	clk_prepare_enable(tc358746->refclk);
+}
+
 static int tc358746_suspend(struct device *dev)
 {
 	struct tc358746 *tc358746 = dev_get_drvdata(dev);
@@ -1626,7 +1636,7 @@ static int tc358746_suspend(struct device *dev)
 	err = regulator_bulk_disable(ARRAY_SIZE(tc358746_supplies),
 				     tc358746->supplies);
 	if (err)
-		clk_prepare_enable(tc358746->refclk);
+		tc358746_clk_enable(tc358746);
 
 	return err;
 }

-- 
2.46.0.184.g6999bdac58-goog



From ribalda at chromium.org  Fri Aug 16 05:32:03 2024
From: ribalda at chromium.org (Ricardo Ribalda)
Date: Fri, 16 Aug 2024 12:32:03 +0000
Subject: [PATCH v2 5/6] media: meson: vdec_1: Refactor vdec_1_stop()
In-Reply-To: <20240816-smatch-clock-v2-0-c63105db07e8@chromium.org>
References: <20240816-smatch-clock-v2-0-c63105db07e8@chromium.org>
Message-ID: <20240816-smatch-clock-v2-5-c63105db07e8@chromium.org>

Factor out all the power off logic, except the clk_disable_unprepare(),
to a new function __vdec_1_stop().

This allows vdec_1_start() to explicitly clean-out the clock during the
error-path.

The following smatch warning is fixed:
drivers/staging/media/meson/vdec/vdec_1.c:239 vdec_1_start() warn: 'core->vdec_1_clk' from clk_prepare_enable() not released on lines: 239.

Signed-off-by: Ricardo Ribalda <ribalda at chromium.org>
---
 drivers/staging/media/meson/vdec/vdec_1.c | 16 ++++++++++++----
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/drivers/staging/media/meson/vdec/vdec_1.c b/drivers/staging/media/meson/vdec/vdec_1.c
index 3fe2de0c9331..a65cb4959446 100644
--- a/drivers/staging/media/meson/vdec/vdec_1.c
+++ b/drivers/staging/media/meson/vdec/vdec_1.c
@@ -129,7 +129,7 @@ static u32 vdec_1_vififo_level(struct amvdec_session *sess)
 	return amvdec_read_dos(core, VLD_MEM_VIFIFO_LEVEL);
 }
 
-static int vdec_1_stop(struct amvdec_session *sess)
+static void __vdec_1_stop(struct amvdec_session *sess)
 {
 	struct amvdec_core *core = sess->core;
 	struct amvdec_codec_ops *codec_ops = sess->fmt_out->codec_ops;
@@ -158,10 +158,17 @@ static int vdec_1_stop(struct amvdec_session *sess)
 		regmap_update_bits(core->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
 				   GEN_PWR_VDEC_1, GEN_PWR_VDEC_1);
 
-	clk_disable_unprepare(core->vdec_1_clk);
-
 	if (sess->priv)
 		codec_ops->stop(sess);
+}
+
+static int vdec_1_stop(struct amvdec_session *sess)
+{
+	struct amvdec_core *core = sess->core;
+
+	__vdec_1_stop(sess);
+
+	clk_disable_unprepare(core->vdec_1_clk);
 
 	return 0;
 }
@@ -235,7 +242,8 @@ static int vdec_1_start(struct amvdec_session *sess)
 	return 0;
 
 stop:
-	vdec_1_stop(sess);
+	__vdec_1_stop(sess);
+	clk_disable_unprepare(core->vdec_1_clk);
 	return ret;
 }
 

-- 
2.46.0.184.g6999bdac58-goog



From martin.blumenstingl at googlemail.com  Fri Aug 16 12:55:37 2024
From: martin.blumenstingl at googlemail.com (Martin Blumenstingl)
Date: Fri, 16 Aug 2024 21:55:37 +0200
Subject: [PATCH] drm/meson: add check to prevent dereference of NULL
In-Reply-To: <bb45ed80-7871-47ba-a1fd-ee71dc21a409@astralinux.ru>
References: <20240809124725.17956-1-abelova@astralinux.ru> <CAFBinCATiUnR=P9VRBxWeQhf49k6PVxK+nU95G7w94f-mR2HWQ@mail.gmail.com>
 <bb45ed80-7871-47ba-a1fd-ee71dc21a409@astralinux.ru>
Message-ID: <CAFBinCCW6E46+cMUC0M+n_4d7A6AhoJkQT=EHBxOD5wjn9O1hw@mail.gmail.com>

Hello Anastasia,

On Mon, Aug 12, 2024 at 11:32?AM Anastasia Belova <abelova at astralinux.ru> wrote:
[...]
> > As an alternative to your suggested approach: could you please look
> > into whether devm_drm_dev_alloc() is a suitable replacement (if not:
> > just explain why - then this patch is good to be merged)?
>
> If I understood correctly, devm_drm_dev_alloc allows to delete drm_dev_put
> from error path in meson_drv_bind_master and in meson_drv_unbind.
Correct, that's the idea.

> Then the proposed check may be ommited and function may just return
> instead of jumping to free_drm.
That's right

> And would it be better to rename free_drm to remove_encoders?
That free_drm label is very confusing anyways.
The short answer is: yes
The longer answer is: we'll need to work on the removal order again:
- encoders are probed *after* afbcd
- removal should happen in opposite order of probe, so encoders should
be freed *before* afbcd
- however, this order is not implemented

There's no harm for you to rename the label now. It just means that we
need to do some more cleanups.

Looking forward to v2 of the patch!


Best regards,
Martin


From neil.armstrong at linaro.org  Mon Aug 19 08:55:37 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Mon, 19 Aug 2024 17:55:37 +0200
Subject: [PATCH v3 1/9] reset: amlogic: convert driver to regmap
In-Reply-To: <20240808102742.4095904-2-jbrunet@baylibre.com>
References: <20240808102742.4095904-1-jbrunet@baylibre.com>
 <20240808102742.4095904-2-jbrunet@baylibre.com>
Message-ID: <7c598260-513a-4aad-962f-34e5de6731dd@linaro.org>

On 08/08/2024 12:27, Jerome Brunet wrote:
> To allow using the same driver for the main reset controller and the
> auxiliary ones embedded in the clock controllers, convert the
> the Amlogic reset driver to regmap.
> 
> Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
> ---
>   drivers/reset/reset-meson.c | 79 ++++++++++++++++++++-----------------
>   1 file changed, 43 insertions(+), 36 deletions(-)
> 
> diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c
> index f78be97898bc..b47431a21b86 100644
> --- a/drivers/reset/reset-meson.c
> +++ b/drivers/reset/reset-meson.c
> @@ -11,36 +11,43 @@
>   #include <linux/of.h>
>   #include <linux/module.h>
>   #include <linux/platform_device.h>
> +#include <linux/regmap.h>
>   #include <linux/reset-controller.h>
>   #include <linux/slab.h>
>   #include <linux/types.h>
>   
> -#define BITS_PER_REG	32
> -
>   struct meson_reset_param {
>   	int reg_count;
>   	int level_offset;
>   };
>   
>   struct meson_reset {
> -	void __iomem *reg_base;
>   	const struct meson_reset_param *param;
>   	struct reset_controller_dev rcdev;
> -	spinlock_t lock;
> +	struct regmap *map;
>   };
>   
> +static void meson_reset_offset_and_bit(struct meson_reset *data,
> +				       unsigned long id,
> +				       unsigned int *offset,
> +				       unsigned int *bit)
> +{
> +	unsigned int stride = regmap_get_reg_stride(data->map);
> +
> +	*offset = (id / (stride * BITS_PER_BYTE)) * stride;
> +	*bit = id % (stride * BITS_PER_BYTE);
> +}
> +
>   static int meson_reset_reset(struct reset_controller_dev *rcdev,
> -			      unsigned long id)
> +			     unsigned long id)
>   {
>   	struct meson_reset *data =
>   		container_of(rcdev, struct meson_reset, rcdev);
> -	unsigned int bank = id / BITS_PER_REG;
> -	unsigned int offset = id % BITS_PER_REG;
> -	void __iomem *reg_addr = data->reg_base + (bank << 2);
> +	unsigned int offset, bit;
>   
> -	writel(BIT(offset), reg_addr);
> +	meson_reset_offset_and_bit(data, id, &offset, &bit);
>   
> -	return 0;
> +	return regmap_write(data->map, offset, BIT(bit));
>   }
>   
>   static int meson_reset_level(struct reset_controller_dev *rcdev,
> @@ -48,25 +55,13 @@ static int meson_reset_level(struct reset_controller_dev *rcdev,
>   {
>   	struct meson_reset *data =
>   		container_of(rcdev, struct meson_reset, rcdev);
> -	unsigned int bank = id / BITS_PER_REG;
> -	unsigned int offset = id % BITS_PER_REG;
> -	void __iomem *reg_addr;
> -	unsigned long flags;
> -	u32 reg;
> +	unsigned int offset, bit;
>   
> -	reg_addr = data->reg_base + data->param->level_offset + (bank << 2);
> +	meson_reset_offset_and_bit(data, id, &offset, &bit);
> +	offset += data->param->level_offset;
>   
> -	spin_lock_irqsave(&data->lock, flags);
> -
> -	reg = readl(reg_addr);
> -	if (assert)
> -		writel(reg & ~BIT(offset), reg_addr);
> -	else
> -		writel(reg | BIT(offset), reg_addr);
> -
> -	spin_unlock_irqrestore(&data->lock, flags);
> -
> -	return 0;
> +	return regmap_update_bits(data->map, offset,
> +				  BIT(bit), assert ? 0 : BIT(bit));
>   }
>   
>   static int meson_reset_assert(struct reset_controller_dev *rcdev,
> @@ -113,30 +108,42 @@ static const struct of_device_id meson_reset_dt_ids[] = {
>   };
>   MODULE_DEVICE_TABLE(of, meson_reset_dt_ids);
>   
> +static const struct regmap_config regmap_config = {
> +	.reg_bits   = 32,
> +	.val_bits   = 32,
> +	.reg_stride = 4,
> +};
> +
>   static int meson_reset_probe(struct platform_device *pdev)
>   {
> +	struct device *dev = &pdev->dev;
>   	struct meson_reset *data;
> +	void __iomem *base;
>   
> -	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
> +	data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
>   	if (!data)
>   		return -ENOMEM;
>   
> -	data->reg_base = devm_platform_ioremap_resource(pdev, 0);
> -	if (IS_ERR(data->reg_base))
> -		return PTR_ERR(data->reg_base);
> +	base = devm_platform_ioremap_resource(pdev, 0);
> +	if (IS_ERR(base))
> +		return PTR_ERR(base);
>   
> -	data->param = of_device_get_match_data(&pdev->dev);
> +	data->param = of_device_get_match_data(dev);
>   	if (!data->param)
>   		return -ENODEV;
>   
> -	spin_lock_init(&data->lock);
> +	data->map = devm_regmap_init_mmio(dev, base, &regmap_config);
> +	if (IS_ERR(data->map))
> +		return dev_err_probe(dev, PTR_ERR(data->map),
> +				     "can't init regmap mmio region\n");
>   
>   	data->rcdev.owner = THIS_MODULE;
> -	data->rcdev.nr_resets = data->param->reg_count * BITS_PER_REG;
> +	data->rcdev.nr_resets = data->param->reg_count * BITS_PER_BYTE
> +		* regmap_config.reg_stride;
>   	data->rcdev.ops = &meson_reset_ops;
> -	data->rcdev.of_node = pdev->dev.of_node;
> +	data->rcdev.of_node = dev->of_node;
>   
> -	return devm_reset_controller_register(&pdev->dev, &data->rcdev);
> +	return devm_reset_controller_register(dev, &data->rcdev);
>   }
>   
>   static struct platform_driver meson_reset_driver = {

Reviewed-by: Neil Armstrong <neil.armstrong at linaro.org>


From neil.armstrong at linaro.org  Mon Aug 19 08:57:40 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Mon, 19 Aug 2024 17:57:40 +0200
Subject: [PATCH v3 4/9] reset: amlogic: add driver parameters
In-Reply-To: <20240808102742.4095904-5-jbrunet@baylibre.com>
References: <20240808102742.4095904-1-jbrunet@baylibre.com>
 <20240808102742.4095904-5-jbrunet@baylibre.com>
Message-ID: <614de1b0-fcaf-457c-9183-1f3cd7f91b38@linaro.org>

On 08/08/2024 12:27, Jerome Brunet wrote:
> To allow using the same driver for the main reset controller and the
> auxiliary ones embedded in the clock controllers, allow to customise
> the reset offset, same as the level offset. Also add an option to make
> the level reset active low or high.
> 
> Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
> ---
>   drivers/reset/reset-meson.c | 12 +++++++++++-
>   1 file changed, 11 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c
> index 460ad2f8360f..8addd100e601 100644
> --- a/drivers/reset/reset-meson.c
> +++ b/drivers/reset/reset-meson.c
> @@ -18,7 +18,9 @@
>   
>   struct meson_reset_param {
>   	unsigned int reg_count;
> +	unsigned int reset_offset;
>   	unsigned int level_offset;
> +	bool level_low_reset;
>   };
>   
>   struct meson_reset {
> @@ -46,6 +48,7 @@ static int meson_reset_reset(struct reset_controller_dev *rcdev,
>   	unsigned int offset, bit;
>   
>   	meson_reset_offset_and_bit(data, id, &offset, &bit);
> +	offset += data->param->reset_offset;
>   
>   	return regmap_write(data->map, offset, BIT(bit));
>   }
> @@ -59,9 +62,10 @@ static int meson_reset_level(struct reset_controller_dev *rcdev,
>   
>   	meson_reset_offset_and_bit(data, id, &offset, &bit);
>   	offset += data->param->level_offset;
> +	assert ^= data->param->level_low_reset;
>   
>   	return regmap_update_bits(data->map, offset,
> -				  BIT(bit), assert ? 0 : BIT(bit));
> +				  BIT(bit), assert ? BIT(bit) : 0);
>   }
>   
>   static int meson_reset_assert(struct reset_controller_dev *rcdev,
> @@ -84,17 +88,23 @@ static const struct reset_control_ops meson_reset_ops = {
>   
>   static const struct meson_reset_param meson8b_param = {
>   	.reg_count	= 8,
> +	.reset_offset	= 0x0,
>   	.level_offset	= 0x7c,
> +	.level_low_reset = true,
>   };
>   
>   static const struct meson_reset_param meson_a1_param = {
>   	.reg_count	= 3,
> +	.reset_offset	= 0x0,
>   	.level_offset	= 0x40,
> +	.level_low_reset = true,
>   };
>   
>   static const struct meson_reset_param meson_s4_param = {
>   	.reg_count	= 6,
> +	.reset_offset	= 0x0,
>   	.level_offset	= 0x40,
> +	.level_low_reset = true,

Just a comment, I would rather leave the "default" users of this driver with the default value
and use level_high_reset = true for the clock ones

Neil

>   };
>   
>   static const struct of_device_id meson_reset_dt_ids[] = {



From neil.armstrong at linaro.org  Mon Aug 19 09:01:04 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Mon, 19 Aug 2024 18:01:04 +0200
Subject: [PATCH 1/9] drm/meson: hdmi: move encoder settings out of phy
 driver
In-Reply-To: <20240730125023.710237-2-jbrunet@baylibre.com>
References: <20240730125023.710237-1-jbrunet@baylibre.com>
 <20240730125023.710237-2-jbrunet@baylibre.com>
Message-ID: <fa8e151f-a8c7-44fe-a8bf-949d5900112d@linaro.org>

On 30/07/2024 14:50, Jerome Brunet wrote:
> This relocates register pokes of the HDMI VPU encoder out of the
> HDMI phy driver. As far as HDMI is concerned, the sequence in which
> the setup is done remains mostly the same.
> 
> This was tested with modetest, cycling through the following resolutions:
>    #0 3840x2160 60.00
>    #1 3840x2160 59.94
>    #2 3840x2160 50.00
>    #3 3840x2160 30.00
>    #4 3840x2160 29.97
>    #5 3840x2160 25.00
>    #6 3840x2160 24.00
>    #7 3840x2160 23.98
>    #8 1920x1080 60.00
>    #9 1920x1080 60.00
>    #10 1920x1080 59.94
>    #11 1920x1080i 30.00
>    #12 1920x1080i 29.97
>    #13 1920x1080 50.00
>    #14 1920x1080i 25.00
>    #15 1920x1080 30.00
>    #16 1920x1080 29.97
>    #17 1920x1080 25.00
>    #18 1920x1080 24.00
>    #19 1920x1080 23.98
>    #20 1280x1024 60.02
>    #21 1152x864 59.97
>    #22 1280x720 60.00
>    #23 1280x720 59.94
>    #24 1280x720 50.00
>    #25 1024x768 60.00
>    #26 800x600 60.32
>    #27 720x576 50.00
>    #28 720x480 59.94
> 
> No regression to report.
> 
> This is part of an effort to clean up Amlogic HDMI related drivers which
> should eventually allow to stop using the component API and HHI syscon.
> 
> Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
> ---
>   drivers/gpu/drm/meson/meson_dw_hdmi.c      | 38 ----------------------
>   drivers/gpu/drm/meson/meson_encoder_hdmi.c | 16 +++++++++
>   2 files changed, 16 insertions(+), 38 deletions(-)
> 
> diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c
> index 5565f7777529..bcf4f83582f2 100644
> --- a/drivers/gpu/drm/meson/meson_dw_hdmi.c
> +++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c
> @@ -115,12 +115,6 @@
>   
>   static DEFINE_SPINLOCK(reg_lock);
>   
> -enum meson_venc_source {
> -	MESON_VENC_SOURCE_NONE = 0,
> -	MESON_VENC_SOURCE_ENCI = 1,
> -	MESON_VENC_SOURCE_ENCP = 2,
> -};
> -
>   struct meson_dw_hdmi;
>   
>   struct meson_dw_hdmi_data {
> @@ -376,8 +370,6 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data,
>   	struct meson_dw_hdmi *dw_hdmi = (struct meson_dw_hdmi *)data;
>   	bool is_hdmi2_sink = display->hdmi.scdc.supported;
>   	struct meson_drm *priv = dw_hdmi->priv;
> -	unsigned int wr_clk =
> -		readl_relaxed(priv->io_base + _REG(VPU_HDMI_SETTING));
>   	bool mode_is_420 = false;
>   
>   	DRM_DEBUG_DRIVER("\"%s\" div%d\n", mode->name,
> @@ -421,36 +413,6 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data,
>   	meson_dw_hdmi_phy_reset(dw_hdmi);
>   	meson_dw_hdmi_phy_reset(dw_hdmi);
>   
> -	/* Temporary Disable VENC video stream */
> -	if (priv->venc.hdmi_use_enci)
> -		writel_relaxed(0, priv->io_base + _REG(ENCI_VIDEO_EN));
> -	else
> -		writel_relaxed(0, priv->io_base + _REG(ENCP_VIDEO_EN));
> -
> -	/* Temporary Disable HDMI video stream to HDMI-TX */
> -	writel_bits_relaxed(0x3, 0,
> -			    priv->io_base + _REG(VPU_HDMI_SETTING));
> -	writel_bits_relaxed(0xf << 8, 0,
> -			    priv->io_base + _REG(VPU_HDMI_SETTING));
> -
> -	/* Re-Enable VENC video stream */
> -	if (priv->venc.hdmi_use_enci)
> -		writel_relaxed(1, priv->io_base + _REG(ENCI_VIDEO_EN));
> -	else
> -		writel_relaxed(1, priv->io_base + _REG(ENCP_VIDEO_EN));
> -
> -	/* Push back HDMI clock settings */
> -	writel_bits_relaxed(0xf << 8, wr_clk & (0xf << 8),
> -			    priv->io_base + _REG(VPU_HDMI_SETTING));
> -
> -	/* Enable and Select HDMI video source for HDMI-TX */
> -	if (priv->venc.hdmi_use_enci)
> -		writel_bits_relaxed(0x3, MESON_VENC_SOURCE_ENCI,
> -				    priv->io_base + _REG(VPU_HDMI_SETTING));
> -	else
> -		writel_bits_relaxed(0x3, MESON_VENC_SOURCE_ENCP,
> -				    priv->io_base + _REG(VPU_HDMI_SETTING));
> -
>   	return 0;
>   }
>   
> diff --git a/drivers/gpu/drm/meson/meson_encoder_hdmi.c b/drivers/gpu/drm/meson/meson_encoder_hdmi.c
> index 0593a1cde906..1c3e3e5526eb 100644
> --- a/drivers/gpu/drm/meson/meson_encoder_hdmi.c
> +++ b/drivers/gpu/drm/meson/meson_encoder_hdmi.c
> @@ -45,6 +45,12 @@ struct meson_encoder_hdmi {
>   	struct cec_notifier *cec_notifier;
>   };
>   
> +enum meson_venc_source {
> +	MESON_VENC_SOURCE_NONE = 0,
> +	MESON_VENC_SOURCE_ENCI = 1,
> +	MESON_VENC_SOURCE_ENCP = 2,
> +};
> +
>   #define bridge_to_meson_encoder_hdmi(x) \
>   	container_of(x, struct meson_encoder_hdmi, bridge)
>   
> @@ -247,6 +253,14 @@ static void meson_encoder_hdmi_atomic_enable(struct drm_bridge *bridge,
>   		writel_relaxed(1, priv->io_base + _REG(ENCI_VIDEO_EN));
>   	else
>   		writel_relaxed(1, priv->io_base + _REG(ENCP_VIDEO_EN));
> +
> +	/* Enable and Select HDMI video source for HDMI-TX */
> +	if (priv->venc.hdmi_use_enci)
> +		writel_bits_relaxed(0x3, MESON_VENC_SOURCE_ENCI,
> +				    priv->io_base + _REG(VPU_HDMI_SETTING));
> +	else
> +		writel_bits_relaxed(0x3, MESON_VENC_SOURCE_ENCP,
> +				    priv->io_base + _REG(VPU_HDMI_SETTING));
>   }
>   
>   static void meson_encoder_hdmi_atomic_disable(struct drm_bridge *bridge,
> @@ -257,6 +271,8 @@ static void meson_encoder_hdmi_atomic_disable(struct drm_bridge *bridge,
>   
>   	writel_bits_relaxed(0x3, 0,
>   			    priv->io_base + _REG(VPU_HDMI_SETTING));
> +	writel_bits_relaxed(0xf << 8, 0,
> +			    priv->io_base + _REG(VPU_HDMI_SETTING));
>   
>   	writel_relaxed(0, priv->io_base + _REG(ENCI_VIDEO_EN));
>   	writel_relaxed(0, priv->io_base + _REG(ENCP_VIDEO_EN));

Nice usage of the split bridge architecture!
Now we must make sure the atomic enable order doesn't change...

Reviewed-by: Neil Armstrong <neil.armstrong at linaro.org>


From neil.armstrong at linaro.org  Mon Aug 19 09:01:32 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Mon, 19 Aug 2024 18:01:32 +0200
Subject: [PATCH 2/9] drm/meson: vclk: drop hdmi system clock setup
In-Reply-To: <20240730125023.710237-3-jbrunet@baylibre.com>
References: <20240730125023.710237-1-jbrunet@baylibre.com>
 <20240730125023.710237-3-jbrunet@baylibre.com>
Message-ID: <5c72008c-65b9-4013-bbed-f5462e27b9ac@linaro.org>

On 30/07/2024 14:50, Jerome Brunet wrote:
> Poking the HHI syscon is a way to setup clocks behind CCF's back.
> Also, 2 drm code paths, the encoder and the hdmi-phy, are racing to do the
> same setup of the HDMI system clock.
> 
> This clock is used is used by the HDMI phy and should not be set by the
> encoder, so drop those HHI pokes from vclk.
> 
> Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
> ---
>   drivers/gpu/drm/meson/meson_vclk.c | 8 --------
>   1 file changed, 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c
> index 2a942dc6a6dc..bf5cc5d92346 100644
> --- a/drivers/gpu/drm/meson/meson_vclk.c
> +++ b/drivers/gpu/drm/meson/meson_vclk.c
> @@ -813,14 +813,6 @@ static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq,
>   {
>   	unsigned int m = 0, frac = 0;
>   
> -	/* Set HDMI-TX sys clock */
> -	regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL,
> -			   CTS_HDMI_SYS_SEL_MASK, 0);
> -	regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL,
> -			   CTS_HDMI_SYS_DIV_MASK, 0);
> -	regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL,
> -			   CTS_HDMI_SYS_EN, CTS_HDMI_SYS_EN);
> -
>   	/* Set HDMI PLL rate */
>   	if (!od1 && !od2 && !od3) {
>   		meson_hdmi_pll_generic_set(priv, pll_base_freq);

Reviewed-by: Neil Armstrong <neil.armstrong at linaro.org>


From neil.armstrong at linaro.org  Mon Aug 19 09:02:14 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Mon, 19 Aug 2024 18:02:14 +0200
Subject: [PATCH 3/9] drm/meson: dw-hdmi: use generic clock helpers
In-Reply-To: <20240730125023.710237-4-jbrunet@baylibre.com>
References: <20240730125023.710237-1-jbrunet@baylibre.com>
 <20240730125023.710237-4-jbrunet@baylibre.com>
Message-ID: <4ecb4d18-026c-41f9-b5ab-ae9dafc20887@linaro.org>

On 30/07/2024 14:50, Jerome Brunet wrote:
> The Amlogic HDMI phy driver is not doing anything with the clocks
> besides enabling on probe. CCF provides generic helpers to do that.
> 
> Use the generic clock helpers rather than using a custom one to get and
> enable clocks.
> 
> Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
> ---
>   drivers/gpu/drm/meson/meson_dw_hdmi.c | 36 +++------------------------
>   1 file changed, 3 insertions(+), 33 deletions(-)
> 
> diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c
> index bcf4f83582f2..2890796f9d49 100644
> --- a/drivers/gpu/drm/meson/meson_dw_hdmi.c
> +++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c
> @@ -619,29 +619,6 @@ static void meson_dw_hdmi_init(struct meson_dw_hdmi *meson_dw_hdmi)
>   
>   }
>   
> -static void meson_disable_clk(void *data)
> -{
> -	clk_disable_unprepare(data);
> -}
> -
> -static int meson_enable_clk(struct device *dev, char *name)
> -{
> -	struct clk *clk;
> -	int ret;
> -
> -	clk = devm_clk_get(dev, name);
> -	if (IS_ERR(clk)) {
> -		dev_err(dev, "Unable to get %s pclk\n", name);
> -		return PTR_ERR(clk);
> -	}
> -
> -	ret = clk_prepare_enable(clk);
> -	if (!ret)
> -		ret = devm_add_action_or_reset(dev, meson_disable_clk, clk);
> -
> -	return ret;
> -}
> -
>   static int meson_dw_hdmi_bind(struct device *dev, struct device *master,
>   				void *data)
>   {
> @@ -651,6 +628,7 @@ static int meson_dw_hdmi_bind(struct device *dev, struct device *master,
>   	struct drm_device *drm = data;
>   	struct meson_drm *priv = drm->dev_private;
>   	struct dw_hdmi_plat_data *dw_plat_data;
> +	struct clk_bulk_data *clks;
>   	int irq;
>   	int ret;
>   
> @@ -701,17 +679,9 @@ static int meson_dw_hdmi_bind(struct device *dev, struct device *master,
>   	if (IS_ERR(meson_dw_hdmi->hdmitx))
>   		return PTR_ERR(meson_dw_hdmi->hdmitx);
>   
> -	ret = meson_enable_clk(dev, "isfr");
> -	if (ret)
> -		return ret;
> -
> -	ret = meson_enable_clk(dev, "iahb");
> +	ret = devm_clk_bulk_get_all_enable(dev, &clks);
>   	if (ret)
> -		return ret;
> -
> -	ret = meson_enable_clk(dev, "venci");
> -	if (ret)
> -		return ret;
> +		return dev_err_probe(dev, ret, "Failed to enable all clocks\n");
>   
>   	dw_plat_data->regm = devm_regmap_init(dev, NULL, meson_dw_hdmi,
>   					      &meson_dw_hdmi_regmap_config);

Reviewed-by: Neil Armstrong <neil.armstrong at linaro.org>


From neil.armstrong at linaro.org  Mon Aug 19 09:07:03 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Mon, 19 Aug 2024 18:07:03 +0200
Subject: [PATCH 4/9] drm/meson: dw-hdmi: fix incorrect comment in suspend
In-Reply-To: <20240730125023.710237-5-jbrunet@baylibre.com>
References: <20240730125023.710237-1-jbrunet@baylibre.com>
 <20240730125023.710237-5-jbrunet@baylibre.com>
Message-ID: <004156e5-8dde-45a7-a291-425486e20696@linaro.org>

On 30/07/2024 14:50, Jerome Brunet wrote:
> Comment in suspend says TOP is put in suspend, but the register
> poke following is actually de-asserting the reset, like in init.
> 
> It is doing the opposite of what the comment says.
> 
> Align the comment with what the code is doing for now and add
> a FIXME note to sort this out later
> 
> Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
> ---
>   drivers/gpu/drm/meson/meson_dw_hdmi.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c
> index 2890796f9d49..5cd3264ab874 100644
> --- a/drivers/gpu/drm/meson/meson_dw_hdmi.c
> +++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c
> @@ -751,7 +751,7 @@ static int __maybe_unused meson_dw_hdmi_pm_suspend(struct device *dev)
>   	if (!meson_dw_hdmi)
>   		return 0;
>   
> -	/* Reset TOP */
> +	/* FIXME: This actually bring top out reset on suspend, why ? */
>   	meson_dw_hdmi->data->top_write(meson_dw_hdmi,
>   				       HDMITX_TOP_SW_RESET, 0);
>   

Yes, this is probably useless and should:
meson_dw_hdmi->data->top_write(meson_dw_hdmi,
			       HDMITX_TOP_SW_RESET, 0xffff);

but I think it can be safely removed.

Neil


From neil.armstrong at linaro.org  Mon Aug 19 09:08:34 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Mon, 19 Aug 2024 18:08:34 +0200
Subject: [PATCH 5/9] drm/meson: dw-hdmi: split resets out of hw init.
In-Reply-To: <20240730125023.710237-6-jbrunet@baylibre.com>
References: <20240730125023.710237-1-jbrunet@baylibre.com>
 <20240730125023.710237-6-jbrunet@baylibre.com>
Message-ID: <8d49f427-a0f8-44f4-bd46-86fbf385deab@linaro.org>

On 30/07/2024 14:50, Jerome Brunet wrote:
> This prepares the migration to regmap usage.
> 
> To properly setup regmap, the APB needs to be in working order.
> This is easier handled if the resets are not mixed with hw init.
> 
> More checks are required to determine if the resets are needed
> on resume or not. Add a note for this.
> 
> Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
> ---
>   drivers/gpu/drm/meson/meson_dw_hdmi.c | 14 +++++++++-----
>   1 file changed, 9 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c
> index 5cd3264ab874..47aa3e184e98 100644
> --- a/drivers/gpu/drm/meson/meson_dw_hdmi.c
> +++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c
> @@ -581,11 +581,6 @@ static void meson_dw_hdmi_init(struct meson_dw_hdmi *meson_dw_hdmi)
>   	/* Bring HDMITX MEM output of power down */
>   	regmap_update_bits(priv->hhi, HHI_MEM_PD_REG0, 0xff << 8, 0);
>   
> -	/* Reset HDMITX APB & TX & PHY */
> -	reset_control_reset(meson_dw_hdmi->hdmitx_apb);
> -	reset_control_reset(meson_dw_hdmi->hdmitx_ctrl);
> -	reset_control_reset(meson_dw_hdmi->hdmitx_phy);
> -
>   	/* Enable APB3 fail on error */
>   	if (!meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) {
>   		writel_bits_relaxed(BIT(15), BIT(15),
> @@ -675,6 +670,10 @@ static int meson_dw_hdmi_bind(struct device *dev, struct device *master,
>   		return PTR_ERR(meson_dw_hdmi->hdmitx_phy);
>   	}
>   
> +	reset_control_reset(meson_dw_hdmi->hdmitx_apb);
> +	reset_control_reset(meson_dw_hdmi->hdmitx_ctrl);
> +	reset_control_reset(meson_dw_hdmi->hdmitx_phy);
> +
>   	meson_dw_hdmi->hdmitx = devm_platform_ioremap_resource(pdev, 0);
>   	if (IS_ERR(meson_dw_hdmi->hdmitx))
>   		return PTR_ERR(meson_dw_hdmi->hdmitx);
> @@ -765,6 +764,11 @@ static int __maybe_unused meson_dw_hdmi_pm_resume(struct device *dev)
>   	if (!meson_dw_hdmi)
>   		return 0;
>   
> +	/* TODO: Is this really necessary/desirable on resume ? */

Yes to reset the HDMI controller to it's default state, not sure if the note is important here.

> +	reset_control_reset(meson_dw_hdmi->hdmitx_apb);
> +	reset_control_reset(meson_dw_hdmi->hdmitx_ctrl);
> +	reset_control_reset(meson_dw_hdmi->hdmitx_phy);
> +
>   	meson_dw_hdmi_init(meson_dw_hdmi);
>   
>   	dw_hdmi_resume(meson_dw_hdmi->hdmi);



From neil.armstrong at linaro.org  Mon Aug 19 09:22:25 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Mon, 19 Aug 2024 18:22:25 +0200
Subject: [PATCH 6/9] drm/meson: dw-hdmi: convert to regmap
In-Reply-To: <20240730125023.710237-7-jbrunet@baylibre.com>
References: <20240730125023.710237-1-jbrunet@baylibre.com>
 <20240730125023.710237-7-jbrunet@baylibre.com>
Message-ID: <13420cbe-30c5-4bac-80e9-c3822c0800bd@linaro.org>

On 30/07/2024 14:50, Jerome Brunet wrote:
> The Amlogic mixes direct register access and regmap ones, with several
> custom helpers. Using a single API makes rework and maintenance easier.
> 
> Convert the Amlogic phy driver to regmap and use it to have more consistent
> access to the registers in the driver, with less custom helpers. Add
> register bit definitions when missing.
> 
> Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
> ---
>   drivers/gpu/drm/meson/meson_dw_hdmi.c | 475 ++++++++++++--------------
>   drivers/gpu/drm/meson/meson_dw_hdmi.h |  49 +--
>   2 files changed, 239 insertions(+), 285 deletions(-)
> 
> diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c
> index 47aa3e184e98..7c39e5c99043 100644
> --- a/drivers/gpu/drm/meson/meson_dw_hdmi.c
> +++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c
> @@ -90,16 +90,25 @@
>    * - CEC Management
>    */
>   
> -/* TOP Block Communication Channel */
> -#define HDMITX_TOP_ADDR_REG	0x0
> -#define HDMITX_TOP_DATA_REG	0x4
> -#define HDMITX_TOP_CTRL_REG	0x8
> -#define HDMITX_TOP_G12A_OFFSET	0x8000
> +/* Indirect channel definition for GX */
> +#define HDMITX_TOP_REGS		0x0
> +#define HDMITX_DWC_REGS		0x10
> +
> +#define GX_ADDR_OFFSET		0x0
> +#define GX_DATA_OFFSET		0x4
> +#define GX_CTRL_OFFSET		0x8

I don't see the point renaming thos defines

> +#define  GX_CTRL_APB3_ERRFAIL	BIT(15)
>   
> -/* Controller Communication Channel */
> -#define HDMITX_DWC_ADDR_REG	0x10
> -#define HDMITX_DWC_DATA_REG	0x14
> -#define HDMITX_DWC_CTRL_REG	0x18
> +/*
> + * NOTE: G12 use direct addressing:
> + * Ideally it should receive one memory region for each of the top
> + * and dwc register regions but fixing this would require to change
> + * the DT bindings. Doing so is a pain. Keep the region as it and work
> + * around the problem, at least for now.
> + * Future supported SoCs should properly describe the regions in the
> + * DT bindings instead of using this trick.

well I disagree here, there's a single memory region for the HDMITX module,
and the DWC region is controlled by the TOP registers, so the DWC region
_cannot_ be accessed without correctly configuring the TOP registers.

So I disagree strongly with this comment.

> + */
> +#define HDMITX_TOP_G12A_OFFSET	0x8000
>   
>   /* HHI Registers */
>   #define HHI_MEM_PD_REG0		0x100 /* 0x40 */
> @@ -108,28 +117,59 @@
>   #define HHI_HDMI_PHY_CNTL1	0x3a4 /* 0xe9 */
>   #define  PHY_CNTL1_INIT		0x03900000
>   #define  PHY_INVERT		BIT(17)
> +#define  PHY_FIFOS		GENMASK(3, 2)
> +#define  PHY_CLOCK_EN		BIT(1)
> +#define  PHY_SOFT_RST		BIT(0)

Please move those changes before or after this patch

>   #define HHI_HDMI_PHY_CNTL2	0x3a8 /* 0xea */
>   #define HHI_HDMI_PHY_CNTL3	0x3ac /* 0xeb */
>   #define HHI_HDMI_PHY_CNTL4	0x3b0 /* 0xec */
>   #define HHI_HDMI_PHY_CNTL5	0x3b4 /* 0xed */
>   
> -static DEFINE_SPINLOCK(reg_lock);
> -
> -struct meson_dw_hdmi;
> -
>   struct meson_dw_hdmi_data {
> -	unsigned int	(*top_read)(struct meson_dw_hdmi *dw_hdmi,
> -				    unsigned int addr);
> -	void		(*top_write)(struct meson_dw_hdmi *dw_hdmi,
> -				     unsigned int addr, unsigned int data);
> -	unsigned int	(*dwc_read)(struct meson_dw_hdmi *dw_hdmi,
> -				    unsigned int addr);
> -	void		(*dwc_write)(struct meson_dw_hdmi *dw_hdmi,
> -				     unsigned int addr, unsigned int data);
> +	int (*reg_init)(struct device *dev);
>   	u32 cntl0_init;
>   	u32 cntl1_init;
>   };
>   
> +static int hdmi_tx_indirect_reg_read(void *context,
> +					 unsigned int reg,
> +					 unsigned int *result)
> +{
> +	void __iomem *base = context;
> +
> +	/* Must write the read address twice ... */
> +	writel(reg, base + GX_ADDR_OFFSET);
> +	writel(reg, base + GX_ADDR_OFFSET);
> +
> +	/* ... and read the data twice as well */
> +	*result = readl(base + GX_DATA_OFFSET);
> +	*result = readl(base + GX_DATA_OFFSET);

Why did you change the comments ?

> +
> +	return 0;
> +}
> +
> +static int hdmi_tx_indirect_reg_write(void *context,
> +				      unsigned int reg,
> +				      unsigned int val)
> +{
> +	void __iomem *base = context;
> +
> +	/* Must write the read address twice ... */
> +	writel(reg, base + GX_ADDR_OFFSET);
> +	writel(reg, base + GX_ADDR_OFFSET);
> +
> +	/* ... but write the data only once */
> +	writel(val, base + GX_DATA_OFFSET);

Ditto ? were they wrong ?

> +
> +	return 0;
> +}
> +
> +static const struct regmap_bus hdmi_tx_indirect_mmio = {
> +	.fast_io = true,
> +	.reg_read = hdmi_tx_indirect_reg_read,
> +	.reg_write = hdmi_tx_indirect_reg_write,
> +};
> +
>   struct meson_dw_hdmi {
>   	struct dw_hdmi_plat_data dw_plat_data;
>   	struct meson_drm *priv;
> @@ -139,9 +179,10 @@ struct meson_dw_hdmi {
>   	struct reset_control *hdmitx_apb;
>   	struct reset_control *hdmitx_ctrl;
>   	struct reset_control *hdmitx_phy;
> -	u32 irq_stat;
> +	unsigned int irq_stat;
>   	struct dw_hdmi *hdmi;
>   	struct drm_bridge *bridge;
> +	struct regmap *top;

The name could be better, like top_regs or top_regmap

>   };
>   
>   static inline int dw_hdmi_is_compatible(struct meson_dw_hdmi *dw_hdmi,
> @@ -150,136 +191,6 @@ static inline int dw_hdmi_is_compatible(struct meson_dw_hdmi *dw_hdmi,
>   	return of_device_is_compatible(dw_hdmi->dev->of_node, compat);
>   }
>   
> -/* PHY (via TOP bridge) and Controller dedicated register interface */
> -
> -static unsigned int dw_hdmi_top_read(struct meson_dw_hdmi *dw_hdmi,
> -				     unsigned int addr)
> -{
> -	unsigned long flags;
> -	unsigned int data;
> -
> -	spin_lock_irqsave(&reg_lock, flags);
> -
> -	/* ADDR must be written twice */
> -	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_TOP_ADDR_REG);
> -	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_TOP_ADDR_REG);
> -
> -	/* Read needs a second DATA read */
> -	data = readl(dw_hdmi->hdmitx + HDMITX_TOP_DATA_REG);
> -	data = readl(dw_hdmi->hdmitx + HDMITX_TOP_DATA_REG);
> -
> -	spin_unlock_irqrestore(&reg_lock, flags);
> -
> -	return data;
> -}
> -
> -static unsigned int dw_hdmi_g12a_top_read(struct meson_dw_hdmi *dw_hdmi,
> -					  unsigned int addr)
> -{
> -	return readl(dw_hdmi->hdmitx + HDMITX_TOP_G12A_OFFSET + (addr << 2));
> -}
> -
> -static inline void dw_hdmi_top_write(struct meson_dw_hdmi *dw_hdmi,
> -				     unsigned int addr, unsigned int data)
> -{
> -	unsigned long flags;
> -
> -	spin_lock_irqsave(&reg_lock, flags);
> -
> -	/* ADDR must be written twice */
> -	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_TOP_ADDR_REG);
> -	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_TOP_ADDR_REG);
> -
> -	/* Write needs single DATA write */
> -	writel(data, dw_hdmi->hdmitx + HDMITX_TOP_DATA_REG);
> -
> -	spin_unlock_irqrestore(&reg_lock, flags);
> -}
> -
> -static inline void dw_hdmi_g12a_top_write(struct meson_dw_hdmi *dw_hdmi,
> -					  unsigned int addr, unsigned int data)
> -{
> -	writel(data, dw_hdmi->hdmitx + HDMITX_TOP_G12A_OFFSET + (addr << 2));
> -}
> -
> -/* Helper to change specific bits in PHY registers */
> -static inline void dw_hdmi_top_write_bits(struct meson_dw_hdmi *dw_hdmi,
> -					  unsigned int addr,
> -					  unsigned int mask,
> -					  unsigned int val)
> -{
> -	unsigned int data = dw_hdmi->data->top_read(dw_hdmi, addr);
> -
> -	data &= ~mask;
> -	data |= val;
> -
> -	dw_hdmi->data->top_write(dw_hdmi, addr, data);
> -}
> -
> -static unsigned int dw_hdmi_dwc_read(struct meson_dw_hdmi *dw_hdmi,
> -				     unsigned int addr)
> -{
> -	unsigned long flags;
> -	unsigned int data;
> -
> -	spin_lock_irqsave(&reg_lock, flags);
> -
> -	/* ADDR must be written twice */
> -	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_DWC_ADDR_REG);
> -	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_DWC_ADDR_REG);
> -
> -	/* Read needs a second DATA read */
> -	data = readl(dw_hdmi->hdmitx + HDMITX_DWC_DATA_REG);
> -	data = readl(dw_hdmi->hdmitx + HDMITX_DWC_DATA_REG);
> -
> -	spin_unlock_irqrestore(&reg_lock, flags);
> -
> -	return data;
> -}
> -
> -static unsigned int dw_hdmi_g12a_dwc_read(struct meson_dw_hdmi *dw_hdmi,
> -					  unsigned int addr)
> -{
> -	return readb(dw_hdmi->hdmitx + addr);
> -}
> -
> -static inline void dw_hdmi_dwc_write(struct meson_dw_hdmi *dw_hdmi,
> -				     unsigned int addr, unsigned int data)
> -{
> -	unsigned long flags;
> -
> -	spin_lock_irqsave(&reg_lock, flags);
> -
> -	/* ADDR must be written twice */
> -	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_DWC_ADDR_REG);
> -	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_DWC_ADDR_REG);
> -
> -	/* Write needs single DATA write */
> -	writel(data, dw_hdmi->hdmitx + HDMITX_DWC_DATA_REG);
> -
> -	spin_unlock_irqrestore(&reg_lock, flags);
> -}
> -
> -static inline void dw_hdmi_g12a_dwc_write(struct meson_dw_hdmi *dw_hdmi,
> -					  unsigned int addr, unsigned int data)
> -{
> -	writeb(data, dw_hdmi->hdmitx + addr);
> -}
> -
> -/* Helper to change specific bits in controller registers */
> -static inline void dw_hdmi_dwc_write_bits(struct meson_dw_hdmi *dw_hdmi,
> -					  unsigned int addr,
> -					  unsigned int mask,
> -					  unsigned int val)
> -{
> -	unsigned int data = dw_hdmi->data->dwc_read(dw_hdmi, addr);
> -
> -	data &= ~mask;
> -	data |= val;
> -
> -	dw_hdmi->data->dwc_write(dw_hdmi, addr, data);
> -}
> -
>   /* Bridge */
>   
>   /* Setup PHY bandwidth modes */
> @@ -353,13 +264,15 @@ static inline void meson_dw_hdmi_phy_reset(struct meson_dw_hdmi *dw_hdmi)
>   	struct meson_drm *priv = dw_hdmi->priv;
>   
>   	/* Enable and software reset */
> -	regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, 0xf, 0xf);
> -
> +	regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1,
> +			   PHY_FIFOS | PHY_CLOCK_EN | PHY_SOFT_RST,
> +			   PHY_FIFOS | PHY_CLOCK_EN | PHY_SOFT_RST);
>   	mdelay(2);
>   
>   	/* Enable and unreset */
> -	regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, 0xf, 0xe);
> -
> +	regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1,
> +			   PHY_FIFOS | PHY_CLOCK_EN | PHY_SOFT_RST,
> +			   PHY_FIFOS | PHY_CLOCK_EN);
>   	mdelay(2);
>   }
>   
> @@ -382,27 +295,30 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data,
>   
>   	/* TMDS pattern setup */
>   	if (mode->clock > 340000 && !mode_is_420) {
> -		dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_01,
> -				  0);
> -		dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_23,
> -				  0x03ff03ff);
> +		regmap_write(dw_hdmi->top, HDMITX_TOP_TMDS_CLK_PTTN_01,
> +			     0);
> +		regmap_write(dw_hdmi->top, HDMITX_TOP_TMDS_CLK_PTTN_23,
> +			     0x03ff03ff);
>   	} else {
> -		dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_01,
> -				  0x001f001f);
> -		dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_23,
> -				  0x001f001f);
> +		regmap_write(dw_hdmi->top, HDMITX_TOP_TMDS_CLK_PTTN_01,
> +			     0x001f001f);
> +		regmap_write(dw_hdmi->top, HDMITX_TOP_TMDS_CLK_PTTN_23,
> +			     0x001f001f);
>   	}
>   
>   	/* Load TMDS pattern */
> -	dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_CNTL, 0x1);
> +	regmap_write(dw_hdmi->top, HDMITX_TOP_TMDS_CLK_PTTN_CNTL,
> +		     TOP_TDMS_CLK_PTTN_LOAD);
>   	msleep(20);
> -	dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_CNTL, 0x2);
> +	regmap_write(dw_hdmi->top, HDMITX_TOP_TMDS_CLK_PTTN_CNTL,
> +		     TOP_TDMS_CLK_PTTN_SHFT);
>   
>   	/* Setup PHY parameters */
>   	meson_hdmi_phy_setup_mode(dw_hdmi, mode, mode_is_420);
>   
>   	/* Disable clock, fifo, fifo_wr */
> -	regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, 0xf, 0);
> +	regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1,
> +			   PHY_FIFOS | PHY_CLOCK_EN | PHY_SOFT_RST, 0);
>   
>   	dw_hdmi_set_high_tmds_clock_ratio(hdmi, display);
>   
> @@ -433,8 +349,11 @@ static enum drm_connector_status dw_hdmi_read_hpd(struct dw_hdmi *hdmi,
>   			     void *data)
>   {
>   	struct meson_dw_hdmi *dw_hdmi = (struct meson_dw_hdmi *)data;
> +	unsigned int stat;
>   
> -	return !!dw_hdmi->data->top_read(dw_hdmi, HDMITX_TOP_STAT0) ?
> +	regmap_read(dw_hdmi->top, HDMITX_TOP_STAT0, &stat);
> +
> +	return !!stat ?
>   		connector_status_connected : connector_status_disconnected;
>   }
>   
> @@ -444,17 +363,18 @@ static void dw_hdmi_setup_hpd(struct dw_hdmi *hdmi,
>   	struct meson_dw_hdmi *dw_hdmi = (struct meson_dw_hdmi *)data;
>   
>   	/* Setup HPD Filter */
> -	dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_HPD_FILTER,
> -			  (0xa << 12) | 0xa0);
> +	regmap_write(dw_hdmi->top, HDMITX_TOP_HPD_FILTER,
> +		     FIELD_PREP(TOP_HPD_GLITCH_WIDTH, 10) |
> +		     FIELD_PREP(TOP_HPD_VALID_WIDTH, 160));
>   
>   	/* Clear interrupts */
> -	dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_INTR_STAT_CLR,
> -			  HDMITX_TOP_INTR_HPD_RISE | HDMITX_TOP_INTR_HPD_FALL);
> +	regmap_write(dw_hdmi->top, HDMITX_TOP_INTR_STAT_CLR,
> +		     TOP_INTR_HPD_RISE | TOP_INTR_HPD_FALL);
>   
>   	/* Unmask interrupts */
> -	dw_hdmi_top_write_bits(dw_hdmi, HDMITX_TOP_INTR_MASKN,
> -			HDMITX_TOP_INTR_HPD_RISE | HDMITX_TOP_INTR_HPD_FALL,
> -			HDMITX_TOP_INTR_HPD_RISE | HDMITX_TOP_INTR_HPD_FALL);
> +	regmap_update_bits(dw_hdmi->top, HDMITX_TOP_INTR_MASKN,
> +			   TOP_INTR_HPD_RISE | TOP_INTR_HPD_FALL,
> +			   TOP_INTR_HPD_RISE | TOP_INTR_HPD_FALL);
>   }
>   
>   static const struct dw_hdmi_phy_ops meson_dw_hdmi_phy_ops = {
> @@ -467,23 +387,22 @@ static const struct dw_hdmi_phy_ops meson_dw_hdmi_phy_ops = {
>   static irqreturn_t dw_hdmi_top_irq(int irq, void *dev_id)
>   {
>   	struct meson_dw_hdmi *dw_hdmi = dev_id;
> -	u32 stat;
> +	unsigned int stat;
>   
> -	stat = dw_hdmi->data->top_read(dw_hdmi, HDMITX_TOP_INTR_STAT);
> -	dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_INTR_STAT_CLR, stat);
> +	regmap_read(dw_hdmi->top, HDMITX_TOP_INTR_STAT, &stat);
> +	regmap_write(dw_hdmi->top, HDMITX_TOP_INTR_STAT_CLR, stat);
>   
>   	/* HPD Events, handle in the threaded interrupt handler */
> -	if (stat & (HDMITX_TOP_INTR_HPD_RISE | HDMITX_TOP_INTR_HPD_FALL)) {
> +	if (stat & (TOP_INTR_HPD_RISE | TOP_INTR_HPD_FALL)) {
>   		dw_hdmi->irq_stat = stat;
>   		return IRQ_WAKE_THREAD;
>   	}
>   
>   	/* HDMI Controller Interrupt */
> -	if (stat & 1)
> +	if (stat & TOP_INTR_CORE)
>   		return IRQ_NONE;
>   
>   	/* TOFIX Handle HDCP Interrupts */
> -
>   	return IRQ_HANDLED;
>   }
>   
> @@ -494,10 +413,10 @@ static irqreturn_t dw_hdmi_top_thread_irq(int irq, void *dev_id)
>   	u32 stat = dw_hdmi->irq_stat;
>   
>   	/* HPD Events */
> -	if (stat & (HDMITX_TOP_INTR_HPD_RISE | HDMITX_TOP_INTR_HPD_FALL)) {
> +	if (stat & (TOP_INTR_HPD_RISE | TOP_INTR_HPD_FALL)) {
>   		bool hpd_connected = false;
>   
> -		if (stat & HDMITX_TOP_INTR_HPD_RISE)
> +		if (stat & TOP_INTR_HPD_RISE)
>   			hpd_connected = true;
>   
>   		dw_hdmi_setup_rx_sense(dw_hdmi->hdmi, hpd_connected,
> @@ -512,63 +431,25 @@ static irqreturn_t dw_hdmi_top_thread_irq(int irq, void *dev_id)
>   	return IRQ_HANDLED;
>   }
>   
> -/* DW HDMI Regmap */
> -
> -static int meson_dw_hdmi_reg_read(void *context, unsigned int reg,
> -				  unsigned int *result)
> -{
> -	struct meson_dw_hdmi *dw_hdmi = context;
> -
> -	*result = dw_hdmi->data->dwc_read(dw_hdmi, reg);
> -
> -	return 0;
> -
> -}
> -
> -static int meson_dw_hdmi_reg_write(void *context, unsigned int reg,
> -				   unsigned int val)
> -{
> -	struct meson_dw_hdmi *dw_hdmi = context;
> -
> -	dw_hdmi->data->dwc_write(dw_hdmi, reg, val);
> -
> -	return 0;
> -}
> -
> -static const struct regmap_config meson_dw_hdmi_regmap_config = {
> -	.reg_bits = 32,
> -	.val_bits = 8,
> -	.reg_read = meson_dw_hdmi_reg_read,
> -	.reg_write = meson_dw_hdmi_reg_write,
> -	.max_register = 0x10000,
> -	.fast_io = true,
> -};
> -
> -static const struct meson_dw_hdmi_data meson_dw_hdmi_gxbb_data = {
> -	.top_read = dw_hdmi_top_read,
> -	.top_write = dw_hdmi_top_write,
> -	.dwc_read = dw_hdmi_dwc_read,
> -	.dwc_write = dw_hdmi_dwc_write,
> -	.cntl0_init = 0x0,
> -	.cntl1_init = PHY_CNTL1_INIT | PHY_INVERT,
> +static const struct regmap_config top_gx_regmap_cfg = {
> +	.reg_bits	= 32,
> +	.reg_stride	= 4,
> +	.reg_shift	= -2,
> +	.val_bits	= 32,
> +	.max_register	= 0x40,
>   };
>   
> -static const struct meson_dw_hdmi_data meson_dw_hdmi_gxl_data = {
> -	.top_read = dw_hdmi_top_read,
> -	.top_write = dw_hdmi_top_write,
> -	.dwc_read = dw_hdmi_dwc_read,
> -	.dwc_write = dw_hdmi_dwc_write,
> -	.cntl0_init = 0x0,
> -	.cntl1_init = PHY_CNTL1_INIT,
> +static const struct regmap_config top_g12_regmap_cfg = {
> +	.reg_bits	= 32,
> +	.reg_stride	= 4,
> +	.val_bits	= 32,
> +	.max_register	= 0x40,
>   };
>   
> -static const struct meson_dw_hdmi_data meson_dw_hdmi_g12a_data = {
> -	.top_read = dw_hdmi_g12a_top_read,
> -	.top_write = dw_hdmi_g12a_top_write,
> -	.dwc_read = dw_hdmi_g12a_dwc_read,
> -	.dwc_write = dw_hdmi_g12a_dwc_write,
> -	.cntl0_init = 0x000b4242, /* Bandgap */
> -	.cntl1_init = PHY_CNTL1_INIT,
> +static const struct regmap_config dwc_regmap_cfg = {
> +	.reg_bits = 32,
> +	.val_bits = 8,
> +	.max_register = 0x8000,
>   };
>   
>   static void meson_dw_hdmi_init(struct meson_dw_hdmi *meson_dw_hdmi)
> @@ -581,41 +462,107 @@ static void meson_dw_hdmi_init(struct meson_dw_hdmi *meson_dw_hdmi)
>   	/* Bring HDMITX MEM output of power down */
>   	regmap_update_bits(priv->hhi, HHI_MEM_PD_REG0, 0xff << 8, 0);
>   
> -	/* Enable APB3 fail on error */
> -	if (!meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) {
> -		writel_bits_relaxed(BIT(15), BIT(15),
> -				    meson_dw_hdmi->hdmitx + HDMITX_TOP_CTRL_REG);
> -		writel_bits_relaxed(BIT(15), BIT(15),
> -				    meson_dw_hdmi->hdmitx + HDMITX_DWC_CTRL_REG);
> -	}
> -
>   	/* Bring out of reset */
> -	meson_dw_hdmi->data->top_write(meson_dw_hdmi,
> -				       HDMITX_TOP_SW_RESET,  0);
> -
> +	regmap_write(meson_dw_hdmi->top, HDMITX_TOP_SW_RESET, 0);
>   	msleep(20);
>   
> -	meson_dw_hdmi->data->top_write(meson_dw_hdmi,
> -				       HDMITX_TOP_CLK_CNTL, 0xff);
> +	/* Enable clocks */
> +	regmap_write(meson_dw_hdmi->top, HDMITX_TOP_CLK_CNTL,
> +		     TOP_CLK_EN);
>   
>   	/* Enable normal output to PHY */
> -	meson_dw_hdmi->data->top_write(meson_dw_hdmi, HDMITX_TOP_BIST_CNTL, BIT(12));
> +	regmap_write(meson_dw_hdmi->top, HDMITX_TOP_BIST_CNTL,
> +		     TOP_BIST_TMDS_EN);
>   
>   	/* Setup PHY */
> -	regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL1, meson_dw_hdmi->data->cntl1_init);
> -	regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, meson_dw_hdmi->data->cntl0_init);
> +	regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL1,
> +		     meson_dw_hdmi->data->cntl1_init);
> +	regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0,
> +		     meson_dw_hdmi->data->cntl0_init);
>   
>   	/* Enable HDMI-TX Interrupt */
> -	meson_dw_hdmi->data->top_write(meson_dw_hdmi, HDMITX_TOP_INTR_STAT_CLR,
> -				       HDMITX_TOP_INTR_CORE);
> +	regmap_write(meson_dw_hdmi->top, HDMITX_TOP_INTR_STAT_CLR,
> +		     GENMASK(31, 0));
> +	regmap_write(meson_dw_hdmi->top, HDMITX_TOP_INTR_MASKN,
> +		     TOP_INTR_CORE);
> +}
> +
> +static int meson_dw_init_regmap_gx(struct device *dev)
> +{
> +	struct meson_dw_hdmi *meson_dw_hdmi = dev_get_drvdata(dev);
> +	struct regmap *map;
>   
> -	meson_dw_hdmi->data->top_write(meson_dw_hdmi, HDMITX_TOP_INTR_MASKN,
> -				       HDMITX_TOP_INTR_CORE);
> +	/* Register TOP glue zone */
> +	writel_bits_relaxed(GX_CTRL_APB3_ERRFAIL, GX_CTRL_APB3_ERRFAIL,
> +			    meson_dw_hdmi->hdmitx + HDMITX_TOP_REGS + GX_CTRL_OFFSET);
>   
> +	map = devm_regmap_init(dev, &hdmi_tx_indirect_mmio,
> +			       meson_dw_hdmi->hdmitx + HDMITX_TOP_REGS,
> +			       &top_gx_regmap_cfg);
> +	if (IS_ERR(map))
> +		return dev_err_probe(dev, PTR_ERR(map), "failed to init top regmap\n");
> +
> +	meson_dw_hdmi->top = map;
> +
> +	/* Register DWC zone */
> +	writel_bits_relaxed(GX_CTRL_APB3_ERRFAIL, GX_CTRL_APB3_ERRFAIL,
> +			    meson_dw_hdmi->hdmitx + HDMITX_DWC_REGS + GX_CTRL_OFFSET);
> +
> +	map = devm_regmap_init(dev, &hdmi_tx_indirect_mmio,
> +			       meson_dw_hdmi->hdmitx + HDMITX_DWC_REGS,
> +			       &dwc_regmap_cfg);
> +	if (IS_ERR(map))
> +		return dev_err_probe(dev, PTR_ERR(map), "failed to init dwc regmap\n");
> +
> +	meson_dw_hdmi->dw_plat_data.regm = map;
> +
> +	return 0;
> +}
> +
> +static int meson_dw_init_regmap_g12(struct device *dev)
> +{
> +	struct meson_dw_hdmi *meson_dw_hdmi = dev_get_drvdata(dev);
> +	struct regmap *map;
> +
> +	/* Register TOP glue zone with the offset */
> +	map = devm_regmap_init_mmio(dev, meson_dw_hdmi->hdmitx + HDMITX_TOP_G12A_OFFSET,
> +				    &top_g12_regmap_cfg);
> +	if (IS_ERR(map))
> +		dev_err_probe(dev, PTR_ERR(map), "failed to init top regmap\n");
> +
> +	meson_dw_hdmi->top = map;
> +
> +	/* Register DWC zone */
> +	map = devm_regmap_init_mmio(dev, meson_dw_hdmi->hdmitx,
> +				    &dwc_regmap_cfg);
> +	if (IS_ERR(map))
> +		dev_err_probe(dev, PTR_ERR(map), "failed to init dwc regmap\n");
> +
> +	meson_dw_hdmi->dw_plat_data.regm = map;
> +
> +	return 0;
>   }
>   
> +static const struct meson_dw_hdmi_data meson_dw_hdmi_gxbb_data = {
> +	.reg_init = meson_dw_init_regmap_gx,
> +	.cntl0_init = 0x0,
> +	.cntl1_init = PHY_CNTL1_INIT | PHY_INVERT,
> +};
> +
> +static const struct meson_dw_hdmi_data meson_dw_hdmi_gxl_data = {
> +	.reg_init = meson_dw_init_regmap_gx,
> +	.cntl0_init = 0x0,
> +	.cntl1_init = PHY_CNTL1_INIT,
> +};
> +
> +static const struct meson_dw_hdmi_data meson_dw_hdmi_g12a_data = {
> +	.reg_init = meson_dw_init_regmap_g12,
> +	.cntl0_init = 0x000b4242, /* Bandgap */
> +	.cntl1_init = PHY_CNTL1_INIT,
> +};
> +
>   static int meson_dw_hdmi_bind(struct device *dev, struct device *master,
> -				void *data)
> +			      void *data)
>   {
>   	struct platform_device *pdev = to_platform_device(dev);
>   	const struct meson_dw_hdmi_data *match;
> @@ -640,6 +587,8 @@ static int meson_dw_hdmi_bind(struct device *dev, struct device *master,
>   	if (!meson_dw_hdmi)
>   		return -ENOMEM;
>   
> +	platform_set_drvdata(pdev, meson_dw_hdmi);
> +
>   	meson_dw_hdmi->priv = priv;
>   	meson_dw_hdmi->dev = dev;
>   	meson_dw_hdmi->data = match;
> @@ -682,10 +631,9 @@ static int meson_dw_hdmi_bind(struct device *dev, struct device *master,
>   	if (ret)
>   		return dev_err_probe(dev, ret, "Failed to enable all clocks\n");
>   
> -	dw_plat_data->regm = devm_regmap_init(dev, NULL, meson_dw_hdmi,
> -					      &meson_dw_hdmi_regmap_config);
> -	if (IS_ERR(dw_plat_data->regm))
> -		return PTR_ERR(dw_plat_data->regm);
> +	ret = meson_dw_hdmi->data->reg_init(dev);
> +	if (ret)
> +		return ret;
>   
>   	irq = platform_get_irq(pdev, 0);
>   	if (irq < 0)
> @@ -717,8 +665,6 @@ static int meson_dw_hdmi_bind(struct device *dev, struct device *master,
>   	    dw_hdmi_is_compatible(meson_dw_hdmi, "amlogic,meson-g12a-dw-hdmi"))
>   		dw_plat_data->use_drm_infoframe = true;
>   
> -	platform_set_drvdata(pdev, meson_dw_hdmi);
> -
>   	meson_dw_hdmi->hdmi = dw_hdmi_probe(pdev, &meson_dw_hdmi->dw_plat_data);
>   	if (IS_ERR(meson_dw_hdmi->hdmi))
>   		return PTR_ERR(meson_dw_hdmi->hdmi);
> @@ -751,8 +697,7 @@ static int __maybe_unused meson_dw_hdmi_pm_suspend(struct device *dev)
>   		return 0;
>   
>   	/* FIXME: This actually bring top out reset on suspend, why ? */
> -	meson_dw_hdmi->data->top_write(meson_dw_hdmi,
> -				       HDMITX_TOP_SW_RESET, 0);
> +	regmap_write(meson_dw_hdmi->top, HDMITX_TOP_SW_RESET, 0);
>   
>   	return 0;
>   }
> diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.h b/drivers/gpu/drm/meson/meson_dw_hdmi.h
> index 08e1c14e4ea0..3ab8c56d5fe1 100644
> --- a/drivers/gpu/drm/meson/meson_dw_hdmi.h
> +++ b/drivers/gpu/drm/meson/meson_dw_hdmi.h
> @@ -28,6 +28,7 @@
>    *     0=Release from reset. Default 1.
>    */
>   #define HDMITX_TOP_SW_RESET                     (0x000)
> +#define  TOP_RST_EN				GENMASK(4, 0)

Well NAK, the registers are named HDMITX_TOP_XXXX in the datasheet,
and TOP_XXXX defines could collide with other too generic defines,
and in any case don't mix defines renaming with other changes.

Just move the GENMASK in a new patch and leave the HDMITX_ prefix alone.

>   
>   /*
>    * Bit 31 RW free_clk_en: 0=Enable clock gating for power saving; 1= Disable
> @@ -45,7 +46,8 @@
>    * Bit 1 RW tmds_clk_en: 1=enable tmds_clk;  0=disable. Default 0.
>    * Bit 0 RW pixel_clk_en: 1=enable pixel_clk; 0=disable. Default 0.
>    */
> -#define HDMITX_TOP_CLK_CNTL                     (0x001)
> +#define HDMITX_TOP_CLK_CNTL                     (0x004)
> +#define  TOP_CLK_EN				GENMASK(7, 0)
>   
>   /*
>    * Bit 31:28 RW rxsense_glitch_width: starting from G12A
> @@ -53,7 +55,9 @@
>    * Bit 11: 0 RW hpd_valid_width: filter out width <= M*1024.    Default 0.
>    * Bit 15:12 RW hpd_glitch_width: filter out glitch <= N.       Default 0.
>    */
> -#define HDMITX_TOP_HPD_FILTER                   (0x002)
> +#define HDMITX_TOP_HPD_FILTER                   (0x008)
> +#define  TOP_HPD_GLITCH_WIDTH			GENMASK(15, 12)
> +#define  TOP_HPD_VALID_WIDTH			GENMASK(11, 0)
>   
>   /*
>    * intr_maskn: MASK_N, one bit per interrupt source.
> @@ -67,7 +71,7 @@
>    * [  1] hpd_rise_intr
>    * [  0] core_intr
>    */
> -#define HDMITX_TOP_INTR_MASKN                   (0x003)
> +#define HDMITX_TOP_INTR_MASKN                   (0x00c)
>   
>   /*
>    * Bit 30: 0 RW intr_stat: For each bit, write 1 to manually set the interrupt
> @@ -80,7 +84,7 @@
>    * Bit     1 RW hpd_rise
>    * Bit     0 RW IP interrupt
>    */
> -#define HDMITX_TOP_INTR_STAT                    (0x004)
> +#define HDMITX_TOP_INTR_STAT                    (0x010)
>   
>   /*
>    * [7]    rxsense_fall starting from G12A
> @@ -92,13 +96,12 @@
>    * [1]	  hpd_rise
>    * [0]	  core_intr_rise
>    */
> -#define HDMITX_TOP_INTR_STAT_CLR                (0x005)
> -
> -#define HDMITX_TOP_INTR_CORE		BIT(0)
> -#define HDMITX_TOP_INTR_HPD_RISE	BIT(1)
> -#define HDMITX_TOP_INTR_HPD_FALL	BIT(2)
> -#define HDMITX_TOP_INTR_RXSENSE_RISE	BIT(6)
> -#define HDMITX_TOP_INTR_RXSENSE_FALL	BIT(7)
> +#define HDMITX_TOP_INTR_STAT_CLR                (0x014)
> +#define  TOP_INTR_CORE				BIT(0)
> +#define  TOP_INTR_HPD_RISE			BIT(1)
> +#define  TOP_INTR_HPD_FALL			BIT(2)
> +#define  TOP_INTR_RXSENSE_RISE			BIT(6)
> +#define  TOP_INTR_RXSENSE_FALL			BIT(7)
>   
>   /*
>    * Bit 14:12 RW tmds_sel: 3'b000=Output zero; 3'b001=Output normal TMDS data;
> @@ -112,29 +115,31 @@
>    *     2=Output 1-bit pattern; 3=output 10-bit pattern. Default 0.
>    * Bit 0 RW prbs_pttn_en: 1=Enable PRBS generator; 0=Disable. Default 0.
>    */
> -#define HDMITX_TOP_BIST_CNTL                    (0x006)
> +#define HDMITX_TOP_BIST_CNTL                    (0x018)
> +#define  TOP_BIST_OUT_MASK			GENMASK(14, 12)
> +#define  TOP_BIST_TMDS_EN			BIT(12)
>   
>   /* Bit 29:20 RW shift_pttn_data[59:50]. Default 0. */
>   /* Bit 19:10 RW shift_pttn_data[69:60]. Default 0. */
>   /* Bit  9: 0 RW shift_pttn_data[79:70]. Default 0. */
> -#define HDMITX_TOP_SHIFT_PTTN_012               (0x007)
> +#define HDMITX_TOP_SHIFT_PTTN_012               (0x01c)
>   
>   /* Bit 29:20 RW shift_pttn_data[29:20]. Default 0. */
>   /* Bit 19:10 RW shift_pttn_data[39:30]. Default 0. */
>   /* Bit  9: 0 RW shift_pttn_data[49:40]. Default 0. */
> -#define HDMITX_TOP_SHIFT_PTTN_345               (0x008)
> +#define HDMITX_TOP_SHIFT_PTTN_345               (0x020)
>   
>   /* Bit 19:10 RW shift_pttn_data[ 9: 0]. Default 0. */
>   /* Bit  9: 0 RW shift_pttn_data[19:10]. Default 0. */
> -#define HDMITX_TOP_SHIFT_PTTN_67                (0x009)
> +#define HDMITX_TOP_SHIFT_PTTN_67                (0x024)
>   
>   /* Bit 25:16 RW tmds_clk_pttn[19:10]. Default 0. */
>   /* Bit  9: 0 RW tmds_clk_pttn[ 9: 0]. Default 0. */
> -#define HDMITX_TOP_TMDS_CLK_PTTN_01             (0x00A)
> +#define HDMITX_TOP_TMDS_CLK_PTTN_01             (0x028)
>   
>   /* Bit 25:16 RW tmds_clk_pttn[39:30]. Default 0. */
>   /* Bit  9: 0 RW tmds_clk_pttn[29:20]. Default 0. */
> -#define HDMITX_TOP_TMDS_CLK_PTTN_23             (0x00B)
> +#define HDMITX_TOP_TMDS_CLK_PTTN_23             (0x02c)
>   
>   /*
>    * Bit 1 RW shift_tmds_clk_pttn:1=Enable shifting clk pattern,
> @@ -143,18 +148,22 @@
>    * [	1] shift_tmds_clk_pttn
>    * [	0] load_tmds_clk_pttn
>    */
> -#define HDMITX_TOP_TMDS_CLK_PTTN_CNTL           (0x00C)
> +#define HDMITX_TOP_TMDS_CLK_PTTN_CNTL           (0x030)
> +#define  TOP_TDMS_CLK_PTTN_LOAD			BIT(0)
> +#define  TOP_TDMS_CLK_PTTN_SHFT			BIT(1)
>   
>   /*
>    * Bit 0 RW revocmem_wr_fail: Read back 1 to indicate Host write REVOC MEM
>    * failure, write 1 to clear the failure flag.  Default 0.
>    */
> -#define HDMITX_TOP_REVOCMEM_STAT                (0x00D)
> +#define HDMITX_TOP_REVOCMEM_STAT                (0x034)
>   
>   /*
>    * Bit	   1 R	filtered RxSense status
>    * Bit     0 R  filtered HPD status.
>    */
> -#define HDMITX_TOP_STAT0                        (0x00E)
> +#define HDMITX_TOP_STAT0                        (0x038)
> +#define  TOP_STAT0_HPD				BIT(0)
> +#define  TOP_STAT0_RXSENSE			BIT(1)
>   
>   #endif /* __MESON_DW_HDMI_H */



From neil.armstrong at linaro.org  Mon Aug 19 09:25:24 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Mon, 19 Aug 2024 18:25:24 +0200
Subject: [PATCH 7/9] drm/meson: dw-hdmi: use matched data
In-Reply-To: <20240730125023.710237-8-jbrunet@baylibre.com>
References: <20240730125023.710237-1-jbrunet@baylibre.com>
 <20240730125023.710237-8-jbrunet@baylibre.com>
Message-ID: <0e6afba4-4312-49b4-bd92-23f12faf449a@linaro.org>

On 30/07/2024 14:50, Jerome Brunet wrote:
> Using several string comparisons with if/else if/else clauses
> is fairly inefficient and does not scale well.

Inefficient in which way ? speed ? code size ?

It doesn't scale, but AFAIK Amlogic stopped using the Synopsys DWC controller after the G12B SoCs....

> 
> Use matched data to tweak the driver depending on the matched
> SoC instead.

This leads to a very overcomplicated code I'll need some time to review and understand

> 
> Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
> ---
>   drivers/gpu/drm/meson/meson_dw_hdmi.c | 209 +++++++++++++++++---------
>   1 file changed, 139 insertions(+), 70 deletions(-)
> 
> diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c
> index 7c39e5c99043..ef059c5ef520 100644
> --- a/drivers/gpu/drm/meson/meson_dw_hdmi.c
> +++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c
> @@ -125,8 +125,17 @@
>   #define HHI_HDMI_PHY_CNTL4	0x3b0 /* 0xec */
>   #define HHI_HDMI_PHY_CNTL5	0x3b4 /* 0xed */
>   
> +struct meson_dw_hdmi_speed {
> +	const struct reg_sequence *regs;
> +	unsigned int reg_num;
> +	unsigned int limit;
> +};
> +
>   struct meson_dw_hdmi_data {
>   	int (*reg_init)(struct device *dev);
> +	const struct meson_dw_hdmi_speed *speeds;
> +	unsigned int speed_num;
> +	bool use_drm_infoframe;
>   	u32 cntl0_init;
>   	u32 cntl1_init;
>   };
> @@ -185,78 +194,33 @@ struct meson_dw_hdmi {
>   	struct regmap *top;
>   };
>   
> -static inline int dw_hdmi_is_compatible(struct meson_dw_hdmi *dw_hdmi,
> -					const char *compat)
> -{
> -	return of_device_is_compatible(dw_hdmi->dev->of_node, compat);
> -}
> -
> -/* Bridge */
> -
>   /* Setup PHY bandwidth modes */
> -static void meson_hdmi_phy_setup_mode(struct meson_dw_hdmi *dw_hdmi,
> +static int meson_hdmi_phy_setup_mode(struct meson_dw_hdmi *dw_hdmi,
>   				      const struct drm_display_mode *mode,
>   				      bool mode_is_420)
>   {
>   	struct meson_drm *priv = dw_hdmi->priv;
>   	unsigned int pixel_clock = mode->clock;
> +	int i;
>   
>   	/* For 420, pixel clock is half unlike venc clock */
> -	if (mode_is_420) pixel_clock /= 2;
> -
> -	if (dw_hdmi_is_compatible(dw_hdmi, "amlogic,meson-gxl-dw-hdmi") ||
> -	    dw_hdmi_is_compatible(dw_hdmi, "amlogic,meson-gxm-dw-hdmi")) {
> -		if (pixel_clock >= 371250) {
> -			/* 5.94Gbps, 3.7125Gbps */
> -			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x333d3282);
> -			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2136315b);
> -		} else if (pixel_clock >= 297000) {
> -			/* 2.97Gbps */
> -			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33303382);
> -			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2036315b);
> -		} else if (pixel_clock >= 148500) {
> -			/* 1.485Gbps */
> -			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33303362);
> -			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2016315b);
> -		} else {
> -			/* 742.5Mbps, and below */
> -			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33604142);
> -			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x0016315b);
> -		}
> -	} else if (dw_hdmi_is_compatible(dw_hdmi,
> -					 "amlogic,meson-gxbb-dw-hdmi")) {
> -		if (pixel_clock >= 371250) {
> -			/* 5.94Gbps, 3.7125Gbps */
> -			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33353245);
> -			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2100115b);
> -		} else if (pixel_clock >= 297000) {
> -			/* 2.97Gbps */
> -			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33634283);
> -			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0xb000115b);
> -		} else {
> -			/* 1.485Gbps, and below */
> -			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33632122);
> -			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2000115b);
> -		}
> -	} else if (dw_hdmi_is_compatible(dw_hdmi,
> -					 "amlogic,meson-g12a-dw-hdmi")) {
> -		if (pixel_clock >= 371250) {
> -			/* 5.94Gbps, 3.7125Gbps */
> -			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x37eb65c4);
> -			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2ab0ff3b);
> -			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL5, 0x0000080b);
> -		} else if (pixel_clock >= 297000) {
> -			/* 2.97Gbps */
> -			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33eb6262);
> -			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2ab0ff3b);
> -			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL5, 0x00000003);
> -		} else {
> -			/* 1.485Gbps, and below */
> -			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33eb4242);
> -			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2ab0ff3b);
> -			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL5, 0x00000003);
> -		}
> +	if (mode_is_420)
> +		pixel_clock /= 2;
> +
> +	for (i = 0; i < dw_hdmi->data->speed_num; i++) {
> +		if (pixel_clock >= dw_hdmi->data->speeds[i].limit)
> +			break;
>   	}
> +
> +	/* No match found - Last entry should have a 0 limit */
> +	if (WARN_ON(i == dw_hdmi->data->speed_num))
> +		return -EINVAL;
> +
> +	regmap_multi_reg_write(priv->hhi,
> +			       dw_hdmi->data->speeds[i].regs,
> +			       dw_hdmi->data->speeds[i].reg_num);
> +
> +	return 0;
>   }
>   
>   static inline void meson_dw_hdmi_phy_reset(struct meson_dw_hdmi *dw_hdmi)
> @@ -543,22 +507,133 @@ static int meson_dw_init_regmap_g12(struct device *dev)
>   	return 0;
>   }
>   
> +static const struct reg_sequence gxbb_3g7_regs[] = {
> +	{ .reg = HHI_HDMI_PHY_CNTL0, .def = 0x33353245 },
> +	{ .reg = HHI_HDMI_PHY_CNTL3, .def = 0x2100115b },
> +};
> +
> +static const struct reg_sequence gxbb_3g_regs[] = {
> +	{ .reg = HHI_HDMI_PHY_CNTL0, .def = 0x33634283 },
> +	{ .reg = HHI_HDMI_PHY_CNTL3, .def = 0xb000115b },
> +};
> +
> +static const struct reg_sequence gxbb_def_regs[] = {
> +	{ .reg = HHI_HDMI_PHY_CNTL0, .def = 0x33632122 },
> +	{ .reg = HHI_HDMI_PHY_CNTL3, .def = 0x2000115b },
> +};
> +
> +static const struct meson_dw_hdmi_speed gxbb_speeds[] = {
> +	{
> +		.limit = 371250,
> +		.regs = gxbb_3g7_regs,
> +		.reg_num = ARRAY_SIZE(gxbb_3g7_regs)
> +	}, {
> +		.limit = 297000,
> +		.regs = gxbb_3g_regs,
> +		.reg_num = ARRAY_SIZE(gxbb_3g_regs)
> +	}, {
> +		.regs = gxbb_def_regs,
> +		.reg_num = ARRAY_SIZE(gxbb_def_regs)
> +	}
> +};
> +
>   static const struct meson_dw_hdmi_data meson_dw_hdmi_gxbb_data = {
>   	.reg_init = meson_dw_init_regmap_gx,
>   	.cntl0_init = 0x0,
>   	.cntl1_init = PHY_CNTL1_INIT | PHY_INVERT,
> +	.use_drm_infoframe = false,
> +	.speeds = gxbb_speeds,
> +	.speed_num = ARRAY_SIZE(gxbb_speeds),
> +};
> +
> +static const struct reg_sequence gxl_3g7_regs[] = {
> +	{ .reg = HHI_HDMI_PHY_CNTL0, .def = 0x333d3282 },
> +	{ .reg = HHI_HDMI_PHY_CNTL3, .def = 0x2136315b },
> +};
> +
> +static const struct reg_sequence gxl_3g_regs[] = {
> +	{ .reg = HHI_HDMI_PHY_CNTL0, .def = 0x33303382 },
> +	{ .reg = HHI_HDMI_PHY_CNTL3, .def = 0x2036315b },
> +};
> +
> +static const struct reg_sequence gxl_def_regs[] = {
> +	{ .reg = HHI_HDMI_PHY_CNTL0, .def = 0x33303362 },
> +	{ .reg = HHI_HDMI_PHY_CNTL3, .def = 0x2016315b },
> +};
> +
> +static const struct reg_sequence gxl_270m_regs[] = {
> +	{ .reg = HHI_HDMI_PHY_CNTL0, .def = 0x33604142 },
> +	{ .reg = HHI_HDMI_PHY_CNTL3, .def = 0x0016315b },
> +};
> +
> +static const struct meson_dw_hdmi_speed gxl_speeds[] = {
> +	{
> +		.limit = 371250,
> +		.regs = gxl_3g7_regs,
> +		.reg_num = ARRAY_SIZE(gxl_3g7_regs)
> +	}, {
> +		.limit = 297000,
> +		.regs = gxl_3g_regs,
> +		.reg_num = ARRAY_SIZE(gxl_3g_regs)
> +	}, {
> +		.limit = 148500,
> +		.regs = gxl_def_regs,
> +		.reg_num = ARRAY_SIZE(gxl_def_regs)
> +	}, {
> +		.regs = gxl_270m_regs,
> +		.reg_num = ARRAY_SIZE(gxl_270m_regs)
> +	}
>   };
>   
>   static const struct meson_dw_hdmi_data meson_dw_hdmi_gxl_data = {
>   	.reg_init = meson_dw_init_regmap_gx,
>   	.cntl0_init = 0x0,
>   	.cntl1_init = PHY_CNTL1_INIT,
> +	.use_drm_infoframe = true,
> +	.speeds = gxl_speeds,
> +	.speed_num = ARRAY_SIZE(gxl_speeds),
> +};
> +
> +static const struct reg_sequence g12a_3g7_regs[] = {
> +	{ .reg = HHI_HDMI_PHY_CNTL0, .def = 0x37eb65c4 },
> +	{ .reg = HHI_HDMI_PHY_CNTL3, .def = 0x2ab0ff3b },
> +	{ .reg = HHI_HDMI_PHY_CNTL5, .def = 0x0000080b },
> +};
> +
> +static const struct reg_sequence g12a_3g_regs[] = {
> +	{ .reg = HHI_HDMI_PHY_CNTL0, .def = 0x33eb6262 },
> +	{ .reg = HHI_HDMI_PHY_CNTL3, .def = 0x2ab0ff3b },
> +	{ .reg = HHI_HDMI_PHY_CNTL5, .def = 0x00000003 },
> +};
> +
> +static const struct reg_sequence g12a_def_regs[] = {
> +	{ .reg = HHI_HDMI_PHY_CNTL0, .def = 0x33eb4242 },
> +	{ .reg = HHI_HDMI_PHY_CNTL3, .def = 0x2ab0ff3b },
> +	{ .reg = HHI_HDMI_PHY_CNTL5, .def = 0x00000003 },
> +};
> +
> +static const struct meson_dw_hdmi_speed g12a_speeds[] = {
> +	{
> +		.limit = 371250,
> +		.regs = g12a_3g7_regs,
> +		.reg_num = ARRAY_SIZE(g12a_3g7_regs)
> +	}, {
> +		.limit = 297000,
> +		.regs = g12a_3g_regs,
> +		.reg_num = ARRAY_SIZE(g12a_3g_regs)
> +	}, {
> +		.regs = g12a_def_regs,
> +		.reg_num = ARRAY_SIZE(g12a_def_regs)
> +	}
>   };
>   
>   static const struct meson_dw_hdmi_data meson_dw_hdmi_g12a_data = {
>   	.reg_init = meson_dw_init_regmap_g12,
>   	.cntl0_init = 0x000b4242, /* Bandgap */
>   	.cntl1_init = PHY_CNTL1_INIT,
> +	.use_drm_infoframe = true,
> +	.speeds = g12a_speeds,
> +	.speed_num = ARRAY_SIZE(g12a_speeds),
>   };
>   
>   static int meson_dw_hdmi_bind(struct device *dev, struct device *master,
> @@ -590,7 +665,6 @@ static int meson_dw_hdmi_bind(struct device *dev, struct device *master,
>   	platform_set_drvdata(pdev, meson_dw_hdmi);
>   
>   	meson_dw_hdmi->priv = priv;
> -	meson_dw_hdmi->dev = dev;

Unrelated change

>   	meson_dw_hdmi->data = match;
>   	dw_plat_data = &meson_dw_hdmi->dw_plat_data;
>   
> @@ -650,7 +724,6 @@ static int meson_dw_hdmi_bind(struct device *dev, struct device *master,
>   	meson_dw_hdmi_init(meson_dw_hdmi);
>   
>   	/* Bridge / Connector */
> -

Unrelated change

>   	dw_plat_data->priv_data = meson_dw_hdmi;
>   	dw_plat_data->phy_ops = &meson_dw_hdmi_phy_ops;
>   	dw_plat_data->phy_name = "meson_dw_hdmi_phy";
> @@ -659,11 +732,7 @@ static int meson_dw_hdmi_bind(struct device *dev, struct device *master,
>   	dw_plat_data->ycbcr_420_allowed = true;
>   	dw_plat_data->disable_cec = true;
>   	dw_plat_data->output_port = 1;
> -
> -	if (dw_hdmi_is_compatible(meson_dw_hdmi, "amlogic,meson-gxl-dw-hdmi") ||
> -	    dw_hdmi_is_compatible(meson_dw_hdmi, "amlogic,meson-gxm-dw-hdmi") ||
> -	    dw_hdmi_is_compatible(meson_dw_hdmi, "amlogic,meson-g12a-dw-hdmi"))
> -		dw_plat_data->use_drm_infoframe = true;
> +	dw_plat_data->use_drm_infoframe = meson_dw_hdmi->data->use_drm_infoframe;

Move this to a separate patch

>   
>   	meson_dw_hdmi->hdmi = dw_hdmi_probe(pdev, &meson_dw_hdmi->dw_plat_data);
>   	if (IS_ERR(meson_dw_hdmi->hdmi))



From neil.armstrong at linaro.org  Mon Aug 19 09:27:24 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Mon, 19 Aug 2024 18:27:24 +0200
Subject: [PATCH LATER 8/9] drm/meson: dw-hdmi: don't write power
 controller registers
In-Reply-To: <20240730125023.710237-9-jbrunet@baylibre.com>
References: <20240730125023.710237-1-jbrunet@baylibre.com>
 <20240730125023.710237-9-jbrunet@baylibre.com>
Message-ID: <e8c91a84-bfef-42c0-9e20-91676bb3843d@linaro.org>

On 30/07/2024 14:50, Jerome Brunet wrote:
> The HDMI phy has a power domain properly set in DT.
> 
> Writing the power controller register directly from the hdmi driver is
> incorrect. The power domain framework should be used for that.
> 
> HHI is a collection of Amlogic devices, such as clocks, reset,
> power domains and phys.
> 
> This is another step to get rid of HHI access in Amlogic display drivers
> and possibly stop using the component API.
> 
> Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
> ---
> 
>   This change depends on:
>   * f1ab099d6591 ("arm64: dts: amlogic: add power domain to hdmitx")
> 
> Time is needed for these changes to sink in u-boot and distros,
> making this change safe to apply.


Well no, we will basically need to wait until none of the stable and long-stable kernel stops
shipping a kernel without this change, but you can check if a power-domain have been associated
with the device and do the same.

> 
>   drivers/gpu/drm/meson/meson_dw_hdmi.c | 4 ----
>   1 file changed, 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c
> index ef059c5ef520..6c18d97b8b16 100644
> --- a/drivers/gpu/drm/meson/meson_dw_hdmi.c
> +++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c
> @@ -111,7 +111,6 @@
>   #define HDMITX_TOP_G12A_OFFSET	0x8000
>   
>   /* HHI Registers */
> -#define HHI_MEM_PD_REG0		0x100 /* 0x40 */
>   #define HHI_HDMI_CLK_CNTL	0x1cc /* 0x73 */
>   #define HHI_HDMI_PHY_CNTL0	0x3a0 /* 0xe8 */
>   #define HHI_HDMI_PHY_CNTL1	0x3a4 /* 0xe9 */
> @@ -423,9 +422,6 @@ static void meson_dw_hdmi_init(struct meson_dw_hdmi *meson_dw_hdmi)
>   	/* Enable clocks */
>   	regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, 0xffff, 0x100);
>   
> -	/* Bring HDMITX MEM output of power down */
> -	regmap_update_bits(priv->hhi, HHI_MEM_PD_REG0, 0xff << 8, 0);
> -
>   	/* Bring out of reset */
>   	regmap_write(meson_dw_hdmi->top, HDMITX_TOP_SW_RESET, 0);
>   	msleep(20);



From neil.armstrong at linaro.org  Mon Aug 19 09:29:22 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Mon, 19 Aug 2024 18:29:22 +0200
Subject: [PATCH v3 2/9] reset: amlogic: use generic data matching function
In-Reply-To: <20240808102742.4095904-3-jbrunet@baylibre.com>
References: <20240808102742.4095904-1-jbrunet@baylibre.com>
 <20240808102742.4095904-3-jbrunet@baylibre.com>
Message-ID: <8cae4536-52ff-4e54-ba15-6376dd9129ca@linaro.org>

On 08/08/2024 12:27, Jerome Brunet wrote:
> There is no need to use the DT specific function to get
> matching data, use the generic one instead
> 
> Suggested-by: Stephen Boyd <sboyd at kernel.org>
> Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
> ---
>   drivers/reset/reset-meson.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c
> index b47431a21b86..820905779acd 100644
> --- a/drivers/reset/reset-meson.c
> +++ b/drivers/reset/reset-meson.c
> @@ -128,7 +128,7 @@ static int meson_reset_probe(struct platform_device *pdev)
>   	if (IS_ERR(base))
>   		return PTR_ERR(base);
>   
> -	data->param = of_device_get_match_data(dev);
> +	data->param = device_get_match_data(dev);
>   	if (!data->param)
>   		return -ENODEV;
>   

Reviewed-by: Neil Armstrong <neil.armstrong at linaro.org>


From neil.armstrong at linaro.org  Mon Aug 19 09:29:30 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Mon, 19 Aug 2024 18:29:30 +0200
Subject: [PATCH v3 3/9] reset: amlogic: make parameters unsigned
In-Reply-To: <20240808102742.4095904-4-jbrunet@baylibre.com>
References: <20240808102742.4095904-1-jbrunet@baylibre.com>
 <20240808102742.4095904-4-jbrunet@baylibre.com>
Message-ID: <b828b63d-e1a8-4c9b-9001-da686dffeb64@linaro.org>

On 08/08/2024 12:27, Jerome Brunet wrote:
> register count and offset cannot be negative. Use unsigned integer
> for this.
> 
> Suggested-by: Stephen Boyd <sboyd at kernel.org>
> Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
> ---
>   drivers/reset/reset-meson.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c
> index 820905779acd..460ad2f8360f 100644
> --- a/drivers/reset/reset-meson.c
> +++ b/drivers/reset/reset-meson.c
> @@ -17,8 +17,8 @@
>   #include <linux/types.h>
>   
>   struct meson_reset_param {
> -	int reg_count;
> -	int level_offset;
> +	unsigned int reg_count;
> +	unsigned int level_offset;
>   };
>   
>   struct meson_reset {

Reviewed-by: Neil Armstrong <neil.armstrong at linaro.org>


From neil.armstrong at linaro.org  Mon Aug 19 09:30:01 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Mon, 19 Aug 2024 18:30:01 +0200
Subject: [PATCH v3 5/9] reset: amlogic: use reset number instead of
 register count
In-Reply-To: <20240808102742.4095904-6-jbrunet@baylibre.com>
References: <20240808102742.4095904-1-jbrunet@baylibre.com>
 <20240808102742.4095904-6-jbrunet@baylibre.com>
Message-ID: <a6ca8b79-8b64-4427-a625-abd61ffa7b21@linaro.org>

On 08/08/2024 12:27, Jerome Brunet wrote:
> The reset driver from audio clock controller may register less
> reset than a register can hold. To avoid making any change while
> switching to auxiliary support, use the number of reset instead of the
> register count to define the bounds of the reset controller.
> 
> Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
> ---
>   drivers/reset/reset-meson.c | 11 +++++------
>   1 file changed, 5 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c
> index 8addd100e601..5b6f934c0265 100644
> --- a/drivers/reset/reset-meson.c
> +++ b/drivers/reset/reset-meson.c
> @@ -17,7 +17,7 @@
>   #include <linux/types.h>
>   
>   struct meson_reset_param {
> -	unsigned int reg_count;
> +	unsigned int reset_num;
>   	unsigned int reset_offset;
>   	unsigned int level_offset;
>   	bool level_low_reset;
> @@ -87,21 +87,21 @@ static const struct reset_control_ops meson_reset_ops = {
>   };
>   
>   static const struct meson_reset_param meson8b_param = {
> -	.reg_count	= 8,
> +	.reset_num	= 256,
>   	.reset_offset	= 0x0,
>   	.level_offset	= 0x7c,
>   	.level_low_reset = true,
>   };
>   
>   static const struct meson_reset_param meson_a1_param = {
> -	.reg_count	= 3,
> +	.reset_num	= 96,
>   	.reset_offset	= 0x0,
>   	.level_offset	= 0x40,
>   	.level_low_reset = true,
>   };
>   
>   static const struct meson_reset_param meson_s4_param = {
> -	.reg_count	= 6,
> +	.reset_num	= 192,
>   	.reset_offset	= 0x0,
>   	.level_offset	= 0x40,
>   	.level_low_reset = true,
> @@ -148,8 +148,7 @@ static int meson_reset_probe(struct platform_device *pdev)
>   				     "can't init regmap mmio region\n");
>   
>   	data->rcdev.owner = THIS_MODULE;
> -	data->rcdev.nr_resets = data->param->reg_count * BITS_PER_BYTE
> -		* regmap_config.reg_stride;
> +	data->rcdev.nr_resets = data->param->reset_num;
>   	data->rcdev.ops = &meson_reset_ops;
>   	data->rcdev.of_node = dev->of_node;
>   

Reviewed-by: Neil Armstrong <neil.armstrong at linaro.org>


From neil.armstrong at linaro.org  Mon Aug 19 09:31:06 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Mon, 19 Aug 2024 18:31:06 +0200
Subject: [PATCH v3 6/9] reset: amlogic: add reset status support
In-Reply-To: <20240808102742.4095904-7-jbrunet@baylibre.com>
References: <20240808102742.4095904-1-jbrunet@baylibre.com>
 <20240808102742.4095904-7-jbrunet@baylibre.com>
Message-ID: <0bbbf439-9722-4140-8044-78b71b2f23af@linaro.org>

On 08/08/2024 12:27, Jerome Brunet wrote:
> Add a callback to check the status of the level reset, as done in
> the reset driver of the audio clock controller.
> 
> This is done keep the functionality when the audio reset controller
> get migrated to meson-reset.
> 
> Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
> ---
>   drivers/reset/reset-meson.c | 20 ++++++++++++++++++--
>   1 file changed, 18 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c
> index 5b6f934c0265..b16d9c32adb1 100644
> --- a/drivers/reset/reset-meson.c
> +++ b/drivers/reset/reset-meson.c
> @@ -56,8 +56,7 @@ static int meson_reset_reset(struct reset_controller_dev *rcdev,
>   static int meson_reset_level(struct reset_controller_dev *rcdev,
>   			    unsigned long id, bool assert)
>   {
> -	struct meson_reset *data =
> -		container_of(rcdev, struct meson_reset, rcdev);
> +	struct meson_reset *data = container_of(rcdev, struct meson_reset, rcdev);

Unrelated change

>   	unsigned int offset, bit;
>   
>   	meson_reset_offset_and_bit(data, id, &offset, &bit);
> @@ -68,6 +67,22 @@ static int meson_reset_level(struct reset_controller_dev *rcdev,
>   				  BIT(bit), assert ? BIT(bit) : 0);
>   }
>   
> +static int meson_reset_status(struct reset_controller_dev *rcdev,
> +			      unsigned long id)
> +{
> +	struct meson_reset *data =
> +		container_of(rcdev, struct meson_reset, rcdev);
> +	unsigned int val, offset, bit;
> +
> +	meson_reset_offset_and_bit(data, id, &offset, &bit);
> +	offset += data->param->level_offset;
> +
> +	regmap_read(data->map, offset, &val);
> +	val = !!(BIT(bit) & val);
> +
> +	return val ^ data->param->level_low_reset;
> +}
> +
>   static int meson_reset_assert(struct reset_controller_dev *rcdev,
>   			      unsigned long id)
>   {
> @@ -84,6 +99,7 @@ static const struct reset_control_ops meson_reset_ops = {
>   	.reset		= meson_reset_reset,
>   	.assert		= meson_reset_assert,
>   	.deassert	= meson_reset_deassert,
> +	.status		= meson_reset_status,
>   };
>   
>   static const struct meson_reset_param meson8b_param = {


with the first change removed:
Reviewed-by: Neil Armstrong <neil.armstrong at linaro.org>



From neil.armstrong at linaro.org  Mon Aug 19 09:31:22 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Mon, 19 Aug 2024 18:31:22 +0200
Subject: [PATCH v3 7/9] reset: amlogic: move drivers to a dedicated
 directory
In-Reply-To: <20240808102742.4095904-8-jbrunet@baylibre.com>
References: <20240808102742.4095904-1-jbrunet@baylibre.com>
 <20240808102742.4095904-8-jbrunet@baylibre.com>
Message-ID: <ef485c77-e68b-48b9-9560-159d933bbbc0@linaro.org>

On 08/08/2024 12:27, Jerome Brunet wrote:
> The meson reset driver will be split in two part, one implemeting the ops,
> the other providing the platform driver support. This will be done to
> facilitate the addition of the auxiliary bus support.
> 
> To avoid making a mess in drivers/reset/ while doing so, move the amlogic
> reset drivers to a dedicated directory.
> 
> Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
> ---
>   drivers/reset/Kconfig                             | 15 +--------------
>   drivers/reset/Makefile                            |  3 +--
>   drivers/reset/amlogic/Kconfig                     | 13 +++++++++++++
>   drivers/reset/amlogic/Makefile                    |  2 ++
>   .../reset/{ => amlogic}/reset-meson-audio-arb.c   |  0
>   drivers/reset/{ => amlogic}/reset-meson.c         |  0
>   6 files changed, 17 insertions(+), 16 deletions(-)
>   create mode 100644 drivers/reset/amlogic/Kconfig
>   create mode 100644 drivers/reset/amlogic/Makefile
>   rename drivers/reset/{ => amlogic}/reset-meson-audio-arb.c (100%)
>   rename drivers/reset/{ => amlogic}/reset-meson.c (100%)
> 
> diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
> index 67bce340a87e..0c092ae1b411 100644
> --- a/drivers/reset/Kconfig
> +++ b/drivers/reset/Kconfig
> @@ -140,20 +140,6 @@ config RESET_MCHP_SPARX5
>   	help
>   	  This driver supports switch core reset for the Microchip Sparx5 SoC.
>   
> -config RESET_MESON
> -	tristate "Meson Reset Driver"
> -	depends on ARCH_MESON || COMPILE_TEST
> -	default ARCH_MESON
> -	help
> -	  This enables the reset driver for Amlogic Meson SoCs.
> -
> -config RESET_MESON_AUDIO_ARB
> -	tristate "Meson Audio Memory Arbiter Reset Driver"
> -	depends on ARCH_MESON || COMPILE_TEST
> -	help
> -	  This enables the reset driver for Audio Memory Arbiter of
> -	  Amlogic's A113 based SoCs
> -
>   config RESET_NPCM
>   	bool "NPCM BMC Reset Driver" if COMPILE_TEST
>   	default ARCH_NPCM
> @@ -343,6 +329,7 @@ config RESET_ZYNQMP
>   	help
>   	  This enables the reset controller driver for Xilinx ZynqMP SoCs.
>   
> +source "drivers/reset/amlogic/Kconfig"
>   source "drivers/reset/starfive/Kconfig"
>   source "drivers/reset/sti/Kconfig"
>   source "drivers/reset/hisilicon/Kconfig"
> diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
> index 27b0bbdfcc04..bf089176c9f4 100644
> --- a/drivers/reset/Makefile
> +++ b/drivers/reset/Makefile
> @@ -1,5 +1,6 @@
>   # SPDX-License-Identifier: GPL-2.0
>   obj-y += core.o
> +obj-y += amlogic/
>   obj-y += hisilicon/
>   obj-y += starfive/
>   obj-y += sti/
> @@ -20,8 +21,6 @@ obj-$(CONFIG_RESET_K210) += reset-k210.o
>   obj-$(CONFIG_RESET_LANTIQ) += reset-lantiq.o
>   obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o
>   obj-$(CONFIG_RESET_MCHP_SPARX5) += reset-microchip-sparx5.o
> -obj-$(CONFIG_RESET_MESON) += reset-meson.o
> -obj-$(CONFIG_RESET_MESON_AUDIO_ARB) += reset-meson-audio-arb.o
>   obj-$(CONFIG_RESET_NPCM) += reset-npcm.o
>   obj-$(CONFIG_RESET_NUVOTON_MA35D1) += reset-ma35d1.o
>   obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o
> diff --git a/drivers/reset/amlogic/Kconfig b/drivers/reset/amlogic/Kconfig
> new file mode 100644
> index 000000000000..7ed9cf50f038
> --- /dev/null
> +++ b/drivers/reset/amlogic/Kconfig
> @@ -0,0 +1,13 @@
> +config RESET_MESON
> +	tristate "Meson Reset Driver"
> +	depends on ARCH_MESON || COMPILE_TEST
> +	default ARCH_MESON
> +	help
> +	  This enables the reset driver for Amlogic Meson SoCs.
> +
> +config RESET_MESON_AUDIO_ARB
> +	tristate "Meson Audio Memory Arbiter Reset Driver"
> +	depends on ARCH_MESON || COMPILE_TEST
> +	help
> +	  This enables the reset driver for Audio Memory Arbiter of
> +	  Amlogic's A113 based SoCs
> diff --git a/drivers/reset/amlogic/Makefile b/drivers/reset/amlogic/Makefile
> new file mode 100644
> index 000000000000..55509fc78513
> --- /dev/null
> +++ b/drivers/reset/amlogic/Makefile
> @@ -0,0 +1,2 @@
> +obj-$(CONFIG_RESET_MESON) += reset-meson.o
> +obj-$(CONFIG_RESET_MESON_AUDIO_ARB) += reset-meson-audio-arb.o
> diff --git a/drivers/reset/reset-meson-audio-arb.c b/drivers/reset/amlogic/reset-meson-audio-arb.c
> similarity index 100%
> rename from drivers/reset/reset-meson-audio-arb.c
> rename to drivers/reset/amlogic/reset-meson-audio-arb.c
> diff --git a/drivers/reset/reset-meson.c b/drivers/reset/amlogic/reset-meson.c
> similarity index 100%
> rename from drivers/reset/reset-meson.c
> rename to drivers/reset/amlogic/reset-meson.c

Reviewed-by: Neil Armstrong <neil.armstrong at linaro.org>


From neil.armstrong at linaro.org  Mon Aug 19 09:33:58 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Mon, 19 Aug 2024 18:33:58 +0200
Subject: [PATCH v3 8/9] reset: amlogic: split the device core and platform
 probe
In-Reply-To: <20240808102742.4095904-9-jbrunet@baylibre.com>
References: <20240808102742.4095904-1-jbrunet@baylibre.com>
 <20240808102742.4095904-9-jbrunet@baylibre.com>
Message-ID: <812c6ddc-1929-46c4-bac7-4bd0f5ccc213@linaro.org>

On 08/08/2024 12:27, Jerome Brunet wrote:
> To prepare the addition of the auxiliary device support, split
> out the device core function from the probe of the platform device.
> 
> The device core function will be common to both the platform and auxiliary
> driver.
> 
> Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
> ---
>   drivers/reset/amlogic/Kconfig                 |  10 +-
>   drivers/reset/amlogic/Makefile                |   3 +-
>   .../{reset-meson.c => reset-meson-core.c}     | 101 +++---------------
>   drivers/reset/amlogic/reset-meson-pltf.c      |  92 ++++++++++++++++

Are we still in 1983 ? please use reset-meson-platform and drop pltf completely

>   drivers/reset/amlogic/reset-meson.h           |  24 +++++
>   5 files changed, 143 insertions(+), 87 deletions(-)
>   rename drivers/reset/amlogic/{reset-meson.c => reset-meson-core.c} (51%)
>   create mode 100644 drivers/reset/amlogic/reset-meson-pltf.c
>   create mode 100644 drivers/reset/amlogic/reset-meson.h
> 
> diff --git a/drivers/reset/amlogic/Kconfig b/drivers/reset/amlogic/Kconfig
> index 7ed9cf50f038..04c7be0f3165 100644
> --- a/drivers/reset/amlogic/Kconfig
> +++ b/drivers/reset/amlogic/Kconfig
> @@ -1,9 +1,15 @@
> +config RESET_MESON_CORE
> +	tristate
> +	select REGMAP
> +
>   config RESET_MESON
> -	tristate "Meson Reset Driver"
> +	tristate "Meson Reset Platform Driver"
>   	depends on ARCH_MESON || COMPILE_TEST
>   	default ARCH_MESON
> +	select REGMAP_MMIO
> +	select RESET_MESON_CORE
>   	help
> -	  This enables the reset driver for Amlogic Meson SoCs.
> +	  This enables the reset platform driver for Amlogic SoCs.
>   
>   config RESET_MESON_AUDIO_ARB
>   	tristate "Meson Audio Memory Arbiter Reset Driver"
> diff --git a/drivers/reset/amlogic/Makefile b/drivers/reset/amlogic/Makefile
> index 55509fc78513..0f8f9121b566 100644
> --- a/drivers/reset/amlogic/Makefile
> +++ b/drivers/reset/amlogic/Makefile
> @@ -1,2 +1,3 @@
> -obj-$(CONFIG_RESET_MESON) += reset-meson.o
> +obj-$(CONFIG_RESET_MESON) += reset-meson-pltf.o
> +obj-$(CONFIG_RESET_MESON_CORE) += reset-meson-core.o
>   obj-$(CONFIG_RESET_MESON_AUDIO_ARB) += reset-meson-audio-arb.o
> diff --git a/drivers/reset/amlogic/reset-meson.c b/drivers/reset/amlogic/reset-meson-core.c
> similarity index 51%
> rename from drivers/reset/amlogic/reset-meson.c
> rename to drivers/reset/amlogic/reset-meson-core.c
> index b16d9c32adb1..ea4fc562f7e6 100644
> --- a/drivers/reset/amlogic/reset-meson.c
> +++ b/drivers/reset/amlogic/reset-meson-core.c
> @@ -1,27 +1,17 @@
>   // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
>   /*
> - * Amlogic Meson Reset Controller driver
> + * Amlogic Meson Reset core functions
>    *
> - * Copyright (c) 2016 BayLibre, SAS.
> - * Author: Neil Armstrong <narmstrong at baylibre.com>

Hmmm no, I'm still an author

> + * Copyright (c) 2024 BayLibre, SAS.

And Baylibre's Copyright is still from 2016, so use 2016-2024 in this case

> + * Author: Jerome Brunet <jbrunet at baylibre.com>
>    */
> -#include <linux/err.h>
> -#include <linux/init.h>
> -#include <linux/io.h>
> -#include <linux/of.h>
> +
> +#include <linux/device.h>
>   #include <linux/module.h>
> -#include <linux/platform_device.h>
>   #include <linux/regmap.h>
>   #include <linux/reset-controller.h>
> -#include <linux/slab.h>
> -#include <linux/types.h>
> -
> -struct meson_reset_param {
> -	unsigned int reset_num;
> -	unsigned int reset_offset;
> -	unsigned int level_offset;
> -	bool level_low_reset;
> -};
> +
> +#include "reset-meson.h"
>   
>   struct meson_reset {
>   	const struct meson_reset_param *param;
> @@ -102,84 +92,27 @@ static const struct reset_control_ops meson_reset_ops = {
>   	.status		= meson_reset_status,
>   };
>   
> -static const struct meson_reset_param meson8b_param = {
> -	.reset_num	= 256,
> -	.reset_offset	= 0x0,
> -	.level_offset	= 0x7c,
> -	.level_low_reset = true,
> -};
> -
> -static const struct meson_reset_param meson_a1_param = {
> -	.reset_num	= 96,
> -	.reset_offset	= 0x0,
> -	.level_offset	= 0x40,
> -	.level_low_reset = true,
> -};
> -
> -static const struct meson_reset_param meson_s4_param = {
> -	.reset_num	= 192,
> -	.reset_offset	= 0x0,
> -	.level_offset	= 0x40,
> -	.level_low_reset = true,
> -};
> -
> -static const struct of_device_id meson_reset_dt_ids[] = {
> -	 { .compatible = "amlogic,meson8b-reset",    .data = &meson8b_param},
> -	 { .compatible = "amlogic,meson-gxbb-reset", .data = &meson8b_param},
> -	 { .compatible = "amlogic,meson-axg-reset",  .data = &meson8b_param},
> -	 { .compatible = "amlogic,meson-a1-reset",   .data = &meson_a1_param},
> -	 { .compatible = "amlogic,meson-s4-reset",   .data = &meson_s4_param},
> -	 { .compatible = "amlogic,c3-reset",   .data = &meson_s4_param},
> -	 { /* sentinel */ },
> -};
> -MODULE_DEVICE_TABLE(of, meson_reset_dt_ids);
> -
> -static const struct regmap_config regmap_config = {
> -	.reg_bits   = 32,
> -	.val_bits   = 32,
> -	.reg_stride = 4,
> -};
> -
> -static int meson_reset_probe(struct platform_device *pdev)
> +int meson_reset_probe(struct device *dev, struct regmap *map,
> +		      const struct meson_reset_param *param)
>   {
> -	struct device *dev = &pdev->dev;
>   	struct meson_reset *data;
> -	void __iomem *base;
>   
>   	data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
>   	if (!data)
>   		return -ENOMEM;
>   
> -	base = devm_platform_ioremap_resource(pdev, 0);
> -	if (IS_ERR(base))
> -		return PTR_ERR(base);
> -
> -	data->param = device_get_match_data(dev);
> -	if (!data->param)
> -		return -ENODEV;
> -
> -	data->map = devm_regmap_init_mmio(dev, base, &regmap_config);
> -	if (IS_ERR(data->map))
> -		return dev_err_probe(dev, PTR_ERR(data->map),
> -				     "can't init regmap mmio region\n");
> -
> -	data->rcdev.owner = THIS_MODULE;
> -	data->rcdev.nr_resets = data->param->reset_num;
> +	data->param = param;
> +	data->map = map;
> +	data->rcdev.owner = dev->driver->owner;
> +	data->rcdev.nr_resets = param->reset_num;
>   	data->rcdev.ops = &meson_reset_ops;
>   	data->rcdev.of_node = dev->of_node;
>   
>   	return devm_reset_controller_register(dev, &data->rcdev);
>   }
> +EXPORT_SYMBOL_NS_GPL(meson_reset_probe, MESON_RESET);
>   
> -static struct platform_driver meson_reset_driver = {
> -	.probe	= meson_reset_probe,
> -	.driver = {
> -		.name		= "meson_reset",
> -		.of_match_table	= meson_reset_dt_ids,
> -	},
> -};
> -module_platform_driver(meson_reset_driver);
> -
> -MODULE_DESCRIPTION("Amlogic Meson Reset Controller driver");
> +MODULE_DESCRIPTION("Amlogic Meson Reset Core function");
>   MODULE_AUTHOR("Neil Armstrong <narmstrong at baylibre.com>");
> -MODULE_LICENSE("Dual BSD/GPL");
> +MODULE_AUTHOR("Jerome Brunet <jbrunet at baylibre.com>");
> +MODULE_IMPORT_NS(MESON_RESET);
> diff --git a/drivers/reset/amlogic/reset-meson-pltf.c b/drivers/reset/amlogic/reset-meson-pltf.c
> new file mode 100644
> index 000000000000..97e933b4aa34
> --- /dev/null
> +++ b/drivers/reset/amlogic/reset-meson-pltf.c
> @@ -0,0 +1,92 @@
> +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
> +/*
> + * Amlogic Meson Reset platform driver
> + *
> + * Copyright (c) 2016 BayLibre, SAS.
> + * Author: Neil Armstrong <narmstrong at baylibre.com>
> + */
> +#include <linux/err.h>
> +#include <linux/io.h>
> +#include <linux/of.h>
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/regmap.h>
> +#include <linux/reset-controller.h>
> +
> +#include "reset-meson.h"
> +
> +static const struct meson_reset_param meson8b_param = {
> +	.reset_num	= 256,
> +	.reset_offset	= 0x0,
> +	.level_offset	= 0x7c,
> +	.level_low_reset = true,
> +};
> +
> +static const struct meson_reset_param meson_a1_param = {
> +	.reset_num	= 96,
> +	.reset_offset	= 0x0,
> +	.level_offset	= 0x40,
> +	.level_low_reset = true,
> +};
> +
> +static const struct meson_reset_param meson_s4_param = {
> +	.reset_num	= 192,
> +	.reset_offset	= 0x0,
> +	.level_offset	= 0x40,
> +	.level_low_reset = true,
> +};
> +
> +static const struct of_device_id meson_reset_dt_ids[] = {
> +	 { .compatible = "amlogic,meson8b-reset",    .data = &meson8b_param},
> +	 { .compatible = "amlogic,meson-gxbb-reset", .data = &meson8b_param},
> +	 { .compatible = "amlogic,meson-axg-reset",  .data = &meson8b_param},
> +	 { .compatible = "amlogic,meson-a1-reset",   .data = &meson_a1_param},
> +	 { .compatible = "amlogic,meson-s4-reset",   .data = &meson_s4_param},
> +	 { .compatible = "amlogic,c3-reset",   .data = &meson_s4_param},
> +	 { /* sentinel */ },
> +};
> +MODULE_DEVICE_TABLE(of, meson_reset_dt_ids);
> +
> +static const struct regmap_config regmap_config = {
> +	.reg_bits   = 32,
> +	.val_bits   = 32,
> +	.reg_stride = 4,
> +};
> +
> +static int meson_reset_pltf_probe(struct platform_device *pdev)
> +{
> +	const struct meson_reset_param *param;
> +	struct device *dev = &pdev->dev;
> +	struct regmap *map;
> +	void __iomem *base;
> +
> +	base = devm_platform_ioremap_resource(pdev, 0);
> +	if (IS_ERR(base))
> +		return PTR_ERR(base);
> +
> +	param = device_get_match_data(dev);
> +	if (!param)
> +		return -ENODEV;
> +
> +	map = devm_regmap_init_mmio(dev, base, &regmap_config);
> +	if (IS_ERR(map))
> +		return dev_err_probe(dev, PTR_ERR(map),
> +				     "can't init regmap mmio region\n");
> +
> +	return meson_reset_probe(dev, map, param);
> +}
> +
> +static struct platform_driver meson_reset_pltf_driver = {
> +	.probe	= meson_reset_pltf_probe,
> +	.driver = {
> +		.name		= "meson_reset",
> +		.of_match_table	= meson_reset_dt_ids,
> +	},
> +};
> +module_platform_driver(meson_reset_pltf_driver);
> +
> +MODULE_DESCRIPTION("Amlogic Meson Reset Platform Controller driver");
> +MODULE_AUTHOR("Neil Armstrong <narmstrong at baylibre.com>");
> +MODULE_AUTHOR("Jerome Brunet <jbrunet at baylibre.com>");
> +MODULE_LICENSE("Dual BSD/GPL");
> +MODULE_IMPORT_NS(MESON_RESET);
> diff --git a/drivers/reset/amlogic/reset-meson.h b/drivers/reset/amlogic/reset-meson.h
> new file mode 100644
> index 000000000000..c2e8a5cf2e46
> --- /dev/null
> +++ b/drivers/reset/amlogic/reset-meson.h
> @@ -0,0 +1,24 @@
> +/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
> +/*
> + * Copyright (c) 2024 BayLibre, SAS.
> + * Author: Jerome Brunet <jbrunet at baylibre.com>
> + */
> +
> +#ifndef __MESON_RESET_CORE_H
> +#define __MESON_RESET_CORE_H
> +
> +#include <linux/module.h>
> +#include <linux/regmap.h>
> +#include <linux/reset-controller.h>
> +
> +struct meson_reset_param {
> +	unsigned int reset_num;
> +	unsigned int reset_offset;
> +	unsigned int level_offset;
> +	bool level_low_reset;
> +};
> +
> +int meson_reset_probe(struct device *dev, struct regmap *map,
> +		      const struct meson_reset_param *param);
> +
> +#endif /* __MESON_RESET_CORE_H */



From neil.armstrong at linaro.org  Mon Aug 19 09:35:23 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Mon, 19 Aug 2024 18:35:23 +0200
Subject: [PATCH v3 9/9] reset: amlogic: add auxiliary reset driver support
In-Reply-To: <20240808102742.4095904-10-jbrunet@baylibre.com>
References: <20240808102742.4095904-1-jbrunet@baylibre.com>
 <20240808102742.4095904-10-jbrunet@baylibre.com>
Message-ID: <161bd6fe-825a-434d-bbef-0a9e449fec5f@linaro.org>

On 08/08/2024 12:27, Jerome Brunet wrote:
> Add support for the reset controller present in the audio clock
> controller of the g12 and sm1 SoC families, using the auxiliary bus.
> 
> This is expected to replace the driver currently present directly
> within the related clock driver.
> 
> Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
> ---
>   drivers/reset/amlogic/Kconfig               |   8 ++
>   drivers/reset/amlogic/Makefile              |   1 +
>   drivers/reset/amlogic/reset-meson-aux.c     | 136 ++++++++++++++++++++
>   drivers/reset/amlogic/reset-meson-core.c    |  25 +++-
>   drivers/reset/amlogic/reset-meson-pltf.c    |   3 +
>   drivers/reset/amlogic/reset-meson.h         |   4 +
>   include/soc/amlogic/meson-auxiliary-reset.h |  23 ++++
>   7 files changed, 198 insertions(+), 2 deletions(-)
>   create mode 100644 drivers/reset/amlogic/reset-meson-aux.c
>   create mode 100644 include/soc/amlogic/meson-auxiliary-reset.h


I thing the header name should be include/soc/amlogic/reset-meson-aux.h

> 
> diff --git a/drivers/reset/amlogic/Kconfig b/drivers/reset/amlogic/Kconfig
> index 04c7be0f3165..ee1c7620a2b1 100644
> --- a/drivers/reset/amlogic/Kconfig
> +++ b/drivers/reset/amlogic/Kconfig
> @@ -11,6 +11,14 @@ config RESET_MESON
>   	help
>   	  This enables the reset platform driver for Amlogic SoCs.
>   
> +config RESET_MESON_AUX
> +	tristate "Meson Reset Platform Driver"
> +	depends on ARCH_MESON || COMPILE_TEST
> +	select AUXILIARY_BUS
> +	select RESET_MESON_CORE
> +	help
> +	  This enables the reset auxiliary driver for Amlogic SoCs.
> +
>   config RESET_MESON_AUDIO_ARB
>   	tristate "Meson Audio Memory Arbiter Reset Driver"
>   	depends on ARCH_MESON || COMPILE_TEST
> diff --git a/drivers/reset/amlogic/Makefile b/drivers/reset/amlogic/Makefile
> index 0f8f9121b566..5d53a4b11ed9 100644
> --- a/drivers/reset/amlogic/Makefile
> +++ b/drivers/reset/amlogic/Makefile
> @@ -1,3 +1,4 @@
>   obj-$(CONFIG_RESET_MESON) += reset-meson-pltf.o
> +obj-$(CONFIG_RESET_MESON_AUX) += reset-meson-aux.o
>   obj-$(CONFIG_RESET_MESON_CORE) += reset-meson-core.o
>   obj-$(CONFIG_RESET_MESON_AUDIO_ARB) += reset-meson-audio-arb.o
> diff --git a/drivers/reset/amlogic/reset-meson-aux.c b/drivers/reset/amlogic/reset-meson-aux.c
> new file mode 100644
> index 000000000000..caf26eb67c14
> --- /dev/null
> +++ b/drivers/reset/amlogic/reset-meson-aux.c
> @@ -0,0 +1,136 @@
> +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
> +/*
> + * Amlogic Meson Reset Auxiliary driver
> + *
> + * Copyright (c) 2024 BayLibre, SAS.
> + * Author: Jerome Brunet <jbrunet at baylibre.com>
> + */
> +
> +#include <linux/err.h>
> +#include <linux/module.h>
> +#include <linux/auxiliary_bus.h>
> +#include <linux/regmap.h>
> +#include <linux/reset-controller.h>
> +#include <linux/slab.h>
> +
> +#include "reset-meson.h"
> +#include <soc/amlogic/meson-auxiliary-reset.h>
> +
> +static DEFINE_IDA(meson_rst_aux_ida);
> +
> +struct meson_reset_adev {
> +	struct auxiliary_device adev;
> +	struct regmap *map;
> +};
> +
> +#define to_meson_reset_adev(_adev) \
> +	container_of((_adev), struct meson_reset_adev, adev)
> +
> +static const struct meson_reset_param meson_g12a_audio_param = {
> +	.reset_ops	= &meson_reset_toggle_ops,
> +	.reset_num	= 26,
> +	.level_offset	= 0x24,
> +};
> +
> +static const struct meson_reset_param meson_sm1_audio_param = {
> +	.reset_ops	= &meson_reset_toggle_ops,
> +	.reset_num	= 39,
> +	.level_offset	= 0x28,
> +};
> +
> +static const struct auxiliary_device_id meson_reset_aux_ids[] = {
> +	{
> +		.name = "axg-audio-clkc.rst-g12a",
> +		.driver_data = (kernel_ulong_t)&meson_g12a_audio_param,
> +	}, {
> +		.name = "axg-audio-clkc.rst-sm1",
> +		.driver_data = (kernel_ulong_t)&meson_sm1_audio_param,
> +	}, {}
> +};
> +MODULE_DEVICE_TABLE(auxiliary, meson_reset_aux_ids);
> +
> +static int meson_reset_aux_probe(struct auxiliary_device *adev,
> +				 const struct auxiliary_device_id *id)
> +{
> +	const struct meson_reset_param *param =
> +		(const struct meson_reset_param *)(id->driver_data);
> +	struct meson_reset_adev *raux =
> +		to_meson_reset_adev(adev);
> +
> +	return meson_reset_probe(&adev->dev, raux->map, param);
> +}
> +
> +static struct auxiliary_driver meson_reset_aux_driver = {
> +	.probe		= meson_reset_aux_probe,
> +	.id_table	= meson_reset_aux_ids,
> +};
> +module_auxiliary_driver(meson_reset_aux_driver);
> +
> +static void meson_rst_aux_release(struct device *dev)
> +{
> +	struct auxiliary_device *adev = to_auxiliary_dev(dev);
> +	struct meson_reset_adev *raux =
> +		to_meson_reset_adev(adev);
> +
> +	ida_free(&meson_rst_aux_ida, adev->id);
> +	kfree(raux);
> +}
> +
> +static void meson_rst_aux_unregister_adev(void *_adev)
> +{
> +	struct auxiliary_device *adev = _adev;
> +
> +	auxiliary_device_delete(adev);
> +	auxiliary_device_uninit(adev);
> +}
> +
> +int devm_meson_rst_aux_register(struct device *dev,
> +				struct regmap *map,
> +				const char *adev_name)
> +{
> +	struct meson_reset_adev *raux;
> +	struct auxiliary_device *adev;
> +	int ret;
> +
> +	raux = kzalloc(sizeof(*raux), GFP_KERNEL);
> +	if (!raux)
> +		return -ENOMEM;
> +
> +	ret = ida_alloc(&meson_rst_aux_ida, GFP_KERNEL);
> +	if (ret < 0)
> +		goto raux_free;
> +
> +	raux->map = map;
> +
> +	adev = &raux->adev;
> +	adev->id = ret;
> +	adev->name = adev_name;
> +	adev->dev.parent = dev;
> +	adev->dev.release = meson_rst_aux_release;
> +	device_set_of_node_from_dev(&adev->dev, dev);
> +
> +	ret = auxiliary_device_init(adev);
> +	if (ret)
> +		goto ida_free;
> +
> +	ret = __auxiliary_device_add(adev, dev->driver->name);
> +	if (ret) {
> +		auxiliary_device_uninit(adev);
> +		return ret;
> +	}
> +
> +	return devm_add_action_or_reset(dev, meson_rst_aux_unregister_adev,
> +					adev);
> +
> +ida_free:
> +	ida_free(&meson_rst_aux_ida, adev->id);
> +raux_free:
> +	kfree(raux);
> +	return ret;
> +}
> +EXPORT_SYMBOL_GPL(devm_meson_rst_aux_register);
> +
> +MODULE_DESCRIPTION("Amlogic Meson Reset Auxiliary driver");
> +MODULE_AUTHOR("Jerome Brunet <jbrunet at baylibre.com>");
> +MODULE_LICENSE("Dual BSD/GPL");
> +MODULE_IMPORT_NS(MESON_RESET);
> diff --git a/drivers/reset/amlogic/reset-meson-core.c b/drivers/reset/amlogic/reset-meson-core.c
> index ea4fc562f7e6..774902527d17 100644
> --- a/drivers/reset/amlogic/reset-meson-core.c
> +++ b/drivers/reset/amlogic/reset-meson-core.c
> @@ -85,12 +85,33 @@ static int meson_reset_deassert(struct reset_controller_dev *rcdev,
>   	return meson_reset_level(rcdev, id, false);
>   }
>   
> -static const struct reset_control_ops meson_reset_ops = {
> +static int meson_reset_level_toggle(struct reset_controller_dev *rcdev,
> +				    unsigned long id)
> +{
> +	int ret;
> +
> +	ret = meson_reset_assert(rcdev, id);
> +	if (ret)
> +		return ret;
> +
> +	return meson_reset_deassert(rcdev, id);
> +}
> +
> +const struct reset_control_ops meson_reset_ops = {
>   	.reset		= meson_reset_reset,
>   	.assert		= meson_reset_assert,
>   	.deassert	= meson_reset_deassert,
>   	.status		= meson_reset_status,
>   };
> +EXPORT_SYMBOL_NS_GPL(meson_reset_ops, MESON_RESET);
> +
> +const struct reset_control_ops meson_reset_toggle_ops = {
> +	.reset		= meson_reset_level_toggle,
> +	.assert		= meson_reset_assert,
> +	.deassert	= meson_reset_deassert,
> +	.status		= meson_reset_status,
> +};
> +EXPORT_SYMBOL_NS_GPL(meson_reset_toggle_ops, MESON_RESET);
>   
>   int meson_reset_probe(struct device *dev, struct regmap *map,
>   		      const struct meson_reset_param *param)
> @@ -105,7 +126,7 @@ int meson_reset_probe(struct device *dev, struct regmap *map,
>   	data->map = map;
>   	data->rcdev.owner = dev->driver->owner;
>   	data->rcdev.nr_resets = param->reset_num;
> -	data->rcdev.ops = &meson_reset_ops;
> +	data->rcdev.ops = data->param->reset_ops;
>   	data->rcdev.of_node = dev->of_node;
>   
>   	return devm_reset_controller_register(dev, &data->rcdev);
> diff --git a/drivers/reset/amlogic/reset-meson-pltf.c b/drivers/reset/amlogic/reset-meson-pltf.c
> index 97e933b4aa34..2bc3ea42c6ec 100644
> --- a/drivers/reset/amlogic/reset-meson-pltf.c
> +++ b/drivers/reset/amlogic/reset-meson-pltf.c
> @@ -16,6 +16,7 @@
>   #include "reset-meson.h"
>   
>   static const struct meson_reset_param meson8b_param = {
> +	.reset_ops	= &meson_reset_ops,
>   	.reset_num	= 256,
>   	.reset_offset	= 0x0,
>   	.level_offset	= 0x7c,
> @@ -23,6 +24,7 @@ static const struct meson_reset_param meson8b_param = {
>   };
>   
>   static const struct meson_reset_param meson_a1_param = {
> +	.reset_ops	= &meson_reset_ops,
>   	.reset_num	= 96,
>   	.reset_offset	= 0x0,
>   	.level_offset	= 0x40,
> @@ -30,6 +32,7 @@ static const struct meson_reset_param meson_a1_param = {
>   };
>   
>   static const struct meson_reset_param meson_s4_param = {
> +	.reset_ops	= &meson_reset_ops,
>   	.reset_num	= 192,
>   	.reset_offset	= 0x0,
>   	.level_offset	= 0x40,
> diff --git a/drivers/reset/amlogic/reset-meson.h b/drivers/reset/amlogic/reset-meson.h
> index c2e8a5cf2e46..5ab2ac9ab2e5 100644
> --- a/drivers/reset/amlogic/reset-meson.h
> +++ b/drivers/reset/amlogic/reset-meson.h
> @@ -12,6 +12,7 @@
>   #include <linux/reset-controller.h>
>   
>   struct meson_reset_param {
> +	const struct reset_control_ops *reset_ops;
>   	unsigned int reset_num;
>   	unsigned int reset_offset;
>   	unsigned int level_offset;
> @@ -21,4 +22,7 @@ struct meson_reset_param {
>   int meson_reset_probe(struct device *dev, struct regmap *map,
>   		      const struct meson_reset_param *param);
>   
> +extern const struct reset_control_ops meson_reset_ops;
> +extern const struct reset_control_ops meson_reset_toggle_ops;
> +
>   #endif /* __MESON_RESET_CORE_H */
> diff --git a/include/soc/amlogic/meson-auxiliary-reset.h b/include/soc/amlogic/meson-auxiliary-reset.h
> new file mode 100644
> index 000000000000..f70dd864ef6a
> --- /dev/null
> +++ b/include/soc/amlogic/meson-auxiliary-reset.h
> @@ -0,0 +1,23 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +#ifndef __SOC_AMLOGIC_MESON_AUX_RESET_H
> +#define __SOC_AMLOGIC_MESON_AUX_RESET_H
> +
> +#include <linux/err.h>
> +
> +struct device;
> +struct regmap;
> +
> +#if IS_ENABLED(CONFIG_RESET_MESON_AUX)
> +int devm_meson_rst_aux_register(struct device *dev,
> +				struct regmap *map,
> +				const char *adev_name);
> +#else
> +static inline int devm_meson_rst_aux_register(struct device *dev,
> +					      struct regmap *map,
> +					      const char *adev_name)
> +{
> +	return 0;
> +}
> +#endif
> +
> +#endif /* __SOC_AMLOGIC_MESON_AUX_RESET_H */



From jbrunet at baylibre.com  Mon Aug 19 09:40:02 2024
From: jbrunet at baylibre.com (Jerome Brunet)
Date: Mon, 19 Aug 2024 18:40:02 +0200
Subject: [PATCH v3 4/9] reset: amlogic: add driver parameters
In-Reply-To: <614de1b0-fcaf-457c-9183-1f3cd7f91b38@linaro.org> (Neil
	Armstrong's message of "Mon, 19 Aug 2024 17:57:40 +0200")
References: <20240808102742.4095904-1-jbrunet@baylibre.com>
	<20240808102742.4095904-5-jbrunet@baylibre.com>
	<614de1b0-fcaf-457c-9183-1f3cd7f91b38@linaro.org>
Message-ID: <1jzfp8wjod.fsf@starbuckisacylon.baylibre.com>

On Mon 19 Aug 2024 at 17:57, Neil Armstrong <neil.armstrong at linaro.org> wrote:

>> +	assert ^= data->param->level_low_reset;
>>     	return regmap_update_bits(data->map, offset,
>> -				  BIT(bit), assert ? 0 : BIT(bit));
>> +				  BIT(bit), assert ? BIT(bit) : 0);
>>   }
>>     static int meson_reset_assert(struct reset_controller_dev *rcdev,
>> @@ -84,17 +88,23 @@ static const struct reset_control_ops meson_reset_ops = {
>>     static const struct meson_reset_param meson8b_param = {
>>   	.reg_count	= 8,
>> +	.reset_offset	= 0x0,
>>   	.level_offset	= 0x7c,
>> +	.level_low_reset = true,
>>   };
>>     static const struct meson_reset_param meson_a1_param = {
>>   	.reg_count	= 3,
>> +	.reset_offset	= 0x0,
>>   	.level_offset	= 0x40,
>> +	.level_low_reset = true,
>>   };
>>     static const struct meson_reset_param meson_s4_param = {
>>   	.reg_count	= 6,
>> +	.reset_offset	= 0x0,
>>   	.level_offset	= 0x40,
>> +	.level_low_reset = true,
>
> Just a comment, I would rather leave the "default" users of this driver with the default value
> and use level_high_reset = true for the clock ones

In every other place in the kernel, we specify that kind of thing if it
is acitve low. Your request make things up-side-down and harder to
follow IMO.

There is no 'default' user, there is the platform ones and auxiliary ones.
Platform ones tend to active low reset line. It is clearly shown above
and hard to miss when adding new platforms.

>
> Neil
>
>>   };
>>     static const struct of_device_id meson_reset_dt_ids[] = {

-- 
Jerome


From jbrunet at baylibre.com  Mon Aug 19 09:49:17 2024
From: jbrunet at baylibre.com (Jerome Brunet)
Date: Mon, 19 Aug 2024 18:49:17 +0200
Subject: [PATCH v3 8/9] reset: amlogic: split the device core and
 platform probe
In-Reply-To: <812c6ddc-1929-46c4-bac7-4bd0f5ccc213@linaro.org> (Neil
	Armstrong's message of "Mon, 19 Aug 2024 18:33:58 +0200")
References: <20240808102742.4095904-1-jbrunet@baylibre.com>
	<20240808102742.4095904-9-jbrunet@baylibre.com>
	<812c6ddc-1929-46c4-bac7-4bd0f5ccc213@linaro.org>
Message-ID: <1jsev0wj8y.fsf@starbuckisacylon.baylibre.com>

On Mon 19 Aug 2024 at 18:33, Neil Armstrong <neil.armstrong at linaro.org> wrote:

> On 08/08/2024 12:27, Jerome Brunet wrote:
>> To prepare the addition of the auxiliary device support, split
>> out the device core function from the probe of the platform device.
>> The device core function will be common to both the platform and
>> auxiliary
>> driver.
>> Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
>> ---
>>   drivers/reset/amlogic/Kconfig                 |  10 +-
>>   drivers/reset/amlogic/Makefile                |   3 +-
>>   .../{reset-meson.c => reset-meson-core.c}     | 101 +++---------------
>>   drivers/reset/amlogic/reset-meson-pltf.c      |  92 ++++++++++++++++
>
> Are we still in 1983 ?

I don't quite get that remark or how it is helping the review.

> please use reset-meson-platform and drop pltf completely

You are requesting auxiliary -> aux on the patch.
So which one will it be ?

>
>>   drivers/reset/amlogic/reset-meson.h           |  24 +++++
>>   5 files changed, 143 insertions(+), 87 deletions(-)
>>   rename drivers/reset/amlogic/{reset-meson.c => reset-meson-core.c} (51%)
>>   create mode 100644 drivers/reset/amlogic/reset-meson-pltf.c
>>   create mode 100644 drivers/reset/amlogic/reset-meson.h
>> diff --git a/drivers/reset/amlogic/Kconfig
>> b/drivers/reset/amlogic/Kconfig
>> index 7ed9cf50f038..04c7be0f3165 100644
>> --- a/drivers/reset/amlogic/Kconfig
>> +++ b/drivers/reset/amlogic/Kconfig
>> @@ -1,9 +1,15 @@
>> +config RESET_MESON_CORE
>> +	tristate
>> +	select REGMAP
>> +
>>   config RESET_MESON
>> -	tristate "Meson Reset Driver"
>> +	tristate "Meson Reset Platform Driver"
>>   	depends on ARCH_MESON || COMPILE_TEST
>>   	default ARCH_MESON
>> +	select REGMAP_MMIO
>> +	select RESET_MESON_CORE
>>   	help
>> -	  This enables the reset driver for Amlogic Meson SoCs.
>> +	  This enables the reset platform driver for Amlogic SoCs.
>>     config RESET_MESON_AUDIO_ARB
>>   	tristate "Meson Audio Memory Arbiter Reset Driver"
>> diff --git a/drivers/reset/amlogic/Makefile b/drivers/reset/amlogic/Makefile
>> index 55509fc78513..0f8f9121b566 100644
>> --- a/drivers/reset/amlogic/Makefile
>> +++ b/drivers/reset/amlogic/Makefile
>> @@ -1,2 +1,3 @@
>> -obj-$(CONFIG_RESET_MESON) += reset-meson.o
>> +obj-$(CONFIG_RESET_MESON) += reset-meson-pltf.o
>> +obj-$(CONFIG_RESET_MESON_CORE) += reset-meson-core.o
>>   obj-$(CONFIG_RESET_MESON_AUDIO_ARB) += reset-meson-audio-arb.o
>> diff --git a/drivers/reset/amlogic/reset-meson.c b/drivers/reset/amlogic/reset-meson-core.c
>> similarity index 51%
>> rename from drivers/reset/amlogic/reset-meson.c
>> rename to drivers/reset/amlogic/reset-meson-core.c
>> index b16d9c32adb1..ea4fc562f7e6 100644
>> --- a/drivers/reset/amlogic/reset-meson.c
>> +++ b/drivers/reset/amlogic/reset-meson-core.c
>> @@ -1,27 +1,17 @@
>>   // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
>>   /*
>> - * Amlogic Meson Reset Controller driver
>> + * Amlogic Meson Reset core functions
>>    *
>> - * Copyright (c) 2016 BayLibre, SAS.
>> - * Author: Neil Armstrong <narmstrong at baylibre.com>
>
> Hmmm no, I'm still an author
>
>> + * Copyright (c) 2024 BayLibre, SAS.
>
> And Baylibre's Copyright is still from 2016, so use 2016-2024 in this case
>
>> + * Author: Jerome Brunet <jbrunet at baylibre.com>
>>    */
>> -#include <linux/err.h>
>> -#include <linux/init.h>
>> -#include <linux/io.h>
>> -#include <linux/of.h>
>> +
>> +#include <linux/device.h>
>>   #include <linux/module.h>
>> -#include <linux/platform_device.h>
>>   #include <linux/regmap.h>
>>   #include <linux/reset-controller.h>
>> -#include <linux/slab.h>
>> -#include <linux/types.h>
>> -
>> -struct meson_reset_param {
>> -	unsigned int reset_num;
>> -	unsigned int reset_offset;
>> -	unsigned int level_offset;
>> -	bool level_low_reset;
>> -};
>> +
>> +#include "reset-meson.h"
>>     struct meson_reset {
>>   	const struct meson_reset_param *param;
>> @@ -102,84 +92,27 @@ static const struct reset_control_ops meson_reset_ops = {
>>   	.status		= meson_reset_status,
>>   };
>>   -static const struct meson_reset_param meson8b_param = {
>> -	.reset_num	= 256,
>> -	.reset_offset	= 0x0,
>> -	.level_offset	= 0x7c,
>> -	.level_low_reset = true,
>> -};
>> -
>> -static const struct meson_reset_param meson_a1_param = {
>> -	.reset_num	= 96,
>> -	.reset_offset	= 0x0,
>> -	.level_offset	= 0x40,
>> -	.level_low_reset = true,
>> -};
>> -
>> -static const struct meson_reset_param meson_s4_param = {
>> -	.reset_num	= 192,
>> -	.reset_offset	= 0x0,
>> -	.level_offset	= 0x40,
>> -	.level_low_reset = true,
>> -};
>> -
>> -static const struct of_device_id meson_reset_dt_ids[] = {
>> -	 { .compatible = "amlogic,meson8b-reset",    .data = &meson8b_param},
>> -	 { .compatible = "amlogic,meson-gxbb-reset", .data = &meson8b_param},
>> -	 { .compatible = "amlogic,meson-axg-reset",  .data = &meson8b_param},
>> -	 { .compatible = "amlogic,meson-a1-reset",   .data = &meson_a1_param},
>> -	 { .compatible = "amlogic,meson-s4-reset",   .data = &meson_s4_param},
>> -	 { .compatible = "amlogic,c3-reset",   .data = &meson_s4_param},
>> -	 { /* sentinel */ },
>> -};
>> -MODULE_DEVICE_TABLE(of, meson_reset_dt_ids);
>> -
>> -static const struct regmap_config regmap_config = {
>> -	.reg_bits   = 32,
>> -	.val_bits   = 32,
>> -	.reg_stride = 4,
>> -};
>> -
>> -static int meson_reset_probe(struct platform_device *pdev)
>> +int meson_reset_probe(struct device *dev, struct regmap *map,
>> +		      const struct meson_reset_param *param)
>>   {
>> -	struct device *dev = &pdev->dev;
>>   	struct meson_reset *data;
>> -	void __iomem *base;
>>     	data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
>>   	if (!data)
>>   		return -ENOMEM;
>>   -	base = devm_platform_ioremap_resource(pdev, 0);
>> -	if (IS_ERR(base))
>> -		return PTR_ERR(base);
>> -
>> -	data->param = device_get_match_data(dev);
>> -	if (!data->param)
>> -		return -ENODEV;
>> -
>> -	data->map = devm_regmap_init_mmio(dev, base, &regmap_config);
>> -	if (IS_ERR(data->map))
>> -		return dev_err_probe(dev, PTR_ERR(data->map),
>> -				     "can't init regmap mmio region\n");
>> -
>> -	data->rcdev.owner = THIS_MODULE;
>> -	data->rcdev.nr_resets = data->param->reset_num;
>> +	data->param = param;
>> +	data->map = map;
>> +	data->rcdev.owner = dev->driver->owner;
>> +	data->rcdev.nr_resets = param->reset_num;
>>   	data->rcdev.ops = &meson_reset_ops;
>>   	data->rcdev.of_node = dev->of_node;
>>     	return devm_reset_controller_register(dev, &data->rcdev);
>>   }
>> +EXPORT_SYMBOL_NS_GPL(meson_reset_probe, MESON_RESET);
>>   -static struct platform_driver meson_reset_driver = {
>> -	.probe	= meson_reset_probe,
>> -	.driver = {
>> -		.name		= "meson_reset",
>> -		.of_match_table	= meson_reset_dt_ids,
>> -	},
>> -};
>> -module_platform_driver(meson_reset_driver);
>> -
>> -MODULE_DESCRIPTION("Amlogic Meson Reset Controller driver");
>> +MODULE_DESCRIPTION("Amlogic Meson Reset Core function");
>>   MODULE_AUTHOR("Neil Armstrong <narmstrong at baylibre.com>");
>> -MODULE_LICENSE("Dual BSD/GPL");
>> +MODULE_AUTHOR("Jerome Brunet <jbrunet at baylibre.com>");
>> +MODULE_IMPORT_NS(MESON_RESET);
>> diff --git a/drivers/reset/amlogic/reset-meson-pltf.c b/drivers/reset/amlogic/reset-meson-pltf.c
>> new file mode 100644
>> index 000000000000..97e933b4aa34
>> --- /dev/null
>> +++ b/drivers/reset/amlogic/reset-meson-pltf.c
>> @@ -0,0 +1,92 @@
>> +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
>> +/*
>> + * Amlogic Meson Reset platform driver
>> + *
>> + * Copyright (c) 2016 BayLibre, SAS.
>> + * Author: Neil Armstrong <narmstrong at baylibre.com>
>> + */
>> +#include <linux/err.h>
>> +#include <linux/io.h>
>> +#include <linux/of.h>
>> +#include <linux/module.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/regmap.h>
>> +#include <linux/reset-controller.h>
>> +
>> +#include "reset-meson.h"
>> +
>> +static const struct meson_reset_param meson8b_param = {
>> +	.reset_num	= 256,
>> +	.reset_offset	= 0x0,
>> +	.level_offset	= 0x7c,
>> +	.level_low_reset = true,
>> +};
>> +
>> +static const struct meson_reset_param meson_a1_param = {
>> +	.reset_num	= 96,
>> +	.reset_offset	= 0x0,
>> +	.level_offset	= 0x40,
>> +	.level_low_reset = true,
>> +};
>> +
>> +static const struct meson_reset_param meson_s4_param = {
>> +	.reset_num	= 192,
>> +	.reset_offset	= 0x0,
>> +	.level_offset	= 0x40,
>> +	.level_low_reset = true,
>> +};
>> +
>> +static const struct of_device_id meson_reset_dt_ids[] = {
>> +	 { .compatible = "amlogic,meson8b-reset",    .data = &meson8b_param},
>> +	 { .compatible = "amlogic,meson-gxbb-reset", .data = &meson8b_param},
>> +	 { .compatible = "amlogic,meson-axg-reset",  .data = &meson8b_param},
>> +	 { .compatible = "amlogic,meson-a1-reset",   .data = &meson_a1_param},
>> +	 { .compatible = "amlogic,meson-s4-reset",   .data = &meson_s4_param},
>> +	 { .compatible = "amlogic,c3-reset",   .data = &meson_s4_param},
>> +	 { /* sentinel */ },
>> +};
>> +MODULE_DEVICE_TABLE(of, meson_reset_dt_ids);
>> +
>> +static const struct regmap_config regmap_config = {
>> +	.reg_bits   = 32,
>> +	.val_bits   = 32,
>> +	.reg_stride = 4,
>> +};
>> +
>> +static int meson_reset_pltf_probe(struct platform_device *pdev)
>> +{
>> +	const struct meson_reset_param *param;
>> +	struct device *dev = &pdev->dev;
>> +	struct regmap *map;
>> +	void __iomem *base;
>> +
>> +	base = devm_platform_ioremap_resource(pdev, 0);
>> +	if (IS_ERR(base))
>> +		return PTR_ERR(base);
>> +
>> +	param = device_get_match_data(dev);
>> +	if (!param)
>> +		return -ENODEV;
>> +
>> +	map = devm_regmap_init_mmio(dev, base, &regmap_config);
>> +	if (IS_ERR(map))
>> +		return dev_err_probe(dev, PTR_ERR(map),
>> +				     "can't init regmap mmio region\n");
>> +
>> +	return meson_reset_probe(dev, map, param);
>> +}
>> +
>> +static struct platform_driver meson_reset_pltf_driver = {
>> +	.probe	= meson_reset_pltf_probe,
>> +	.driver = {
>> +		.name		= "meson_reset",
>> +		.of_match_table	= meson_reset_dt_ids,
>> +	},
>> +};
>> +module_platform_driver(meson_reset_pltf_driver);
>> +
>> +MODULE_DESCRIPTION("Amlogic Meson Reset Platform Controller driver");
>> +MODULE_AUTHOR("Neil Armstrong <narmstrong at baylibre.com>");
>> +MODULE_AUTHOR("Jerome Brunet <jbrunet at baylibre.com>");
>> +MODULE_LICENSE("Dual BSD/GPL");
>> +MODULE_IMPORT_NS(MESON_RESET);
>> diff --git a/drivers/reset/amlogic/reset-meson.h b/drivers/reset/amlogic/reset-meson.h
>> new file mode 100644
>> index 000000000000..c2e8a5cf2e46
>> --- /dev/null
>> +++ b/drivers/reset/amlogic/reset-meson.h
>> @@ -0,0 +1,24 @@
>> +/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
>> +/*
>> + * Copyright (c) 2024 BayLibre, SAS.
>> + * Author: Jerome Brunet <jbrunet at baylibre.com>
>> + */
>> +
>> +#ifndef __MESON_RESET_CORE_H
>> +#define __MESON_RESET_CORE_H
>> +
>> +#include <linux/module.h>
>> +#include <linux/regmap.h>
>> +#include <linux/reset-controller.h>
>> +
>> +struct meson_reset_param {
>> +	unsigned int reset_num;
>> +	unsigned int reset_offset;
>> +	unsigned int level_offset;
>> +	bool level_low_reset;
>> +};
>> +
>> +int meson_reset_probe(struct device *dev, struct regmap *map,
>> +		      const struct meson_reset_param *param);
>> +
>> +#endif /* __MESON_RESET_CORE_H */

-- 
Jerome


From neil.armstrong at linaro.org  Mon Aug 19 09:57:34 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Mon, 19 Aug 2024 18:57:34 +0200
Subject: [PATCH v3 8/9] reset: amlogic: split the device core and platform
 probe
In-Reply-To: <1jsev0wj8y.fsf@starbuckisacylon.baylibre.com>
References: <20240808102742.4095904-1-jbrunet@baylibre.com>
 <20240808102742.4095904-9-jbrunet@baylibre.com>
 <812c6ddc-1929-46c4-bac7-4bd0f5ccc213@linaro.org>
 <1jsev0wj8y.fsf@starbuckisacylon.baylibre.com>
Message-ID: <a0a06241-537d-4ffe-9921-4c79c4080044@linaro.org>

On 19/08/2024 18:49, Jerome Brunet wrote:
> On Mon 19 Aug 2024 at 18:33, Neil Armstrong <neil.armstrong at linaro.org> wrote:
> 
>> On 08/08/2024 12:27, Jerome Brunet wrote:
>>> To prepare the addition of the auxiliary device support, split
>>> out the device core function from the probe of the platform device.
>>> The device core function will be common to both the platform and
>>> auxiliary
>>> driver.
>>> Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
>>> ---
>>>    drivers/reset/amlogic/Kconfig                 |  10 +-
>>>    drivers/reset/amlogic/Makefile                |   3 +-
>>>    .../{reset-meson.c => reset-meson-core.c}     | 101 +++---------------
>>>    drivers/reset/amlogic/reset-meson-pltf.c      |  92 ++++++++++++++++
>>
>> Are we still in 1983 ?
> 
> I don't quite get that remark or how it is helping the review.
> 
>> please use reset-meson-platform and drop pltf completely
> 
> You are requesting auxiliary -> aux on the patch.
> So which one will it be ?

`aux` is easy to read and understandable because written on all multimedia appliances
over the world for the last 40years, plft is not

> 
>>
>>>    drivers/reset/amlogic/reset-meson.h           |  24 +++++
>>>    5 files changed, 143 insertions(+), 87 deletions(-)
>>>    rename drivers/reset/amlogic/{reset-meson.c => reset-meson-core.c} (51%)
>>>    create mode 100644 drivers/reset/amlogic/reset-meson-pltf.c
>>>    create mode 100644 drivers/reset/amlogic/reset-meson.h
>>> diff --git a/drivers/reset/amlogic/Kconfig
>>> b/drivers/reset/amlogic/Kconfig
>>> index 7ed9cf50f038..04c7be0f3165 100644
>>> --- a/drivers/reset/amlogic/Kconfig
>>> +++ b/drivers/reset/amlogic/Kconfig
>>> @@ -1,9 +1,15 @@
>>> +config RESET_MESON_CORE
>>> +	tristate
>>> +	select REGMAP
>>> +
>>>    config RESET_MESON
>>> -	tristate "Meson Reset Driver"
>>> +	tristate "Meson Reset Platform Driver"
>>>    	depends on ARCH_MESON || COMPILE_TEST
>>>    	default ARCH_MESON
>>> +	select REGMAP_MMIO
>>> +	select RESET_MESON_CORE
>>>    	help
>>> -	  This enables the reset driver for Amlogic Meson SoCs.
>>> +	  This enables the reset platform driver for Amlogic SoCs.
>>>      config RESET_MESON_AUDIO_ARB
>>>    	tristate "Meson Audio Memory Arbiter Reset Driver"
>>> diff --git a/drivers/reset/amlogic/Makefile b/drivers/reset/amlogic/Makefile
>>> index 55509fc78513..0f8f9121b566 100644
>>> --- a/drivers/reset/amlogic/Makefile
>>> +++ b/drivers/reset/amlogic/Makefile
>>> @@ -1,2 +1,3 @@
>>> -obj-$(CONFIG_RESET_MESON) += reset-meson.o
>>> +obj-$(CONFIG_RESET_MESON) += reset-meson-pltf.o
>>> +obj-$(CONFIG_RESET_MESON_CORE) += reset-meson-core.o
>>>    obj-$(CONFIG_RESET_MESON_AUDIO_ARB) += reset-meson-audio-arb.o
>>> diff --git a/drivers/reset/amlogic/reset-meson.c b/drivers/reset/amlogic/reset-meson-core.c
>>> similarity index 51%
>>> rename from drivers/reset/amlogic/reset-meson.c
>>> rename to drivers/reset/amlogic/reset-meson-core.c
>>> index b16d9c32adb1..ea4fc562f7e6 100644
>>> --- a/drivers/reset/amlogic/reset-meson.c
>>> +++ b/drivers/reset/amlogic/reset-meson-core.c
>>> @@ -1,27 +1,17 @@
>>>    // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
>>>    /*
>>> - * Amlogic Meson Reset Controller driver
>>> + * Amlogic Meson Reset core functions
>>>     *
>>> - * Copyright (c) 2016 BayLibre, SAS.
>>> - * Author: Neil Armstrong <narmstrong at baylibre.com>
>>
>> Hmmm no, I'm still an author
>>
>>> + * Copyright (c) 2024 BayLibre, SAS.
>>
>> And Baylibre's Copyright is still from 2016, so use 2016-2024 in this case
>>
>>> + * Author: Jerome Brunet <jbrunet at baylibre.com>
>>>     */
>>> -#include <linux/err.h>
>>> -#include <linux/init.h>
>>> -#include <linux/io.h>
>>> -#include <linux/of.h>
>>> +
>>> +#include <linux/device.h>
>>>    #include <linux/module.h>
>>> -#include <linux/platform_device.h>
>>>    #include <linux/regmap.h>
>>>    #include <linux/reset-controller.h>
>>> -#include <linux/slab.h>
>>> -#include <linux/types.h>
>>> -
>>> -struct meson_reset_param {
>>> -	unsigned int reset_num;
>>> -	unsigned int reset_offset;
>>> -	unsigned int level_offset;
>>> -	bool level_low_reset;
>>> -};
>>> +
>>> +#include "reset-meson.h"
>>>      struct meson_reset {
>>>    	const struct meson_reset_param *param;
>>> @@ -102,84 +92,27 @@ static const struct reset_control_ops meson_reset_ops = {
>>>    	.status		= meson_reset_status,
>>>    };
>>>    -static const struct meson_reset_param meson8b_param = {
>>> -	.reset_num	= 256,
>>> -	.reset_offset	= 0x0,
>>> -	.level_offset	= 0x7c,
>>> -	.level_low_reset = true,
>>> -};
>>> -
>>> -static const struct meson_reset_param meson_a1_param = {
>>> -	.reset_num	= 96,
>>> -	.reset_offset	= 0x0,
>>> -	.level_offset	= 0x40,
>>> -	.level_low_reset = true,
>>> -};
>>> -
>>> -static const struct meson_reset_param meson_s4_param = {
>>> -	.reset_num	= 192,
>>> -	.reset_offset	= 0x0,
>>> -	.level_offset	= 0x40,
>>> -	.level_low_reset = true,
>>> -};
>>> -
>>> -static const struct of_device_id meson_reset_dt_ids[] = {
>>> -	 { .compatible = "amlogic,meson8b-reset",    .data = &meson8b_param},
>>> -	 { .compatible = "amlogic,meson-gxbb-reset", .data = &meson8b_param},
>>> -	 { .compatible = "amlogic,meson-axg-reset",  .data = &meson8b_param},
>>> -	 { .compatible = "amlogic,meson-a1-reset",   .data = &meson_a1_param},
>>> -	 { .compatible = "amlogic,meson-s4-reset",   .data = &meson_s4_param},
>>> -	 { .compatible = "amlogic,c3-reset",   .data = &meson_s4_param},
>>> -	 { /* sentinel */ },
>>> -};
>>> -MODULE_DEVICE_TABLE(of, meson_reset_dt_ids);
>>> -
>>> -static const struct regmap_config regmap_config = {
>>> -	.reg_bits   = 32,
>>> -	.val_bits   = 32,
>>> -	.reg_stride = 4,
>>> -};
>>> -
>>> -static int meson_reset_probe(struct platform_device *pdev)
>>> +int meson_reset_probe(struct device *dev, struct regmap *map,
>>> +		      const struct meson_reset_param *param)
>>>    {
>>> -	struct device *dev = &pdev->dev;
>>>    	struct meson_reset *data;
>>> -	void __iomem *base;
>>>      	data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
>>>    	if (!data)
>>>    		return -ENOMEM;
>>>    -	base = devm_platform_ioremap_resource(pdev, 0);
>>> -	if (IS_ERR(base))
>>> -		return PTR_ERR(base);
>>> -
>>> -	data->param = device_get_match_data(dev);
>>> -	if (!data->param)
>>> -		return -ENODEV;
>>> -
>>> -	data->map = devm_regmap_init_mmio(dev, base, &regmap_config);
>>> -	if (IS_ERR(data->map))
>>> -		return dev_err_probe(dev, PTR_ERR(data->map),
>>> -				     "can't init regmap mmio region\n");
>>> -
>>> -	data->rcdev.owner = THIS_MODULE;
>>> -	data->rcdev.nr_resets = data->param->reset_num;
>>> +	data->param = param;
>>> +	data->map = map;
>>> +	data->rcdev.owner = dev->driver->owner;
>>> +	data->rcdev.nr_resets = param->reset_num;
>>>    	data->rcdev.ops = &meson_reset_ops;
>>>    	data->rcdev.of_node = dev->of_node;
>>>      	return devm_reset_controller_register(dev, &data->rcdev);
>>>    }
>>> +EXPORT_SYMBOL_NS_GPL(meson_reset_probe, MESON_RESET);
>>>    -static struct platform_driver meson_reset_driver = {
>>> -	.probe	= meson_reset_probe,
>>> -	.driver = {
>>> -		.name		= "meson_reset",
>>> -		.of_match_table	= meson_reset_dt_ids,
>>> -	},
>>> -};
>>> -module_platform_driver(meson_reset_driver);
>>> -
>>> -MODULE_DESCRIPTION("Amlogic Meson Reset Controller driver");
>>> +MODULE_DESCRIPTION("Amlogic Meson Reset Core function");
>>>    MODULE_AUTHOR("Neil Armstrong <narmstrong at baylibre.com>");
>>> -MODULE_LICENSE("Dual BSD/GPL");
>>> +MODULE_AUTHOR("Jerome Brunet <jbrunet at baylibre.com>");
>>> +MODULE_IMPORT_NS(MESON_RESET);
>>> diff --git a/drivers/reset/amlogic/reset-meson-pltf.c b/drivers/reset/amlogic/reset-meson-pltf.c
>>> new file mode 100644
>>> index 000000000000..97e933b4aa34
>>> --- /dev/null
>>> +++ b/drivers/reset/amlogic/reset-meson-pltf.c
>>> @@ -0,0 +1,92 @@
>>> +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
>>> +/*
>>> + * Amlogic Meson Reset platform driver
>>> + *
>>> + * Copyright (c) 2016 BayLibre, SAS.
>>> + * Author: Neil Armstrong <narmstrong at baylibre.com>
>>> + */
>>> +#include <linux/err.h>
>>> +#include <linux/io.h>
>>> +#include <linux/of.h>
>>> +#include <linux/module.h>
>>> +#include <linux/platform_device.h>
>>> +#include <linux/regmap.h>
>>> +#include <linux/reset-controller.h>
>>> +
>>> +#include "reset-meson.h"
>>> +
>>> +static const struct meson_reset_param meson8b_param = {
>>> +	.reset_num	= 256,
>>> +	.reset_offset	= 0x0,
>>> +	.level_offset	= 0x7c,
>>> +	.level_low_reset = true,
>>> +};
>>> +
>>> +static const struct meson_reset_param meson_a1_param = {
>>> +	.reset_num	= 96,
>>> +	.reset_offset	= 0x0,
>>> +	.level_offset	= 0x40,
>>> +	.level_low_reset = true,
>>> +};
>>> +
>>> +static const struct meson_reset_param meson_s4_param = {
>>> +	.reset_num	= 192,
>>> +	.reset_offset	= 0x0,
>>> +	.level_offset	= 0x40,
>>> +	.level_low_reset = true,
>>> +};
>>> +
>>> +static const struct of_device_id meson_reset_dt_ids[] = {
>>> +	 { .compatible = "amlogic,meson8b-reset",    .data = &meson8b_param},
>>> +	 { .compatible = "amlogic,meson-gxbb-reset", .data = &meson8b_param},
>>> +	 { .compatible = "amlogic,meson-axg-reset",  .data = &meson8b_param},
>>> +	 { .compatible = "amlogic,meson-a1-reset",   .data = &meson_a1_param},
>>> +	 { .compatible = "amlogic,meson-s4-reset",   .data = &meson_s4_param},
>>> +	 { .compatible = "amlogic,c3-reset",   .data = &meson_s4_param},
>>> +	 { /* sentinel */ },
>>> +};
>>> +MODULE_DEVICE_TABLE(of, meson_reset_dt_ids);
>>> +
>>> +static const struct regmap_config regmap_config = {
>>> +	.reg_bits   = 32,
>>> +	.val_bits   = 32,
>>> +	.reg_stride = 4,
>>> +};
>>> +
>>> +static int meson_reset_pltf_probe(struct platform_device *pdev)
>>> +{
>>> +	const struct meson_reset_param *param;
>>> +	struct device *dev = &pdev->dev;
>>> +	struct regmap *map;
>>> +	void __iomem *base;
>>> +
>>> +	base = devm_platform_ioremap_resource(pdev, 0);
>>> +	if (IS_ERR(base))
>>> +		return PTR_ERR(base);
>>> +
>>> +	param = device_get_match_data(dev);
>>> +	if (!param)
>>> +		return -ENODEV;
>>> +
>>> +	map = devm_regmap_init_mmio(dev, base, &regmap_config);
>>> +	if (IS_ERR(map))
>>> +		return dev_err_probe(dev, PTR_ERR(map),
>>> +				     "can't init regmap mmio region\n");
>>> +
>>> +	return meson_reset_probe(dev, map, param);
>>> +}
>>> +
>>> +static struct platform_driver meson_reset_pltf_driver = {
>>> +	.probe	= meson_reset_pltf_probe,
>>> +	.driver = {
>>> +		.name		= "meson_reset",
>>> +		.of_match_table	= meson_reset_dt_ids,
>>> +	},
>>> +};
>>> +module_platform_driver(meson_reset_pltf_driver);
>>> +
>>> +MODULE_DESCRIPTION("Amlogic Meson Reset Platform Controller driver");
>>> +MODULE_AUTHOR("Neil Armstrong <narmstrong at baylibre.com>");
>>> +MODULE_AUTHOR("Jerome Brunet <jbrunet at baylibre.com>");
>>> +MODULE_LICENSE("Dual BSD/GPL");
>>> +MODULE_IMPORT_NS(MESON_RESET);
>>> diff --git a/drivers/reset/amlogic/reset-meson.h b/drivers/reset/amlogic/reset-meson.h
>>> new file mode 100644
>>> index 000000000000..c2e8a5cf2e46
>>> --- /dev/null
>>> +++ b/drivers/reset/amlogic/reset-meson.h
>>> @@ -0,0 +1,24 @@
>>> +/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
>>> +/*
>>> + * Copyright (c) 2024 BayLibre, SAS.
>>> + * Author: Jerome Brunet <jbrunet at baylibre.com>
>>> + */
>>> +
>>> +#ifndef __MESON_RESET_CORE_H
>>> +#define __MESON_RESET_CORE_H
>>> +
>>> +#include <linux/module.h>
>>> +#include <linux/regmap.h>
>>> +#include <linux/reset-controller.h>
>>> +
>>> +struct meson_reset_param {
>>> +	unsigned int reset_num;
>>> +	unsigned int reset_offset;
>>> +	unsigned int level_offset;
>>> +	bool level_low_reset;
>>> +};
>>> +
>>> +int meson_reset_probe(struct device *dev, struct regmap *map,
>>> +		      const struct meson_reset_param *param);
>>> +
>>> +#endif /* __MESON_RESET_CORE_H */
> 



From neil.armstrong at linaro.org  Mon Aug 19 10:03:34 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Mon, 19 Aug 2024 19:03:34 +0200
Subject: [PATCH v3 4/9] reset: amlogic: add driver parameters
In-Reply-To: <1jzfp8wjod.fsf@starbuckisacylon.baylibre.com>
References: <20240808102742.4095904-1-jbrunet@baylibre.com>
 <20240808102742.4095904-5-jbrunet@baylibre.com>
 <614de1b0-fcaf-457c-9183-1f3cd7f91b38@linaro.org>
 <1jzfp8wjod.fsf@starbuckisacylon.baylibre.com>
Message-ID: <35e56911-a99b-4818-8b31-78baa680f8fe@linaro.org>

On 19/08/2024 18:40, Jerome Brunet wrote:
> On Mon 19 Aug 2024 at 17:57, Neil Armstrong <neil.armstrong at linaro.org> wrote:
> 
>>> +	assert ^= data->param->level_low_reset;
>>>      	return regmap_update_bits(data->map, offset,
>>> -				  BIT(bit), assert ? 0 : BIT(bit));
>>> +				  BIT(bit), assert ? BIT(bit) : 0);
>>>    }
>>>      static int meson_reset_assert(struct reset_controller_dev *rcdev,
>>> @@ -84,17 +88,23 @@ static const struct reset_control_ops meson_reset_ops = {
>>>      static const struct meson_reset_param meson8b_param = {
>>>    	.reg_count	= 8,
>>> +	.reset_offset	= 0x0,
>>>    	.level_offset	= 0x7c,
>>> +	.level_low_reset = true,
>>>    };
>>>      static const struct meson_reset_param meson_a1_param = {
>>>    	.reg_count	= 3,
>>> +	.reset_offset	= 0x0,
>>>    	.level_offset	= 0x40,
>>> +	.level_low_reset = true,
>>>    };
>>>      static const struct meson_reset_param meson_s4_param = {
>>>    	.reg_count	= 6,
>>> +	.reset_offset	= 0x0,
>>>    	.level_offset	= 0x40,
>>> +	.level_low_reset = true,
>>
>> Just a comment, I would rather leave the "default" users of this driver with the default value
>> and use level_high_reset = true for the clock ones
> 
> In every other place in the kernel, we specify that kind of thing if it
> is acitve low. Your request make things up-side-down and harder to
> follow IMO.
> 
> There is no 'default' user, there is the platform ones and auxiliary ones.
> Platform ones tend to active low reset line. It is clearly shown above
> and hard to miss when adding new platforms.

It's only a suggestion, we tend to not add `= true` to existing users and keep
the new boolean properties for the new users, whatever the logic, and since
the driver originally did set the reset as low lever by default, it makes sense
use level_high_reset whatever other drivers does.

> 
>>
>> Neil
>>
>>>    };
>>>      static const struct of_device_id meson_reset_dt_ids[] = {
> 



From jbrunet at baylibre.com  Mon Aug 19 10:20:34 2024
From: jbrunet at baylibre.com (Jerome Brunet)
Date: Mon, 19 Aug 2024 19:20:34 +0200
Subject: [PATCH 6/9] drm/meson: dw-hdmi: convert to regmap
In-Reply-To: <13420cbe-30c5-4bac-80e9-c3822c0800bd@linaro.org> (Neil
	Armstrong's message of "Mon, 19 Aug 2024 18:22:25 +0200")
References: <20240730125023.710237-1-jbrunet@baylibre.com>
	<20240730125023.710237-7-jbrunet@baylibre.com>
	<13420cbe-30c5-4bac-80e9-c3822c0800bd@linaro.org>
Message-ID: <1jo75owhst.fsf@starbuckisacylon.baylibre.com>

On Mon 19 Aug 2024 at 18:22, Neil Armstrong <neil.armstrong at linaro.org> wrote:

> On 30/07/2024 14:50, Jerome Brunet wrote:
>> The Amlogic mixes direct register access and regmap ones, with several
>> custom helpers. Using a single API makes rework and maintenance easier.
>> Convert the Amlogic phy driver to regmap and use it to have more
>> consistent
>> access to the registers in the driver, with less custom helpers. Add
>> register bit definitions when missing.
>> Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
>> ---
>>   drivers/gpu/drm/meson/meson_dw_hdmi.c | 475 ++++++++++++--------------
>>   drivers/gpu/drm/meson/meson_dw_hdmi.h |  49 +--
>>   2 files changed, 239 insertions(+), 285 deletions(-)
>> diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c
>> b/drivers/gpu/drm/meson/meson_dw_hdmi.c
>> index 47aa3e184e98..7c39e5c99043 100644
>> --- a/drivers/gpu/drm/meson/meson_dw_hdmi.c
>> +++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c
>> @@ -90,16 +90,25 @@
>>    * - CEC Management
>>    */
>>   -/* TOP Block Communication Channel */
>> -#define HDMITX_TOP_ADDR_REG	0x0
>> -#define HDMITX_TOP_DATA_REG	0x4
>> -#define HDMITX_TOP_CTRL_REG	0x8
>> -#define HDMITX_TOP_G12A_OFFSET	0x8000
>> +/* Indirect channel definition for GX */
>> +#define HDMITX_TOP_REGS		0x0
>> +#define HDMITX_DWC_REGS		0x10
>> +
>> +#define GX_ADDR_OFFSET		0x0
>> +#define GX_DATA_OFFSET		0x4
>> +#define GX_CTRL_OFFSET		0x8
>
> I don't see the point renaming thos defines

It makes clear that indirect addressing offset are for GX SoC only,
which the original define did not do

>
>> +#define  GX_CTRL_APB3_ERRFAIL	BIT(15)
>>   -/* Controller Communication Channel */
>> -#define HDMITX_DWC_ADDR_REG	0x10
>> -#define HDMITX_DWC_DATA_REG	0x14
>> -#define HDMITX_DWC_CTRL_REG	0x18
>> +/*
>> + * NOTE: G12 use direct addressing:
>> + * Ideally it should receive one memory region for each of the top
>> + * and dwc register regions but fixing this would require to change
>> + * the DT bindings. Doing so is a pain. Keep the region as it and work
>> + * around the problem, at least for now.
>> + * Future supported SoCs should properly describe the regions in the
>> + * DT bindings instead of using this trick.
>
> well I disagree here, there's a single memory region for the HDMITX module,
> and the DWC region is controlled by the TOP registers, so the DWC region
> _cannot_ be accessed without correctly configuring the TOP registers.
>
> So I disagree strongly with this comment.

Even if one cannot be accessed without configuring the other, it does
not make it a single region.

The regions do not even use the same register value width.
That's a clear indication they are separate.

Anyway, I'll remove the comment

>
>> + */
>> +#define HDMITX_TOP_G12A_OFFSET	0x8000
>>     /* HHI Registers */
>>   #define HHI_MEM_PD_REG0		0x100 /* 0x40 */
>> @@ -108,28 +117,59 @@
>>   #define HHI_HDMI_PHY_CNTL1	0x3a4 /* 0xe9 */
>>   #define  PHY_CNTL1_INIT		0x03900000
>>   #define  PHY_INVERT		BIT(17)
>> +#define  PHY_FIFOS		GENMASK(3, 2)
>> +#define  PHY_CLOCK_EN		BIT(1)
>> +#define  PHY_SOFT_RST		BIT(0)
>
> Please move those changes before or after this patch
>
>>   #define HHI_HDMI_PHY_CNTL2	0x3a8 /* 0xea */
>>   #define HHI_HDMI_PHY_CNTL3	0x3ac /* 0xeb */
>>   #define HHI_HDMI_PHY_CNTL4	0x3b0 /* 0xec */
>>   #define HHI_HDMI_PHY_CNTL5	0x3b4 /* 0xed */
>>   -static DEFINE_SPINLOCK(reg_lock);
>> -
>> -struct meson_dw_hdmi;
>> -
>>   struct meson_dw_hdmi_data {
>> -	unsigned int	(*top_read)(struct meson_dw_hdmi *dw_hdmi,
>> -				    unsigned int addr);
>> -	void		(*top_write)(struct meson_dw_hdmi *dw_hdmi,
>> -				     unsigned int addr, unsigned int data);
>> -	unsigned int	(*dwc_read)(struct meson_dw_hdmi *dw_hdmi,
>> -				    unsigned int addr);
>> -	void		(*dwc_write)(struct meson_dw_hdmi *dw_hdmi,
>> -				     unsigned int addr, unsigned int data);
>> +	int (*reg_init)(struct device *dev);
>>   	u32 cntl0_init;
>>   	u32 cntl1_init;
>>   };
>>   +static int hdmi_tx_indirect_reg_read(void *context,
>> +					 unsigned int reg,
>> +					 unsigned int *result)
>> +{
>> +	void __iomem *base = context;
>> +
>> +	/* Must write the read address twice ... */
>> +	writel(reg, base + GX_ADDR_OFFSET);
>> +	writel(reg, base + GX_ADDR_OFFSET);
>> +
>> +	/* ... and read the data twice as well */
>> +	*result = readl(base + GX_DATA_OFFSET);
>> +	*result = readl(base + GX_DATA_OFFSET);
>
> Why did you change the comments ?
>
>> +
>> +	return 0;
>> +}
>> +
>> +static int hdmi_tx_indirect_reg_write(void *context,
>> +				      unsigned int reg,
>> +				      unsigned int val)
>> +{
>> +	void __iomem *base = context;
>> +
>> +	/* Must write the read address twice ... */
>> +	writel(reg, base + GX_ADDR_OFFSET);
>> +	writel(reg, base + GX_ADDR_OFFSET);
>> +
>> +	/* ... but write the data only once */
>> +	writel(val, base + GX_DATA_OFFSET);
>
> Ditto ? were they wrong ?
>
>> +
>> +	return 0;
>> +}
>> +
>> +static const struct regmap_bus hdmi_tx_indirect_mmio = {
>> +	.fast_io = true,
>> +	.reg_read = hdmi_tx_indirect_reg_read,
>> +	.reg_write = hdmi_tx_indirect_reg_write,
>> +};
>> +
>>   struct meson_dw_hdmi {
>>   	struct dw_hdmi_plat_data dw_plat_data;
>>   	struct meson_drm *priv;
>> @@ -139,9 +179,10 @@ struct meson_dw_hdmi {
>>   	struct reset_control *hdmitx_apb;
>>   	struct reset_control *hdmitx_ctrl;
>>   	struct reset_control *hdmitx_phy;
>> -	u32 irq_stat;
>> +	unsigned int irq_stat;
>>   	struct dw_hdmi *hdmi;
>>   	struct drm_bridge *bridge;
>> +	struct regmap *top;
>
> The name could be better, like top_regs or top_regmap

That's not really consistent with priv->hhi, is it ?

>
>>   };
>>     static inline int dw_hdmi_is_compatible(struct meson_dw_hdmi
>> *dw_hdmi,
>> @@ -150,136 +191,6 @@ static inline int dw_hdmi_is_compatible(struct meson_dw_hdmi *dw_hdmi,
>>   	return of_device_is_compatible(dw_hdmi->dev->of_node, compat);
>>   }
>>   -/* PHY (via TOP bridge) and Controller dedicated register interface */
>> -
>> -static unsigned int dw_hdmi_top_read(struct meson_dw_hdmi *dw_hdmi,
>> -				     unsigned int addr)
>> -{
>> -	unsigned long flags;
>> -	unsigned int data;
>> -
>> -	spin_lock_irqsave(&reg_lock, flags);
>> -
>> -	/* ADDR must be written twice */
>> -	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_TOP_ADDR_REG);
>> -	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_TOP_ADDR_REG);
>> -
>> -	/* Read needs a second DATA read */
>> -	data = readl(dw_hdmi->hdmitx + HDMITX_TOP_DATA_REG);
>> -	data = readl(dw_hdmi->hdmitx + HDMITX_TOP_DATA_REG);
>> -
>> -	spin_unlock_irqrestore(&reg_lock, flags);
>> -
>> -	return data;
>> -}
>> -
>> -static unsigned int dw_hdmi_g12a_top_read(struct meson_dw_hdmi *dw_hdmi,
>> -					  unsigned int addr)
>> -{
>> -	return readl(dw_hdmi->hdmitx + HDMITX_TOP_G12A_OFFSET + (addr << 2));
>> -}
>> -
>> -static inline void dw_hdmi_top_write(struct meson_dw_hdmi *dw_hdmi,
>> -				     unsigned int addr, unsigned int data)
>> -{
>> -	unsigned long flags;
>> -
>> -	spin_lock_irqsave(&reg_lock, flags);
>> -
>> -	/* ADDR must be written twice */
>> -	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_TOP_ADDR_REG);
>> -	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_TOP_ADDR_REG);
>> -
>> -	/* Write needs single DATA write */
>> -	writel(data, dw_hdmi->hdmitx + HDMITX_TOP_DATA_REG);
>> -
>> -	spin_unlock_irqrestore(&reg_lock, flags);
>> -}
>> -
>> -static inline void dw_hdmi_g12a_top_write(struct meson_dw_hdmi *dw_hdmi,
>> -					  unsigned int addr, unsigned int data)
>> -{
>> -	writel(data, dw_hdmi->hdmitx + HDMITX_TOP_G12A_OFFSET + (addr << 2));
>> -}
>> -
>> -/* Helper to change specific bits in PHY registers */
>> -static inline void dw_hdmi_top_write_bits(struct meson_dw_hdmi *dw_hdmi,
>> -					  unsigned int addr,
>> -					  unsigned int mask,
>> -					  unsigned int val)
>> -{
>> -	unsigned int data = dw_hdmi->data->top_read(dw_hdmi, addr);
>> -
>> -	data &= ~mask;
>> -	data |= val;
>> -
>> -	dw_hdmi->data->top_write(dw_hdmi, addr, data);
>> -}
>> -
>> -static unsigned int dw_hdmi_dwc_read(struct meson_dw_hdmi *dw_hdmi,
>> -				     unsigned int addr)
>> -{
>> -	unsigned long flags;
>> -	unsigned int data;
>> -
>> -	spin_lock_irqsave(&reg_lock, flags);
>> -
>> -	/* ADDR must be written twice */
>> -	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_DWC_ADDR_REG);
>> -	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_DWC_ADDR_REG);
>> -
>> -	/* Read needs a second DATA read */
>> -	data = readl(dw_hdmi->hdmitx + HDMITX_DWC_DATA_REG);
>> -	data = readl(dw_hdmi->hdmitx + HDMITX_DWC_DATA_REG);
>> -
>> -	spin_unlock_irqrestore(&reg_lock, flags);
>> -
>> -	return data;
>> -}
>> -
>> -static unsigned int dw_hdmi_g12a_dwc_read(struct meson_dw_hdmi *dw_hdmi,
>> -					  unsigned int addr)
>> -{
>> -	return readb(dw_hdmi->hdmitx + addr);
>> -}
>> -
>> -static inline void dw_hdmi_dwc_write(struct meson_dw_hdmi *dw_hdmi,
>> -				     unsigned int addr, unsigned int data)
>> -{
>> -	unsigned long flags;
>> -
>> -	spin_lock_irqsave(&reg_lock, flags);
>> -
>> -	/* ADDR must be written twice */
>> -	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_DWC_ADDR_REG);
>> -	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_DWC_ADDR_REG);
>> -
>> -	/* Write needs single DATA write */
>> -	writel(data, dw_hdmi->hdmitx + HDMITX_DWC_DATA_REG);
>> -
>> -	spin_unlock_irqrestore(&reg_lock, flags);
>> -}
>> -
>> -static inline void dw_hdmi_g12a_dwc_write(struct meson_dw_hdmi *dw_hdmi,
>> -					  unsigned int addr, unsigned int data)
>> -{
>> -	writeb(data, dw_hdmi->hdmitx + addr);
>> -}
>> -
>> -/* Helper to change specific bits in controller registers */
>> -static inline void dw_hdmi_dwc_write_bits(struct meson_dw_hdmi *dw_hdmi,
>> -					  unsigned int addr,
>> -					  unsigned int mask,
>> -					  unsigned int val)
>> -{
>> -	unsigned int data = dw_hdmi->data->dwc_read(dw_hdmi, addr);
>> -
>> -	data &= ~mask;
>> -	data |= val;
>> -
>> -	dw_hdmi->data->dwc_write(dw_hdmi, addr, data);
>> -}
>> -
>>   /* Bridge */
>>     /* Setup PHY bandwidth modes */
>> @@ -353,13 +264,15 @@ static inline void meson_dw_hdmi_phy_reset(struct meson_dw_hdmi *dw_hdmi)
>>   	struct meson_drm *priv = dw_hdmi->priv;
>>     	/* Enable and software reset */
>> -	regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, 0xf, 0xf);
>> -
>> +	regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1,
>> +			   PHY_FIFOS | PHY_CLOCK_EN | PHY_SOFT_RST,
>> +			   PHY_FIFOS | PHY_CLOCK_EN | PHY_SOFT_RST);
>>   	mdelay(2);
>>     	/* Enable and unreset */
>> -	regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, 0xf, 0xe);
>> -
>> +	regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1,
>> +			   PHY_FIFOS | PHY_CLOCK_EN | PHY_SOFT_RST,
>> +			   PHY_FIFOS | PHY_CLOCK_EN);
>>   	mdelay(2);
>>   }
>>   @@ -382,27 +295,30 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi,
>> void *data,
>>     	/* TMDS pattern setup */
>>   	if (mode->clock > 340000 && !mode_is_420) {
>> -		dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_01,
>> -				  0);
>> -		dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_23,
>> -				  0x03ff03ff);
>> +		regmap_write(dw_hdmi->top, HDMITX_TOP_TMDS_CLK_PTTN_01,
>> +			     0);
>> +		regmap_write(dw_hdmi->top, HDMITX_TOP_TMDS_CLK_PTTN_23,
>> +			     0x03ff03ff);
>>   	} else {
>> -		dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_01,
>> -				  0x001f001f);
>> -		dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_23,
>> -				  0x001f001f);
>> +		regmap_write(dw_hdmi->top, HDMITX_TOP_TMDS_CLK_PTTN_01,
>> +			     0x001f001f);
>> +		regmap_write(dw_hdmi->top, HDMITX_TOP_TMDS_CLK_PTTN_23,
>> +			     0x001f001f);
>>   	}
>>     	/* Load TMDS pattern */
>> -	dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_CNTL, 0x1);
>> +	regmap_write(dw_hdmi->top, HDMITX_TOP_TMDS_CLK_PTTN_CNTL,
>> +		     TOP_TDMS_CLK_PTTN_LOAD);
>>   	msleep(20);
>> -	dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_CNTL, 0x2);
>> +	regmap_write(dw_hdmi->top, HDMITX_TOP_TMDS_CLK_PTTN_CNTL,
>> +		     TOP_TDMS_CLK_PTTN_SHFT);
>>     	/* Setup PHY parameters */
>>   	meson_hdmi_phy_setup_mode(dw_hdmi, mode, mode_is_420);
>>     	/* Disable clock, fifo, fifo_wr */
>> -	regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, 0xf, 0);
>> +	regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1,
>> +			   PHY_FIFOS | PHY_CLOCK_EN | PHY_SOFT_RST, 0);
>>     	dw_hdmi_set_high_tmds_clock_ratio(hdmi, display);
>>   @@ -433,8 +349,11 @@ static enum drm_connector_status
>> dw_hdmi_read_hpd(struct dw_hdmi *hdmi,
>>   			     void *data)
>>   {
>>   	struct meson_dw_hdmi *dw_hdmi = (struct meson_dw_hdmi *)data;
>> +	unsigned int stat;
>>   -	return !!dw_hdmi->data->top_read(dw_hdmi, HDMITX_TOP_STAT0) ?
>> +	regmap_read(dw_hdmi->top, HDMITX_TOP_STAT0, &stat);
>> +
>> +	return !!stat ?
>>   		connector_status_connected : connector_status_disconnected;
>>   }
>>   @@ -444,17 +363,18 @@ static void dw_hdmi_setup_hpd(struct dw_hdmi
>> *hdmi,
>>   	struct meson_dw_hdmi *dw_hdmi = (struct meson_dw_hdmi *)data;
>>     	/* Setup HPD Filter */
>> -	dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_HPD_FILTER,
>> -			  (0xa << 12) | 0xa0);
>> +	regmap_write(dw_hdmi->top, HDMITX_TOP_HPD_FILTER,
>> +		     FIELD_PREP(TOP_HPD_GLITCH_WIDTH, 10) |
>> +		     FIELD_PREP(TOP_HPD_VALID_WIDTH, 160));
>>     	/* Clear interrupts */
>> -	dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_INTR_STAT_CLR,
>> -			  HDMITX_TOP_INTR_HPD_RISE | HDMITX_TOP_INTR_HPD_FALL);
>> +	regmap_write(dw_hdmi->top, HDMITX_TOP_INTR_STAT_CLR,
>> +		     TOP_INTR_HPD_RISE | TOP_INTR_HPD_FALL);
>>     	/* Unmask interrupts */
>> -	dw_hdmi_top_write_bits(dw_hdmi, HDMITX_TOP_INTR_MASKN,
>> -			HDMITX_TOP_INTR_HPD_RISE | HDMITX_TOP_INTR_HPD_FALL,
>> -			HDMITX_TOP_INTR_HPD_RISE | HDMITX_TOP_INTR_HPD_FALL);
>> +	regmap_update_bits(dw_hdmi->top, HDMITX_TOP_INTR_MASKN,
>> +			   TOP_INTR_HPD_RISE | TOP_INTR_HPD_FALL,
>> +			   TOP_INTR_HPD_RISE | TOP_INTR_HPD_FALL);
>>   }
>>     static const struct dw_hdmi_phy_ops meson_dw_hdmi_phy_ops = {
>> @@ -467,23 +387,22 @@ static const struct dw_hdmi_phy_ops meson_dw_hdmi_phy_ops = {
>>   static irqreturn_t dw_hdmi_top_irq(int irq, void *dev_id)
>>   {
>>   	struct meson_dw_hdmi *dw_hdmi = dev_id;
>> -	u32 stat;
>> +	unsigned int stat;
>>   -	stat = dw_hdmi->data->top_read(dw_hdmi, HDMITX_TOP_INTR_STAT);
>> -	dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_INTR_STAT_CLR, stat);
>> +	regmap_read(dw_hdmi->top, HDMITX_TOP_INTR_STAT, &stat);
>> +	regmap_write(dw_hdmi->top, HDMITX_TOP_INTR_STAT_CLR, stat);
>>     	/* HPD Events, handle in the threaded interrupt handler */
>> -	if (stat & (HDMITX_TOP_INTR_HPD_RISE | HDMITX_TOP_INTR_HPD_FALL)) {
>> +	if (stat & (TOP_INTR_HPD_RISE | TOP_INTR_HPD_FALL)) {
>>   		dw_hdmi->irq_stat = stat;
>>   		return IRQ_WAKE_THREAD;
>>   	}
>>     	/* HDMI Controller Interrupt */
>> -	if (stat & 1)
>> +	if (stat & TOP_INTR_CORE)
>>   		return IRQ_NONE;
>>     	/* TOFIX Handle HDCP Interrupts */
>> -
>>   	return IRQ_HANDLED;
>>   }
>>   @@ -494,10 +413,10 @@ static irqreturn_t dw_hdmi_top_thread_irq(int
>> irq, void *dev_id)
>>   	u32 stat = dw_hdmi->irq_stat;
>>     	/* HPD Events */
>> -	if (stat & (HDMITX_TOP_INTR_HPD_RISE | HDMITX_TOP_INTR_HPD_FALL)) {
>> +	if (stat & (TOP_INTR_HPD_RISE | TOP_INTR_HPD_FALL)) {
>>   		bool hpd_connected = false;
>>   -		if (stat & HDMITX_TOP_INTR_HPD_RISE)
>> +		if (stat & TOP_INTR_HPD_RISE)
>>   			hpd_connected = true;
>>     		dw_hdmi_setup_rx_sense(dw_hdmi->hdmi, hpd_connected,
>> @@ -512,63 +431,25 @@ static irqreturn_t dw_hdmi_top_thread_irq(int irq, void *dev_id)
>>   	return IRQ_HANDLED;
>>   }
>>   -/* DW HDMI Regmap */
>> -
>> -static int meson_dw_hdmi_reg_read(void *context, unsigned int reg,
>> -				  unsigned int *result)
>> -{
>> -	struct meson_dw_hdmi *dw_hdmi = context;
>> -
>> -	*result = dw_hdmi->data->dwc_read(dw_hdmi, reg);
>> -
>> -	return 0;
>> -
>> -}
>> -
>> -static int meson_dw_hdmi_reg_write(void *context, unsigned int reg,
>> -				   unsigned int val)
>> -{
>> -	struct meson_dw_hdmi *dw_hdmi = context;
>> -
>> -	dw_hdmi->data->dwc_write(dw_hdmi, reg, val);
>> -
>> -	return 0;
>> -}
>> -
>> -static const struct regmap_config meson_dw_hdmi_regmap_config = {
>> -	.reg_bits = 32,
>> -	.val_bits = 8,
>> -	.reg_read = meson_dw_hdmi_reg_read,
>> -	.reg_write = meson_dw_hdmi_reg_write,
>> -	.max_register = 0x10000,
>> -	.fast_io = true,
>> -};
>> -
>> -static const struct meson_dw_hdmi_data meson_dw_hdmi_gxbb_data = {
>> -	.top_read = dw_hdmi_top_read,
>> -	.top_write = dw_hdmi_top_write,
>> -	.dwc_read = dw_hdmi_dwc_read,
>> -	.dwc_write = dw_hdmi_dwc_write,
>> -	.cntl0_init = 0x0,
>> -	.cntl1_init = PHY_CNTL1_INIT | PHY_INVERT,
>> +static const struct regmap_config top_gx_regmap_cfg = {
>> +	.reg_bits	= 32,
>> +	.reg_stride	= 4,
>> +	.reg_shift	= -2,
>> +	.val_bits	= 32,
>> +	.max_register	= 0x40,
>>   };
>>   -static const struct meson_dw_hdmi_data meson_dw_hdmi_gxl_data = {
>> -	.top_read = dw_hdmi_top_read,
>> -	.top_write = dw_hdmi_top_write,
>> -	.dwc_read = dw_hdmi_dwc_read,
>> -	.dwc_write = dw_hdmi_dwc_write,
>> -	.cntl0_init = 0x0,
>> -	.cntl1_init = PHY_CNTL1_INIT,
>> +static const struct regmap_config top_g12_regmap_cfg = {
>> +	.reg_bits	= 32,
>> +	.reg_stride	= 4,
>> +	.val_bits	= 32,
>> +	.max_register	= 0x40,
>>   };
>>   -static const struct meson_dw_hdmi_data meson_dw_hdmi_g12a_data = {
>> -	.top_read = dw_hdmi_g12a_top_read,
>> -	.top_write = dw_hdmi_g12a_top_write,
>> -	.dwc_read = dw_hdmi_g12a_dwc_read,
>> -	.dwc_write = dw_hdmi_g12a_dwc_write,
>> -	.cntl0_init = 0x000b4242, /* Bandgap */
>> -	.cntl1_init = PHY_CNTL1_INIT,
>> +static const struct regmap_config dwc_regmap_cfg = {
>> +	.reg_bits = 32,
>> +	.val_bits = 8,
>> +	.max_register = 0x8000,
>>   };
>>     static void meson_dw_hdmi_init(struct meson_dw_hdmi *meson_dw_hdmi)
>> @@ -581,41 +462,107 @@ static void meson_dw_hdmi_init(struct meson_dw_hdmi *meson_dw_hdmi)
>>   	/* Bring HDMITX MEM output of power down */
>>   	regmap_update_bits(priv->hhi, HHI_MEM_PD_REG0, 0xff << 8, 0);
>>   -	/* Enable APB3 fail on error */
>> -	if (!meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) {
>> -		writel_bits_relaxed(BIT(15), BIT(15),
>> -				    meson_dw_hdmi->hdmitx + HDMITX_TOP_CTRL_REG);
>> -		writel_bits_relaxed(BIT(15), BIT(15),
>> -				    meson_dw_hdmi->hdmitx + HDMITX_DWC_CTRL_REG);
>> -	}
>> -
>>   	/* Bring out of reset */
>> -	meson_dw_hdmi->data->top_write(meson_dw_hdmi,
>> -				       HDMITX_TOP_SW_RESET,  0);
>> -
>> +	regmap_write(meson_dw_hdmi->top, HDMITX_TOP_SW_RESET, 0);
>>   	msleep(20);
>>   -	meson_dw_hdmi->data->top_write(meson_dw_hdmi,
>> -				       HDMITX_TOP_CLK_CNTL, 0xff);
>> +	/* Enable clocks */
>> +	regmap_write(meson_dw_hdmi->top, HDMITX_TOP_CLK_CNTL,
>> +		     TOP_CLK_EN);
>>     	/* Enable normal output to PHY */
>> -	meson_dw_hdmi->data->top_write(meson_dw_hdmi, HDMITX_TOP_BIST_CNTL, BIT(12));
>> +	regmap_write(meson_dw_hdmi->top, HDMITX_TOP_BIST_CNTL,
>> +		     TOP_BIST_TMDS_EN);
>>     	/* Setup PHY */
>> -	regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL1, meson_dw_hdmi->data->cntl1_init);
>> -	regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, meson_dw_hdmi->data->cntl0_init);
>> +	regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL1,
>> +		     meson_dw_hdmi->data->cntl1_init);
>> +	regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0,
>> +		     meson_dw_hdmi->data->cntl0_init);
>>     	/* Enable HDMI-TX Interrupt */
>> -	meson_dw_hdmi->data->top_write(meson_dw_hdmi, HDMITX_TOP_INTR_STAT_CLR,
>> -				       HDMITX_TOP_INTR_CORE);
>> +	regmap_write(meson_dw_hdmi->top, HDMITX_TOP_INTR_STAT_CLR,
>> +		     GENMASK(31, 0));
>> +	regmap_write(meson_dw_hdmi->top, HDMITX_TOP_INTR_MASKN,
>> +		     TOP_INTR_CORE);
>> +}
>> +
>> +static int meson_dw_init_regmap_gx(struct device *dev)
>> +{
>> +	struct meson_dw_hdmi *meson_dw_hdmi = dev_get_drvdata(dev);
>> +	struct regmap *map;
>>   -	meson_dw_hdmi->data->top_write(meson_dw_hdmi,
>> HDMITX_TOP_INTR_MASKN,
>> -				       HDMITX_TOP_INTR_CORE);
>> +	/* Register TOP glue zone */
>> +	writel_bits_relaxed(GX_CTRL_APB3_ERRFAIL, GX_CTRL_APB3_ERRFAIL,
>> +			    meson_dw_hdmi->hdmitx + HDMITX_TOP_REGS + GX_CTRL_OFFSET);
>>   +	map = devm_regmap_init(dev, &hdmi_tx_indirect_mmio,
>> +			       meson_dw_hdmi->hdmitx + HDMITX_TOP_REGS,
>> +			       &top_gx_regmap_cfg);
>> +	if (IS_ERR(map))
>> +		return dev_err_probe(dev, PTR_ERR(map), "failed to init top regmap\n");
>> +
>> +	meson_dw_hdmi->top = map;
>> +
>> +	/* Register DWC zone */
>> +	writel_bits_relaxed(GX_CTRL_APB3_ERRFAIL, GX_CTRL_APB3_ERRFAIL,
>> +			    meson_dw_hdmi->hdmitx + HDMITX_DWC_REGS + GX_CTRL_OFFSET);
>> +
>> +	map = devm_regmap_init(dev, &hdmi_tx_indirect_mmio,
>> +			       meson_dw_hdmi->hdmitx + HDMITX_DWC_REGS,
>> +			       &dwc_regmap_cfg);
>> +	if (IS_ERR(map))
>> +		return dev_err_probe(dev, PTR_ERR(map), "failed to init dwc regmap\n");
>> +
>> +	meson_dw_hdmi->dw_plat_data.regm = map;
>> +
>> +	return 0;
>> +}
>> +
>> +static int meson_dw_init_regmap_g12(struct device *dev)
>> +{
>> +	struct meson_dw_hdmi *meson_dw_hdmi = dev_get_drvdata(dev);
>> +	struct regmap *map;
>> +
>> +	/* Register TOP glue zone with the offset */
>> +	map = devm_regmap_init_mmio(dev, meson_dw_hdmi->hdmitx + HDMITX_TOP_G12A_OFFSET,
>> +				    &top_g12_regmap_cfg);
>> +	if (IS_ERR(map))
>> +		dev_err_probe(dev, PTR_ERR(map), "failed to init top regmap\n");
>> +
>> +	meson_dw_hdmi->top = map;
>> +
>> +	/* Register DWC zone */
>> +	map = devm_regmap_init_mmio(dev, meson_dw_hdmi->hdmitx,
>> +				    &dwc_regmap_cfg);
>> +	if (IS_ERR(map))
>> +		dev_err_probe(dev, PTR_ERR(map), "failed to init dwc regmap\n");
>> +
>> +	meson_dw_hdmi->dw_plat_data.regm = map;
>> +
>> +	return 0;
>>   }
>>   +static const struct meson_dw_hdmi_data meson_dw_hdmi_gxbb_data = {
>> +	.reg_init = meson_dw_init_regmap_gx,
>> +	.cntl0_init = 0x0,
>> +	.cntl1_init = PHY_CNTL1_INIT | PHY_INVERT,
>> +};
>> +
>> +static const struct meson_dw_hdmi_data meson_dw_hdmi_gxl_data = {
>> +	.reg_init = meson_dw_init_regmap_gx,
>> +	.cntl0_init = 0x0,
>> +	.cntl1_init = PHY_CNTL1_INIT,
>> +};
>> +
>> +static const struct meson_dw_hdmi_data meson_dw_hdmi_g12a_data = {
>> +	.reg_init = meson_dw_init_regmap_g12,
>> +	.cntl0_init = 0x000b4242, /* Bandgap */
>> +	.cntl1_init = PHY_CNTL1_INIT,
>> +};
>> +
>>   static int meson_dw_hdmi_bind(struct device *dev, struct device *master,
>> -				void *data)
>> +			      void *data)
>>   {
>>   	struct platform_device *pdev = to_platform_device(dev);
>>   	const struct meson_dw_hdmi_data *match;
>> @@ -640,6 +587,8 @@ static int meson_dw_hdmi_bind(struct device *dev, struct device *master,
>>   	if (!meson_dw_hdmi)
>>   		return -ENOMEM;
>>   +	platform_set_drvdata(pdev, meson_dw_hdmi);
>> +
>>   	meson_dw_hdmi->priv = priv;
>>   	meson_dw_hdmi->dev = dev;
>>   	meson_dw_hdmi->data = match;
>> @@ -682,10 +631,9 @@ static int meson_dw_hdmi_bind(struct device *dev, struct device *master,
>>   	if (ret)
>>   		return dev_err_probe(dev, ret, "Failed to enable all clocks\n");
>>   -	dw_plat_data->regm = devm_regmap_init(dev, NULL, meson_dw_hdmi,
>> -					      &meson_dw_hdmi_regmap_config);
>> -	if (IS_ERR(dw_plat_data->regm))
>> -		return PTR_ERR(dw_plat_data->regm);
>> +	ret = meson_dw_hdmi->data->reg_init(dev);
>> +	if (ret)
>> +		return ret;
>>     	irq = platform_get_irq(pdev, 0);
>>   	if (irq < 0)
>> @@ -717,8 +665,6 @@ static int meson_dw_hdmi_bind(struct device *dev, struct device *master,
>>   	    dw_hdmi_is_compatible(meson_dw_hdmi, "amlogic,meson-g12a-dw-hdmi"))
>>   		dw_plat_data->use_drm_infoframe = true;
>>   -	platform_set_drvdata(pdev, meson_dw_hdmi);
>> -
>>   	meson_dw_hdmi->hdmi = dw_hdmi_probe(pdev, &meson_dw_hdmi->dw_plat_data);
>>   	if (IS_ERR(meson_dw_hdmi->hdmi))
>>   		return PTR_ERR(meson_dw_hdmi->hdmi);
>> @@ -751,8 +697,7 @@ static int __maybe_unused meson_dw_hdmi_pm_suspend(struct device *dev)
>>   		return 0;
>>     	/* FIXME: This actually bring top out reset on suspend, why ? */
>> -	meson_dw_hdmi->data->top_write(meson_dw_hdmi,
>> -				       HDMITX_TOP_SW_RESET, 0);
>> +	regmap_write(meson_dw_hdmi->top, HDMITX_TOP_SW_RESET, 0);
>>     	return 0;
>>   }
>> diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.h b/drivers/gpu/drm/meson/meson_dw_hdmi.h
>> index 08e1c14e4ea0..3ab8c56d5fe1 100644
>> --- a/drivers/gpu/drm/meson/meson_dw_hdmi.h
>> +++ b/drivers/gpu/drm/meson/meson_dw_hdmi.h
>> @@ -28,6 +28,7 @@
>>    *     0=Release from reset. Default 1.
>>    */
>>   #define HDMITX_TOP_SW_RESET                     (0x000)
>> +#define  TOP_RST_EN				GENMASK(4, 0)
>
> Well NAK, the registers are named HDMITX_TOP_XXXX in the datasheet,
> and TOP_XXXX defines could collide with other too generic defines,
> and in any case don't mix defines renaming with other changes.
>
> Just move the GENMASK in a new patch and leave the HDMITX_ prefix alone.
>
>>     /*
>>    * Bit 31 RW free_clk_en: 0=Enable clock gating for power saving; 1= Disable
>> @@ -45,7 +46,8 @@
>>    * Bit 1 RW tmds_clk_en: 1=enable tmds_clk;  0=disable. Default 0.
>>    * Bit 0 RW pixel_clk_en: 1=enable pixel_clk; 0=disable. Default 0.
>>    */
>> -#define HDMITX_TOP_CLK_CNTL                     (0x001)
>> +#define HDMITX_TOP_CLK_CNTL                     (0x004)
>> +#define  TOP_CLK_EN				GENMASK(7, 0)
>>     /*
>>    * Bit 31:28 RW rxsense_glitch_width: starting from G12A
>> @@ -53,7 +55,9 @@
>>    * Bit 11: 0 RW hpd_valid_width: filter out width <= M*1024.    Default 0.
>>    * Bit 15:12 RW hpd_glitch_width: filter out glitch <= N.       Default 0.
>>    */
>> -#define HDMITX_TOP_HPD_FILTER                   (0x002)
>> +#define HDMITX_TOP_HPD_FILTER                   (0x008)
>> +#define  TOP_HPD_GLITCH_WIDTH			GENMASK(15, 12)
>> +#define  TOP_HPD_VALID_WIDTH			GENMASK(11, 0)
>>     /*
>>    * intr_maskn: MASK_N, one bit per interrupt source.
>> @@ -67,7 +71,7 @@
>>    * [  1] hpd_rise_intr
>>    * [  0] core_intr
>>    */
>> -#define HDMITX_TOP_INTR_MASKN                   (0x003)
>> +#define HDMITX_TOP_INTR_MASKN                   (0x00c)
>>     /*
>>    * Bit 30: 0 RW intr_stat: For each bit, write 1 to manually set the interrupt
>> @@ -80,7 +84,7 @@
>>    * Bit     1 RW hpd_rise
>>    * Bit     0 RW IP interrupt
>>    */
>> -#define HDMITX_TOP_INTR_STAT                    (0x004)
>> +#define HDMITX_TOP_INTR_STAT                    (0x010)
>>     /*
>>    * [7]    rxsense_fall starting from G12A
>> @@ -92,13 +96,12 @@
>>    * [1]	  hpd_rise
>>    * [0]	  core_intr_rise
>>    */
>> -#define HDMITX_TOP_INTR_STAT_CLR                (0x005)
>> -
>> -#define HDMITX_TOP_INTR_CORE		BIT(0)
>> -#define HDMITX_TOP_INTR_HPD_RISE	BIT(1)
>> -#define HDMITX_TOP_INTR_HPD_FALL	BIT(2)
>> -#define HDMITX_TOP_INTR_RXSENSE_RISE	BIT(6)
>> -#define HDMITX_TOP_INTR_RXSENSE_FALL	BIT(7)
>> +#define HDMITX_TOP_INTR_STAT_CLR                (0x014)
>> +#define  TOP_INTR_CORE				BIT(0)
>> +#define  TOP_INTR_HPD_RISE			BIT(1)
>> +#define  TOP_INTR_HPD_FALL			BIT(2)
>> +#define  TOP_INTR_RXSENSE_RISE			BIT(6)
>> +#define  TOP_INTR_RXSENSE_FALL			BIT(7)
>>     /*
>>    * Bit 14:12 RW tmds_sel: 3'b000=Output zero; 3'b001=Output normal TMDS data;
>> @@ -112,29 +115,31 @@
>>    *     2=Output 1-bit pattern; 3=output 10-bit pattern. Default 0.
>>    * Bit 0 RW prbs_pttn_en: 1=Enable PRBS generator; 0=Disable. Default 0.
>>    */
>> -#define HDMITX_TOP_BIST_CNTL                    (0x006)
>> +#define HDMITX_TOP_BIST_CNTL                    (0x018)
>> +#define  TOP_BIST_OUT_MASK			GENMASK(14, 12)
>> +#define  TOP_BIST_TMDS_EN			BIT(12)
>>     /* Bit 29:20 RW shift_pttn_data[59:50]. Default 0. */
>>   /* Bit 19:10 RW shift_pttn_data[69:60]. Default 0. */
>>   /* Bit  9: 0 RW shift_pttn_data[79:70]. Default 0. */
>> -#define HDMITX_TOP_SHIFT_PTTN_012               (0x007)
>> +#define HDMITX_TOP_SHIFT_PTTN_012               (0x01c)
>>     /* Bit 29:20 RW shift_pttn_data[29:20]. Default 0. */
>>   /* Bit 19:10 RW shift_pttn_data[39:30]. Default 0. */
>>   /* Bit  9: 0 RW shift_pttn_data[49:40]. Default 0. */
>> -#define HDMITX_TOP_SHIFT_PTTN_345               (0x008)
>> +#define HDMITX_TOP_SHIFT_PTTN_345               (0x020)
>>     /* Bit 19:10 RW shift_pttn_data[ 9: 0]. Default 0. */
>>   /* Bit  9: 0 RW shift_pttn_data[19:10]. Default 0. */
>> -#define HDMITX_TOP_SHIFT_PTTN_67                (0x009)
>> +#define HDMITX_TOP_SHIFT_PTTN_67                (0x024)
>>     /* Bit 25:16 RW tmds_clk_pttn[19:10]. Default 0. */
>>   /* Bit  9: 0 RW tmds_clk_pttn[ 9: 0]. Default 0. */
>> -#define HDMITX_TOP_TMDS_CLK_PTTN_01             (0x00A)
>> +#define HDMITX_TOP_TMDS_CLK_PTTN_01             (0x028)
>>     /* Bit 25:16 RW tmds_clk_pttn[39:30]. Default 0. */
>>   /* Bit  9: 0 RW tmds_clk_pttn[29:20]. Default 0. */
>> -#define HDMITX_TOP_TMDS_CLK_PTTN_23             (0x00B)
>> +#define HDMITX_TOP_TMDS_CLK_PTTN_23             (0x02c)
>>     /*
>>    * Bit 1 RW shift_tmds_clk_pttn:1=Enable shifting clk pattern,
>> @@ -143,18 +148,22 @@
>>    * [	1] shift_tmds_clk_pttn
>>    * [	0] load_tmds_clk_pttn
>>    */
>> -#define HDMITX_TOP_TMDS_CLK_PTTN_CNTL           (0x00C)
>> +#define HDMITX_TOP_TMDS_CLK_PTTN_CNTL           (0x030)
>> +#define  TOP_TDMS_CLK_PTTN_LOAD			BIT(0)
>> +#define  TOP_TDMS_CLK_PTTN_SHFT			BIT(1)
>>     /*
>>    * Bit 0 RW revocmem_wr_fail: Read back 1 to indicate Host write REVOC MEM
>>    * failure, write 1 to clear the failure flag.  Default 0.
>>    */
>> -#define HDMITX_TOP_REVOCMEM_STAT                (0x00D)
>> +#define HDMITX_TOP_REVOCMEM_STAT                (0x034)
>>     /*
>>    * Bit	   1 R	filtered RxSense status
>>    * Bit     0 R  filtered HPD status.
>>    */
>> -#define HDMITX_TOP_STAT0                        (0x00E)
>> +#define HDMITX_TOP_STAT0                        (0x038)
>> +#define  TOP_STAT0_HPD				BIT(0)
>> +#define  TOP_STAT0_RXSENSE			BIT(1)
>>     #endif /* __MESON_DW_HDMI_H */

-- 
Jerome


From krzysztof.kozlowski at linaro.org  Tue Aug 20 00:36:58 2024
From: krzysztof.kozlowski at linaro.org (Krzysztof Kozlowski)
Date: Tue, 20 Aug 2024 09:36:58 +0200
Subject: [PATCH] media: dt-bindings: trivial white-space and example cleanup
Message-ID: <20240820073658.19045-1-krzysztof.kozlowski@linaro.org>

Minor cleanups without funcitonal impact:
 - There should not be an empty blank line after SPDX tag,
 - Convention is to indent DTS examples in coding style with 2- or
   4-space indentation (4 is preferred),
 - Drop unused labels in DTS examples.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>
---
 .../media/allwinner,sun50i-h6-vpu-g2.yaml     |  1 -
 .../bindings/media/amlogic,meson-ir-tx.yaml   |  1 -
 .../bindings/media/amphion,vpu.yaml           |  1 -
 .../bindings/media/fsl,imx6ull-pxp.yaml       |  1 -
 .../media/mediatek,vcodec-decoder.yaml        |  1 -
 .../media/mediatek,vcodec-encoder.yaml        |  1 -
 .../media/mediatek,vcodec-subdev-decoder.yaml |  1 -
 .../media/microchip,sama5d4-vdec.yaml         | 17 ++++----
 .../bindings/media/nxp,imx8mq-vpu.yaml        | 41 +++++++++----------
 .../bindings/media/qcom,msm8916-camss.yaml    |  1 -
 .../bindings/media/qcom,msm8996-camss.yaml    |  1 -
 .../bindings/media/qcom,sdm660-camss.yaml     |  1 -
 .../bindings/media/qcom,sdm845-camss.yaml     |  1 -
 .../bindings/media/qcom,sm8250-camss.yaml     |  1 -
 .../bindings/media/rockchip,rk3568-vepu.yaml  |  1 -
 .../bindings/media/rockchip-vpu.yaml          | 29 +++++++------
 16 files changed, 42 insertions(+), 58 deletions(-)

diff --git a/Documentation/devicetree/bindings/media/allwinner,sun50i-h6-vpu-g2.yaml b/Documentation/devicetree/bindings/media/allwinner,sun50i-h6-vpu-g2.yaml
index a4f06bbdfe49..8ba5177ac631 100644
--- a/Documentation/devicetree/bindings/media/allwinner,sun50i-h6-vpu-g2.yaml
+++ b/Documentation/devicetree/bindings/media/allwinner,sun50i-h6-vpu-g2.yaml
@@ -1,5 +1,4 @@
 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
-
 %YAML 1.2
 ---
 $id: http://devicetree.org/schemas/media/allwinner,sun50i-h6-vpu-g2.yaml#
diff --git a/Documentation/devicetree/bindings/media/amlogic,meson-ir-tx.yaml b/Documentation/devicetree/bindings/media/amlogic,meson-ir-tx.yaml
index 377acce93423..6da8a6aded23 100644
--- a/Documentation/devicetree/bindings/media/amlogic,meson-ir-tx.yaml
+++ b/Documentation/devicetree/bindings/media/amlogic,meson-ir-tx.yaml
@@ -1,5 +1,4 @@
 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
-
 %YAML 1.2
 ---
 $id: http://devicetree.org/schemas/media/amlogic,meson-ir-tx.yaml#
diff --git a/Documentation/devicetree/bindings/media/amphion,vpu.yaml b/Documentation/devicetree/bindings/media/amphion,vpu.yaml
index 9801de3ed84e..5a920d9e78c7 100644
--- a/Documentation/devicetree/bindings/media/amphion,vpu.yaml
+++ b/Documentation/devicetree/bindings/media/amphion,vpu.yaml
@@ -1,5 +1,4 @@
 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
-
 %YAML 1.2
 ---
 $id: http://devicetree.org/schemas/media/amphion,vpu.yaml#
diff --git a/Documentation/devicetree/bindings/media/fsl,imx6ull-pxp.yaml b/Documentation/devicetree/bindings/media/fsl,imx6ull-pxp.yaml
index 84a5e894ace4..3f47744459aa 100644
--- a/Documentation/devicetree/bindings/media/fsl,imx6ull-pxp.yaml
+++ b/Documentation/devicetree/bindings/media/fsl,imx6ull-pxp.yaml
@@ -1,5 +1,4 @@
 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
-
 %YAML 1.2
 ---
 $id: http://devicetree.org/schemas/media/fsl,imx6ull-pxp.yaml#
diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml
index b401c67e3ba0..d726d141a434 100644
--- a/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml
+++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml
@@ -1,5 +1,4 @@
 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
-
 %YAML 1.2
 ---
 $id: http://devicetree.org/schemas/media/mediatek,vcodec-decoder.yaml#
diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml
index b45743d0a9ec..110e8f5f1f9e 100644
--- a/Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml
+++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml
@@ -1,5 +1,4 @@
 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
-
 %YAML 1.2
 ---
 $id: http://devicetree.org/schemas/media/mediatek,vcodec-encoder.yaml#
diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
index a500a585c692..5865e6f0be89 100644
--- a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
+++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
@@ -1,5 +1,4 @@
 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
-
 %YAML 1.2
 ---
 $id: http://devicetree.org/schemas/media/mediatek,vcodec-subdev-decoder.yaml#
diff --git a/Documentation/devicetree/bindings/media/microchip,sama5d4-vdec.yaml b/Documentation/devicetree/bindings/media/microchip,sama5d4-vdec.yaml
index 59b805ca47c5..ede086d55add 100644
--- a/Documentation/devicetree/bindings/media/microchip,sama5d4-vdec.yaml
+++ b/Documentation/devicetree/bindings/media/microchip,sama5d4-vdec.yaml
@@ -1,5 +1,4 @@
 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
-
 %YAML 1.2
 ---
 $id: http://devicetree.org/schemas/media/microchip,sama5d4-vdec.yaml#
@@ -36,12 +35,12 @@ additionalProperties: false
 
 examples:
   - |
-        #include <dt-bindings/clock/at91.h>
-        #include <dt-bindings/interrupt-controller/irq.h>
+    #include <dt-bindings/clock/at91.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
 
-        vdec0: vdec at 300000 {
-                compatible = "microchip,sama5d4-vdec";
-                reg = <0x00300000 0x100000>;
-                interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
-                clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
-        };
+    vdec at 300000 {
+        compatible = "microchip,sama5d4-vdec";
+        reg = <0x00300000 0x100000>;
+        interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
+        clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
+    };
diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
index 3d58f02b0c5d..19528262810a 100644
--- a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
+++ b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
@@ -1,5 +1,4 @@
 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
-
 %YAML 1.2
 ---
 $id: http://devicetree.org/schemas/media/nxp,imx8mq-vpu.yaml#
@@ -44,26 +43,26 @@ additionalProperties: false
 
 examples:
   - |
-        #include <dt-bindings/clock/imx8mq-clock.h>
-        #include <dt-bindings/power/imx8mq-power.h>
-        #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/clock/imx8mq-clock.h>
+    #include <dt-bindings/power/imx8mq-power.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
 
-        vpu_g1: video-codec at 38300000 {
-                compatible = "nxp,imx8mq-vpu-g1";
-                reg = <0x38300000 0x10000>;
-                interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
-                clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>;
-                power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G1>;
-        };
+    video-codec at 38300000 {
+        compatible = "nxp,imx8mq-vpu-g1";
+        reg = <0x38300000 0x10000>;
+        interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>;
+        power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G1>;
+    };
   - |
-        #include <dt-bindings/clock/imx8mq-clock.h>
-        #include <dt-bindings/power/imx8mq-power.h>
-        #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/clock/imx8mq-clock.h>
+    #include <dt-bindings/power/imx8mq-power.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
 
-        vpu_g2: video-codec at 38300000 {
-                compatible = "nxp,imx8mq-vpu-g2";
-                reg = <0x38310000 0x10000>;
-                interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
-                clocks = <&clk IMX8MQ_CLK_VPU_G2_ROOT>;
-                power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G2>;
-        };
+    video-codec at 38300000 {
+        compatible = "nxp,imx8mq-vpu-g2";
+        reg = <0x38310000 0x10000>;
+        interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&clk IMX8MQ_CLK_VPU_G2_ROOT>;
+        power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G2>;
+    };
diff --git a/Documentation/devicetree/bindings/media/qcom,msm8916-camss.yaml b/Documentation/devicetree/bindings/media/qcom,msm8916-camss.yaml
index 9cc0a968a401..3469a43f00d4 100644
--- a/Documentation/devicetree/bindings/media/qcom,msm8916-camss.yaml
+++ b/Documentation/devicetree/bindings/media/qcom,msm8916-camss.yaml
@@ -1,5 +1,4 @@
 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
-
 %YAML 1.2
 ---
 $id: http://devicetree.org/schemas/media/qcom,msm8916-camss.yaml#
diff --git a/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml b/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml
index 5cb0e337ea6e..644646de338a 100644
--- a/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml
+++ b/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml
@@ -1,5 +1,4 @@
 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
-
 %YAML 1.2
 ---
 $id: http://devicetree.org/schemas/media/qcom,msm8996-camss.yaml#
diff --git a/Documentation/devicetree/bindings/media/qcom,sdm660-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sdm660-camss.yaml
index 584106e275f6..68d8670557f5 100644
--- a/Documentation/devicetree/bindings/media/qcom,sdm660-camss.yaml
+++ b/Documentation/devicetree/bindings/media/qcom,sdm660-camss.yaml
@@ -1,5 +1,4 @@
 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
-
 %YAML 1.2
 ---
 $id: http://devicetree.org/schemas/media/qcom,sdm660-camss.yaml#
diff --git a/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml
index ec4380a0a03f..6a3757c46f59 100644
--- a/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml
+++ b/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml
@@ -1,5 +1,4 @@
 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
-
 %YAML 1.2
 ---
 $id: http://devicetree.org/schemas/media/qcom,sdm845-camss.yaml#
diff --git a/Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml
index fa5073c0fd1e..6bd89538765f 100644
--- a/Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml
+++ b/Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml
@@ -1,5 +1,4 @@
 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
-
 %YAML 1.2
 ---
 $id: http://devicetree.org/schemas/media/qcom,sm8250-camss.yaml#
diff --git a/Documentation/devicetree/bindings/media/rockchip,rk3568-vepu.yaml b/Documentation/devicetree/bindings/media/rockchip,rk3568-vepu.yaml
index 9d90d8d0565a..0418d1d4ed2f 100644
--- a/Documentation/devicetree/bindings/media/rockchip,rk3568-vepu.yaml
+++ b/Documentation/devicetree/bindings/media/rockchip,rk3568-vepu.yaml
@@ -1,5 +1,4 @@
 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
-
 %YAML 1.2
 ---
 $id: http://devicetree.org/schemas/media/rockchip,rk3568-vepu.yaml#
diff --git a/Documentation/devicetree/bindings/media/rockchip-vpu.yaml b/Documentation/devicetree/bindings/media/rockchip-vpu.yaml
index c57e1f488895..cddaa28b62c6 100644
--- a/Documentation/devicetree/bindings/media/rockchip-vpu.yaml
+++ b/Documentation/devicetree/bindings/media/rockchip-vpu.yaml
@@ -1,5 +1,4 @@
 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
-
 %YAML 1.2
 ---
 $id: http://devicetree.org/schemas/media/rockchip-vpu.yaml#
@@ -87,18 +86,18 @@ additionalProperties: false
 
 examples:
   - |
-        #include <dt-bindings/clock/rk3288-cru.h>
-        #include <dt-bindings/interrupt-controller/arm-gic.h>
-        #include <dt-bindings/power/rk3288-power.h>
+    #include <dt-bindings/clock/rk3288-cru.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/power/rk3288-power.h>
 
-        vpu: video-codec at ff9a0000 {
-                compatible = "rockchip,rk3288-vpu";
-                reg = <0xff9a0000 0x800>;
-                interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
-                             <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
-                interrupt-names = "vepu", "vdpu";
-                clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
-                clock-names = "aclk", "hclk";
-                power-domains = <&power RK3288_PD_VIDEO>;
-                iommus = <&vpu_mmu>;
-        };
+    video-codec at ff9a0000 {
+        compatible = "rockchip,rk3288-vpu";
+        reg = <0xff9a0000 0x800>;
+        interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+        interrupt-names = "vepu", "vdpu";
+        clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
+        clock-names = "aclk", "hclk";
+        power-domains = <&power RK3288_PD_VIDEO>;
+        iommus = <&vpu_mmu>;
+    };
-- 
2.43.0



From yuehaibing at huawei.com  Tue Aug 20 01:25:19 2024
From: yuehaibing at huawei.com (Yue Haibing)
Date: Tue, 20 Aug 2024 16:25:19 +0800
Subject: [PATCH -next 0/6] Cleanup unused function declarations
Message-ID: <20240820082525.259337-1-yuehaibing@huawei.com>

Cleanup unused declarations for crypto driver subsystem.

Yue Haibing (6):
  crypto: safexcel - Remove unused declaration
    safexcel_ring_first_rptr()
  crypto: sl3516 - Remove unused declaration sl3516_ce_enqueue()
  crypto: octeontx - Remove unused declaration otx_cpt_callback()
  crypto: ccp - Remove unused declaration sp_get_master()
  crypto: amlogic - Remove unused declaration meson_enqueue()
  crypto: crypto4xx - Remove unused declaration crypto4xx_free_ctx()

 drivers/crypto/amcc/crypto4xx_core.h             | 1 -
 drivers/crypto/amlogic/amlogic-gxl.h             | 2 --
 drivers/crypto/ccp/sp-dev.h                      | 1 -
 drivers/crypto/gemini/sl3516-ce.h                | 2 --
 drivers/crypto/inside-secure/safexcel.h          | 1 -
 drivers/crypto/marvell/octeontx/otx_cptvf_algs.h | 1 -
 6 files changed, 8 deletions(-)

-- 
2.34.1



From yuehaibing at huawei.com  Tue Aug 20 01:25:20 2024
From: yuehaibing at huawei.com (Yue Haibing)
Date: Tue, 20 Aug 2024 16:25:20 +0800
Subject: [PATCH -next 1/6] crypto: safexcel - Remove unused declaration safexcel_ring_first_rptr()
In-Reply-To: <20240820082525.259337-1-yuehaibing@huawei.com>
References: <20240820082525.259337-1-yuehaibing@huawei.com>
Message-ID: <20240820082525.259337-2-yuehaibing@huawei.com>

Commit 9744fec95f06 ("crypto: inside-secure - remove request list to
improve performance") declar this but never implemented.

Signed-off-by: Yue Haibing <yuehaibing at huawei.com>
---
 drivers/crypto/inside-secure/safexcel.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/crypto/inside-secure/safexcel.h b/drivers/crypto/inside-secure/safexcel.h
index d0059ce954dd..0c79ad78d1c0 100644
--- a/drivers/crypto/inside-secure/safexcel.h
+++ b/drivers/crypto/inside-secure/safexcel.h
@@ -897,7 +897,6 @@ int safexcel_init_ring_descriptors(struct safexcel_crypto_priv *priv,
 int safexcel_select_ring(struct safexcel_crypto_priv *priv);
 void *safexcel_ring_next_rptr(struct safexcel_crypto_priv *priv,
 			      struct safexcel_desc_ring *ring);
-void *safexcel_ring_first_rptr(struct safexcel_crypto_priv *priv, int  ring);
 void safexcel_ring_rollback_wptr(struct safexcel_crypto_priv *priv,
 				 struct safexcel_desc_ring *ring);
 struct safexcel_command_desc *safexcel_add_cdesc(struct safexcel_crypto_priv *priv,
-- 
2.34.1



From yuehaibing at huawei.com  Tue Aug 20 01:25:22 2024
From: yuehaibing at huawei.com (Yue Haibing)
Date: Tue, 20 Aug 2024 16:25:22 +0800
Subject: [PATCH -next 3/6] crypto: octeontx - Remove unused declaration otx_cpt_callback()
In-Reply-To: <20240820082525.259337-1-yuehaibing@huawei.com>
References: <20240820082525.259337-1-yuehaibing@huawei.com>
Message-ID: <20240820082525.259337-4-yuehaibing@huawei.com>

This function is never implemented and used since introduction in
commit 10b4f09491bf ("crypto: marvell - add the Virtual Function
driver for CPT")

Signed-off-by: Yue Haibing <yuehaibing at huawei.com>
---
 drivers/crypto/marvell/octeontx/otx_cptvf_algs.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/crypto/marvell/octeontx/otx_cptvf_algs.h b/drivers/crypto/marvell/octeontx/otx_cptvf_algs.h
index 4181b5c5c356..a50b5e2f8d00 100644
--- a/drivers/crypto/marvell/octeontx/otx_cptvf_algs.h
+++ b/drivers/crypto/marvell/octeontx/otx_cptvf_algs.h
@@ -185,6 +185,5 @@ int otx_cpt_crypto_init(struct pci_dev *pdev, struct module *mod,
 			int num_queues, int num_devices);
 void otx_cpt_crypto_exit(struct pci_dev *pdev, struct module *mod,
 			 enum otx_cptvf_type engine_type);
-void otx_cpt_callback(int status, void *arg, void *req);
 
 #endif /* __OTX_CPT_ALGS_H */
-- 
2.34.1



From yuehaibing at huawei.com  Tue Aug 20 01:25:23 2024
From: yuehaibing at huawei.com (Yue Haibing)
Date: Tue, 20 Aug 2024 16:25:23 +0800
Subject: [PATCH -next 4/6] crypto: ccp - Remove unused declaration sp_get_master()
In-Reply-To: <20240820082525.259337-1-yuehaibing@huawei.com>
References: <20240820082525.259337-1-yuehaibing@huawei.com>
Message-ID: <20240820082525.259337-5-yuehaibing@huawei.com>

This function is never implemented and used since introduction in
commit 720419f01832 ("crypto: ccp - Introduce the AMD Secure Processor
device").

Signed-off-by: Yue Haibing <yuehaibing at huawei.com>
---
 drivers/crypto/ccp/sp-dev.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/crypto/ccp/sp-dev.h b/drivers/crypto/ccp/sp-dev.h
index 0895de823674..6f9d7063257d 100644
--- a/drivers/crypto/ccp/sp-dev.h
+++ b/drivers/crypto/ccp/sp-dev.h
@@ -138,7 +138,6 @@ struct sp_device *sp_alloc_struct(struct device *dev);
 
 int sp_init(struct sp_device *sp);
 void sp_destroy(struct sp_device *sp);
-struct sp_device *sp_get_master(void);
 
 int sp_suspend(struct sp_device *sp);
 int sp_resume(struct sp_device *sp);
-- 
2.34.1



From yuehaibing at huawei.com  Tue Aug 20 01:25:21 2024
From: yuehaibing at huawei.com (Yue Haibing)
Date: Tue, 20 Aug 2024 16:25:21 +0800
Subject: [PATCH -next 2/6] crypto: sl3516 - Remove unused declaration sl3516_ce_enqueue()
In-Reply-To: <20240820082525.259337-1-yuehaibing@huawei.com>
References: <20240820082525.259337-1-yuehaibing@huawei.com>
Message-ID: <20240820082525.259337-3-yuehaibing@huawei.com>

This function is never implemented and used since introduction in
commit 46c5338db7bd ("crypto: sl3516 - Add sl3516 crypto engine")

Signed-off-by: Yue Haibing <yuehaibing at huawei.com>
---
 drivers/crypto/gemini/sl3516-ce.h | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/crypto/gemini/sl3516-ce.h b/drivers/crypto/gemini/sl3516-ce.h
index 9e1a7e7f8961..56b844d0cd9c 100644
--- a/drivers/crypto/gemini/sl3516-ce.h
+++ b/drivers/crypto/gemini/sl3516-ce.h
@@ -326,8 +326,6 @@ struct sl3516_ce_alg_template {
 	unsigned long stat_bytes;
 };
 
-int sl3516_ce_enqueue(struct crypto_async_request *areq, u32 type);
-
 int sl3516_ce_aes_setkey(struct crypto_skcipher *tfm, const u8 *key,
 			 unsigned int keylen);
 int sl3516_ce_cipher_init(struct crypto_tfm *tfm);
-- 
2.34.1



From yuehaibing at huawei.com  Tue Aug 20 01:25:25 2024
From: yuehaibing at huawei.com (Yue Haibing)
Date: Tue, 20 Aug 2024 16:25:25 +0800
Subject: [PATCH -next 6/6] crypto: crypto4xx - Remove unused declaration crypto4xx_free_ctx()
In-Reply-To: <20240820082525.259337-1-yuehaibing@huawei.com>
References: <20240820082525.259337-1-yuehaibing@huawei.com>
Message-ID: <20240820082525.259337-7-yuehaibing@huawei.com>

This function is never implemented and used since introduction in
commit 049359d65527 ("crypto: amcc - Add crypt4xx driver").

Signed-off-by: Yue Haibing <yuehaibing at huawei.com>
---
 drivers/crypto/amcc/crypto4xx_core.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/crypto/amcc/crypto4xx_core.h b/drivers/crypto/amcc/crypto4xx_core.h
index 96355d463b04..3adcc5e65694 100644
--- a/drivers/crypto/amcc/crypto4xx_core.h
+++ b/drivers/crypto/amcc/crypto4xx_core.h
@@ -149,7 +149,6 @@ struct crypto4xx_alg {
 
 int crypto4xx_alloc_sa(struct crypto4xx_ctx *ctx, u32 size);
 void crypto4xx_free_sa(struct crypto4xx_ctx *ctx);
-void crypto4xx_free_ctx(struct crypto4xx_ctx *ctx);
 int crypto4xx_build_pd(struct crypto_async_request *req,
 		       struct crypto4xx_ctx *ctx,
 		       struct scatterlist *src,
-- 
2.34.1



From yuehaibing at huawei.com  Tue Aug 20 01:25:24 2024
From: yuehaibing at huawei.com (Yue Haibing)
Date: Tue, 20 Aug 2024 16:25:24 +0800
Subject: [PATCH -next 5/6] crypto: amlogic - Remove unused declaration meson_enqueue()
In-Reply-To: <20240820082525.259337-1-yuehaibing@huawei.com>
References: <20240820082525.259337-1-yuehaibing@huawei.com>
Message-ID: <20240820082525.259337-6-yuehaibing@huawei.com>

This function is never implemented and used since introduction in
commit 48fe583fe541 ("crypto: amlogic - Add crypto accelerator for
amlogic GXL").

Signed-off-by: Yue Haibing <yuehaibing at huawei.com>
---
 drivers/crypto/amlogic/amlogic-gxl.h | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h
index 1013a666c932..d68094ffb70a 100644
--- a/drivers/crypto/amlogic/amlogic-gxl.h
+++ b/drivers/crypto/amlogic/amlogic-gxl.h
@@ -150,8 +150,6 @@ struct meson_alg_template {
 #endif
 };
 
-int meson_enqueue(struct crypto_async_request *areq, u32 type);
-
 int meson_aes_setkey(struct crypto_skcipher *tfm, const u8 *key,
 		     unsigned int keylen);
 int meson_cipher_init(struct crypto_tfm *tfm);
-- 
2.34.1



From devnull+xianwei.zhao.amlogic.com at kernel.org  Tue Aug 20 02:41:58 2024
From: devnull+xianwei.zhao.amlogic.com at kernel.org (Xianwei Zhao via B4 Relay)
Date: Tue, 20 Aug 2024 17:41:58 +0800
Subject: [PATCH v2 3/3] arm64: dts: amlogic: add C3 AW419 board
In-Reply-To: <20240820-c3_add_node-v2-0-8fd3f06b7bce@amlogic.com>
References: <20240820-c3_add_node-v2-0-8fd3f06b7bce@amlogic.com>
Message-ID: <20240820-c3_add_node-v2-3-8fd3f06b7bce@amlogic.com>

From: Xianwei Zhao <xianwei.zhao at amlogic.com>

Add Amlogic C3 C308L AW419 board. The corresponding binding
has been applied, therefore, this series does not need to
add a binding corresponding to the AW419 board.

Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
---
 arch/arm64/boot/dts/amlogic/Makefile               |   1 +
 .../boot/dts/amlogic/amlogic-c3-c308l-aw419.dts    | 262 +++++++++++++++++++++
 2 files changed, 263 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
index 29417f04f886..2fbda8419c65 100644
--- a/arch/arm64/boot/dts/amlogic/Makefile
+++ b/arch/arm64/boot/dts/amlogic/Makefile
@@ -2,6 +2,7 @@
 dtb-$(CONFIG_ARCH_MESON) += amlogic-a4-a113l2-ba400.dtb
 dtb-$(CONFIG_ARCH_MESON) += amlogic-a5-a113x2-av400.dtb
 dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c302x-aw409.dtb
+dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c308l-aw419.dtb
 dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-an400.dtb
 dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
 dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3-c308l-aw419.dts b/arch/arm64/boot/dts/amlogic/amlogic-c3-c308l-aw419.dts
new file mode 100644
index 000000000000..4477a2659e27
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/amlogic-c3-c308l-aw419.dts
@@ -0,0 +1,262 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "amlogic-c3.dtsi"
+
+/ {
+	model = "Amlogic C308l aw419 Development Board";
+	compatible = "amlogic,aw419", "amlogic,c3";
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	aliases {
+		serial0 = &uart_b;
+		spi0 = &spifc;
+	};
+
+	memory at 0 {
+		device_type = "memory";
+		reg = <0x0 0x0 0x0 0x80000000>;
+	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		/* 9 MiB reserved for ARM Trusted Firmware */
+		secmon_reserved: secmon at 7f00000 {
+			compatible = "shared-dma-pool";
+			reg = <0x0 0x07f00000 0x0 0x900000>;
+			no-map;
+		};
+	};
+
+	main_12v: regulator-main-12v {
+		compatible = "regulator-fixed";
+		regulator-name = "12V";
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vcc_5v: regulator-vcc-5v {
+		compatible = "regulator-fixed";
+		regulator-name = "VCC5V";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&main_12v>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddq: regulator-vddq {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDQ";
+		regulator-min-microvolt = <1200000>;
+		regulator-max-microvolt = <1200000>;
+		vin-supply = <&main_12v>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddao_3v3: regulator-vddao-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDAO3V3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&main_12v>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddao_1v8: regulator-vddao-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDAO1V8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vddao_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	ddr4_2v5: regulator-ddr4-2v5 {
+		compatible = "regulator-fixed";
+		regulator-name = "DDR4_2V5";
+		regulator-min-microvolt = <2500000>;
+		regulator-max-microvolt = <2500000>;
+		vin-supply = <&vddao_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vcc_3v3: regulator-vcc-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "VCC3V3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vddao_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vcc_1v8: regulator-vcc-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "VCC1V8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vdd_1v8: regulator-vdd-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "VDD1V8_BOOT";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddio_b: regulator-vddio-3v3-b {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDIO_B";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vcc_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	sdcard: regulator-sdcard {
+		compatible = "regulator-fixed";
+		regulator-name = "SDCARD_POWER";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vddao_3v3>;
+		gpio = <&gpio GPIOA_4 GPIO_ACTIVE_LOW>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+};
+
+&uart_b {
+	status = "okay";
+};
+
+&nand {
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	pinctrl-0 = <&nand_pins>;
+	pinctrl-names = "default";
+
+	nand at 0 {
+		reg = <0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		nand-on-flash-bbt;
+
+		partition at 0 {
+			label = "boot";
+			reg = <0x0 0x00200000>;
+		};
+		partition at 200000 {
+			label = "env";
+			reg = <0x00200000 0x00400000>;
+		};
+		partition at 600000 {
+			label = "system";
+			reg = <0x00600000 0x00a00000>;
+		};
+		partition at 1000000 {
+			label = "rootfs";
+			reg = <0x01000000 0x03000000>;
+		};
+		partition at 4000000 {
+			label = "media";
+			reg = <0x04000000 0x8000000>;
+		};
+	};
+};
+
+&ethmac {
+	status = "okay";
+	phy-handle = <&internal_ephy>;
+	phy-mode = "rmii";
+};
+
+&spifc {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	pinctrl-0 = <&spifc_pins>;
+	pinctrl-names = "default";
+
+	nand at 0 {
+		compatible = "spi-nand";
+		reg = <0>;
+		spi-max-frequency = <83000000>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		status = "disabled";
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition at 0 {
+				label = "boot";
+				reg = <0 0x200000>;
+			};
+
+			partition at 200000 {
+				label = "env";
+				reg = <0x200000 0x400000>;
+			};
+
+			partition at 600000 {
+				label = "system";
+				reg = <0x600000 0xa00000>;
+			};
+
+			partition at 1000000 {
+				label = "rootfs";
+				reg = <0x1000000 0x3000000>;
+			};
+
+			partition at 4000000 {
+				label = "data";
+				reg = <0x4000000 0x8000000>;
+			};
+		};
+	};
+};
+
+&sd {
+	status = "okay";
+	pinctrl-0 = <&sdcard_pins>;
+	pinctrl-1 = <&sdcard_clk_gate_pins>;
+	pinctrl-names = "default","clk-gate";
+
+	bus-width = <4>;
+	cap-sd-highspeed;
+	max-frequency = <50000000>;
+	disable-wp;
+
+	cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
+	vmmc-supply = <&sdcard>;
+	vqmmc-supply = <&sdcard>;
+};

-- 
2.37.1




From devnull+xianwei.zhao.amlogic.com at kernel.org  Tue Aug 20 02:41:55 2024
From: devnull+xianwei.zhao.amlogic.com at kernel.org (Xianwei Zhao via B4 Relay)
Date: Tue, 20 Aug 2024 17:41:55 +0800
Subject: [PATCH v2 0/3] add some node for amlogic c3
Message-ID: <20240820-c3_add_node-v2-0-8fd3f06b7bce@amlogic.com>

Add some node for board AW409 and support board C308l AW419.

Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
---
Changes in v2:
- Delete unused sdio node in board level dts.
- Add the description of modifying the binding in commit msg.
- Add the reason why some node property fileds place at board level in commit msg.
- Link to v1: https://lore.kernel.org/r/20240806-c3_add_node-v1-0-c0de41341632 at amlogic.com

---
Xianwei Zhao (3):
      dt-bindings: clock: fix C3 PLL input parameter
      arm64: dts: amlogic: add some device nodes for C3
      arm64: dts: amlogic: add C3 AW419 board

 .../bindings/clock/amlogic,c3-pll-clkc.yaml        |   7 +-
 arch/arm64/boot/dts/amlogic/Makefile               |   1 +
 .../boot/dts/amlogic/amlogic-c3-c302x-aw409.dts    | 233 ++++++++++
 .../boot/dts/amlogic/amlogic-c3-c308l-aw419.dts    | 262 +++++++++++
 arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi        | 487 ++++++++++++++++++++-
 5 files changed, 987 insertions(+), 3 deletions(-)
---
base-commit: bfe05c592279e509a67c3ae305517859f3f5a58c
change-id: 20240806-c3_add_node-420a37918f18

Best regards,
-- 
Xianwei Zhao <xianwei.zhao at amlogic.com>




From devnull+xianwei.zhao.amlogic.com at kernel.org  Tue Aug 20 02:41:56 2024
From: devnull+xianwei.zhao.amlogic.com at kernel.org (Xianwei Zhao via B4 Relay)
Date: Tue, 20 Aug 2024 17:41:56 +0800
Subject: [PATCH v2 1/3] dt-bindings: clock: fix C3 PLL input parameter
In-Reply-To: <20240820-c3_add_node-v2-0-8fd3f06b7bce@amlogic.com>
References: <20240820-c3_add_node-v2-0-8fd3f06b7bce@amlogic.com>
Message-ID: <20240820-c3_add_node-v2-1-8fd3f06b7bce@amlogic.com>

From: Xianwei Zhao <xianwei.zhao at amlogic.com>

Add C3 PLL controller input clock parameters "fix".

The clock named "fix" was initially implemented in PLL clock controller driver.
However, some registers required secure zone access, so we moved it to
the secure zone (BL31) and accessed it through SCMI. Since the PLL clock
driver needs to use this clock, the "fix" clock is used as an input source.
We updated the driver but forgot to modify the binding accordingly,
so we are adding it here.

It is an ABI break but on a new and immature platform.
Noboby could really use that platform at this stage, so nothing is going
to break on anyone really.

Fixes: 0e6be855a96d ("dt-bindings: clock: add Amlogic C3 PLL clock controller")
Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
---
 Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
index 43de3c6fc1cf..700865cc9792 100644
--- a/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
+++ b/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
@@ -24,11 +24,13 @@ properties:
     items:
       - description: input top pll
       - description: input mclk pll
+      - description: input fix pll
 
   clock-names:
     items:
       - const: top
       - const: mclk
+      - const: fix
 
   "#clock-cells":
     const: 1
@@ -52,8 +54,9 @@ examples:
             compatible = "amlogic,c3-pll-clkc";
             reg = <0x0 0x8000 0x0 0x1a4>;
             clocks = <&scmi_clk 2>,
-                     <&scmi_clk 5>;
-            clock-names = "top", "mclk";
+                     <&scmi_clk 5>,
+                     <&scmi_clk 12>;
+            clock-names = "top", "mclk", "fix";
             #clock-cells = <1>;
         };
     };

-- 
2.37.1




From devnull+xianwei.zhao.amlogic.com at kernel.org  Tue Aug 20 02:41:57 2024
From: devnull+xianwei.zhao.amlogic.com at kernel.org (Xianwei Zhao via B4 Relay)
Date: Tue, 20 Aug 2024 17:41:57 +0800
Subject: [PATCH v2 2/3] arm64: dts: amlogic: add some device nodes for C3
In-Reply-To: <20240820-c3_add_node-v2-0-8fd3f06b7bce@amlogic.com>
References: <20240820-c3_add_node-v2-0-8fd3f06b7bce@amlogic.com>
Message-ID: <20240820-c3_add_node-v2-2-8fd3f06b7bce@amlogic.com>

From: Xianwei Zhao <xianwei.zhao at amlogic.com>

Add some device nodes for SoC C3, including periphs clock controller
node, PLL clock controller node, SPICC node, regulator node, NAND
controller node, sdcard node, Ethernet MAC and PHY node.

The sdacrd depends on regulator and pinctrl(select), so some
property fields are placed at the board level. The nand chip
is placed on the board, So some property fields about SPIFC
and NAND controller node are placed at the board level.
THe Ethernet MAC support outchip PHY, so place this property
field(select PHY) at the board level.

Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
---
 .../boot/dts/amlogic/amlogic-c3-c302x-aw409.dts    | 233 ++++++++++
 arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi        | 487 ++++++++++++++++++++-
 2 files changed, 719 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts b/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts
index edce8850b338..b8d2037afc00 100644
--- a/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts
+++ b/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts
@@ -16,14 +16,247 @@ / {
 
 	aliases {
 		serial0 = &uart_b;
+		spi0 = &spifc;
 	};
 
 	memory at 0 {
 		device_type = "memory";
 		reg = <0x0 0x0 0x0 0x10000000>;
 	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		/* 9 MiB reserved for ARM Trusted Firmware */
+		secmon_reserved: secmon at 7f00000 {
+			compatible = "shared-dma-pool";
+			reg = <0x0 0x07f00000 0x0 0x900000>;
+			no-map;
+		};
+	};
+
+	main_12v: regulator-main-12v {
+		compatible = "regulator-fixed";
+		regulator-name = "12V";
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vcc_5v: regulator-vcc-5v {
+		compatible = "regulator-fixed";
+		regulator-name = "VCC5V";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&main_12v>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddq: regulator-vddq {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDQ";
+		regulator-min-microvolt = <1200000>;
+		regulator-max-microvolt = <1200000>;
+		vin-supply = <&main_12v>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddao_3v3: regulator-vddao-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDAO3V3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&main_12v>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddao_1v8: regulator-vddao-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDAO1V8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vddao_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	ddr4_2v5: regulator-ddr4-2v5 {
+		compatible = "regulator-fixed";
+		regulator-name = "DDR4_2V5";
+		regulator-min-microvolt = <2500000>;
+		regulator-max-microvolt = <2500000>;
+		vin-supply = <&vddao_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vcc_3v3: regulator-vcc-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "VCC3V3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vddao_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vcc_1v8: regulator-vcc-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "VCC1V8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vdd_1v8: regulator-vdd-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "VDD1V8_BOOT";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddio_b: regulator-vddio-3v3-b {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDIO_B";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vcc_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	sdcard: regulator-sdcard {
+		compatible = "regulator-fixed";
+		regulator-name = "SDCARD_POWER";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vddao_3v3>;
+		gpio = <&gpio GPIOA_4 GPIO_ACTIVE_LOW>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
 };
 
 &uart_b {
 	status = "okay";
 };
+
+&nand {
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	pinctrl-0 = <&nand_pins>;
+	pinctrl-names = "default";
+
+	nand at 0 {
+		reg = <0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		nand-on-flash-bbt;
+
+		partition at 0 {
+			label = "boot";
+			reg = <0x0 0x00200000>;
+		};
+		partition at 200000 {
+			label = "env";
+			reg = <0x00200000 0x00400000>;
+		};
+		partition at 600000 {
+			label = "system";
+			reg = <0x00600000 0x00a00000>;
+		};
+		partition at 1000000 {
+			label = "rootfs";
+			reg = <0x01000000 0x03000000>;
+		};
+		partition at 4000000 {
+			label = "media";
+			reg = <0x04000000 0x8000000>;
+		};
+	};
+};
+
+&ethmac {
+	status = "okay";
+	phy-handle = <&internal_ephy>;
+	phy-mode = "rmii";
+};
+
+&spifc {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	pinctrl-0 = <&spifc_pins>;
+	pinctrl-names = "default";
+
+	nand at 0 {
+		compatible = "spi-nand";
+		reg = <0>;
+		spi-max-frequency = <83000000>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		status = "disabled";
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition at 0 {
+				label = "boot";
+				reg = <0 0x200000>;
+			};
+
+			partition at 200000 {
+				label = "env";
+				reg = <0x200000 0x400000>;
+			};
+
+			partition at 600000 {
+				label = "system";
+				reg = <0x600000 0xa00000>;
+			};
+
+			partition at 1000000 {
+				label = "rootfs";
+				reg = <0x1000000 0x3000000>;
+			};
+
+			partition at 4000000 {
+				label = "data";
+				reg = <0x4000000 0x8000000>;
+			};
+		};
+	};
+};
+
+&sd {
+	status = "okay";
+	pinctrl-0 = <&sdcard_pins>;
+	pinctrl-1 = <&sdcard_clk_gate_pins>;
+	pinctrl-names = "default","clk-gate";
+
+	bus-width = <4>;
+	cap-sd-highspeed;
+	max-frequency = <50000000>;
+	disable-wp;
+
+	cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
+	vmmc-supply = <&sdcard>;
+	vqmmc-supply = <&sdcard>;
+};
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
index f8fb060c49ae..2bf56fbe3dfb 100644
--- a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
+++ b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
@@ -7,6 +7,11 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/reset/amlogic,c3-reset.h>
+#include <dt-bindings/clock/amlogic,c3-pll-clkc.h>
+#include <dt-bindings/clock/amlogic,c3-scmi-clkc.h>
+#include <dt-bindings/clock/amlogic,c3-peripherals-clkc.h>
+#include <dt-bindings/power/amlogic,c3-pwrc.h>
+#include <dt-bindings/gpio/amlogic-c3-gpio.h>
 
 / {
 	cpus {
@@ -57,6 +62,34 @@ pwrc: power-controller {
 		};
 	};
 
+	sram {
+		compatible = "mmio-sram";
+		reg = <0x0 0x07f50e00 0x0 0x100>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0x0 0x07f50e00 0x100>;
+
+		scmi_shmem: sram at 0 {
+			compatible = "arm,scmi-shmem";
+			reg = <0x0 0x100>;
+		};
+	};
+
+	firmware {
+		scmi: scmi {
+			compatible = "arm,scmi-smc";
+			arm,smc-id = <0x820000C1>;
+			shmem = <&scmi_shmem>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			scmi_clk: protocol at 14 {
+				reg = <0x14>;
+				#clock-cells = <1>;
+			};
+		};
+	};
+
 	soc {
 		compatible = "simple-bus";
 		#address-cells = <2>;
@@ -108,6 +141,237 @@ gpio: bank at 4000 {
 					#gpio-cells = <2>;
 					gpio-ranges = <&periphs_pinctrl 0 0 55>;
 				};
+
+				i2c0_pins1: i2c0-pins1 {
+					mux {
+						groups = "i2c0_sda_e",
+							 "i2c0_scl_e";
+						function = "i2c0";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c0_pins2: i2c0-pins2 {
+					mux {
+						groups = "i2c0_sda_d",
+							 "i2c0_scl_d";
+						function = "i2c0";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c1_pins1: i2c1-pins1 {
+					mux {
+						groups = "i2c1_sda_x",
+							 "i2c1_scl_x";
+						function = "i2c1";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c1_pins2: i2c1-pins2 {
+					mux {
+						groups = "i2c1_sda_d",
+							 "i2c1_scl_d";
+						function = "i2c1";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c1_pins3: i2c1-pins3 {
+					mux {
+						groups = "i2c1_sda_a",
+							 "i2c1_scl_a";
+						function = "i2c1";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c1_pins4: i2c1-pins4 {
+					mux {
+						groups = "i2c1_sda_b",
+							 "i2c1_scl_b";
+						function = "i2c1";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c2_pins1: i2c2-pins1 {
+					mux {
+						groups = "i2c2_sda",
+							 "i2c2_scl";
+						function = "i2c2";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c3_pins1: i2c3-pins1 {
+					mux {
+						groups = "i2c3_sda_c",
+							 "i2c3_scl_c";
+						function = "i2c3";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c3_pins2: i2c3-pins2 {
+					mux {
+						groups = "i2c3_sda_x",
+							 "i2c3_scl_x";
+						function = "i2c3";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c3_pins3: i2c3-pins3 {
+					mux {
+						groups = "i2c3_sda_d",
+							 "i2c3_scl_d";
+						function = "i2c3";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				nand_pins: nand-pins {
+					mux {
+						groups = "emmc_nand_d0",
+							 "emmc_nand_d1",
+							 "emmc_nand_d2",
+							 "emmc_nand_d3",
+							 "emmc_nand_d4",
+							 "emmc_nand_d5",
+							 "emmc_nand_d6",
+							 "emmc_nand_d7",
+							 "nand_ce0",
+							 "nand_ale",
+							 "nand_cle",
+							 "nand_wen_clk",
+							 "nand_ren_wr";
+						function = "nand";
+						input-enable;
+					};
+				};
+
+				sdcard_pins: sdcard-pins {
+					mux {
+						groups = "sdcard_d0",
+							 "sdcard_d1",
+							 "sdcard_d2",
+							 "sdcard_d3",
+							 "sdcard_clk",
+							 "sdcard_cmd";
+						function = "sdcard";
+						bias-pull-up;
+						drive-strength-microamp = <4000>;
+					};
+				};
+
+				sdcard_clk_gate_pins: sdcard-clk-cmd-pins {
+					mux {
+						groups = "GPIOC_4";
+						function = "gpio_periphs";
+						bias-pull-down;
+						drive-strength-microamp = <4000>;
+					};
+				};
+
+				sdio_m_clk_gate_pins: sdio-m-clk-cmd-pins {
+					mux {
+						groups = "sdio_clk";
+						function = "sdio";
+						bias-pull-down;
+						drive-strength-microamp = <4000>;
+					};
+				};
+
+				sdio_m_pins: sdio-m-all-pins {
+					mux {
+						groups = "sdio_d0",
+							 "sdio_d1",
+							 "sdio_d2",
+							 "sdio_d3",
+							 "sdio_clk",
+							 "sdio_cmd";
+						function = "sdio";
+						input-enable;
+						bias-pull-up;
+						drive-strength-microamp = <4000>;
+					};
+				};
+
+				spicc0_pins1: spicc0-pins1 {
+					mux {
+						groups = "spi_a_mosi_b",
+							 "spi_a_miso_b",
+							 "spi_a_clk_b";
+						function = "spi_a";
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				spicc0_pins2: spicc0-pins2 {
+					mux {
+						groups = "spi_a_mosi_c",
+							 "spi_a_miso_c",
+							 "spi_a_clk_c";
+						function = "spi_a";
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				spicc0_pins3: spicc0-pins3 {
+					mux {
+						groups = "spi_a_mosi_x",
+							 "spi_a_miso_x",
+							 "spi_a_clk_x";
+						function = "spi_a";
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				spicc1_pins1: spicc1-pins1 {
+					mux {
+						groups = "spi_b_mosi_d",
+							 "spi_b_miso_d",
+							 "spi_b_clk_d";
+						function = "spi_b";
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				spicc1_pins2: spicc1-pins2 {
+					mux {
+						groups = "spi_b_mosi_x",
+							 "spi_b_miso_x",
+							 "spi_b_clk_x";
+						function = "spi_b";
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				spifc_pins: spifc-pins {
+					mux {
+						groups = "spif_mo",
+							 "spif_mi",
+							 "spif_clk",
+							 "spif_cs",
+							 "spif_hold",
+							 "spif_wp",
+							 "spif_clk_loop";
+						function = "spif";
+						drive-strength-microamp = <4000>;
+					};
+				};
 			};
 
 			gpio_intc: interrupt-controller at 4080 {
@@ -119,16 +383,237 @@ gpio_intc: interrupt-controller at 4080 {
 					<10 11 12 13 14 15 16 17 18 19 20 21>;
 			};
 
+			clkc_pll: clock-controller at 8000 {
+				compatible = "amlogic,c3-pll-clkc";
+				reg = <0x0 0x8000 0x0 0x1a4>;
+				#clock-cells = <1>;
+				clocks = <&scmi_clk CLKID_TOP_PLL_OSC>,
+					 <&scmi_clk CLKID_MCLK_PLL_OSC>,
+					 <&scmi_clk CLKID_FIXED_PLL_OSC>;
+				clock-names = "top",
+					      "mclk",
+					      "fix";
+			};
+
+			clkc_periphs: clock-controller at 0 {
+				compatible = "amlogic,c3-peripherals-clkc";
+				reg = <0x0 0x0 0x0 0x49c>;
+				#clock-cells = <1>;
+				clocks = <&xtal>,
+					 <&scmi_clk CLKID_OSC>,
+					 <&scmi_clk CLKID_FIXED_PLL_OSC>,
+					 <&clkc_pll CLKID_FCLK_DIV2>,
+					 <&clkc_pll CLKID_FCLK_DIV2P5>,
+					 <&clkc_pll CLKID_FCLK_DIV3>,
+					 <&clkc_pll CLKID_FCLK_DIV4>,
+					 <&clkc_pll CLKID_FCLK_DIV5>,
+					 <&clkc_pll CLKID_FCLK_DIV7>,
+					 <&clkc_pll CLKID_GP0_PLL>,
+					 <&scmi_clk CLKID_GP1_PLL_OSC>,
+					 <&clkc_pll CLKID_HIFI_PLL>,
+					 <&scmi_clk CLKID_SYS_CLK>,
+					 <&scmi_clk CLKID_AXI_CLK>,
+					 <&scmi_clk CLKID_SYS_PLL_DIV16>,
+					 <&scmi_clk CLKID_CPU_CLK_DIV16>;
+				clock-names = "xtal_24m",
+					      "oscin",
+					      "fix",
+					      "fdiv2",
+					      "fdiv2p5",
+					      "fdiv3",
+					      "fdiv4",
+					      "fdiv5",
+					      "fdiv7",
+					      "gp0",
+					      "gp1",
+					      "hifi",
+					      "sysclk",
+					      "axiclk",
+					      "sysplldiv16",
+					      "cpudiv16";
+			};
+
+			eth_phy: mdio-multiplexer at 28000 {
+				compatible = "amlogic,g12a-mdio-mux";
+				reg = <0x0 0x28000 0x0 0xa4>;
+
+				clocks = <&clkc_periphs CLKID_SYS_ETH_PHY>,
+					 <&xtal>,
+					 <&clkc_pll CLKID_FCLK_50M>;
+				clock-names = "pclk", "clkin0", "clkin1";
+				mdio-parent-bus = <&mdio0>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				ext_mdio: mdio at 0 {
+					reg = <0>;
+					#address-cells = <1>;
+					#size-cells = <0>;
+				};
+
+				int_mdio: mdio at 1 {
+					reg = <1>;
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					internal_ephy: ethernet_phy at 8 {
+						compatible = "ethernet-phy-id0180.3301",
+							     "ethernet-phy-ieee802.3-c22";
+						interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+						reg = <8>;
+						max-speed = <100>;
+					};
+				};
+			};
+
+			spicc0: spi at 50000 {
+				compatible = "amlogic,meson-g12a-spicc";
+				reg = <0x0 0x50000 0x0 0x44>;
+				interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clkc_periphs CLKID_SYS_SPICC_0>,
+					 <&clkc_periphs CLKID_SPICC_A>;
+				clock-names = "core", "pclk";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+
+			spicc1: spi at 52000 {
+				compatible = "amlogic,meson-g12a-spicc";
+				reg = <0x0 0x52000 0x0 0x44>;
+				interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clkc_periphs CLKID_SYS_SPICC_1>,
+					 <&clkc_periphs CLKID_SPICC_B>;
+				clock-names = "core", "pclk";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+
+			spifc: spi at 56000 {
+				compatible = "amlogic,a1-spifc";
+				reg = <0x0 0x56000 0x0 0x290>;
+				interrupts = <GIC_SPI 182 IRQ_TYPE_EDGE_RISING>;
+				clocks = <&clkc_periphs CLKID_SPIFC>;
+				clock-names = "core";
+				status = "disabled";
+			};
+
+			i2c0: i2c at 66000 {
+				compatible = "amlogic,meson-axg-i2c";
+				reg = <0x0 0x66000 0x0 0x24>;
+				interrupts = <GIC_SPI 160 IRQ_TYPE_EDGE_RISING>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&clkc_periphs CLKID_SYS_I2C_M_A>;
+				status = "disabled";
+			};
+
+			i2c1: i2c at 68000 {
+				compatible = "amlogic,meson-axg-i2c";
+				reg = <0x0 0x68000 0x0 0x24>;
+				interrupts = <GIC_SPI 161 IRQ_TYPE_EDGE_RISING>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&clkc_periphs CLKID_SYS_I2C_M_B>;
+				status = "disabled";
+			};
+
+			i2c2: i2c at 6a000 {
+				compatible = "amlogic,meson-axg-i2c";
+				reg = <0x0 0x6a000 0x0 0x24>;
+				interrupts = <GIC_SPI 162 IRQ_TYPE_EDGE_RISING>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&clkc_periphs CLKID_SYS_I2C_M_C>;
+				status = "disabled";
+			};
+
+			i2c3: i2c at 6c000 {
+				compatible = "amlogic,meson-axg-i2c";
+				reg = <0x0 0x6c000 0x0 0x24>;
+				interrupts = <GIC_SPI 163 IRQ_TYPE_EDGE_RISING>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&clkc_periphs CLKID_SYS_I2C_M_D>;
+				status = "disabled";
+			};
+
 			uart_b: serial at 7a000 {
 				compatible = "amlogic,meson-s4-uart",
 					   "amlogic,meson-ao-uart";
 				reg = <0x0 0x7a000 0x0 0x18>;
 				interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
 				status = "disabled";
-				clocks = <&xtal>, <&xtal>, <&xtal>;
+				clocks = <&xtal>, <&clkc_periphs CLKID_SYS_UART_B>, <&xtal>;
 				clock-names = "xtal", "pclk", "baud";
 			};
 
+			sdio: mmc at 88000 {
+				compatible = "amlogic,meson-axg-mmc";
+				reg = <0x0 0x88000 0x0 0x800>;
+				interrupts = <GIC_SPI 176 IRQ_TYPE_EDGE_RISING>;
+				power-domains = <&pwrc PWRC_C3_SDIOA_ID>;
+				clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_A>,
+					  <&clkc_periphs CLKID_SD_EMMC_A>,
+					  <&clkc_pll CLKID_FCLK_DIV2>;
+				clock-names = "core","clkin0", "clkin1";
+				no-mmc;
+				no-sd;
+				resets = <&reset RESET_SD_EMMC_A>;
+				status = "disabled";
+			};
+
+			sd: mmc at 8a000 {
+				compatible = "amlogic,meson-axg-mmc";
+				reg = <0x0 0x8a000 0x0 0x800>;
+				interrupts = <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>;
+				power-domains = <&pwrc PWRC_C3_SDCARD_ID>;
+				clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_B>,
+					<&clkc_periphs CLKID_SD_EMMC_B>,
+					<&clkc_pll CLKID_FCLK_DIV2>;
+				clock-names = "core", "clkin0", "clkin1";
+				no-mmc;
+				no-sdio;
+				resets = <&reset RESET_SD_EMMC_B>;
+				status = "disabled";
+			};
+
+			nand: nand-controller at 8d000 {
+				compatible = "amlogic,meson-axg-nfc";
+				reg = <0x0 0x8d000 0x0 0x200>,
+					<0x0 0x8C000 0x0 0x4>;
+				reg-names = "nfc", "emmc";
+				interrupts = <GIC_SPI 87 IRQ_TYPE_EDGE_RISING>;
+				clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_C>,
+					<&clkc_pll CLKID_FCLK_DIV2>;
+				clock-names = "core", "device";
+				status = "disabled";
+			};
+		};
+
+		ethmac: ethernet at fdc00000 {
+			compatible = "amlogic,meson-g12a-dwmac",
+				     "snps,dwmac-3.70a",
+				     "snps,dwmac";
+			reg = <0x0 0xfdc00000 0x0 0x10000>,
+			      <0x0 0xfe024000 0x0 0x8>;
+			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "macirq";
+			power-domains = <&pwrc PWRC_C3_ETH_ID>;
+			clocks = <&clkc_periphs CLKID_SYS_ETH_MAC>,
+				 <&clkc_pll CLKID_FCLK_DIV2>,
+				 <&clkc_pll CLKID_FCLK_50M>;
+			clock-names = "stmmaceth", "clkin0", "clkin1";
+			rx-fifo-depth = <4096>;
+			tx-fifo-depth = <2048>;
+			status = "disabled";
+
+			mdio0: mdio {
+				compatible = "snps,dwmac-mdio";
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
 		};
 	};
 };

-- 
2.37.1




From neil.armstrong at linaro.org  Tue Aug 20 02:56:38 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Tue, 20 Aug 2024 11:56:38 +0200
Subject: [PATCH v2 2/3] arm64: dts: amlogic: add some device nodes for C3
In-Reply-To: <20240820-c3_add_node-v2-2-8fd3f06b7bce@amlogic.com>
References: <20240820-c3_add_node-v2-0-8fd3f06b7bce@amlogic.com>
 <20240820-c3_add_node-v2-2-8fd3f06b7bce@amlogic.com>
Message-ID: <e463dc93-d6b8-4a21-9379-828b196c5736@linaro.org>

On 20/08/2024 11:41, Xianwei Zhao via B4 Relay wrote:
> From: Xianwei Zhao <xianwei.zhao at amlogic.com>
> 
> Add some device nodes for SoC C3, including periphs clock controller
> node, PLL clock controller node, SPICC node, regulator node, NAND
> controller node, sdcard node, Ethernet MAC and PHY node.
> 
> The sdacrd depends on regulator and pinctrl(select), so some
> property fields are placed at the board level. The nand chip
> is placed on the board, So some property fields about SPIFC
> and NAND controller node are placed at the board level.
> THe Ethernet MAC support outchip PHY, so place this property
> field(select PHY) at the board level.
> 
> Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
> ---
>   .../boot/dts/amlogic/amlogic-c3-c302x-aw409.dts    | 233 ++++++++++
>   arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi        | 487 ++++++++++++++++++++-
>   2 files changed, 719 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts b/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts
> index edce8850b338..b8d2037afc00 100644
> --- a/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts
> @@ -16,14 +16,247 @@ / {
>   
>   	aliases {
>   		serial0 = &uart_b;
> +		spi0 = &spifc;
>   	};
>   
>   	memory at 0 {
>   		device_type = "memory";
>   		reg = <0x0 0x0 0x0 0x10000000>;
>   	};
> +
> +	reserved-memory {
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges;
> +
> +		/* 9 MiB reserved for ARM Trusted Firmware */
> +		secmon_reserved: secmon at 7f00000 {
> +			compatible = "shared-dma-pool";
> +			reg = <0x0 0x07f00000 0x0 0x900000>;
> +			no-map;
> +		};
> +	};
> +
> +	main_12v: regulator-main-12v {
> +		compatible = "regulator-fixed";
> +		regulator-name = "12V";
> +		regulator-min-microvolt = <12000000>;
> +		regulator-max-microvolt = <12000000>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	vcc_5v: regulator-vcc-5v {
> +		compatible = "regulator-fixed";
> +		regulator-name = "VCC5V";
> +		regulator-min-microvolt = <5000000>;
> +		regulator-max-microvolt = <5000000>;
> +		vin-supply = <&main_12v>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	vddq: regulator-vddq {
> +		compatible = "regulator-fixed";
> +		regulator-name = "VDDQ";
> +		regulator-min-microvolt = <1200000>;
> +		regulator-max-microvolt = <1200000>;
> +		vin-supply = <&main_12v>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	vddao_3v3: regulator-vddao-3v3 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "VDDAO3V3";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		vin-supply = <&main_12v>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	vddao_1v8: regulator-vddao-1v8 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "VDDAO1V8";
> +		regulator-min-microvolt = <1800000>;
> +		regulator-max-microvolt = <1800000>;
> +		vin-supply = <&vddao_3v3>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	ddr4_2v5: regulator-ddr4-2v5 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "DDR4_2V5";
> +		regulator-min-microvolt = <2500000>;
> +		regulator-max-microvolt = <2500000>;
> +		vin-supply = <&vddao_3v3>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	vcc_3v3: regulator-vcc-3v3 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "VCC3V3";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		vin-supply = <&vddao_3v3>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	vcc_1v8: regulator-vcc-1v8 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "VCC1V8";
> +		regulator-min-microvolt = <1800000>;
> +		regulator-max-microvolt = <1800000>;
> +		vin-supply = <&vcc_3v3>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	vdd_1v8: regulator-vdd-1v8 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "VDD1V8_BOOT";
> +		regulator-min-microvolt = <1800000>;
> +		regulator-max-microvolt = <1800000>;
> +		vin-supply = <&vcc_3v3>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	vddio_b: regulator-vddio-3v3-b {
> +		compatible = "regulator-fixed";
> +		regulator-name = "VDDIO_B";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		vin-supply = <&vcc_3v3>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	sdcard: regulator-sdcard {
> +		compatible = "regulator-fixed";
> +		regulator-name = "SDCARD_POWER";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		vin-supply = <&vddao_3v3>;
> +		gpio = <&gpio GPIOA_4 GPIO_ACTIVE_LOW>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
>   };
>   
>   &uart_b {
>   	status = "okay";
>   };
> +
> +&nand {
> +	status = "okay";
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +
> +	pinctrl-0 = <&nand_pins>;
> +	pinctrl-names = "default";
> +
> +	nand at 0 {
> +		reg = <0>;
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		nand-on-flash-bbt;
> +
> +		partition at 0 {
> +			label = "boot";
> +			reg = <0x0 0x00200000>;
> +		};
> +		partition at 200000 {
> +			label = "env";
> +			reg = <0x00200000 0x00400000>;
> +		};
> +		partition at 600000 {
> +			label = "system";
> +			reg = <0x00600000 0x00a00000>;
> +		};
> +		partition at 1000000 {
> +			label = "rootfs";
> +			reg = <0x01000000 0x03000000>;
> +		};
> +		partition at 4000000 {
> +			label = "media";
> +			reg = <0x04000000 0x8000000>;
> +		};
> +	};
> +};
> +
> +&ethmac {
> +	status = "okay";
> +	phy-handle = <&internal_ephy>;
> +	phy-mode = "rmii";
> +};
> +
> +&spifc {
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +
> +	pinctrl-0 = <&spifc_pins>;
> +	pinctrl-names = "default";
> +
> +	nand at 0 {
> +		compatible = "spi-nand";
> +		reg = <0>;
> +		spi-max-frequency = <83000000>;
> +		spi-tx-bus-width = <4>;
> +		spi-rx-bus-width = <4>;
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		status = "disabled";
> +
> +		partitions {
> +			compatible = "fixed-partitions";
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +
> +			partition at 0 {
> +				label = "boot";
> +				reg = <0 0x200000>;
> +			};
> +
> +			partition at 200000 {
> +				label = "env";
> +				reg = <0x200000 0x400000>;
> +			};
> +
> +			partition at 600000 {
> +				label = "system";
> +				reg = <0x600000 0xa00000>;
> +			};
> +
> +			partition at 1000000 {
> +				label = "rootfs";
> +				reg = <0x1000000 0x3000000>;
> +			};
> +
> +			partition at 4000000 {
> +				label = "data";
> +				reg = <0x4000000 0x8000000>;
> +			};
> +		};
> +	};
> +};
> +
> +&sd {
> +	status = "okay";
> +	pinctrl-0 = <&sdcard_pins>;
> +	pinctrl-1 = <&sdcard_clk_gate_pins>;
> +	pinctrl-names = "default","clk-gate";
> +
> +	bus-width = <4>;
> +	cap-sd-highspeed;
> +	max-frequency = <50000000>;
> +	disable-wp;
> +
> +	cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
> +	vmmc-supply = <&sdcard>;
> +	vqmmc-supply = <&sdcard>;
> +};
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
> index f8fb060c49ae..2bf56fbe3dfb 100644
> --- a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
> @@ -7,6 +7,11 @@
>   #include <dt-bindings/interrupt-controller/arm-gic.h>
>   #include <dt-bindings/gpio/gpio.h>
>   #include <dt-bindings/reset/amlogic,c3-reset.h>
> +#include <dt-bindings/clock/amlogic,c3-pll-clkc.h>
> +#include <dt-bindings/clock/amlogic,c3-scmi-clkc.h>
> +#include <dt-bindings/clock/amlogic,c3-peripherals-clkc.h>
> +#include <dt-bindings/power/amlogic,c3-pwrc.h>
> +#include <dt-bindings/gpio/amlogic-c3-gpio.h>
>   
>   / {
>   	cpus {
> @@ -57,6 +62,34 @@ pwrc: power-controller {
>   		};
>   	};
>   
> +	sram {
> +		compatible = "mmio-sram";
> +		reg = <0x0 0x07f50e00 0x0 0x100>;
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		ranges = <0 0x0 0x07f50e00 0x100>;
> +
> +		scmi_shmem: sram at 0 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0x0 0x100>;
> +		};
> +	};
> +
> +	firmware {
> +		scmi: scmi {
> +			compatible = "arm,scmi-smc";
> +			arm,smc-id = <0x820000C1>;
> +			shmem = <&scmi_shmem>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
> +			scmi_clk: protocol at 14 {
> +				reg = <0x14>;
> +				#clock-cells = <1>;
> +			};
> +		};
> +	};
> +
>   	soc {
>   		compatible = "simple-bus";
>   		#address-cells = <2>;
> @@ -108,6 +141,237 @@ gpio: bank at 4000 {
>   					#gpio-cells = <2>;
>   					gpio-ranges = <&periphs_pinctrl 0 0 55>;
>   				};
> +
> +				i2c0_pins1: i2c0-pins1 {
> +					mux {
> +						groups = "i2c0_sda_e",
> +							 "i2c0_scl_e";
> +						function = "i2c0";
> +						bias-disable;
> +						drive-strength-microamp = <3000>;
> +					};
> +				};
> +
> +				i2c0_pins2: i2c0-pins2 {
> +					mux {
> +						groups = "i2c0_sda_d",
> +							 "i2c0_scl_d";
> +						function = "i2c0";
> +						bias-disable;
> +						drive-strength-microamp = <3000>;
> +					};
> +				};
> +
> +				i2c1_pins1: i2c1-pins1 {
> +					mux {
> +						groups = "i2c1_sda_x",
> +							 "i2c1_scl_x";
> +						function = "i2c1";
> +						bias-disable;
> +						drive-strength-microamp = <3000>;
> +					};
> +				};
> +
> +				i2c1_pins2: i2c1-pins2 {
> +					mux {
> +						groups = "i2c1_sda_d",
> +							 "i2c1_scl_d";
> +						function = "i2c1";
> +						bias-disable;
> +						drive-strength-microamp = <3000>;
> +					};
> +				};
> +
> +				i2c1_pins3: i2c1-pins3 {
> +					mux {
> +						groups = "i2c1_sda_a",
> +							 "i2c1_scl_a";
> +						function = "i2c1";
> +						bias-disable;
> +						drive-strength-microamp = <3000>;
> +					};
> +				};
> +
> +				i2c1_pins4: i2c1-pins4 {
> +					mux {
> +						groups = "i2c1_sda_b",
> +							 "i2c1_scl_b";
> +						function = "i2c1";
> +						bias-disable;
> +						drive-strength-microamp = <3000>;
> +					};
> +				};
> +
> +				i2c2_pins1: i2c2-pins1 {
> +					mux {
> +						groups = "i2c2_sda",
> +							 "i2c2_scl";
> +						function = "i2c2";
> +						bias-disable;
> +						drive-strength-microamp = <3000>;
> +					};
> +				};
> +
> +				i2c3_pins1: i2c3-pins1 {
> +					mux {
> +						groups = "i2c3_sda_c",
> +							 "i2c3_scl_c";
> +						function = "i2c3";
> +						bias-disable;
> +						drive-strength-microamp = <3000>;
> +					};
> +				};
> +
> +				i2c3_pins2: i2c3-pins2 {
> +					mux {
> +						groups = "i2c3_sda_x",
> +							 "i2c3_scl_x";
> +						function = "i2c3";
> +						bias-disable;
> +						drive-strength-microamp = <3000>;
> +					};
> +				};
> +
> +				i2c3_pins3: i2c3-pins3 {
> +					mux {
> +						groups = "i2c3_sda_d",
> +							 "i2c3_scl_d";
> +						function = "i2c3";
> +						bias-disable;
> +						drive-strength-microamp = <3000>;
> +					};
> +				};
> +
> +				nand_pins: nand-pins {
> +					mux {
> +						groups = "emmc_nand_d0",
> +							 "emmc_nand_d1",
> +							 "emmc_nand_d2",
> +							 "emmc_nand_d3",
> +							 "emmc_nand_d4",
> +							 "emmc_nand_d5",
> +							 "emmc_nand_d6",
> +							 "emmc_nand_d7",
> +							 "nand_ce0",
> +							 "nand_ale",
> +							 "nand_cle",
> +							 "nand_wen_clk",
> +							 "nand_ren_wr";
> +						function = "nand";
> +						input-enable;
> +					};
> +				};
> +
> +				sdcard_pins: sdcard-pins {
> +					mux {
> +						groups = "sdcard_d0",
> +							 "sdcard_d1",
> +							 "sdcard_d2",
> +							 "sdcard_d3",
> +							 "sdcard_clk",
> +							 "sdcard_cmd";
> +						function = "sdcard";
> +						bias-pull-up;
> +						drive-strength-microamp = <4000>;
> +					};
> +				};
> +
> +				sdcard_clk_gate_pins: sdcard-clk-cmd-pins {
> +					mux {
> +						groups = "GPIOC_4";
> +						function = "gpio_periphs";
> +						bias-pull-down;
> +						drive-strength-microamp = <4000>;
> +					};
> +				};
> +
> +				sdio_m_clk_gate_pins: sdio-m-clk-cmd-pins {
> +					mux {
> +						groups = "sdio_clk";
> +						function = "sdio";
> +						bias-pull-down;
> +						drive-strength-microamp = <4000>;
> +					};
> +				};
> +
> +				sdio_m_pins: sdio-m-all-pins {
> +					mux {
> +						groups = "sdio_d0",
> +							 "sdio_d1",
> +							 "sdio_d2",
> +							 "sdio_d3",
> +							 "sdio_clk",
> +							 "sdio_cmd";
> +						function = "sdio";
> +						input-enable;
> +						bias-pull-up;
> +						drive-strength-microamp = <4000>;
> +					};
> +				};
> +
> +				spicc0_pins1: spicc0-pins1 {
> +					mux {
> +						groups = "spi_a_mosi_b",
> +							 "spi_a_miso_b",
> +							 "spi_a_clk_b";
> +						function = "spi_a";
> +						drive-strength-microamp = <3000>;
> +					};
> +				};
> +
> +				spicc0_pins2: spicc0-pins2 {
> +					mux {
> +						groups = "spi_a_mosi_c",
> +							 "spi_a_miso_c",
> +							 "spi_a_clk_c";
> +						function = "spi_a";
> +						drive-strength-microamp = <3000>;
> +					};
> +				};
> +
> +				spicc0_pins3: spicc0-pins3 {
> +					mux {
> +						groups = "spi_a_mosi_x",
> +							 "spi_a_miso_x",
> +							 "spi_a_clk_x";
> +						function = "spi_a";
> +						drive-strength-microamp = <3000>;
> +					};
> +				};
> +
> +				spicc1_pins1: spicc1-pins1 {
> +					mux {
> +						groups = "spi_b_mosi_d",
> +							 "spi_b_miso_d",
> +							 "spi_b_clk_d";
> +						function = "spi_b";
> +						drive-strength-microamp = <3000>;
> +					};
> +				};
> +
> +				spicc1_pins2: spicc1-pins2 {
> +					mux {
> +						groups = "spi_b_mosi_x",
> +							 "spi_b_miso_x",
> +							 "spi_b_clk_x";
> +						function = "spi_b";
> +						drive-strength-microamp = <3000>;
> +					};
> +				};
> +
> +				spifc_pins: spifc-pins {
> +					mux {
> +						groups = "spif_mo",
> +							 "spif_mi",
> +							 "spif_clk",
> +							 "spif_cs",
> +							 "spif_hold",
> +							 "spif_wp",
> +							 "spif_clk_loop";
> +						function = "spif";
> +						drive-strength-microamp = <4000>;
> +					};
> +				};
>   			};
>   
>   			gpio_intc: interrupt-controller at 4080 {
> @@ -119,16 +383,237 @@ gpio_intc: interrupt-controller at 4080 {
>   					<10 11 12 13 14 15 16 17 18 19 20 21>;
>   			};
>   
> +			clkc_pll: clock-controller at 8000 {
> +				compatible = "amlogic,c3-pll-clkc";
> +				reg = <0x0 0x8000 0x0 0x1a4>;
> +				#clock-cells = <1>;
> +				clocks = <&scmi_clk CLKID_TOP_PLL_OSC>,
> +					 <&scmi_clk CLKID_MCLK_PLL_OSC>,
> +					 <&scmi_clk CLKID_FIXED_PLL_OSC>;
> +				clock-names = "top",
> +					      "mclk",
> +					      "fix";
> +			};
> +
> +			clkc_periphs: clock-controller at 0 {
> +				compatible = "amlogic,c3-peripherals-clkc";
> +				reg = <0x0 0x0 0x0 0x49c>;
> +				#clock-cells = <1>;
> +				clocks = <&xtal>,
> +					 <&scmi_clk CLKID_OSC>,
> +					 <&scmi_clk CLKID_FIXED_PLL_OSC>,
> +					 <&clkc_pll CLKID_FCLK_DIV2>,
> +					 <&clkc_pll CLKID_FCLK_DIV2P5>,
> +					 <&clkc_pll CLKID_FCLK_DIV3>,
> +					 <&clkc_pll CLKID_FCLK_DIV4>,
> +					 <&clkc_pll CLKID_FCLK_DIV5>,
> +					 <&clkc_pll CLKID_FCLK_DIV7>,
> +					 <&clkc_pll CLKID_GP0_PLL>,
> +					 <&scmi_clk CLKID_GP1_PLL_OSC>,
> +					 <&clkc_pll CLKID_HIFI_PLL>,
> +					 <&scmi_clk CLKID_SYS_CLK>,
> +					 <&scmi_clk CLKID_AXI_CLK>,
> +					 <&scmi_clk CLKID_SYS_PLL_DIV16>,
> +					 <&scmi_clk CLKID_CPU_CLK_DIV16>;
> +				clock-names = "xtal_24m",
> +					      "oscin",
> +					      "fix",
> +					      "fdiv2",
> +					      "fdiv2p5",
> +					      "fdiv3",
> +					      "fdiv4",
> +					      "fdiv5",
> +					      "fdiv7",
> +					      "gp0",
> +					      "gp1",
> +					      "hifi",
> +					      "sysclk",
> +					      "axiclk",
> +					      "sysplldiv16",
> +					      "cpudiv16";
> +			};

This node should come first and not after clock-controller at 8000

> +
> +			eth_phy: mdio-multiplexer at 28000 {
> +				compatible = "amlogic,g12a-mdio-mux";
> +				reg = <0x0 0x28000 0x0 0xa4>;
> +
> +				clocks = <&clkc_periphs CLKID_SYS_ETH_PHY>,
> +					 <&xtal>,
> +					 <&clkc_pll CLKID_FCLK_50M>;
> +				clock-names = "pclk", "clkin0", "clkin1";
> +				mdio-parent-bus = <&mdio0>;
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +
> +				ext_mdio: mdio at 0 {
> +					reg = <0>;
> +					#address-cells = <1>;
> +					#size-cells = <0>;
> +				};
> +
> +				int_mdio: mdio at 1 {
> +					reg = <1>;
> +					#address-cells = <1>;
> +					#size-cells = <0>;
> +
> +					internal_ephy: ethernet_phy at 8 {
> +						compatible = "ethernet-phy-id0180.3301",
> +							     "ethernet-phy-ieee802.3-c22";
> +						interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
> +						reg = <8>;
> +						max-speed = <100>;
> +					};
> +				};
> +			};
> +
> +			spicc0: spi at 50000 {
> +				compatible = "amlogic,meson-g12a-spicc";
> +				reg = <0x0 0x50000 0x0 0x44>;
> +				interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clkc_periphs CLKID_SYS_SPICC_0>,
> +					 <&clkc_periphs CLKID_SPICC_A>;
> +				clock-names = "core", "pclk";
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				status = "disabled";
> +			};
> +
> +			spicc1: spi at 52000 {
> +				compatible = "amlogic,meson-g12a-spicc";
> +				reg = <0x0 0x52000 0x0 0x44>;
> +				interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clkc_periphs CLKID_SYS_SPICC_1>,
> +					 <&clkc_periphs CLKID_SPICC_B>;
> +				clock-names = "core", "pclk";
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				status = "disabled";
> +			};
> +
> +			spifc: spi at 56000 {
> +				compatible = "amlogic,a1-spifc";
> +				reg = <0x0 0x56000 0x0 0x290>;
> +				interrupts = <GIC_SPI 182 IRQ_TYPE_EDGE_RISING>;
> +				clocks = <&clkc_periphs CLKID_SPIFC>;
> +				clock-names = "core";
> +				status = "disabled";
> +			};
> +
> +			i2c0: i2c at 66000 {
> +				compatible = "amlogic,meson-axg-i2c";
> +				reg = <0x0 0x66000 0x0 0x24>;
> +				interrupts = <GIC_SPI 160 IRQ_TYPE_EDGE_RISING>;
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				clocks = <&clkc_periphs CLKID_SYS_I2C_M_A>;
> +				status = "disabled";
> +			};
> +
> +			i2c1: i2c at 68000 {
> +				compatible = "amlogic,meson-axg-i2c";
> +				reg = <0x0 0x68000 0x0 0x24>;
> +				interrupts = <GIC_SPI 161 IRQ_TYPE_EDGE_RISING>;
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				clocks = <&clkc_periphs CLKID_SYS_I2C_M_B>;
> +				status = "disabled";
> +			};
> +
> +			i2c2: i2c at 6a000 {
> +				compatible = "amlogic,meson-axg-i2c";
> +				reg = <0x0 0x6a000 0x0 0x24>;
> +				interrupts = <GIC_SPI 162 IRQ_TYPE_EDGE_RISING>;
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				clocks = <&clkc_periphs CLKID_SYS_I2C_M_C>;
> +				status = "disabled";
> +			};
> +
> +			i2c3: i2c at 6c000 {
> +				compatible = "amlogic,meson-axg-i2c";
> +				reg = <0x0 0x6c000 0x0 0x24>;
> +				interrupts = <GIC_SPI 163 IRQ_TYPE_EDGE_RISING>;
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				clocks = <&clkc_periphs CLKID_SYS_I2C_M_D>;
> +				status = "disabled";
> +			};
> +
>   			uart_b: serial at 7a000 {
>   				compatible = "amlogic,meson-s4-uart",
>   					   "amlogic,meson-ao-uart";
>   				reg = <0x0 0x7a000 0x0 0x18>;
>   				interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
>   				status = "disabled";
> -				clocks = <&xtal>, <&xtal>, <&xtal>;
> +				clocks = <&xtal>, <&clkc_periphs CLKID_SYS_UART_B>, <&xtal>;
>   				clock-names = "xtal", "pclk", "baud";
>   			};
>   
> +			sdio: mmc at 88000 {
> +				compatible = "amlogic,meson-axg-mmc";
> +				reg = <0x0 0x88000 0x0 0x800>;
> +				interrupts = <GIC_SPI 176 IRQ_TYPE_EDGE_RISING>;
> +				power-domains = <&pwrc PWRC_C3_SDIOA_ID>;
> +				clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_A>,
> +					  <&clkc_periphs CLKID_SD_EMMC_A>,
> +					  <&clkc_pll CLKID_FCLK_DIV2>;
> +				clock-names = "core","clkin0", "clkin1";
> +				no-mmc;
> +				no-sd;
> +				resets = <&reset RESET_SD_EMMC_A>;
> +				status = "disabled";
> +			};
> +
> +			sd: mmc at 8a000 {
> +				compatible = "amlogic,meson-axg-mmc";
> +				reg = <0x0 0x8a000 0x0 0x800>;
> +				interrupts = <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>;
> +				power-domains = <&pwrc PWRC_C3_SDCARD_ID>;
> +				clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_B>,
> +					<&clkc_periphs CLKID_SD_EMMC_B>,
> +					<&clkc_pll CLKID_FCLK_DIV2>;
> +				clock-names = "core", "clkin0", "clkin1";
> +				no-mmc;
> +				no-sdio;
> +				resets = <&reset RESET_SD_EMMC_B>;
> +				status = "disabled";
> +			};
> +
> +			nand: nand-controller at 8d000 {
> +				compatible = "amlogic,meson-axg-nfc";
> +				reg = <0x0 0x8d000 0x0 0x200>,
> +					<0x0 0x8C000 0x0 0x4>;
> +				reg-names = "nfc", "emmc";
> +				interrupts = <GIC_SPI 87 IRQ_TYPE_EDGE_RISING>;
> +				clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_C>,
> +					<&clkc_pll CLKID_FCLK_DIV2>;
> +				clock-names = "core", "device";
> +				status = "disabled";
> +			};
> +		};
> +
> +		ethmac: ethernet at fdc00000 {
> +			compatible = "amlogic,meson-g12a-dwmac",
> +				     "snps,dwmac-3.70a",
> +				     "snps,dwmac";
> +			reg = <0x0 0xfdc00000 0x0 0x10000>,
> +			      <0x0 0xfe024000 0x0 0x8>;
> +			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "macirq";
> +			power-domains = <&pwrc PWRC_C3_ETH_ID>;
> +			clocks = <&clkc_periphs CLKID_SYS_ETH_MAC>,
> +				 <&clkc_pll CLKID_FCLK_DIV2>,
> +				 <&clkc_pll CLKID_FCLK_50M>;
> +			clock-names = "stmmaceth", "clkin0", "clkin1";
> +			rx-fifo-depth = <4096>;
> +			tx-fifo-depth = <2048>;
> +			status = "disabled";
> +
> +			mdio0: mdio {
> +				compatible = "snps,dwmac-mdio";
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +			};
>   		};
>   	};
>   };
> 

Apart that, it looks fine

Neil


From k.kozlowski.k at gmail.com  Tue Aug 20 04:07:48 2024
From: k.kozlowski.k at gmail.com (Krzysztof Kozlowski)
Date: Tue, 20 Aug 2024 13:07:48 +0200
Subject: [PATCH v2 1/3] dt-bindings: clock: fix C3 PLL input parameter
In-Reply-To: <20240820-c3_add_node-v2-1-8fd3f06b7bce@amlogic.com>
References: <20240820-c3_add_node-v2-0-8fd3f06b7bce@amlogic.com>
 <20240820-c3_add_node-v2-1-8fd3f06b7bce@amlogic.com>
Message-ID: <ypvsbxdlnao6i7i427ucjzosaurxccmc6xsyd4vmmn4wdzaclt@2wilfxi5z4sn>

On Tue, Aug 20, 2024 at 05:41:56PM +0800, Xianwei Zhao wrote:
> Add C3 PLL controller input clock parameters "fix".
> 
> The clock named "fix" was initially implemented in PLL clock controller driver.
> However, some registers required secure zone access, so we moved it to
> the secure zone (BL31) and accessed it through SCMI. Since the PLL clock
> driver needs to use this clock, the "fix" clock is used as an input source.
> We updated the driver but forgot to modify the binding accordingly,
> so we are adding it here.
> 
> It is an ABI break but on a new and immature platform.
> Noboby could really use that platform at this stage, so nothing is going
> to break on anyone really.
> 
> Fixes: 0e6be855a96d ("dt-bindings: clock: add Amlogic C3 PLL clock controller")
> Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>

Best regards,
Krzysztof



From thomas.lendacky at amd.com  Tue Aug 20 06:55:42 2024
From: thomas.lendacky at amd.com (Tom Lendacky)
Date: Tue, 20 Aug 2024 08:55:42 -0500
Subject: [PATCH -next 4/6] crypto: ccp - Remove unused declaration
 sp_get_master()
In-Reply-To: <20240820082525.259337-5-yuehaibing@huawei.com>
References: <20240820082525.259337-1-yuehaibing@huawei.com>
 <20240820082525.259337-5-yuehaibing@huawei.com>
Message-ID: <28cf0695-daf3-59b1-29de-ae6b60156513@amd.com>

On 8/20/24 03:25, Yue Haibing wrote:
> This function is never implemented and used since introduction in
> commit 720419f01832 ("crypto: ccp - Introduce the AMD Secure Processor
> device").
> 
> Signed-off-by: Yue Haibing <yuehaibing at huawei.com>

Acked-by: Tom Lendacky <thomas.lendacky at amd.com>

> ---
>  drivers/crypto/ccp/sp-dev.h | 1 -
>  1 file changed, 1 deletion(-)
> 
> diff --git a/drivers/crypto/ccp/sp-dev.h b/drivers/crypto/ccp/sp-dev.h
> index 0895de823674..6f9d7063257d 100644
> --- a/drivers/crypto/ccp/sp-dev.h
> +++ b/drivers/crypto/ccp/sp-dev.h
> @@ -138,7 +138,6 @@ struct sp_device *sp_alloc_struct(struct device *dev);
>  
>  int sp_init(struct sp_device *sp);
>  void sp_destroy(struct sp_device *sp);
> -struct sp_device *sp_get_master(void);
>  
>  int sp_suspend(struct sp_device *sp);
>  int sp_resume(struct sp_device *sp);


From avromanov at salutedevices.com  Tue Aug 20 07:56:01 2024
From: avromanov at salutedevices.com (Alexey Romanov)
Date: Tue, 20 Aug 2024 17:56:01 +0300
Subject: [PATCH v9 01/23] drivers: crypto: meson: don't hardcode IRQ count
In-Reply-To: <20240820145623.3500864-1-avromanov@salutedevices.com>
References: <20240820145623.3500864-1-avromanov@salutedevices.com>
Message-ID: <20240820145623.3500864-2-avromanov@salutedevices.com>

IRQ count is no longer hardcoded, and make it part of
struct meson_flow. We need this for extend driver support for
other Amlogic SoC's.

Signed-off-by: Alexey Romanov <avromanov at salutedevices.com>
---
 drivers/crypto/amlogic/amlogic-gxl-cipher.c |  2 +-
 drivers/crypto/amlogic/amlogic-gxl-core.c   | 47 ++++++++++++---------
 drivers/crypto/amlogic/amlogic-gxl.h        |  8 ++--
 3 files changed, 31 insertions(+), 26 deletions(-)

diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c b/drivers/crypto/amlogic/amlogic-gxl-cipher.c
index 29048da6f50a..b19032f92415 100644
--- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c
+++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c
@@ -19,7 +19,7 @@
 
 static int get_engine_number(struct meson_dev *mc)
 {
-	return atomic_inc_return(&mc->flow) % MAXFLOW;
+	return atomic_inc_return(&mc->flow) % mc->flow_cnt;
 }
 
 static bool meson_cipher_need_fallback(struct skcipher_request *areq)
diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c
index f54ab0d0b1e8..35ec64df5b3a 100644
--- a/drivers/crypto/amlogic/amlogic-gxl-core.c
+++ b/drivers/crypto/amlogic/amlogic-gxl-core.c
@@ -28,8 +28,8 @@ static irqreturn_t meson_irq_handler(int irq, void *data)
 	int flow;
 	u32 p;
 
-	for (flow = 0; flow < MAXFLOW; flow++) {
-		if (mc->irqs[flow] == irq) {
+	for (flow = 0; flow < mc->flow_cnt; flow++) {
+		if (mc->chanlist[flow].irq == irq) {
 			p = readl(mc->base + ((0x04 + flow) << 2));
 			if (p) {
 				writel_relaxed(0xF, mc->base + ((0x4 + flow) << 2));
@@ -110,7 +110,7 @@ static int meson_debugfs_show(struct seq_file *seq, void *v)
 	struct meson_dev *mc __maybe_unused = seq->private;
 	int i;
 
-	for (i = 0; i < MAXFLOW; i++)
+	for (i = 0; i < mc->flow_cnt; i++)
 		seq_printf(seq, "Channel %d: nreq %lu\n", i,
 #ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG
 			   mc->chanlist[i].stat_req);
@@ -153,14 +153,32 @@ static void meson_free_chanlist(struct meson_dev *mc, int i)
  */
 static int meson_allocate_chanlist(struct meson_dev *mc)
 {
+	struct platform_device *pdev = to_platform_device(mc->dev);
 	int i, err;
 
-	mc->chanlist = devm_kcalloc(mc->dev, MAXFLOW,
+	mc->flow_cnt = platform_irq_count(pdev);
+	if (mc->flow_cnt <= 0) {
+		dev_err(mc->dev, "No IRQs defined\n");
+		return -ENODEV;
+	}
+
+	mc->chanlist = devm_kcalloc(mc->dev, mc->flow_cnt,
 				    sizeof(struct meson_flow), GFP_KERNEL);
 	if (!mc->chanlist)
 		return -ENOMEM;
 
-	for (i = 0; i < MAXFLOW; i++) {
+	for (i = 0; i < mc->flow_cnt; i++) {
+		mc->chanlist[i].irq = platform_get_irq(pdev, i);
+		if (mc->chanlist[i].irq < 0)
+			return mc->chanlist[i].irq;
+
+		err = devm_request_irq(mc->dev, mc->chanlist[i].irq,
+				       meson_irq_handler, 0, "aml-crypto", mc);
+		if (err < 0) {
+			dev_err(mc->dev, "Cannot request IRQ for flow %d\n", i);
+			return err;
+		}
+
 		init_completion(&mc->chanlist[i].complete);
 
 		mc->chanlist[i].engine = crypto_engine_alloc_init(mc->dev, true);
@@ -230,7 +248,7 @@ static void meson_unregister_algs(struct meson_dev *mc)
 static int meson_crypto_probe(struct platform_device *pdev)
 {
 	struct meson_dev *mc;
-	int err, i;
+	int err;
 
 	mc = devm_kzalloc(&pdev->dev, sizeof(*mc), GFP_KERNEL);
 	if (!mc)
@@ -252,19 +270,6 @@ static int meson_crypto_probe(struct platform_device *pdev)
 		return err;
 	}
 
-	for (i = 0; i < MAXFLOW; i++) {
-		mc->irqs[i] = platform_get_irq(pdev, i);
-		if (mc->irqs[i] < 0)
-			return mc->irqs[i];
-
-		err = devm_request_irq(&pdev->dev, mc->irqs[i], meson_irq_handler, 0,
-				       "gxl-crypto", mc);
-		if (err < 0) {
-			dev_err(mc->dev, "Cannot request IRQ for flow %d\n", i);
-			return err;
-		}
-	}
-
 	err = clk_prepare_enable(mc->busclk);
 	if (err != 0) {
 		dev_err(&pdev->dev, "Cannot prepare_enable busclk\n");
@@ -294,7 +299,7 @@ static int meson_crypto_probe(struct platform_device *pdev)
 error_alg:
 	meson_unregister_algs(mc);
 error_flow:
-	meson_free_chanlist(mc, MAXFLOW - 1);
+	meson_free_chanlist(mc, mc->flow_cnt - 1);
 	clk_disable_unprepare(mc->busclk);
 	return err;
 }
@@ -309,7 +314,7 @@ static void meson_crypto_remove(struct platform_device *pdev)
 
 	meson_unregister_algs(mc);
 
-	meson_free_chanlist(mc, MAXFLOW - 1);
+	meson_free_chanlist(mc, mc->flow_cnt - 1);
 
 	clk_disable_unprepare(mc->busclk);
 }
diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h
index 1013a666c932..79177cfa8b88 100644
--- a/drivers/crypto/amlogic/amlogic-gxl.h
+++ b/drivers/crypto/amlogic/amlogic-gxl.h
@@ -22,8 +22,6 @@
 #define MESON_OPMODE_ECB 0
 #define MESON_OPMODE_CBC 1
 
-#define MAXFLOW 2
-
 #define MAXDESC 64
 
 #define DESC_LAST BIT(18)
@@ -62,6 +60,7 @@ struct meson_desc {
  * @keylen:	keylen for this flow operation
  * @complete:	completion for the current task on this flow
  * @status:	set to 1 by interrupt if task is done
+ * @irq:	IRQ number for amlogic-crypto
  * @t_phy:	Physical address of task
  * @tl:		pointer to the current ce_task for this flow
  * @stat_req:	number of request done by this flow
@@ -70,6 +69,7 @@ struct meson_flow {
 	struct crypto_engine *engine;
 	struct completion complete;
 	int status;
+	int irq;
 	unsigned int keylen;
 	dma_addr_t t_phy;
 	struct meson_desc *tl;
@@ -85,7 +85,7 @@ struct meson_flow {
  * @dev:	the platform device
  * @chanlist:	array of all flow
  * @flow:	flow to use in next request
- * @irqs:	IRQ numbers for amlogic-crypto
+ * @flow_cnt:	flow count for amlogic-crypto
  * @dbgfs_dir:	Debugfs dentry for statistic directory
  * @dbgfs_stats: Debugfs dentry for statistic counters
  */
@@ -95,7 +95,7 @@ struct meson_dev {
 	struct device *dev;
 	struct meson_flow *chanlist;
 	atomic_t flow;
-	int irqs[MAXFLOW];
+	int flow_cnt;
 #ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG
 	struct dentry *dbgfs_dir;
 #endif
-- 
2.34.1



From avromanov at salutedevices.com  Tue Aug 20 07:56:03 2024
From: avromanov at salutedevices.com (Alexey Romanov)
Date: Tue, 20 Aug 2024 17:56:03 +0300
Subject: [PATCH v9 03/23] drivers: crypto: meson: remove clock input
In-Reply-To: <20240820145623.3500864-1-avromanov@salutedevices.com>
References: <20240820145623.3500864-1-avromanov@salutedevices.com>
Message-ID: <20240820145623.3500864-4-avromanov@salutedevices.com>

Amlogic crypto IP, which uses DMA crypto engine,
doesn't take a clock input.

Fixes: 48fe583fe541 ("crypto: amlogic - Add crypto accelerator for amlogic GXL")
Signed-off-by: Alexey Romanov <avromanov at salutedevices.com>
---
 drivers/crypto/amlogic/amlogic-gxl-core.c | 16 ----------------
 1 file changed, 16 deletions(-)

diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c
index e9e733ed98e0..9d92115043c3 100644
--- a/drivers/crypto/amlogic/amlogic-gxl-core.c
+++ b/drivers/crypto/amlogic/amlogic-gxl-core.c
@@ -9,7 +9,6 @@
 
 #include <crypto/engine.h>
 #include <crypto/internal/skcipher.h>
-#include <linux/clk.h>
 #include <linux/dma-mapping.h>
 #include <linux/err.h>
 #include <linux/interrupt.h>
@@ -269,18 +268,6 @@ static int meson_crypto_probe(struct platform_device *pdev)
 		dev_err(&pdev->dev, "Cannot request MMIO err=%d\n", err);
 		return err;
 	}
-	mc->busclk = devm_clk_get(&pdev->dev, "blkmv");
-	if (IS_ERR(mc->busclk)) {
-		err = PTR_ERR(mc->busclk);
-		dev_err(&pdev->dev, "Cannot get core clock err=%d\n", err);
-		return err;
-	}
-
-	err = clk_prepare_enable(mc->busclk);
-	if (err != 0) {
-		dev_err(&pdev->dev, "Cannot prepare_enable busclk\n");
-		return err;
-	}
 
 	err = meson_allocate_chanlist(mc);
 	if (err)
@@ -306,7 +293,6 @@ static int meson_crypto_probe(struct platform_device *pdev)
 	meson_unregister_algs(mc);
 error_flow:
 	meson_free_chanlist(mc, mc->flow_cnt - 1);
-	clk_disable_unprepare(mc->busclk);
 	return err;
 }
 
@@ -321,8 +307,6 @@ static void meson_crypto_remove(struct platform_device *pdev)
 	meson_unregister_algs(mc);
 
 	meson_free_chanlist(mc, mc->flow_cnt - 1);
-
-	clk_disable_unprepare(mc->busclk);
 }
 
 static const struct meson_pdata meson_gxl_pdata = {
-- 
2.34.1



From avromanov at salutedevices.com  Tue Aug 20 07:56:02 2024
From: avromanov at salutedevices.com (Alexey Romanov)
Date: Tue, 20 Aug 2024 17:56:02 +0300
Subject: [PATCH v9 02/23] drviers: crypto: meson: add platform data
In-Reply-To: <20240820145623.3500864-1-avromanov@salutedevices.com>
References: <20240820145623.3500864-1-avromanov@salutedevices.com>
Message-ID: <20240820145623.3500864-3-avromanov@salutedevices.com>

To support other Amlogic SoC's we have to
use platform data: descriptors and status registers
offsets are individual for each SoC series.

Signed-off-by: Alexey Romanov <avromanov at salutedevices.com>
---
 drivers/crypto/amlogic/amlogic-gxl-cipher.c |  2 +-
 drivers/crypto/amlogic/amlogic-gxl-core.c   | 22 +++++++++++++++++----
 drivers/crypto/amlogic/amlogic-gxl.h        | 11 +++++++++++
 3 files changed, 30 insertions(+), 5 deletions(-)

diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c b/drivers/crypto/amlogic/amlogic-gxl-cipher.c
index b19032f92415..7eff3ae7356f 100644
--- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c
+++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c
@@ -225,7 +225,7 @@ static int meson_cipher(struct skcipher_request *areq)
 
 	reinit_completion(&mc->chanlist[flow].complete);
 	mc->chanlist[flow].status = 0;
-	writel(mc->chanlist[flow].t_phy | 2, mc->base + (flow << 2));
+	writel(mc->chanlist[flow].t_phy | 2, mc->base + ((mc->pdata->descs_reg + flow) << 2));
 	wait_for_completion_interruptible_timeout(&mc->chanlist[flow].complete,
 						  msecs_to_jiffies(500));
 	if (mc->chanlist[flow].status == 0) {
diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c
index 35ec64df5b3a..e9e733ed98e0 100644
--- a/drivers/crypto/amlogic/amlogic-gxl-core.c
+++ b/drivers/crypto/amlogic/amlogic-gxl-core.c
@@ -18,6 +18,7 @@
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/of.h>
+#include <linux/of_device.h>
 #include <linux/platform_device.h>
 
 #include "amlogic-gxl.h"
@@ -30,9 +31,10 @@ static irqreturn_t meson_irq_handler(int irq, void *data)
 
 	for (flow = 0; flow < mc->flow_cnt; flow++) {
 		if (mc->chanlist[flow].irq == irq) {
-			p = readl(mc->base + ((0x04 + flow) << 2));
+			p = readl(mc->base + ((mc->pdata->status_reg + flow) << 2));
 			if (p) {
-				writel_relaxed(0xF, mc->base + ((0x4 + flow) << 2));
+				writel_relaxed(0xF, mc->base +
+					      ((mc->pdata->status_reg + flow) << 2));
 				mc->chanlist[flow].status = 1;
 				complete(&mc->chanlist[flow].complete);
 				return IRQ_HANDLED;
@@ -254,6 +256,10 @@ static int meson_crypto_probe(struct platform_device *pdev)
 	if (!mc)
 		return -ENOMEM;
 
+	mc->pdata = of_device_get_match_data(&pdev->dev);
+	if (!mc->pdata)
+		return -EINVAL;
+
 	mc->dev = &pdev->dev;
 	platform_set_drvdata(pdev, mc);
 
@@ -319,9 +325,17 @@ static void meson_crypto_remove(struct platform_device *pdev)
 	clk_disable_unprepare(mc->busclk);
 }
 
+static const struct meson_pdata meson_gxl_pdata = {
+	.descs_reg = 0x0,
+	.status_reg = 0x4,
+};
+
 static const struct of_device_id meson_crypto_of_match_table[] = {
-	{ .compatible = "amlogic,gxl-crypto", },
-	{}
+	{
+		.compatible = "amlogic,gxl-crypto",
+		.data = &meson_gxl_pdata,
+	},
+	{},
 };
 MODULE_DEVICE_TABLE(of, meson_crypto_of_match_table);
 
diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h
index 79177cfa8b88..9ad75da214ff 100644
--- a/drivers/crypto/amlogic/amlogic-gxl.h
+++ b/drivers/crypto/amlogic/amlogic-gxl.h
@@ -78,6 +78,16 @@ struct meson_flow {
 #endif
 };
 
+/*
+ * struct meson_pdata - SoC series dependent data.
+ * @reg_descs:	offset to descriptors register
+ * @reg_status:	offset to status register
+ */
+struct meson_pdata {
+	u32 descs_reg;
+	u32 status_reg;
+};
+
 /*
  * struct meson_dev - main container for all this driver information
  * @base:	base address of amlogic-crypto
@@ -93,6 +103,7 @@ struct meson_dev {
 	void __iomem *base;
 	struct clk *busclk;
 	struct device *dev;
+	const struct meson_pdata *pdata;
 	struct meson_flow *chanlist;
 	atomic_t flow;
 	int flow_cnt;
-- 
2.34.1



From avromanov at salutedevices.com  Tue Aug 20 07:56:04 2024
From: avromanov at salutedevices.com (Alexey Romanov)
Date: Tue, 20 Aug 2024 17:56:04 +0300
Subject: [PATCH v9 04/23] drivers: crypto: meson: add MMIO helpers
In-Reply-To: <20240820145623.3500864-1-avromanov@salutedevices.com>
References: <20240820145623.3500864-1-avromanov@salutedevices.com>
Message-ID: <20240820145623.3500864-5-avromanov@salutedevices.com>

Add MMIO access helpers: meson_dma_start() and meson_dma_ready().

Signed-off-by: Alexey Romanov <avromanov at salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong at linaro.org>
---
 drivers/crypto/amlogic/amlogic-gxl-cipher.c |  2 +-
 drivers/crypto/amlogic/amlogic-gxl-core.c   | 24 ++++++++++++++++-----
 drivers/crypto/amlogic/amlogic-gxl.h        |  2 ++
 3 files changed, 22 insertions(+), 6 deletions(-)

diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c b/drivers/crypto/amlogic/amlogic-gxl-cipher.c
index 7eff3ae7356f..1fe916b0a138 100644
--- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c
+++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c
@@ -225,7 +225,7 @@ static int meson_cipher(struct skcipher_request *areq)
 
 	reinit_completion(&mc->chanlist[flow].complete);
 	mc->chanlist[flow].status = 0;
-	writel(mc->chanlist[flow].t_phy | 2, mc->base + ((mc->pdata->descs_reg + flow) << 2));
+	meson_dma_start(mc, flow);
 	wait_for_completion_interruptible_timeout(&mc->chanlist[flow].complete,
 						  msecs_to_jiffies(500));
 	if (mc->chanlist[flow].status == 0) {
diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c
index 9d92115043c3..0698ac5e2a6a 100644
--- a/drivers/crypto/amlogic/amlogic-gxl-core.c
+++ b/drivers/crypto/amlogic/amlogic-gxl-core.c
@@ -22,18 +22,32 @@
 
 #include "amlogic-gxl.h"
 
+void meson_dma_start(struct meson_dev *mc, int flow)
+{
+	u32 offset = (mc->pdata->descs_reg + flow) << 2;
+
+	writel(mc->chanlist[flow].t_phy | 2, mc->base + offset);
+}
+
+static bool meson_dma_ready(struct meson_dev *mc, int flow)
+{
+	u32 offset = (mc->pdata->status_reg + flow) << 2;
+	u32 data = readl(mc->base + offset);
+
+	if (data)
+		writel_relaxed(0xF, mc->base + offset);
+
+	return data;
+}
+
 static irqreturn_t meson_irq_handler(int irq, void *data)
 {
 	struct meson_dev *mc = (struct meson_dev *)data;
 	int flow;
-	u32 p;
 
 	for (flow = 0; flow < mc->flow_cnt; flow++) {
 		if (mc->chanlist[flow].irq == irq) {
-			p = readl(mc->base + ((mc->pdata->status_reg + flow) << 2));
-			if (p) {
-				writel_relaxed(0xF, mc->base +
-					      ((mc->pdata->status_reg + flow) << 2));
+			if (meson_dma_ready(mc, flow)) {
 				mc->chanlist[flow].status = 1;
 				complete(&mc->chanlist[flow].complete);
 				return IRQ_HANDLED;
diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h
index 9ad75da214ff..8670f7ebcdda 100644
--- a/drivers/crypto/amlogic/amlogic-gxl.h
+++ b/drivers/crypto/amlogic/amlogic-gxl.h
@@ -161,6 +161,8 @@ struct meson_alg_template {
 #endif
 };
 
+void meson_dma_start(struct meson_dev *mc, int flow);
+
 int meson_enqueue(struct crypto_async_request *areq, u32 type);
 
 int meson_aes_setkey(struct crypto_skcipher *tfm, const u8 *key,
-- 
2.34.1



From avromanov at salutedevices.com  Tue Aug 20 07:56:05 2024
From: avromanov at salutedevices.com (Alexey Romanov)
Date: Tue, 20 Aug 2024 17:56:05 +0300
Subject: [PATCH v9 05/23] drivers: crypto: meson: move get_engine_number()
In-Reply-To: <20240820145623.3500864-1-avromanov@salutedevices.com>
References: <20240820145623.3500864-1-avromanov@salutedevices.com>
Message-ID: <20240820145623.3500864-6-avromanov@salutedevices.com>

Move get_engine_number() function from cipher.c to core.c

Signed-off-by: Alexey Romanov <avromanov at salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong at linaro.org>
---
 drivers/crypto/amlogic/amlogic-gxl-cipher.c | 9 ++-------
 drivers/crypto/amlogic/amlogic-gxl-core.c   | 5 +++++
 drivers/crypto/amlogic/amlogic-gxl.h        | 2 ++
 3 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c b/drivers/crypto/amlogic/amlogic-gxl-cipher.c
index 1fe916b0a138..18e9e2d39b1f 100644
--- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c
+++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c
@@ -17,11 +17,6 @@
 #include <crypto/internal/skcipher.h>
 #include "amlogic-gxl.h"
 
-static int get_engine_number(struct meson_dev *mc)
-{
-	return atomic_inc_return(&mc->flow) % mc->flow_cnt;
-}
-
 static bool meson_cipher_need_fallback(struct skcipher_request *areq)
 {
 	struct scatterlist *src_sg = areq->src;
@@ -282,7 +277,7 @@ int meson_skdecrypt(struct skcipher_request *areq)
 	rctx->op_dir = MESON_DECRYPT;
 	if (meson_cipher_need_fallback(areq))
 		return meson_cipher_do_fallback(areq);
-	e = get_engine_number(op->mc);
+	e = meson_get_engine_number(op->mc);
 	engine = op->mc->chanlist[e].engine;
 	rctx->flow = e;
 
@@ -300,7 +295,7 @@ int meson_skencrypt(struct skcipher_request *areq)
 	rctx->op_dir = MESON_ENCRYPT;
 	if (meson_cipher_need_fallback(areq))
 		return meson_cipher_do_fallback(areq);
-	e = get_engine_number(op->mc);
+	e = meson_get_engine_number(op->mc);
 	engine = op->mc->chanlist[e].engine;
 	rctx->flow = e;
 
diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c
index 0698ac5e2a6a..52317f111c6c 100644
--- a/drivers/crypto/amlogic/amlogic-gxl-core.c
+++ b/drivers/crypto/amlogic/amlogic-gxl-core.c
@@ -22,6 +22,11 @@
 
 #include "amlogic-gxl.h"
 
+int meson_get_engine_number(struct meson_dev *mc)
+{
+	return atomic_inc_return(&mc->flow) % mc->flow_cnt;
+}
+
 void meson_dma_start(struct meson_dev *mc, int flow)
 {
 	u32 offset = (mc->pdata->descs_reg + flow) << 2;
diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h
index 8670f7ebcdda..dc54bd533a2d 100644
--- a/drivers/crypto/amlogic/amlogic-gxl.h
+++ b/drivers/crypto/amlogic/amlogic-gxl.h
@@ -161,6 +161,8 @@ struct meson_alg_template {
 #endif
 };
 
+int meson_get_engine_number(struct meson_dev *mc);
+
 void meson_dma_start(struct meson_dev *mc, int flow);
 
 int meson_enqueue(struct crypto_async_request *areq, u32 type);
-- 
2.34.1



From avromanov at salutedevices.com  Tue Aug 20 07:56:06 2024
From: avromanov at salutedevices.com (Alexey Romanov)
Date: Tue, 20 Aug 2024 17:56:06 +0300
Subject: [PATCH v9 06/23] drivers: crypto: meson: drop status field from meson_flow
In-Reply-To: <20240820145623.3500864-1-avromanov@salutedevices.com>
References: <20240820145623.3500864-1-avromanov@salutedevices.com>
Message-ID: <20240820145623.3500864-7-avromanov@salutedevices.com>

This field is used only to check for timeout. But there is more
convenient way to achive the same goal.

Signed-off-by: Alexey Romanov <avromanov at salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong at linaro.org>
---
 drivers/crypto/amlogic/amlogic-gxl-cipher.c | 13 +++++++++----
 drivers/crypto/amlogic/amlogic-gxl-core.c   |  1 -
 drivers/crypto/amlogic/amlogic-gxl.h        |  2 --
 3 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c b/drivers/crypto/amlogic/amlogic-gxl-cipher.c
index 18e9e2d39b1f..dc0b100c5de2 100644
--- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c
+++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c
@@ -219,13 +219,18 @@ static int meson_cipher(struct skcipher_request *areq)
 	}
 
 	reinit_completion(&mc->chanlist[flow].complete);
-	mc->chanlist[flow].status = 0;
 	meson_dma_start(mc, flow);
-	wait_for_completion_interruptible_timeout(&mc->chanlist[flow].complete,
-						  msecs_to_jiffies(500));
-	if (mc->chanlist[flow].status == 0) {
+
+	err = wait_for_completion_interruptible_timeout(&mc->chanlist[flow].complete,
+							msecs_to_jiffies(500));
+	if (err == 0) {
 		dev_err(mc->dev, "DMA timeout for flow %d\n", flow);
 		err = -EINVAL;
+	} else if (err < 0) {
+		dev_err(mc->dev, "Waiting for DMA completion is failed (%d)\n", err);
+	} else {
+		/* No error */
+		err = 0;
 	}
 
 	dma_unmap_single(mc->dev, phykeyiv, keyivlen, DMA_TO_DEVICE);
diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c
index 52317f111c6c..4d04bb0ddc4e 100644
--- a/drivers/crypto/amlogic/amlogic-gxl-core.c
+++ b/drivers/crypto/amlogic/amlogic-gxl-core.c
@@ -53,7 +53,6 @@ static irqreturn_t meson_irq_handler(int irq, void *data)
 	for (flow = 0; flow < mc->flow_cnt; flow++) {
 		if (mc->chanlist[flow].irq == irq) {
 			if (meson_dma_ready(mc, flow)) {
-				mc->chanlist[flow].status = 1;
 				complete(&mc->chanlist[flow].complete);
 				return IRQ_HANDLED;
 			}
diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h
index dc54bd533a2d..4d60a0cc2dca 100644
--- a/drivers/crypto/amlogic/amlogic-gxl.h
+++ b/drivers/crypto/amlogic/amlogic-gxl.h
@@ -59,7 +59,6 @@ struct meson_desc {
  * @engine:	ptr to the crypto_engine for this flow
  * @keylen:	keylen for this flow operation
  * @complete:	completion for the current task on this flow
- * @status:	set to 1 by interrupt if task is done
  * @irq:	IRQ number for amlogic-crypto
  * @t_phy:	Physical address of task
  * @tl:		pointer to the current ce_task for this flow
@@ -68,7 +67,6 @@ struct meson_desc {
 struct meson_flow {
 	struct crypto_engine *engine;
 	struct completion complete;
-	int status;
 	int irq;
 	unsigned int keylen;
 	dma_addr_t t_phy;
-- 
2.34.1



From avromanov at salutedevices.com  Tue Aug 20 07:56:00 2024
From: avromanov at salutedevices.com (Alexey Romanov)
Date: Tue, 20 Aug 2024 17:56:00 +0300
Subject: [PATCH v9 00/23] Support more Amlogic SoC families in crypto driver
Message-ID: <20240820145623.3500864-1-avromanov@salutedevices.com>

Hello!

This patchset expand the funcionality of the Amlogic
crypto driver by adding support for more SoC families:
AXG, G12A, G12B, SM1, A1, S4.

Also specify and enable crypto node in device tree
for reference Amlogic devices.

Tested on GXL, AXG, G12A/B, SM1, A1 and S4 devices via
custom tests [1] and tcrypt module.

---

Changes V1 -> V2 [2]:

- Rebased over linux-next.
- Adjusted device tree bindings description.
- A1 and S4 dts use their own compatible, which is a G12 fallback.

Changes V2 -> V3 [3]:

- Fix errors in dt-bindings and device tree.
- Add new field in platform data, which determines
whether clock controller should be used for crypto IP.
- Place back MODULE_DEVICE_TABLE.
- Correct commit messages.

Changes V3 -> V4 [4]:

- Update dt-bindings as per Krzysztof Kozlowski comments.
- Fix bisection: get rid of compiler errors in some patches.

Changes V4 -> V5 [5]:

- Tested on GXL board:
  1. Fix panic detected by Corentin Labbe [6].
  2. Disable hasher backend for GXL: in its current realization
     is doesn't work. And there are no examples or docs in the
     vendor SDK.
- Fix AES-CTR realization: legacy boards (gxl, g12, axg) requires
  inversion of the keyiv at keys setup stage.
- A1 now uses its own compatible string.
- S4 uses A1 compatible as fallback.
- Code fixes based on comments Neil Atrmstrong and Rob Herring.
- Style fixes (set correct indentations)

Changes V5 -> V6 [7]:

- Fix DMA sync warning reported by Corentin Labbe [8].
- Remove CLK input from driver. Remove clk definition
  and second interrput line from crypto node inside GXL dtsi.

Changes V6 -> V7 [9]:

- Fix dt-schema: power domain now required only for A1.
- Use crypto_skcipher_ctx_dma() helper for cipher instead of
  ____cacheline_aligned.
- Add import/export functions for hasher.
- Fix commit message for patch 17, acorrding to discussion [10].

Changes V7 -> V8 [11]:

- Test patchset with CONFIG_CRYPTO_MANAGER_EXTRA_TESTS: fix some bugs
  in hasher logic.
- Use crypto crypto_ahash_ctx_dma in hasher code.
- Correct clock definition: clk81 is required for all SoC's.
- Add fixed-clock (clk81) definition for A1/S4.
- Add information (in commit messages) why different compatibles are used.

Changes V8 -> V9 [12]:

- Remove required field clk-names from dt-schema according to Rob Herring
recommendation [13].
- Fix commit order: all dt-bindings schema commits now located earlier
than any changes in device tree.
- Fix typos and add more clarifications in dt-schema patches.

Links:
  - [1] https://gist.github.com/mRrvz/3fb8943a7487ab7b943ec140706995e7
  - [2] https://lore.kernel.org/all/20240110201216.18016-1-avromanov at salutedevices.com/
  - [3] https://lore.kernel.org/all/20240123165831.970023-1-avromanov at salutedevices.com/
  - [4] https://lore.kernel.org/all/20240205155521.1795552-1-avromanov at salutedevices.com/
  - [5] https://lore.kernel.org/all/20240212135108.549755-1-avromanov at salutedevices.com/
  - [6] https://lore.kernel.org/all/ZcsYaPIUrBSg8iXu at Red/
  - [7] https://lore.kernel.org/all/20240301132936.621238-1-avromanov at salutedevices.com/
  - [8] https://lore.kernel.org/all/Zf1BAlYtiwPOG-Os at Red/
  - [9] https://lore.kernel.org/all/20240326153219.2915080-1-avromanov at salutedevices.com/
  - [10] https://lore.kernel.org/all/20240329-dotted-illusive-9f0593805a05 at wendy/
  - [11] https://lore.kernel.org/all/20240411133832.2896463-1-avromanov at salutedevices.com/
  - [12] https://lore.kernel.org/all/20240607141242.2616580-1-avromanov at salutedevices.com/
  - [13] https://lore.kernel.org/all/20240610222827.GA3166929-robh at kernel.org/

Alexey Romanov (23):
  drivers: crypto: meson: don't hardcode IRQ count
  drviers: crypto: meson: add platform data
  drivers: crypto: meson: remove clock input
  drivers: crypto: meson: add MMIO helpers
  drivers: crypto: meson: move get_engine_number()
  drivers: crypto: meson: drop status field from meson_flow
  drivers: crypto: meson: move algs definition and cipher API to
    cipher.c
  drivers: crypto: meson: cleanup defines
  drivers: crypto: meson: process more than MAXDESCS descriptors
  drivers: crypto: meson: avoid kzalloc in engine thread
  drivers: crypto: meson: introduce hasher
  drivers: crypto: meson: add support for AES-CTR
  drivers: crypto: meson: use fallback for 192-bit keys
  drivers: crypto: meson: add support for G12-series
  drivers: crypto: meson: add support for AXG-series
  drivers: crypto: meson: add support for A1-series
  dt-bindings: crypto: meson: correct clk and remove second interrupt
    line
  dt-bindings: crypto: meson: support new SoC's
  arch: arm64: dts: meson: gxl: correct crypto node definition
  arch: arm64: dts: meson: a1: add crypto node
  arch: arm64: dts: meson: s4: add crypto node
  arch: arm64: dts: meson: g12: add crypto node
  arch: arm64: dts: meson: axg: add crypto node

 .../bindings/crypto/amlogic,gxl-crypto.yaml   |  32 +-
 arch/arm64/boot/dts/amlogic/meson-a1.dtsi     |  14 +
 arch/arm64/boot/dts/amlogic/meson-axg.dtsi    |   7 +
 .../boot/dts/amlogic/meson-g12-common.dtsi    |   7 +
 arch/arm64/boot/dts/amlogic/meson-gxl.dtsi    |   6 +-
 arch/arm64/boot/dts/amlogic/meson-s4.dtsi     |  13 +
 drivers/crypto/amlogic/Makefile               |   2 +-
 drivers/crypto/amlogic/amlogic-gxl-cipher.c   | 632 ++++++++++++------
 drivers/crypto/amlogic/amlogic-gxl-core.c     | 292 ++++----
 drivers/crypto/amlogic/amlogic-gxl-hasher.c   | 507 ++++++++++++++
 drivers/crypto/amlogic/amlogic-gxl.h          | 118 +++-
 11 files changed, 1269 insertions(+), 361 deletions(-)
 create mode 100644 drivers/crypto/amlogic/amlogic-gxl-hasher.c

-- 
2.34.1



From avromanov at salutedevices.com  Tue Aug 20 07:56:07 2024
From: avromanov at salutedevices.com (Alexey Romanov)
Date: Tue, 20 Aug 2024 17:56:07 +0300
Subject: [PATCH v9 07/23] drivers: crypto: meson: move algs definition and cipher API to cipher.c
In-Reply-To: <20240820145623.3500864-1-avromanov@salutedevices.com>
References: <20240820145623.3500864-1-avromanov@salutedevices.com>
Message-ID: <20240820145623.3500864-8-avromanov@salutedevices.com>

Because that is proper place for them. In particular,
it takes less of exported symbol between compiling entities.

Signed-off-by: Alexey Romanov <avromanov at salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong at linaro.org>
---
 drivers/crypto/amlogic/amlogic-gxl-cipher.c |  98 +++++++++++++++--
 drivers/crypto/amlogic/amlogic-gxl-core.c   | 110 ++++----------------
 drivers/crypto/amlogic/amlogic-gxl.h        |  14 +--
 3 files changed, 119 insertions(+), 103 deletions(-)

diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c b/drivers/crypto/amlogic/amlogic-gxl-cipher.c
index dc0b100c5de2..bc3092a8a2c2 100644
--- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c
+++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c
@@ -271,7 +271,7 @@ int meson_handle_cipher_request(struct crypto_engine *engine, void *areq)
 	return 0;
 }
 
-int meson_skdecrypt(struct skcipher_request *areq)
+static int meson_skdecrypt(struct skcipher_request *areq)
 {
 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq);
 	struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm);
@@ -289,7 +289,7 @@ int meson_skdecrypt(struct skcipher_request *areq)
 	return crypto_transfer_skcipher_request_to_engine(engine, areq);
 }
 
-int meson_skencrypt(struct skcipher_request *areq)
+static int meson_skencrypt(struct skcipher_request *areq)
 {
 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq);
 	struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm);
@@ -307,7 +307,7 @@ int meson_skencrypt(struct skcipher_request *areq)
 	return crypto_transfer_skcipher_request_to_engine(engine, areq);
 }
 
-int meson_cipher_init(struct crypto_tfm *tfm)
+static int meson_cipher_init(struct crypto_tfm *tfm)
 {
 	struct meson_cipher_tfm_ctx *op = crypto_tfm_ctx(tfm);
 	struct meson_alg_template *algt;
@@ -333,7 +333,7 @@ int meson_cipher_init(struct crypto_tfm *tfm)
 	return 0;
 }
 
-void meson_cipher_exit(struct crypto_tfm *tfm)
+static void meson_cipher_exit(struct crypto_tfm *tfm)
 {
 	struct meson_cipher_tfm_ctx *op = crypto_tfm_ctx(tfm);
 
@@ -341,8 +341,8 @@ void meson_cipher_exit(struct crypto_tfm *tfm)
 	crypto_free_skcipher(op->fallback_tfm);
 }
 
-int meson_aes_setkey(struct crypto_skcipher *tfm, const u8 *key,
-		     unsigned int keylen)
+static int meson_aes_setkey(struct crypto_skcipher *tfm, const u8 *key,
+			    unsigned int keylen)
 {
 	struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm);
 	struct meson_dev *mc = op->mc;
@@ -369,3 +369,89 @@ int meson_aes_setkey(struct crypto_skcipher *tfm, const u8 *key,
 
 	return crypto_skcipher_setkey(op->fallback_tfm, key, keylen);
 }
+
+static struct meson_alg_template algs[] = {
+{
+	.type = CRYPTO_ALG_TYPE_SKCIPHER,
+	.blockmode = MESON_OPMODE_CBC,
+	.alg.skcipher.base = {
+		.base = {
+			.cra_name = "cbc(aes)",
+			.cra_driver_name = "cbc-aes-gxl",
+			.cra_priority = 400,
+			.cra_blocksize = AES_BLOCK_SIZE,
+			.cra_flags = CRYPTO_ALG_TYPE_SKCIPHER |
+				CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY |
+				CRYPTO_ALG_NEED_FALLBACK,
+			.cra_ctxsize = sizeof(struct meson_cipher_tfm_ctx),
+			.cra_module = THIS_MODULE,
+			.cra_alignmask = 0xf,
+			.cra_init = meson_cipher_init,
+			.cra_exit = meson_cipher_exit,
+		},
+		.min_keysize	= AES_MIN_KEY_SIZE,
+		.max_keysize	= AES_MAX_KEY_SIZE,
+		.ivsize		= AES_BLOCK_SIZE,
+		.setkey		= meson_aes_setkey,
+		.encrypt	= meson_skencrypt,
+		.decrypt	= meson_skdecrypt,
+	},
+	.alg.skcipher.op = {
+		.do_one_request = meson_handle_cipher_request,
+	},
+},
+{
+	.type = CRYPTO_ALG_TYPE_SKCIPHER,
+	.blockmode = MESON_OPMODE_ECB,
+	.alg.skcipher.base = {
+		.base = {
+			.cra_name = "ecb(aes)",
+			.cra_driver_name = "ecb-aes-gxl",
+			.cra_priority = 400,
+			.cra_blocksize = AES_BLOCK_SIZE,
+			.cra_flags = CRYPTO_ALG_TYPE_SKCIPHER |
+				CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY |
+				CRYPTO_ALG_NEED_FALLBACK,
+			.cra_ctxsize = sizeof(struct meson_cipher_tfm_ctx),
+			.cra_module = THIS_MODULE,
+			.cra_alignmask = 0xf,
+			.cra_init = meson_cipher_init,
+			.cra_exit = meson_cipher_exit,
+		},
+		.min_keysize	= AES_MIN_KEY_SIZE,
+		.max_keysize	= AES_MAX_KEY_SIZE,
+		.setkey		= meson_aes_setkey,
+		.encrypt	= meson_skencrypt,
+		.decrypt	= meson_skdecrypt,
+	},
+	.alg.skcipher.op = {
+		.do_one_request = meson_handle_cipher_request,
+	},
+},
+};
+
+int meson_cipher_register(struct meson_dev *mc)
+{
+	return meson_register_algs(mc, algs, ARRAY_SIZE(algs));
+}
+
+void meson_cipher_unregister(struct meson_dev *mc)
+{
+	meson_unregister_algs(mc, algs, ARRAY_SIZE(algs));
+}
+
+void meson_cipher_debugfs_show(struct seq_file *seq, void *v)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(algs); i++) {
+		seq_printf(seq, "%s %s %lu %lu\n",
+			   algs[i].alg.skcipher.base.base.cra_driver_name,
+			   algs[i].alg.skcipher.base.base.cra_name,
+#ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG
+			   algs[i].stat_req, algs[i].stat_fb);
+#else
+			   0ul, 0ul);
+#endif
+	}
+}
diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c
index 4d04bb0ddc4e..98e63e67aa6e 100644
--- a/drivers/crypto/amlogic/amlogic-gxl-core.c
+++ b/drivers/crypto/amlogic/amlogic-gxl-core.c
@@ -64,66 +64,6 @@ static irqreturn_t meson_irq_handler(int irq, void *data)
 	return IRQ_HANDLED;
 }
 
-static struct meson_alg_template mc_algs[] = {
-{
-	.type = CRYPTO_ALG_TYPE_SKCIPHER,
-	.blockmode = MESON_OPMODE_CBC,
-	.alg.skcipher.base = {
-		.base = {
-			.cra_name = "cbc(aes)",
-			.cra_driver_name = "cbc-aes-gxl",
-			.cra_priority = 400,
-			.cra_blocksize = AES_BLOCK_SIZE,
-			.cra_flags = CRYPTO_ALG_TYPE_SKCIPHER |
-				CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY |
-				CRYPTO_ALG_NEED_FALLBACK,
-			.cra_ctxsize = sizeof(struct meson_cipher_tfm_ctx),
-			.cra_module = THIS_MODULE,
-			.cra_alignmask = 0xf,
-			.cra_init = meson_cipher_init,
-			.cra_exit = meson_cipher_exit,
-		},
-		.min_keysize	= AES_MIN_KEY_SIZE,
-		.max_keysize	= AES_MAX_KEY_SIZE,
-		.ivsize		= AES_BLOCK_SIZE,
-		.setkey		= meson_aes_setkey,
-		.encrypt	= meson_skencrypt,
-		.decrypt	= meson_skdecrypt,
-	},
-	.alg.skcipher.op = {
-		.do_one_request = meson_handle_cipher_request,
-	},
-},
-{
-	.type = CRYPTO_ALG_TYPE_SKCIPHER,
-	.blockmode = MESON_OPMODE_ECB,
-	.alg.skcipher.base = {
-		.base = {
-			.cra_name = "ecb(aes)",
-			.cra_driver_name = "ecb-aes-gxl",
-			.cra_priority = 400,
-			.cra_blocksize = AES_BLOCK_SIZE,
-			.cra_flags = CRYPTO_ALG_TYPE_SKCIPHER |
-				CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY |
-				CRYPTO_ALG_NEED_FALLBACK,
-			.cra_ctxsize = sizeof(struct meson_cipher_tfm_ctx),
-			.cra_module = THIS_MODULE,
-			.cra_alignmask = 0xf,
-			.cra_init = meson_cipher_init,
-			.cra_exit = meson_cipher_exit,
-		},
-		.min_keysize	= AES_MIN_KEY_SIZE,
-		.max_keysize	= AES_MAX_KEY_SIZE,
-		.setkey		= meson_aes_setkey,
-		.encrypt	= meson_skencrypt,
-		.decrypt	= meson_skdecrypt,
-	},
-	.alg.skcipher.op = {
-		.do_one_request = meson_handle_cipher_request,
-	},
-},
-};
-
 static int meson_debugfs_show(struct seq_file *seq, void *v)
 {
 	struct meson_dev *mc __maybe_unused = seq->private;
@@ -137,20 +77,8 @@ static int meson_debugfs_show(struct seq_file *seq, void *v)
 			   0ul);
 #endif
 
-	for (i = 0; i < ARRAY_SIZE(mc_algs); i++) {
-		switch (mc_algs[i].type) {
-		case CRYPTO_ALG_TYPE_SKCIPHER:
-			seq_printf(seq, "%s %s %lu %lu\n",
-				   mc_algs[i].alg.skcipher.base.base.cra_driver_name,
-				   mc_algs[i].alg.skcipher.base.base.cra_name,
-#ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG
-				   mc_algs[i].stat_req, mc_algs[i].stat_fb);
-#else
-				   0ul, 0ul);
-#endif
-			break;
-		}
-	}
+	meson_cipher_debugfs_show(seq, v);
+
 	return 0;
 }
 DEFINE_SHOW_ATTRIBUTE(meson_debugfs);
@@ -227,19 +155,20 @@ static int meson_allocate_chanlist(struct meson_dev *mc)
 	return err;
 }
 
-static int meson_register_algs(struct meson_dev *mc)
+int meson_register_algs(struct meson_dev *mc, struct meson_alg_template *algs,
+			unsigned int count)
 {
 	int err, i;
 
-	for (i = 0; i < ARRAY_SIZE(mc_algs); i++) {
-		mc_algs[i].mc = mc;
-		switch (mc_algs[i].type) {
+	for (i = 0; i < count; i++) {
+		algs[i].mc = mc;
+		switch (algs[i].type) {
 		case CRYPTO_ALG_TYPE_SKCIPHER:
-			err = crypto_engine_register_skcipher(&mc_algs[i].alg.skcipher);
+			err = crypto_engine_register_skcipher(&algs[i].alg.skcipher);
 			if (err) {
 				dev_err(mc->dev, "Fail to register %s\n",
-					mc_algs[i].alg.skcipher.base.base.cra_name);
-				mc_algs[i].mc = NULL;
+					algs[i].alg.skcipher.base.base.cra_name);
+				meson_unregister_algs(mc, algs, count);
 				return err;
 			}
 			break;
@@ -249,16 +178,17 @@ static int meson_register_algs(struct meson_dev *mc)
 	return 0;
 }
 
-static void meson_unregister_algs(struct meson_dev *mc)
+void meson_unregister_algs(struct meson_dev *mc, struct meson_alg_template *algs,
+			   unsigned int count)
 {
 	int i;
 
-	for (i = 0; i < ARRAY_SIZE(mc_algs); i++) {
-		if (!mc_algs[i].mc)
+	for (i = 0; i < count; i++) {
+		if (!algs[i].mc)
 			continue;
-		switch (mc_algs[i].type) {
+		switch (algs[i].type) {
 		case CRYPTO_ALG_TYPE_SKCIPHER:
-			crypto_engine_unregister_skcipher(&mc_algs[i].alg.skcipher);
+			crypto_engine_unregister_skcipher(&algs[i].alg.skcipher);
 			break;
 		}
 	}
@@ -291,9 +221,9 @@ static int meson_crypto_probe(struct platform_device *pdev)
 	if (err)
 		goto error_flow;
 
-	err = meson_register_algs(mc);
+	err = meson_cipher_register(mc);
 	if (err)
-		goto error_alg;
+		goto error_flow;
 
 	if (IS_ENABLED(CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG)) {
 		struct dentry *dbgfs_dir;
@@ -307,8 +237,6 @@ static int meson_crypto_probe(struct platform_device *pdev)
 	}
 
 	return 0;
-error_alg:
-	meson_unregister_algs(mc);
 error_flow:
 	meson_free_chanlist(mc, mc->flow_cnt - 1);
 	return err;
@@ -322,7 +250,7 @@ static void meson_crypto_remove(struct platform_device *pdev)
 	debugfs_remove_recursive(mc->dbgfs_dir);
 #endif
 
-	meson_unregister_algs(mc);
+	meson_cipher_unregister(mc);
 
 	meson_free_chanlist(mc, mc->flow_cnt - 1);
 }
diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h
index 4d60a0cc2dca..9d66903aa73d 100644
--- a/drivers/crypto/amlogic/amlogic-gxl.h
+++ b/drivers/crypto/amlogic/amlogic-gxl.h
@@ -165,10 +165,12 @@ void meson_dma_start(struct meson_dev *mc, int flow);
 
 int meson_enqueue(struct crypto_async_request *areq, u32 type);
 
-int meson_aes_setkey(struct crypto_skcipher *tfm, const u8 *key,
-		     unsigned int keylen);
-int meson_cipher_init(struct crypto_tfm *tfm);
-void meson_cipher_exit(struct crypto_tfm *tfm);
-int meson_skdecrypt(struct skcipher_request *areq);
-int meson_skencrypt(struct skcipher_request *areq);
+int meson_register_algs(struct meson_dev *mc, struct meson_alg_template *algs,
+			unsigned int count);
+void meson_unregister_algs(struct meson_dev *mc, struct meson_alg_template *algs,
+			   unsigned int count);
+
+int meson_cipher_register(struct meson_dev *mc);
+void meson_cipher_unregister(struct meson_dev *mc);
+void meson_cipher_debugfs_show(struct seq_file *seq, void *v);
 int meson_handle_cipher_request(struct crypto_engine *engine, void *areq);
-- 
2.34.1



From avromanov at salutedevices.com  Tue Aug 20 07:56:08 2024
From: avromanov at salutedevices.com (Alexey Romanov)
Date: Tue, 20 Aug 2024 17:56:08 +0300
Subject: [PATCH v9 08/23] drivers: crypto: meson: cleanup defines
In-Reply-To: <20240820145623.3500864-1-avromanov@salutedevices.com>
References: <20240820145623.3500864-1-avromanov@salutedevices.com>
Message-ID: <20240820145623.3500864-9-avromanov@salutedevices.com>

It is bad to use hardcoded values directly in the code.

Signed-off-by: Alexey Romanov <avromanov at salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong at linaro.org>
---
 drivers/crypto/amlogic/amlogic-gxl-cipher.c | 24 ++++++++++-----------
 drivers/crypto/amlogic/amlogic-gxl.h        | 16 ++++++++------
 2 files changed, 21 insertions(+), 19 deletions(-)

diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c b/drivers/crypto/amlogic/amlogic-gxl-cipher.c
index bc3092a8a2c2..c662c4b86e97 100644
--- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c
+++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c
@@ -141,8 +141,8 @@ static int meson_cipher(struct skcipher_request *areq)
 						 ivsize, 0);
 		}
 	}
-	if (keyivlen == 24)
-		keyivlen = 32;
+	if (keyivlen == AES_KEYSIZE_192)
+		keyivlen = AES_MAX_KEY_SIZE;
 
 	phykeyiv = dma_map_single(mc->dev, bkeyiv, keyivlen,
 				  DMA_TO_DEVICE);
@@ -161,7 +161,7 @@ static int meson_cipher(struct skcipher_request *areq)
 		todo = min(keyivlen - eat, 16u);
 		desc->t_src = cpu_to_le32(phykeyiv + i * 16);
 		desc->t_dst = cpu_to_le32(i * 16);
-		v = (MODE_KEY << 20) | DESC_OWN | 16;
+		v = DESC_MODE_KEY | DESC_OWN | 16;
 		desc->t_status = cpu_to_le32(v);
 
 		eat += todo;
@@ -205,7 +205,7 @@ static int meson_cipher(struct skcipher_request *areq)
 		desc->t_src = cpu_to_le32(sg_dma_address(src_sg));
 		desc->t_dst = cpu_to_le32(sg_dma_address(dst_sg));
 		todo = min(len, sg_dma_len(src_sg));
-		v = (op->keymode << 20) | DESC_OWN | todo | (algt->blockmode << 26);
+		v = op->keymode | DESC_OWN | todo | algt->blockmode;
 		if (rctx->op_dir)
 			v |= DESC_ENCRYPTION;
 		len -= todo;
@@ -348,14 +348,14 @@ static int meson_aes_setkey(struct crypto_skcipher *tfm, const u8 *key,
 	struct meson_dev *mc = op->mc;
 
 	switch (keylen) {
-	case 128 / 8:
-		op->keymode = MODE_AES_128;
+	case AES_KEYSIZE_128:
+		op->keymode = DESC_MODE_AES_128;
 		break;
-	case 192 / 8:
-		op->keymode = MODE_AES_192;
+	case AES_KEYSIZE_192:
+		op->keymode = DESC_MODE_AES_192;
 		break;
-	case 256 / 8:
-		op->keymode = MODE_AES_256;
+	case AES_KEYSIZE_256:
+		op->keymode = DESC_MODE_AES_256;
 		break;
 	default:
 		dev_dbg(mc->dev, "ERROR: Invalid keylen %u\n", keylen);
@@ -373,7 +373,7 @@ static int meson_aes_setkey(struct crypto_skcipher *tfm, const u8 *key,
 static struct meson_alg_template algs[] = {
 {
 	.type = CRYPTO_ALG_TYPE_SKCIPHER,
-	.blockmode = MESON_OPMODE_CBC,
+	.blockmode = DESC_OPMODE_CBC,
 	.alg.skcipher.base = {
 		.base = {
 			.cra_name = "cbc(aes)",
@@ -402,7 +402,7 @@ static struct meson_alg_template algs[] = {
 },
 {
 	.type = CRYPTO_ALG_TYPE_SKCIPHER,
-	.blockmode = MESON_OPMODE_ECB,
+	.blockmode = DESC_OPMODE_ECB,
 	.alg.skcipher.base = {
 		.base = {
 			.cra_name = "ecb(aes)",
diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h
index 9d66903aa73d..1ab3462dea42 100644
--- a/drivers/crypto/amlogic/amlogic-gxl.h
+++ b/drivers/crypto/amlogic/amlogic-gxl.h
@@ -11,19 +11,21 @@
 #include <linux/crypto.h>
 #include <linux/scatterlist.h>
 
-#define MODE_KEY 1
-#define MODE_AES_128 0x8
-#define MODE_AES_192 0x9
-#define MODE_AES_256 0xa
-
 #define MESON_DECRYPT 0
 #define MESON_ENCRYPT 1
 
-#define MESON_OPMODE_ECB 0
-#define MESON_OPMODE_CBC 1
+#define DESC_MODE_KEY (0x1 << 20)
+#define DESC_MODE_AES_128 (0x8 << 20)
+#define DESC_MODE_AES_192 (0x9 << 20)
+#define DESC_MODE_AES_256 (0xa << 20)
 
 #define MAXDESC 64
 
+#define DESC_OPMODE_ECB (0 << 26)
+#define DESC_OPMODE_CBC (1 << 26)
+
+#define DESC_MAXLEN GENMASK(16, 0)
+
 #define DESC_LAST BIT(18)
 #define DESC_ENCRYPTION BIT(28)
 #define DESC_OWN BIT(31)
-- 
2.34.1



From avromanov at salutedevices.com  Tue Aug 20 07:56:09 2024
From: avromanov at salutedevices.com (Alexey Romanov)
Date: Tue, 20 Aug 2024 17:56:09 +0300
Subject: [PATCH v9 09/23] drivers: crypto: meson: process more than MAXDESCS descriptors
In-Reply-To: <20240820145623.3500864-1-avromanov@salutedevices.com>
References: <20240820145623.3500864-1-avromanov@salutedevices.com>
Message-ID: <20240820145623.3500864-10-avromanov@salutedevices.com>

1. The old alhorithm was not designed to process a large
amount of memory, and therefore gave incorrect results.

2. Not all Amlogic SoC's use 3 KEY/IV descriptors.
Add keyiv descriptors count parameter to platform data.

Signed-off-by: Alexey Romanov <avromanov at salutedevices.com>
---
 drivers/crypto/amlogic/amlogic-gxl-cipher.c | 448 +++++++++++++-------
 drivers/crypto/amlogic/amlogic-gxl-core.c   |   1 +
 drivers/crypto/amlogic/amlogic-gxl.h        |   2 +
 3 files changed, 286 insertions(+), 165 deletions(-)

diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c b/drivers/crypto/amlogic/amlogic-gxl-cipher.c
index c662c4b86e97..0d32d2e3ca3b 100644
--- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c
+++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c
@@ -17,35 +17,41 @@
 #include <crypto/internal/skcipher.h>
 #include "amlogic-gxl.h"
 
-static bool meson_cipher_need_fallback(struct skcipher_request *areq)
+static bool meson_cipher_need_fallback_sg(struct skcipher_request *areq,
+					  struct scatterlist *sg)
 {
-	struct scatterlist *src_sg = areq->src;
-	struct scatterlist *dst_sg = areq->dst;
+	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq);
+	unsigned int blocksize = crypto_skcipher_blocksize(tfm);
+	unsigned int cryptlen = areq->cryptlen;
+
+	while (cryptlen) {
+		unsigned int len = min(cryptlen, sg->length);
+
+		if (!IS_ALIGNED(sg->offset, sizeof(u32)))
+			return true;
+		if (len % blocksize != 0)
+			return true;
+
+		cryptlen -= len;
+		sg = sg_next(sg);
+	}
+
+	return false;
+}
 
+static bool meson_cipher_need_fallback(struct skcipher_request *areq)
+{
 	if (areq->cryptlen == 0)
 		return true;
 
-	if (sg_nents(src_sg) != sg_nents(dst_sg))
+	if (meson_cipher_need_fallback_sg(areq, areq->src))
 		return true;
 
-	/* KEY/IV descriptors use 3 desc */
-	if (sg_nents(src_sg) > MAXDESC - 3 || sg_nents(dst_sg) > MAXDESC - 3)
-		return true;
+	if (areq->dst == areq->src)
+		return false;
 
-	while (src_sg && dst_sg) {
-		if ((src_sg->length % 16) != 0)
-			return true;
-		if ((dst_sg->length % 16) != 0)
-			return true;
-		if (src_sg->length != dst_sg->length)
-			return true;
-		if (!IS_ALIGNED(src_sg->offset, sizeof(u32)))
-			return true;
-		if (!IS_ALIGNED(dst_sg->offset, sizeof(u32)))
-			return true;
-		src_sg = sg_next(src_sg);
-		dst_sg = sg_next(dst_sg);
-	}
+	if (meson_cipher_need_fallback_sg(areq, areq->dst))
+		return true;
 
 	return false;
 }
@@ -76,184 +82,296 @@ static int meson_cipher_do_fallback(struct skcipher_request *areq)
 	return err;
 }
 
-static int meson_cipher(struct skcipher_request *areq)
+struct cipher_ctx {
+	struct {
+		dma_addr_t addr;
+		unsigned int len;
+	} keyiv;
+
+	struct skcipher_request *areq;
+	struct scatterlist *src_sg;
+	struct scatterlist *dst_sg;
+	void *bkeyiv;
+
+	unsigned int src_offset;
+	unsigned int dst_offset;
+	unsigned int cryptlen;
+	unsigned int tloffset;
+};
+
+static int meson_map_scatterlist(struct skcipher_request *areq, struct meson_dev *mc)
 {
-	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq);
-	struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm);
-	struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(areq);
-	struct meson_dev *mc = op->mc;
-	struct skcipher_alg *alg = crypto_skcipher_alg(tfm);
-	struct meson_alg_template *algt;
-	int flow = rctx->flow;
-	unsigned int todo, eat, len;
-	struct scatterlist *src_sg = areq->src;
-	struct scatterlist *dst_sg = areq->dst;
-	struct meson_desc *desc;
 	int nr_sgs, nr_sgd;
-	int i, err = 0;
-	unsigned int keyivlen, ivsize, offset, tloffset;
-	dma_addr_t phykeyiv;
-	void *backup_iv = NULL, *bkeyiv;
-	u32 v;
-
-	algt = container_of(alg, struct meson_alg_template, alg.skcipher.base);
-
-	dev_dbg(mc->dev, "%s %s %u %x IV(%u) key=%u flow=%d\n", __func__,
-		crypto_tfm_alg_name(areq->base.tfm),
-		areq->cryptlen,
-		rctx->op_dir, crypto_skcipher_ivsize(tfm),
-		op->keylen, flow);
-
-#ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG
-	algt->stat_req++;
-	mc->chanlist[flow].stat_req++;
-#endif
-
-	/*
-	 * The hardware expect a list of meson_desc structures.
-	 * The 2 first structures store key
-	 * The third stores IV
-	 */
-	bkeyiv = kzalloc(48, GFP_KERNEL | GFP_DMA);
-	if (!bkeyiv)
-		return -ENOMEM;
-
-	memcpy(bkeyiv, op->key, op->keylen);
-	keyivlen = op->keylen;
-
-	ivsize = crypto_skcipher_ivsize(tfm);
-	if (areq->iv && ivsize > 0) {
-		if (ivsize > areq->cryptlen) {
-			dev_err(mc->dev, "invalid ivsize=%d vs len=%d\n", ivsize, areq->cryptlen);
-			err = -EINVAL;
-			goto theend;
-		}
-		memcpy(bkeyiv + 32, areq->iv, ivsize);
-		keyivlen = 48;
-		if (rctx->op_dir == MESON_DECRYPT) {
-			backup_iv = kzalloc(ivsize, GFP_KERNEL);
-			if (!backup_iv) {
-				err = -ENOMEM;
-				goto theend;
-			}
-			offset = areq->cryptlen - ivsize;
-			scatterwalk_map_and_copy(backup_iv, areq->src, offset,
-						 ivsize, 0);
-		}
-	}
-	if (keyivlen == AES_KEYSIZE_192)
-		keyivlen = AES_MAX_KEY_SIZE;
-
-	phykeyiv = dma_map_single(mc->dev, bkeyiv, keyivlen,
-				  DMA_TO_DEVICE);
-	err = dma_mapping_error(mc->dev, phykeyiv);
-	if (err) {
-		dev_err(mc->dev, "Cannot DMA MAP KEY IV\n");
-		goto theend;
-	}
-
-	tloffset = 0;
-	eat = 0;
-	i = 0;
-	while (keyivlen > eat) {
-		desc = &mc->chanlist[flow].tl[tloffset];
-		memset(desc, 0, sizeof(struct meson_desc));
-		todo = min(keyivlen - eat, 16u);
-		desc->t_src = cpu_to_le32(phykeyiv + i * 16);
-		desc->t_dst = cpu_to_le32(i * 16);
-		v = DESC_MODE_KEY | DESC_OWN | 16;
-		desc->t_status = cpu_to_le32(v);
-
-		eat += todo;
-		i++;
-		tloffset++;
-	}
 
 	if (areq->src == areq->dst) {
 		nr_sgs = dma_map_sg(mc->dev, areq->src, sg_nents(areq->src),
 				    DMA_BIDIRECTIONAL);
 		if (!nr_sgs) {
 			dev_err(mc->dev, "Invalid SG count %d\n", nr_sgs);
-			err = -EINVAL;
-			goto theend;
+			return -EINVAL;
 		}
-		nr_sgd = nr_sgs;
 	} else {
 		nr_sgs = dma_map_sg(mc->dev, areq->src, sg_nents(areq->src),
 				    DMA_TO_DEVICE);
-		if (!nr_sgs || nr_sgs > MAXDESC - 3) {
+		if (!nr_sgs) {
 			dev_err(mc->dev, "Invalid SG count %d\n", nr_sgs);
-			err = -EINVAL;
-			goto theend;
+			return -EINVAL;
 		}
+
 		nr_sgd = dma_map_sg(mc->dev, areq->dst, sg_nents(areq->dst),
 				    DMA_FROM_DEVICE);
-		if (!nr_sgd || nr_sgd > MAXDESC - 3) {
+		if (!nr_sgd) {
+			dma_unmap_sg(mc->dev, areq->src, sg_nents(areq->src), DMA_TO_DEVICE);
 			dev_err(mc->dev, "Invalid SG count %d\n", nr_sgd);
-			err = -EINVAL;
-			goto theend;
+			return -EINVAL;
 		}
 	}
 
-	src_sg = areq->src;
-	dst_sg = areq->dst;
-	len = areq->cryptlen;
-	while (src_sg) {
-		desc = &mc->chanlist[flow].tl[tloffset];
-		memset(desc, 0, sizeof(struct meson_desc));
-
-		desc->t_src = cpu_to_le32(sg_dma_address(src_sg));
-		desc->t_dst = cpu_to_le32(sg_dma_address(dst_sg));
-		todo = min(len, sg_dma_len(src_sg));
-		v = op->keymode | DESC_OWN | todo | algt->blockmode;
-		if (rctx->op_dir)
-			v |= DESC_ENCRYPTION;
-		len -= todo;
-
-		if (!sg_next(src_sg))
-			v |= DESC_LAST;
-		desc->t_status = cpu_to_le32(v);
-		tloffset++;
-		src_sg = sg_next(src_sg);
-		dst_sg = sg_next(dst_sg);
+	return 0;
+}
+
+static void meson_unmap_scatterlist(struct skcipher_request *areq, struct meson_dev *mc)
+{
+	if (areq->src == areq->dst) {
+		dma_unmap_sg(mc->dev, areq->src, sg_nents(areq->src), DMA_BIDIRECTIONAL);
+	} else {
+		dma_unmap_sg(mc->dev, areq->src, sg_nents(areq->src), DMA_TO_DEVICE);
+		dma_unmap_sg(mc->dev, areq->dst, sg_nents(areq->dst), DMA_FROM_DEVICE);
 	}
+}
 
-	reinit_completion(&mc->chanlist[flow].complete);
-	meson_dma_start(mc, flow);
+static void meson_setup_keyiv_descs(struct cipher_ctx *ctx)
+{
+	struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(ctx->areq);
+	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(ctx->areq);
+	struct skcipher_alg *alg = crypto_skcipher_alg(tfm);
+	struct meson_alg_template *algt = container_of(alg,
+		struct meson_alg_template, alg.skcipher.base);
+	struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm);
+	struct meson_dev *mc = op->mc;
+	unsigned int ivsize = crypto_skcipher_ivsize(tfm);
+	unsigned int blockmode = algt->blockmode;
+	int i;
+
+	if (ctx->tloffset)
+		return;
+
+	if (blockmode == DESC_OPMODE_CBC) {
+		memcpy(ctx->bkeyiv + AES_MAX_KEY_SIZE, ctx->areq->iv, ivsize);
+		dma_sync_single_for_device(mc->dev, ctx->keyiv.addr,
+					   ctx->keyiv.len, DMA_TO_DEVICE);
+	}
+
+	for (i = 0; i < mc->pdata->setup_desc_cnt; i++) {
+		struct meson_desc *desc =
+			&mc->chanlist[rctx->flow].tl[ctx->tloffset];
+		int offset = i * 16;
+
+		desc->t_src = cpu_to_le32(ctx->keyiv.addr + offset);
+		desc->t_dst = cpu_to_le32(offset);
+		desc->t_status = cpu_to_le32(DESC_OWN | DESC_MODE_KEY | ctx->keyiv.len);
+
+		ctx->tloffset++;
+	}
+}
 
-	err = wait_for_completion_interruptible_timeout(&mc->chanlist[flow].complete,
+static bool meson_setup_data_descs(struct cipher_ctx *ctx)
+{
+	struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(ctx->areq);
+	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(ctx->areq);
+	struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm);
+	struct skcipher_alg *alg = crypto_skcipher_alg(tfm);
+	struct meson_alg_template *algt = container_of(alg,
+						       struct meson_alg_template,
+						       alg.skcipher.base);
+	struct meson_dev *mc = op->mc;
+	struct meson_desc *desc = &mc->chanlist[rctx->flow].tl[ctx->tloffset];
+	unsigned int blocksize = crypto_skcipher_blocksize(tfm);
+	unsigned int blockmode = algt->blockmode;
+	unsigned int maxlen = rounddown(DESC_MAXLEN, blocksize);
+	unsigned int todo;
+	u32 v;
+
+	ctx->tloffset++;
+
+	todo = min(ctx->cryptlen, maxlen);
+	todo = min(todo, ctx->cryptlen);
+	todo = min(todo, sg_dma_len(ctx->src_sg) - ctx->src_offset);
+	todo = min(todo, sg_dma_len(ctx->dst_sg) - ctx->dst_offset);
+
+	desc->t_src = cpu_to_le32(sg_dma_address(ctx->src_sg) + ctx->src_offset);
+	desc->t_dst = cpu_to_le32(sg_dma_address(ctx->dst_sg) + ctx->dst_offset);
+
+	ctx->cryptlen -= todo;
+	ctx->src_offset += todo;
+	ctx->dst_offset += todo;
+
+	v = DESC_OWN | blockmode | op->keymode | todo;
+	if (rctx->op_dir == MESON_ENCRYPT)
+		v |= DESC_ENCRYPTION;
+
+	if (!ctx->cryptlen || ctx->tloffset == MAXDESC)
+		v |= DESC_LAST;
+
+	desc->t_status = cpu_to_le32(v);
+
+	return v & DESC_LAST;
+}
+
+static int meson_kick_hardware(struct cipher_ctx *ctx)
+{
+	struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(ctx->areq);
+	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(ctx->areq);
+	struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm);
+	struct skcipher_alg *alg = crypto_skcipher_alg(tfm);
+	struct meson_alg_template *algt = container_of(alg,
+						       struct meson_alg_template,
+						       alg.skcipher.base);
+	struct meson_dev *mc = op->mc;
+	unsigned int ivsize = crypto_skcipher_ivsize(tfm);
+	unsigned int blockmode = algt->blockmode;
+	enum dma_data_direction new_iv_dir;
+	struct scatterlist *sg_head;
+	dma_addr_t new_iv_phys;
+	void *new_iv;
+	int err;
+
+	if (blockmode == DESC_OPMODE_CBC) {
+		struct scatterlist *sg_current;
+		unsigned int offset;
+
+		if (rctx->op_dir == MESON_ENCRYPT) {
+			sg_current = ctx->dst_sg;
+			sg_head = ctx->areq->dst;
+			offset = ctx->dst_offset;
+			new_iv_dir = DMA_FROM_DEVICE;
+		} else {
+			sg_current = ctx->src_sg;
+			sg_head = ctx->areq->src;
+			offset = ctx->src_offset;
+			new_iv_dir = DMA_TO_DEVICE;
+		}
+
+		if (ctx->areq->src == ctx->areq->dst)
+			new_iv_dir = DMA_BIDIRECTIONAL;
+
+		offset -= ivsize;
+		new_iv = sg_virt(sg_current) + offset;
+		new_iv_phys = sg_dma_address(sg_current) + offset;
+	}
+
+	if (blockmode == DESC_OPMODE_CBC &&
+	    rctx->op_dir == MESON_DECRYPT) {
+		dma_sync_sg_for_cpu(mc->dev, sg_head,
+				    sg_nents(sg_head), new_iv_dir);
+		memcpy(ctx->areq->iv, new_iv, ivsize);
+	}
+
+	reinit_completion(&mc->chanlist[rctx->flow].complete);
+	meson_dma_start(mc, rctx->flow);
+	err = wait_for_completion_interruptible_timeout(&mc->chanlist[rctx->flow].complete,
 							msecs_to_jiffies(500));
 	if (err == 0) {
-		dev_err(mc->dev, "DMA timeout for flow %d\n", flow);
-		err = -EINVAL;
+		dev_err(mc->dev, "DMA timeout for flow %d\n", rctx->flow);
+		return -EINVAL;
 	} else if (err < 0) {
 		dev_err(mc->dev, "Waiting for DMA completion is failed (%d)\n", err);
-	} else {
-		/* No error */
-		err = 0;
+		return err;
 	}
 
-	dma_unmap_single(mc->dev, phykeyiv, keyivlen, DMA_TO_DEVICE);
+	if (blockmode == DESC_OPMODE_CBC &&
+	    rctx->op_dir == MESON_ENCRYPT) {
+		dma_sync_sg_for_cpu(mc->dev, sg_head,
+				    sg_nents(sg_head), new_iv_dir);
+		memcpy(ctx->areq->iv, new_iv, ivsize);
+	}
 
-	if (areq->src == areq->dst) {
-		dma_unmap_sg(mc->dev, areq->src, sg_nents(areq->src), DMA_BIDIRECTIONAL);
-	} else {
-		dma_unmap_sg(mc->dev, areq->src, sg_nents(areq->src), DMA_TO_DEVICE);
-		dma_unmap_sg(mc->dev, areq->dst, sg_nents(areq->dst), DMA_FROM_DEVICE);
+	ctx->tloffset = 0;
+
+	return 0;
+}
+
+static int meson_cipher(struct skcipher_request *areq)
+{
+	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq);
+	struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm);
+	struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(areq);
+	struct meson_dev *mc = op->mc;
+	struct skcipher_alg *alg = crypto_skcipher_alg(tfm);
+	struct meson_alg_template *algt;
+	struct cipher_ctx ctx = {
+		.areq = areq,
+		.src_offset = 0,
+		.dst_offset = 0,
+		.src_sg = areq->src,
+		.dst_sg = areq->dst,
+		.cryptlen = areq->cryptlen,
+	};
+	int err;
+
+	dev_dbg(mc->dev, "%s %s %u %x IV(%u) key=%u ctx.flow=%d\n", __func__,
+		crypto_tfm_alg_name(areq->base.tfm),
+		areq->cryptlen,
+		rctx->op_dir, crypto_skcipher_ivsize(tfm),
+		op->keylen, rctx->flow);
+
+	algt = container_of(alg, struct meson_alg_template, alg.skcipher.base);
+
+#ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG
+	algt->stat_req++;
+	mc->chanlist[rctx->flow].stat_req++;
+#endif
+
+	ctx.bkeyiv = kzalloc(48, GFP_KERNEL | GFP_DMA);
+	if (!ctx.bkeyiv)
+		return -ENOMEM;
+
+	memcpy(ctx.bkeyiv, op->key, op->keylen);
+	ctx.keyiv.len = op->keylen;
+	if (ctx.keyiv.len == AES_KEYSIZE_192)
+		ctx.keyiv.len = AES_MAX_KEY_SIZE;
+
+	ctx.keyiv.addr = dma_map_single(mc->dev, ctx.bkeyiv, ctx.keyiv.len,
+					DMA_TO_DEVICE);
+	err = dma_mapping_error(mc->dev, ctx.keyiv.addr);
+	if (err) {
+		dev_err(mc->dev, "Cannot DMA MAP KEY IV\n");
+		goto free_keyiv;
 	}
 
-	if (areq->iv && ivsize > 0) {
-		if (rctx->op_dir == MESON_DECRYPT) {
-			memcpy(areq->iv, backup_iv, ivsize);
-		} else {
-			scatterwalk_map_and_copy(areq->iv, areq->dst,
-						 areq->cryptlen - ivsize,
-						 ivsize, 0);
+	err = meson_map_scatterlist(areq, mc);
+	if (err)
+		goto unmap_keyiv;
+
+	ctx.tloffset = 0;
+
+	while (ctx.cryptlen) {
+		meson_setup_keyiv_descs(&ctx);
+
+		if (meson_setup_data_descs(&ctx)) {
+			err = meson_kick_hardware(&ctx);
+			if (err)
+				break;
+		}
+
+		if (ctx.src_offset == sg_dma_len(ctx.src_sg)) {
+			ctx.src_offset = 0;
+			ctx.src_sg = sg_next(ctx.src_sg);
+		}
+
+		if (ctx.dst_offset == sg_dma_len(ctx.dst_sg)) {
+			ctx.dst_offset = 0;
+			ctx.dst_sg = sg_next(ctx.dst_sg);
 		}
 	}
-theend:
-	kfree_sensitive(bkeyiv);
-	kfree_sensitive(backup_iv);
+
+	meson_unmap_scatterlist(areq, mc);
+
+unmap_keyiv:
+	dma_unmap_single(mc->dev, ctx.keyiv.addr, ctx.keyiv.len, DMA_TO_DEVICE);
+
+free_keyiv:
+	kfree_sensitive(ctx.bkeyiv);
 
 	return err;
 }
diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c
index 98e63e67aa6e..5fea95e9876b 100644
--- a/drivers/crypto/amlogic/amlogic-gxl-core.c
+++ b/drivers/crypto/amlogic/amlogic-gxl-core.c
@@ -258,6 +258,7 @@ static void meson_crypto_remove(struct platform_device *pdev)
 static const struct meson_pdata meson_gxl_pdata = {
 	.descs_reg = 0x0,
 	.status_reg = 0x4,
+	.setup_desc_cnt = 3,
 };
 
 static const struct of_device_id meson_crypto_of_match_table[] = {
diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h
index 1ab3462dea42..f3455babb52a 100644
--- a/drivers/crypto/amlogic/amlogic-gxl.h
+++ b/drivers/crypto/amlogic/amlogic-gxl.h
@@ -82,10 +82,12 @@ struct meson_flow {
  * struct meson_pdata - SoC series dependent data.
  * @reg_descs:	offset to descriptors register
  * @reg_status:	offset to status register
+ * @setup_desc_cnt:	number of setup descriptor to configure.
  */
 struct meson_pdata {
 	u32 descs_reg;
 	u32 status_reg;
+	u32 setup_desc_cnt;
 };
 
 /*
-- 
2.34.1



From avromanov at salutedevices.com  Tue Aug 20 07:56:10 2024
From: avromanov at salutedevices.com (Alexey Romanov)
Date: Tue, 20 Aug 2024 17:56:10 +0300
Subject: [PATCH v9 10/23] drivers: crypto: meson: avoid kzalloc in engine thread
In-Reply-To: <20240820145623.3500864-1-avromanov@salutedevices.com>
References: <20240820145623.3500864-1-avromanov@salutedevices.com>
Message-ID: <20240820145623.3500864-11-avromanov@salutedevices.com>

It makes no sense to allocate memory via kzalloc, we
can use static buffer, speedup data processing and
don't think about kfree() calls.

Signed-off-by: Alexey Romanov <avromanov at salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong at linaro.org>
---
 drivers/crypto/amlogic/amlogic-gxl-cipher.c | 52 +++++++++------------
 drivers/crypto/amlogic/amlogic-gxl.h        |  6 +--
 2 files changed, 26 insertions(+), 32 deletions(-)

diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c b/drivers/crypto/amlogic/amlogic-gxl-cipher.c
index 0d32d2e3ca3b..622e179320ff 100644
--- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c
+++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c
@@ -59,7 +59,7 @@ static bool meson_cipher_need_fallback(struct skcipher_request *areq)
 static int meson_cipher_do_fallback(struct skcipher_request *areq)
 {
 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq);
-	struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm);
+	struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx_dma(tfm);
 	struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(areq);
 	int err;
 #ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG
@@ -91,7 +91,6 @@ struct cipher_ctx {
 	struct skcipher_request *areq;
 	struct scatterlist *src_sg;
 	struct scatterlist *dst_sg;
-	void *bkeyiv;
 
 	unsigned int src_offset;
 	unsigned int dst_offset;
@@ -147,7 +146,7 @@ static void meson_setup_keyiv_descs(struct cipher_ctx *ctx)
 	struct skcipher_alg *alg = crypto_skcipher_alg(tfm);
 	struct meson_alg_template *algt = container_of(alg,
 		struct meson_alg_template, alg.skcipher.base);
-	struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm);
+	struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx_dma(tfm);
 	struct meson_dev *mc = op->mc;
 	unsigned int ivsize = crypto_skcipher_ivsize(tfm);
 	unsigned int blockmode = algt->blockmode;
@@ -157,7 +156,7 @@ static void meson_setup_keyiv_descs(struct cipher_ctx *ctx)
 		return;
 
 	if (blockmode == DESC_OPMODE_CBC) {
-		memcpy(ctx->bkeyiv + AES_MAX_KEY_SIZE, ctx->areq->iv, ivsize);
+		memcpy(op->keyiv + AES_MAX_KEY_SIZE, ctx->areq->iv, ivsize);
 		dma_sync_single_for_device(mc->dev, ctx->keyiv.addr,
 					   ctx->keyiv.len, DMA_TO_DEVICE);
 	}
@@ -179,7 +178,7 @@ static bool meson_setup_data_descs(struct cipher_ctx *ctx)
 {
 	struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(ctx->areq);
 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(ctx->areq);
-	struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm);
+	struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx_dma(tfm);
 	struct skcipher_alg *alg = crypto_skcipher_alg(tfm);
 	struct meson_alg_template *algt = container_of(alg,
 						       struct meson_alg_template,
@@ -222,7 +221,7 @@ static int meson_kick_hardware(struct cipher_ctx *ctx)
 {
 	struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(ctx->areq);
 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(ctx->areq);
-	struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm);
+	struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx_dma(tfm);
 	struct skcipher_alg *alg = crypto_skcipher_alg(tfm);
 	struct meson_alg_template *algt = container_of(alg,
 						       struct meson_alg_template,
@@ -294,7 +293,7 @@ static int meson_kick_hardware(struct cipher_ctx *ctx)
 static int meson_cipher(struct skcipher_request *areq)
 {
 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq);
-	struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm);
+	struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx_dma(tfm);
 	struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(areq);
 	struct meson_dev *mc = op->mc;
 	struct skcipher_alg *alg = crypto_skcipher_alg(tfm);
@@ -307,6 +306,7 @@ static int meson_cipher(struct skcipher_request *areq)
 		.dst_sg = areq->dst,
 		.cryptlen = areq->cryptlen,
 	};
+	unsigned int ivsize = crypto_skcipher_ivsize(tfm);
 	int err;
 
 	dev_dbg(mc->dev, "%s %s %u %x IV(%u) key=%u ctx.flow=%d\n", __func__,
@@ -322,21 +322,21 @@ static int meson_cipher(struct skcipher_request *areq)
 	mc->chanlist[rctx->flow].stat_req++;
 #endif
 
-	ctx.bkeyiv = kzalloc(48, GFP_KERNEL | GFP_DMA);
-	if (!ctx.bkeyiv)
-		return -ENOMEM;
-
-	memcpy(ctx.bkeyiv, op->key, op->keylen);
 	ctx.keyiv.len = op->keylen;
 	if (ctx.keyiv.len == AES_KEYSIZE_192)
 		ctx.keyiv.len = AES_MAX_KEY_SIZE;
 
-	ctx.keyiv.addr = dma_map_single(mc->dev, ctx.bkeyiv, ctx.keyiv.len,
+	if (algt->blockmode == DESC_OPMODE_CBC) {
+		memcpy(op->keyiv + AES_MAX_KEY_SIZE, areq->iv, ivsize);
+		ctx.keyiv.len = AES_MAX_KEY_SIZE + ivsize;
+	}
+
+	ctx.keyiv.addr = dma_map_single(mc->dev, op->keyiv, ctx.keyiv.len,
 					DMA_TO_DEVICE);
 	err = dma_mapping_error(mc->dev, ctx.keyiv.addr);
 	if (err) {
 		dev_err(mc->dev, "Cannot DMA MAP KEY IV\n");
-		goto free_keyiv;
+		return err;
 	}
 
 	err = meson_map_scatterlist(areq, mc);
@@ -370,9 +370,6 @@ static int meson_cipher(struct skcipher_request *areq)
 unmap_keyiv:
 	dma_unmap_single(mc->dev, ctx.keyiv.addr, ctx.keyiv.len, DMA_TO_DEVICE);
 
-free_keyiv:
-	kfree_sensitive(ctx.bkeyiv);
-
 	return err;
 }
 
@@ -392,7 +389,7 @@ int meson_handle_cipher_request(struct crypto_engine *engine, void *areq)
 static int meson_skdecrypt(struct skcipher_request *areq)
 {
 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq);
-	struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm);
+	struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx_dma(tfm);
 	struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(areq);
 	struct crypto_engine *engine;
 	int e;
@@ -410,7 +407,7 @@ static int meson_skdecrypt(struct skcipher_request *areq)
 static int meson_skencrypt(struct skcipher_request *areq)
 {
 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq);
-	struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm);
+	struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx_dma(tfm);
 	struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(areq);
 	struct crypto_engine *engine;
 	int e;
@@ -427,7 +424,7 @@ static int meson_skencrypt(struct skcipher_request *areq)
 
 static int meson_cipher_init(struct crypto_tfm *tfm)
 {
-	struct meson_cipher_tfm_ctx *op = crypto_tfm_ctx(tfm);
+	struct meson_cipher_tfm_ctx *op = crypto_tfm_ctx_dma(tfm);
 	struct meson_alg_template *algt;
 	const char *name = crypto_tfm_alg_name(tfm);
 	struct crypto_skcipher *sktfm = __crypto_skcipher_cast(tfm);
@@ -453,16 +450,15 @@ static int meson_cipher_init(struct crypto_tfm *tfm)
 
 static void meson_cipher_exit(struct crypto_tfm *tfm)
 {
-	struct meson_cipher_tfm_ctx *op = crypto_tfm_ctx(tfm);
+	struct meson_cipher_tfm_ctx *op = crypto_tfm_ctx_dma(tfm);
 
-	kfree_sensitive(op->key);
 	crypto_free_skcipher(op->fallback_tfm);
 }
 
 static int meson_aes_setkey(struct crypto_skcipher *tfm, const u8 *key,
 			    unsigned int keylen)
 {
-	struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm);
+	struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx_dma(tfm);
 	struct meson_dev *mc = op->mc;
 
 	switch (keylen) {
@@ -479,11 +475,9 @@ static int meson_aes_setkey(struct crypto_skcipher *tfm, const u8 *key,
 		dev_dbg(mc->dev, "ERROR: Invalid keylen %u\n", keylen);
 		return -EINVAL;
 	}
-	kfree_sensitive(op->key);
+
+	memcpy(op->keyiv, key, keylen);
 	op->keylen = keylen;
-	op->key = kmemdup(key, keylen, GFP_KERNEL | GFP_DMA);
-	if (!op->key)
-		return -ENOMEM;
 
 	return crypto_skcipher_setkey(op->fallback_tfm, key, keylen);
 }
@@ -501,7 +495,7 @@ static struct meson_alg_template algs[] = {
 			.cra_flags = CRYPTO_ALG_TYPE_SKCIPHER |
 				CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY |
 				CRYPTO_ALG_NEED_FALLBACK,
-			.cra_ctxsize = sizeof(struct meson_cipher_tfm_ctx),
+			.cra_ctxsize = sizeof(struct meson_cipher_tfm_ctx) + CRYPTO_DMA_PADDING,
 			.cra_module = THIS_MODULE,
 			.cra_alignmask = 0xf,
 			.cra_init = meson_cipher_init,
@@ -530,7 +524,7 @@ static struct meson_alg_template algs[] = {
 			.cra_flags = CRYPTO_ALG_TYPE_SKCIPHER |
 				CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY |
 				CRYPTO_ALG_NEED_FALLBACK,
-			.cra_ctxsize = sizeof(struct meson_cipher_tfm_ctx),
+			.cra_ctxsize = sizeof(struct meson_cipher_tfm_ctx) + CRYPTO_DMA_PADDING,
 			.cra_module = THIS_MODULE,
 			.cra_alignmask = 0xf,
 			.cra_init = meson_cipher_init,
diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h
index f3455babb52a..dc5218064f99 100644
--- a/drivers/crypto/amlogic/amlogic-gxl.h
+++ b/drivers/crypto/amlogic/amlogic-gxl.h
@@ -127,15 +127,15 @@ struct meson_cipher_req_ctx {
 
 /*
  * struct meson_cipher_tfm_ctx - context for a skcipher TFM
- * @key:		pointer to key data
+ * @keyiv:		key data
  * @keylen:		len of the key
  * @keymode:		The keymode(type and size of key) associated with this TFM
  * @mc:			pointer to the private data of driver handling this TFM
  * @fallback_tfm:	pointer to the fallback TFM
  */
 struct meson_cipher_tfm_ctx {
-	u32 *key;
-	u32 keylen;
+	u8 keyiv[AES_MAX_KEY_SIZE + AES_BLOCK_SIZE] ____cacheline_aligned;
+	u32 keylen ____cacheline_aligned;
 	u32 keymode;
 	struct meson_dev *mc;
 	struct crypto_skcipher *fallback_tfm;
-- 
2.34.1



From avromanov at salutedevices.com  Tue Aug 20 07:56:12 2024
From: avromanov at salutedevices.com (Alexey Romanov)
Date: Tue, 20 Aug 2024 17:56:12 +0300
Subject: [PATCH v9 12/23] drivers: crypto: meson: add support for AES-CTR
In-Reply-To: <20240820145623.3500864-1-avromanov@salutedevices.com>
References: <20240820145623.3500864-1-avromanov@salutedevices.com>
Message-ID: <20240820145623.3500864-13-avromanov@salutedevices.com>

This patch adds support for AES-CTR algorithm.
Tested via tcrypt and custom tests.

Signed-off-by: Alexey Romanov <avromanov at salutedevices.com>
---
 drivers/crypto/amlogic/amlogic-gxl-cipher.c | 59 +++++++++++++++++++--
 drivers/crypto/amlogic/amlogic-gxl-core.c   |  1 +
 drivers/crypto/amlogic/amlogic-gxl.h        |  2 +
 3 files changed, 58 insertions(+), 4 deletions(-)

diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c b/drivers/crypto/amlogic/amlogic-gxl-cipher.c
index 622e179320ff..5c5956a18744 100644
--- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c
+++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c
@@ -139,6 +139,15 @@ static void meson_unmap_scatterlist(struct skcipher_request *areq, struct meson_
 	}
 }
 
+static void reverse_keyiv(u32 *keyiv, u32 *iv)
+{
+	int size = AES_BLOCK_SIZE / sizeof(u32);
+	int i;
+
+	for (i = 0; i < size; i++)
+		*(keyiv + size - i - 1) = cpu_to_be32(*(iv + i));
+}
+
 static void meson_setup_keyiv_descs(struct cipher_ctx *ctx)
 {
 	struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(ctx->areq);
@@ -155,8 +164,12 @@ static void meson_setup_keyiv_descs(struct cipher_ctx *ctx)
 	if (ctx->tloffset)
 		return;
 
-	if (blockmode == DESC_OPMODE_CBC) {
-		memcpy(op->keyiv + AES_MAX_KEY_SIZE, ctx->areq->iv, ivsize);
+	if (blockmode == DESC_OPMODE_CBC || blockmode == DESC_OPMODE_CTR) {
+		if (blockmode == DESC_OPMODE_CTR && mc->pdata->reverse_keyiv)
+			reverse_keyiv((u32 *)(op->keyiv + AES_MAX_KEY_SIZE), (u32 *)ctx->areq->iv);
+		else
+			memcpy(op->keyiv + AES_MAX_KEY_SIZE, ctx->areq->iv, ivsize);
+
 		dma_sync_single_for_device(mc->dev, ctx->keyiv.addr,
 					   ctx->keyiv.len, DMA_TO_DEVICE);
 	}
@@ -187,6 +200,7 @@ static bool meson_setup_data_descs(struct cipher_ctx *ctx)
 	struct meson_desc *desc = &mc->chanlist[rctx->flow].tl[ctx->tloffset];
 	unsigned int blocksize = crypto_skcipher_blocksize(tfm);
 	unsigned int blockmode = algt->blockmode;
+	unsigned int ivsize = crypto_skcipher_ivsize(tfm);
 	unsigned int maxlen = rounddown(DESC_MAXLEN, blocksize);
 	unsigned int todo;
 	u32 v;
@@ -205,8 +219,15 @@ static bool meson_setup_data_descs(struct cipher_ctx *ctx)
 	ctx->src_offset += todo;
 	ctx->dst_offset += todo;
 
+	if (blockmode == DESC_OPMODE_CTR) {
+		unsigned int nblocks = todo / blocksize;
+
+		while (nblocks--)
+			crypto_inc(ctx->areq->iv, ivsize);
+	}
+
 	v = DESC_OWN | blockmode | op->keymode | todo;
-	if (rctx->op_dir == MESON_ENCRYPT)
+	if (rctx->op_dir == MESON_ENCRYPT || blockmode == DESC_OPMODE_CTR)
 		v |= DESC_ENCRYPTION;
 
 	if (!ctx->cryptlen || ctx->tloffset == MAXDESC)
@@ -326,7 +347,8 @@ static int meson_cipher(struct skcipher_request *areq)
 	if (ctx.keyiv.len == AES_KEYSIZE_192)
 		ctx.keyiv.len = AES_MAX_KEY_SIZE;
 
-	if (algt->blockmode == DESC_OPMODE_CBC) {
+	if (algt->blockmode == DESC_OPMODE_CBC ||
+	    algt->blockmode == DESC_OPMODE_CTR) {
 		memcpy(op->keyiv + AES_MAX_KEY_SIZE, areq->iv, ivsize);
 		ctx.keyiv.len = AES_MAX_KEY_SIZE + ivsize;
 	}
@@ -540,6 +562,35 @@ static struct meson_alg_template algs[] = {
 		.do_one_request = meson_handle_cipher_request,
 	},
 },
+{
+	.type = CRYPTO_ALG_TYPE_SKCIPHER,
+	.blockmode = DESC_OPMODE_CTR,
+	.alg.skcipher.base = {
+		.base = {
+			.cra_name = "ctr(aes)",
+			.cra_driver_name = "ctr-aes-gxl",
+			.cra_priority = 400,
+			.cra_blocksize = AES_BLOCK_SIZE,
+			.cra_flags = CRYPTO_ALG_TYPE_SKCIPHER |
+				CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY |
+				CRYPTO_ALG_NEED_FALLBACK,
+			.cra_ctxsize = sizeof(struct meson_cipher_tfm_ctx) + CRYPTO_DMA_PADDING,
+			.cra_module = THIS_MODULE,
+			.cra_alignmask = 0xf,
+			.cra_init = meson_cipher_init,
+			.cra_exit = meson_cipher_exit,
+		},
+		.min_keysize	= AES_MIN_KEY_SIZE,
+		.max_keysize	= AES_MAX_KEY_SIZE,
+		.ivsize		= AES_BLOCK_SIZE,
+		.setkey		= meson_aes_setkey,
+		.encrypt	= meson_skencrypt,
+		.decrypt	= meson_skdecrypt,
+	},
+	.alg.skcipher.op = {
+		.do_one_request = meson_handle_cipher_request,
+	},
+},
 };
 
 int meson_cipher_register(struct meson_dev *mc)
diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c
index a1aff009f913..2c8387906655 100644
--- a/drivers/crypto/amlogic/amlogic-gxl-core.c
+++ b/drivers/crypto/amlogic/amlogic-gxl-core.c
@@ -282,6 +282,7 @@ static const struct meson_pdata meson_gxl_pdata = {
 	.status_reg = 0x4,
 	.setup_desc_cnt = 3,
 	.hasher_supported = false,
+	.reverse_keyiv = true,
 };
 
 static const struct of_device_id meson_crypto_of_match_table[] = {
diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h
index cebdfd81f6e2..de11e174f03d 100644
--- a/drivers/crypto/amlogic/amlogic-gxl.h
+++ b/drivers/crypto/amlogic/amlogic-gxl.h
@@ -24,6 +24,7 @@
 
 #define DESC_OPMODE_ECB (0 << 26)
 #define DESC_OPMODE_CBC (1 << 26)
+#define DESC_OPMODE_CTR (2 << 26)
 #define DESC_OPMODE_SHA (0 << 26)
 
 #define DESC_MAXLEN GENMASK(16, 0)
@@ -103,6 +104,7 @@ struct meson_pdata {
 	u32 status_reg;
 	u32 setup_desc_cnt;
 	bool hasher_supported;
+	bool reverse_keyiv;
 };
 
 /*
-- 
2.34.1



From avromanov at salutedevices.com  Tue Aug 20 07:56:11 2024
From: avromanov at salutedevices.com (Alexey Romanov)
Date: Tue, 20 Aug 2024 17:56:11 +0300
Subject: [PATCH v9 11/23] drivers: crypto: meson: introduce hasher
In-Reply-To: <20240820145623.3500864-1-avromanov@salutedevices.com>
References: <20240820145623.3500864-1-avromanov@salutedevices.com>
Message-ID: <20240820145623.3500864-12-avromanov@salutedevices.com>

Introduce support for SHA1/SHA224/SHA256 hash algos.
Tested via tcrypt and custom tests.

Signed-off-by: Alexey Romanov <avromanov at salutedevices.com>
---
 drivers/crypto/amlogic/Makefile             |   2 +-
 drivers/crypto/amlogic/amlogic-gxl-core.c   |  25 +-
 drivers/crypto/amlogic/amlogic-gxl-hasher.c | 507 ++++++++++++++++++++
 drivers/crypto/amlogic/amlogic-gxl.h        |  51 ++
 4 files changed, 583 insertions(+), 2 deletions(-)
 create mode 100644 drivers/crypto/amlogic/amlogic-gxl-hasher.c

diff --git a/drivers/crypto/amlogic/Makefile b/drivers/crypto/amlogic/Makefile
index 39057e62c13e..4b6b388b7880 100644
--- a/drivers/crypto/amlogic/Makefile
+++ b/drivers/crypto/amlogic/Makefile
@@ -1,2 +1,2 @@
 obj-$(CONFIG_CRYPTO_DEV_AMLOGIC_GXL) += amlogic-gxl-crypto.o
-amlogic-gxl-crypto-y := amlogic-gxl-core.o amlogic-gxl-cipher.o
+amlogic-gxl-crypto-y := amlogic-gxl-core.o amlogic-gxl-cipher.o amlogic-gxl-hasher.o
diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c
index 5fea95e9876b..a1aff009f913 100644
--- a/drivers/crypto/amlogic/amlogic-gxl-core.c
+++ b/drivers/crypto/amlogic/amlogic-gxl-core.c
@@ -19,6 +19,9 @@
 #include <linux/of.h>
 #include <linux/of_device.h>
 #include <linux/platform_device.h>
+#include <crypto/internal/skcipher.h>
+#include <crypto/internal/hash.h>
+#include <linux/dma-mapping.h>
 
 #include "amlogic-gxl.h"
 
@@ -172,6 +175,15 @@ int meson_register_algs(struct meson_dev *mc, struct meson_alg_template *algs,
 				return err;
 			}
 			break;
+		case CRYPTO_ALG_TYPE_AHASH:
+			err = crypto_engine_register_ahash(&algs[i].alg.ahash);
+			if (err) {
+				dev_err(mc->dev, "Fail to register %s\n",
+					algs[i].alg.ahash.base.halg.base.cra_name);
+				meson_unregister_algs(mc, algs, count);
+				return err;
+			}
+			break;
 		}
 	}
 
@@ -190,6 +202,9 @@ void meson_unregister_algs(struct meson_dev *mc, struct meson_alg_template *algs
 		case CRYPTO_ALG_TYPE_SKCIPHER:
 			crypto_engine_unregister_skcipher(&algs[i].alg.skcipher);
 			break;
+		case CRYPTO_ALG_TYPE_AHASH:
+			crypto_engine_unregister_ahash(&algs[i].alg.ahash);
+			break;
 		}
 	}
 }
@@ -230,13 +245,20 @@ static int meson_crypto_probe(struct platform_device *pdev)
 
 		dbgfs_dir = debugfs_create_dir("gxl-crypto", NULL);
 		debugfs_create_file("stats", 0444, dbgfs_dir, mc, &meson_debugfs_fops);
-
 #ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG
 		mc->dbgfs_dir = dbgfs_dir;
 #endif
 	}
 
+	err = meson_hasher_register(mc);
+	if (err)
+		goto error_hasher;
+
 	return 0;
+
+error_hasher:
+	meson_cipher_unregister(mc);
+
 error_flow:
 	meson_free_chanlist(mc, mc->flow_cnt - 1);
 	return err;
@@ -259,6 +281,7 @@ static const struct meson_pdata meson_gxl_pdata = {
 	.descs_reg = 0x0,
 	.status_reg = 0x4,
 	.setup_desc_cnt = 3,
+	.hasher_supported = false,
 };
 
 static const struct of_device_id meson_crypto_of_match_table[] = {
diff --git a/drivers/crypto/amlogic/amlogic-gxl-hasher.c b/drivers/crypto/amlogic/amlogic-gxl-hasher.c
new file mode 100644
index 000000000000..ffc1b23438be
--- /dev/null
+++ b/drivers/crypto/amlogic/amlogic-gxl-hasher.c
@@ -0,0 +1,507 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Hardware asynchronous hasher for Amlogic SoC's.
+ *
+ * Copyright (c) 2023, SaluteDevices. All Rights Reserved.
+ *
+ * Author: Alexey Romanov <avromanov at salutedevices.com>
+ */
+
+#include <linux/crypto.h>
+#include <linux/device.h>
+#include <linux/dma-mapping.h>
+#include <linux/err.h>
+#include <crypto/internal/hash.h>
+#include <crypto/sha1.h>
+#include <crypto/sha2.h>
+
+#include "amlogic-gxl.h"
+
+static int meson_sha_init(struct ahash_request *req)
+{
+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
+	struct meson_hasher_tfm_ctx *tctx = crypto_ahash_ctx_dma(tfm);
+	struct meson_hasher_req_ctx *rctx = ahash_request_ctx(req);
+
+	memset(rctx, 0, sizeof(struct meson_hasher_req_ctx));
+
+	rctx->flow = meson_get_engine_number(tctx->mc);
+	rctx->begin_req = true;
+
+	return 0;
+}
+
+static int meson_sha_update(struct ahash_request *req)
+{
+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
+	struct meson_hasher_tfm_ctx *tctx = crypto_ahash_ctx_dma(tfm);
+	struct meson_hasher_req_ctx *rctx = ahash_request_ctx(req);
+	struct crypto_engine *engine = tctx->mc->chanlist[rctx->flow].engine;
+
+	return crypto_transfer_hash_request_to_engine(engine, req);
+}
+
+static int meson_sha_final(struct ahash_request *req)
+{
+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
+	struct meson_hasher_tfm_ctx *tctx = crypto_ahash_ctx_dma(tfm);
+	struct meson_hasher_req_ctx *rctx = ahash_request_ctx(req);
+	struct crypto_engine *engine = tctx->mc->chanlist[rctx->flow].engine;
+
+	rctx->final_req = true;
+
+	return crypto_transfer_hash_request_to_engine(engine, req);
+}
+
+static int meson_sha_digest(struct ahash_request *req)
+{
+	struct crypto_wait wait;
+	int ret;
+
+	crypto_init_wait(&wait);
+	ahash_request_set_callback(req, CRYPTO_TFM_REQ_MAY_SLEEP |
+					CRYPTO_TFM_REQ_MAY_BACKLOG,
+					crypto_req_done, &wait);
+
+	meson_sha_init(req);
+
+	ret = crypto_wait_req(meson_sha_update(req), &wait);
+	if (ret)
+		return ret;
+
+	return crypto_wait_req(meson_sha_final(req), &wait);
+}
+
+static int meson_hasher_req_map(struct ahash_request *req)
+{
+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
+	struct meson_hasher_tfm_ctx *tctx = crypto_ahash_ctx_dma(tfm);
+	struct meson_dev *mc = tctx->mc;
+	int ret;
+
+	if (!req->nbytes)
+		return 0;
+
+	ret = dma_map_sg(mc->dev, req->src, sg_nents(req->src), DMA_TO_DEVICE);
+	if (!ret) {
+		dev_err(mc->dev, "Cannot DMA MAP request data\n");
+		return -ENOMEM;
+	}
+
+	return 0;
+}
+
+static void meson_hasher_req_unmap(struct ahash_request *req)
+{
+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
+	struct meson_hasher_tfm_ctx *tctx = crypto_ahash_ctx_dma(tfm);
+	struct meson_dev *mc = tctx->mc;
+
+	if (!req->nbytes)
+		return;
+
+	dma_unmap_sg(mc->dev, req->src, sg_nents(req->src), DMA_TO_DEVICE);
+}
+
+struct hasher_ctx {
+	struct crypto_async_request *areq;
+
+	unsigned int tloffset;
+	unsigned int nbytes;
+	unsigned int todo;
+
+	dma_addr_t state_addr;
+	dma_addr_t src_addr;
+	unsigned int src_offset;
+	struct scatterlist *src_sg;
+};
+
+static bool meson_final(struct hasher_ctx *ctx)
+{
+	struct ahash_request *req = ahash_request_cast(ctx->areq);
+	struct meson_hasher_req_ctx *rctx = ahash_request_ctx(req);
+
+	return !ctx->nbytes && rctx->final_req;
+}
+
+static int meson_fill_partial_buffer(struct hasher_ctx *ctx, unsigned int len)
+{
+	struct ahash_request *req = ahash_request_cast(ctx->areq);
+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
+	struct meson_hasher_tfm_ctx *tctx = crypto_ahash_ctx_dma(tfm);
+	struct meson_hasher_req_ctx *rctx = ahash_request_ctx(req);
+	struct meson_dev *mc = tctx->mc;
+	unsigned int blocksize = crypto_ahash_blocksize(tfm);
+	unsigned int copy;
+
+	if (len) {
+		copy = min(blocksize - rctx->partial_size, len);
+		memcpy(rctx->partial + rctx->partial_size,
+		       sg_virt(ctx->src_sg) + ctx->src_offset, copy);
+
+		rctx->partial_size += copy;
+		ctx->nbytes -= copy;
+		ctx->src_offset += copy;
+	}
+
+	if (rctx->partial_size == blocksize || meson_final(ctx)) {
+		rctx->partial_addr = dma_map_single(mc->dev,
+						    rctx->partial,
+						    rctx->partial_size,
+						    DMA_TO_DEVICE);
+		if (dma_mapping_error(mc->dev, rctx->partial_addr)) {
+			dev_err(mc->dev, "Cannot DMA MAP SHA partial buffer\n");
+			return -ENOMEM;
+		}
+
+		rctx->partial_mapped = true;
+		ctx->todo = rctx->partial_size;
+		ctx->src_addr = rctx->partial_addr;
+	}
+
+	return 0;
+}
+
+static unsigned int meson_setup_data_descs(struct hasher_ctx *ctx)
+{
+	struct ahash_request *req = ahash_request_cast(ctx->areq);
+	struct meson_hasher_req_ctx *rctx = ahash_request_ctx(req);
+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
+	struct meson_hasher_tfm_ctx *tctx = crypto_ahash_ctx_dma(tfm);
+	struct meson_dev *mc = tctx->mc;
+	struct meson_flow *flow = &mc->chanlist[rctx->flow];
+	struct hash_alg_common *alg = crypto_hash_alg_common(tfm);
+	struct meson_alg_template *algt = container_of(alg,
+		struct meson_alg_template, alg.ahash.base.halg);
+	struct meson_desc *desc = &flow->tl[ctx->tloffset];
+	u32 v;
+
+	ctx->tloffset++;
+
+	v = DESC_OWN | DESC_ENCRYPTION | DESC_OPMODE_SHA |
+	    ctx->todo | algt->blockmode;
+	if (rctx->begin_req) {
+		rctx->begin_req = false;
+		v |= DESC_BEGIN;
+	}
+
+	if (!ctx->nbytes && rctx->final_req) {
+		rctx->final_req = false;
+		v |= DESC_END;
+	}
+
+	if (!ctx->nbytes || ctx->tloffset == MAXDESC || rctx->partial_mapped)
+		v |= DESC_LAST;
+
+	desc->t_src = cpu_to_le32(ctx->src_addr);
+	desc->t_dst = cpu_to_le32(ctx->state_addr);
+	desc->t_status = cpu_to_le32(v);
+
+	return v & DESC_LAST;
+}
+
+static int meson_kick_hardware(struct hasher_ctx *ctx)
+{
+	struct ahash_request *req = ahash_request_cast(ctx->areq);
+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
+	struct meson_hasher_req_ctx *rctx = ahash_request_ctx(req);
+	struct meson_hasher_tfm_ctx *tctx = crypto_ahash_ctx_dma(tfm);
+	struct meson_dev *mc = tctx->mc;
+	struct meson_flow *flow = &mc->chanlist[rctx->flow];
+	int ret;
+
+	reinit_completion(&flow->complete);
+	meson_dma_start(mc, rctx->flow);
+
+	ret = wait_for_completion_timeout(&flow->complete,
+					  msecs_to_jiffies(500));
+	if (ret == 0) {
+		dev_err(mc->dev, "DMA timeout for flow %d\n", rctx->flow);
+		return -EINVAL;
+	} else if (ret < 0) {
+		dev_err(mc->dev, "Waiting for DMA completion is failed (%d)\n", ret);
+		return ret;
+	}
+
+	if (rctx->partial_mapped) {
+		dma_unmap_single(mc->dev, rctx->partial_addr,
+				 rctx->partial_size,
+				 DMA_TO_DEVICE);
+		rctx->partial_size = 0;
+		rctx->partial_mapped = false;
+	}
+
+	ctx->tloffset = 0;
+
+	return 0;
+}
+
+static void meson_setup_state_descs(struct hasher_ctx *ctx)
+{
+	struct ahash_request *req = ahash_request_cast(ctx->areq);
+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
+	struct meson_hasher_req_ctx *rctx = ahash_request_ctx(req);
+	struct meson_hasher_tfm_ctx *tctx = crypto_ahash_ctx_dma(tfm);
+	struct meson_dev *mc = tctx->mc;
+	struct meson_desc *desc;
+	int i;
+
+	if (ctx->tloffset || rctx->begin_req)
+		return;
+
+	for (i = 0; i < mc->pdata->setup_desc_cnt; i++) {
+		int offset = i * 16;
+
+		desc = &mc->chanlist[rctx->flow].tl[ctx->tloffset];
+		desc->t_src = cpu_to_le32(ctx->state_addr + offset);
+		desc->t_dst = cpu_to_le32(offset);
+		desc->t_status = cpu_to_le32(MESON_SHA_BUFFER_SIZE |
+					     DESC_MODE_KEY | DESC_OWN);
+
+		ctx->tloffset++;
+	}
+}
+
+static int meson_hasher_do_one_request(struct crypto_engine *engine, void *areq)
+{
+	struct ahash_request *req = ahash_request_cast(areq);
+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
+	struct meson_hasher_tfm_ctx *tctx = crypto_ahash_ctx_dma(tfm);
+	struct meson_hasher_req_ctx *rctx = ahash_request_ctx(req);
+	struct meson_dev *mc = tctx->mc;
+	struct hasher_ctx ctx = {
+		.tloffset = 0,
+		.src_offset = 0,
+		.nbytes = rctx->final_req ? 0 : req->nbytes,
+		.src_sg = req->src,
+		.areq = areq,
+	};
+	unsigned int blocksize = crypto_ahash_blocksize(tfm);
+	unsigned int digest_size = crypto_ahash_digestsize(tfm);
+	bool final_req = rctx->final_req;
+	int ret;
+
+	ctx.state_addr = dma_map_single(mc->dev, rctx->state,
+					sizeof(rctx->state), DMA_BIDIRECTIONAL);
+	ret = dma_mapping_error(mc->dev, ctx.state_addr);
+	if (ret) {
+		dev_err(mc->dev, "Cannot DMA MAP SHA state buffer");
+		goto fail_map_single;
+	}
+
+	ret = meson_hasher_req_map(req);
+	if (ret)
+		goto fail_map_req;
+
+	for (;;) {
+		unsigned int len = ctx.src_sg ?
+			min(sg_dma_len(ctx.src_sg) - ctx.src_offset, ctx.nbytes) : 0;
+
+		ctx.src_addr = 0;
+		ctx.todo = 0;
+
+		if (!rctx->final_req && !ctx.nbytes)
+			break;
+
+		meson_setup_state_descs(&ctx);
+
+		if (rctx->partial_size && rctx->partial_size < blocksize) {
+			ret = meson_fill_partial_buffer(&ctx, len);
+			if (ret)
+				goto fail;
+		} else if (len && len < blocksize) {
+			memcpy(rctx->partial, sg_virt(ctx.src_sg) + ctx.src_offset, len);
+
+			rctx->partial_size = len;
+			ctx.nbytes -= len;
+			ctx.src_offset += len;
+		} else if (len) {
+			ctx.src_addr = sg_dma_address(ctx.src_sg) + ctx.src_offset;
+			ctx.todo = min(rounddown(DESC_MAXLEN, blocksize),
+				       rounddown(len, blocksize));
+			ctx.nbytes -= ctx.todo;
+			ctx.src_offset += ctx.todo;
+		}
+
+		if (ctx.src_sg && ctx.src_offset == sg_dma_len(ctx.src_sg)) {
+			ctx.src_offset = 0;
+			ctx.src_sg = sg_next(ctx.src_sg);
+		}
+
+		if (!ctx.todo && ctx.nbytes)
+			continue;
+
+		if (!ctx.todo && !rctx->final_req && !ctx.tloffset)
+			continue;
+
+		if (meson_setup_data_descs(&ctx)) {
+			ret = meson_kick_hardware(&ctx);
+			if (ret)
+				goto fail;
+		}
+	}
+
+fail:
+	meson_hasher_req_unmap(req);
+
+fail_map_req:
+	dma_unmap_single(mc->dev, ctx.state_addr, sizeof(rctx->state),
+			 DMA_BIDIRECTIONAL);
+
+fail_map_single:
+	if (final_req && ret == 0)
+		memcpy(req->result, rctx->state, digest_size);
+
+	local_bh_disable();
+	crypto_finalize_hash_request(engine, req, ret);
+	local_bh_enable();
+
+	return ret;
+}
+
+static int meson_hasher_export(struct ahash_request *req, void *out)
+{
+	struct meson_hasher_req_ctx *rctx = ahash_request_ctx(req);
+
+	memcpy(out, rctx, sizeof(*rctx));
+	return 0;
+}
+
+static int meson_hasher_import(struct ahash_request *req, const void *in)
+{
+	struct meson_hasher_req_ctx *rctx = ahash_request_ctx(req);
+
+	memcpy(rctx, in, sizeof(*rctx));
+	return 0;
+}
+
+static int meson_hasher_init(struct crypto_tfm *tfm)
+{
+	struct meson_hasher_tfm_ctx *tctx = crypto_tfm_ctx_dma(tfm);
+	struct crypto_ahash *atfm = __crypto_ahash_cast(tfm);
+	struct hash_alg_common *alg = crypto_hash_alg_common(atfm);
+	struct meson_alg_template *algt = container_of(alg,
+		struct meson_alg_template, alg.ahash.base.halg);
+
+	crypto_ahash_set_reqsize(atfm, crypto_ahash_statesize(atfm));
+
+	memset(tctx, 0, sizeof(struct meson_hasher_tfm_ctx));
+
+	tctx->mc = algt->mc;
+
+	return 0;
+}
+
+static struct meson_alg_template mc_algs[] = {
+{
+	.type = CRYPTO_ALG_TYPE_AHASH,
+	.blockmode = DESC_MODE_SHA1,
+	.alg.ahash.base = {
+		.halg = {
+			.base = {
+				.cra_name = "sha1",
+				.cra_driver_name = "sha1-gxl",
+				.cra_priority = 400,
+				.cra_blocksize = SHA1_BLOCK_SIZE,
+				.cra_flags = CRYPTO_ALG_ASYNC,
+				.cra_ctxsize = sizeof(struct meson_hasher_tfm_ctx) +
+					       CRYPTO_DMA_PADDING,
+				.cra_module = THIS_MODULE,
+				.cra_alignmask = 0,
+				.cra_init = meson_hasher_init,
+			},
+			.digestsize = SHA1_DIGEST_SIZE,
+			.statesize = sizeof(struct meson_hasher_req_ctx),
+		},
+		.init = meson_sha_init,
+		.update = meson_sha_update,
+		.final = meson_sha_final,
+		.digest = meson_sha_digest,
+		.export = meson_hasher_export,
+		.import = meson_hasher_import,
+	},
+	.alg.ahash.op = {
+		.do_one_request = meson_hasher_do_one_request,
+	},
+},
+{
+	.type = CRYPTO_ALG_TYPE_AHASH,
+	.blockmode = DESC_MODE_SHA224,
+	.alg.ahash.base = {
+		.halg = {
+			.base = {
+				.cra_name = "sha224",
+				.cra_driver_name = "sha224-gxl",
+				.cra_priority = 400,
+				.cra_blocksize = SHA224_BLOCK_SIZE,
+				.cra_flags = CRYPTO_ALG_ASYNC,
+				.cra_ctxsize = sizeof(struct meson_hasher_tfm_ctx) +
+					       CRYPTO_DMA_PADDING,
+				.cra_module = THIS_MODULE,
+				.cra_alignmask = 0,
+				.cra_init = meson_hasher_init,
+			},
+			.digestsize = SHA224_DIGEST_SIZE,
+			.statesize = sizeof(struct meson_hasher_req_ctx),
+		},
+		.init = meson_sha_init,
+		.update = meson_sha_update,
+		.final = meson_sha_final,
+		.digest = meson_sha_digest,
+		.export = meson_hasher_export,
+		.import = meson_hasher_import,
+	},
+	.alg.ahash.op = {
+		.do_one_request = meson_hasher_do_one_request,
+	},
+},
+{
+	.type = CRYPTO_ALG_TYPE_AHASH,
+	.blockmode = DESC_MODE_SHA256,
+	.alg.ahash.base = {
+		.halg = {
+			.base = {
+				.cra_name = "sha256",
+				.cra_driver_name = "sha256-gxl",
+				.cra_priority = 400,
+				.cra_blocksize = SHA256_BLOCK_SIZE,
+				.cra_flags = CRYPTO_ALG_ASYNC,
+				.cra_ctxsize = sizeof(struct meson_hasher_tfm_ctx) +
+					       CRYPTO_DMA_PADDING,
+				.cra_module = THIS_MODULE,
+				.cra_alignmask = 0,
+				.cra_init = meson_hasher_init,
+			},
+			.digestsize = SHA256_DIGEST_SIZE,
+			.statesize = sizeof(struct meson_hasher_req_ctx),
+		},
+		.init = meson_sha_init,
+		.update = meson_sha_update,
+		.final = meson_sha_final,
+		.digest = meson_sha_digest,
+		.export = meson_hasher_export,
+		.import = meson_hasher_import,
+	},
+	.alg.ahash.op = {
+		.do_one_request = meson_hasher_do_one_request,
+	},
+},
+};
+
+int meson_hasher_register(struct meson_dev *mc)
+{
+	if (!mc->pdata->hasher_supported) {
+		pr_info("amlogic-gxl-hasher: hasher not supported at current platform");
+		return 0;
+	}
+
+	return meson_register_algs(mc, mc_algs, ARRAY_SIZE(mc_algs));
+}
+
+void meson_hasher_unregister(struct meson_dev *mc)
+{
+	if (!mc->pdata->hasher_supported)
+		return;
+
+	meson_unregister_algs(mc, mc_algs, ARRAY_SIZE(mc_algs));
+}
diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h
index dc5218064f99..cebdfd81f6e2 100644
--- a/drivers/crypto/amlogic/amlogic-gxl.h
+++ b/drivers/crypto/amlogic/amlogic-gxl.h
@@ -5,6 +5,7 @@
  * Copyright (C) 2018-2019 Corentin LABBE <clabbe at baylibre.com>
  */
 #include <crypto/aes.h>
+#include <crypto/sha2.h>
 #include <crypto/engine.h>
 #include <crypto/skcipher.h>
 #include <linux/debugfs.h>
@@ -23,13 +24,25 @@
 
 #define DESC_OPMODE_ECB (0 << 26)
 #define DESC_OPMODE_CBC (1 << 26)
+#define DESC_OPMODE_SHA (0 << 26)
 
 #define DESC_MAXLEN GENMASK(16, 0)
 
+#define DESC_MODE_SHA1   (0x5 << 20)
+#define DESC_MODE_SHA224 (0x7 << 20)
+#define DESC_MODE_SHA256 (0x6 << 20)
+
 #define DESC_LAST BIT(18)
+#define DESC_BEGIN BIT(24)
+#define DESC_END BIT(25)
 #define DESC_ENCRYPTION BIT(28)
 #define DESC_OWN BIT(31)
 
+#define MESON_SHA_BUFFER_SIZE (SHA256_DIGEST_SIZE + 16)
+
+#define MESON_SHA_BEGIN BIT(1)
+#define MESON_SHA_FINAL BIT(2)
+
 /*
  * struct meson_desc - Descriptor for DMA operations
  * Note that without datasheet, some are unknown
@@ -83,11 +96,13 @@ struct meson_flow {
  * @reg_descs:	offset to descriptors register
  * @reg_status:	offset to status register
  * @setup_desc_cnt:	number of setup descriptor to configure.
+ * @hasher_supported:	indecates whether hasher is supported.
  */
 struct meson_pdata {
 	u32 descs_reg;
 	u32 status_reg;
 	u32 setup_desc_cnt;
+	bool hasher_supported;
 };
 
 /*
@@ -141,6 +156,38 @@ struct meson_cipher_tfm_ctx {
 	struct crypto_skcipher *fallback_tfm;
 };
 
+/*
+ * struct meson_hasher_req_ctx - context for a hasher request
+ * @state:		state data
+ * @partial:		partial buffer data. Contains sent data which
+ *			size < blocksize
+ * @partial_size:	size of the partial buffer
+ * @partial_addr:	physical address of partial buffer
+ * @partial_mapped:	indicates is partial buffer currently mapped or not
+ * @flags:		request flags (for example, is this final req or not)
+ * @flow:		the flow to use for this request
+ */
+struct meson_hasher_req_ctx {
+	u8 state[SHA256_DIGEST_SIZE + 16] ____cacheline_aligned;
+	u8 partial[SHA256_BLOCK_SIZE] ____cacheline_aligned;
+	unsigned int partial_size ____cacheline_aligned;
+	dma_addr_t partial_addr;
+	bool partial_mapped;
+
+	bool begin_req;
+	bool final_req;
+	int flow;
+};
+
+/*
+ * struct meson_hasher_tfm_ctx - context for a hasher TFM
+ * @enginectx:		crypto_engine used by this TFM
+ * @mc:			pointer to the private data of driver handling this TFM
+ */
+struct meson_hasher_tfm_ctx {
+	struct meson_dev *mc;
+};
+
 /*
  * struct meson_alg_template - crypto_alg template
  * @type:		the CRYPTO_ALG_TYPE for this template
@@ -155,6 +202,7 @@ struct meson_alg_template {
 	u32 blockmode;
 	union {
 		struct skcipher_engine_alg skcipher;
+		struct ahash_engine_alg ahash;
 	} alg;
 	struct meson_dev *mc;
 #ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG
@@ -178,3 +226,6 @@ int meson_cipher_register(struct meson_dev *mc);
 void meson_cipher_unregister(struct meson_dev *mc);
 void meson_cipher_debugfs_show(struct seq_file *seq, void *v);
 int meson_handle_cipher_request(struct crypto_engine *engine, void *areq);
+
+int meson_hasher_register(struct meson_dev *mc);
+void meson_hasher_unregister(struct meson_dev *mc);
-- 
2.34.1



From avromanov at salutedevices.com  Tue Aug 20 07:56:13 2024
From: avromanov at salutedevices.com (Alexey Romanov)
Date: Tue, 20 Aug 2024 17:56:13 +0300
Subject: [PATCH v9 13/23] drivers: crypto: meson: use fallback for 192-bit keys
In-Reply-To: <20240820145623.3500864-1-avromanov@salutedevices.com>
References: <20240820145623.3500864-1-avromanov@salutedevices.com>
Message-ID: <20240820145623.3500864-14-avromanov@salutedevices.com>

Unforunately, not all Amlogic SoC's have a 192-bit key
support for AES algo. In this case, use fallback.

Signed-off-by: Alexey Romanov <avromanov at salutedevices.com>
---
 drivers/crypto/amlogic/amlogic-gxl-cipher.c | 7 +++++++
 drivers/crypto/amlogic/amlogic-gxl-core.c   | 1 +
 drivers/crypto/amlogic/amlogic-gxl.h        | 2 ++
 3 files changed, 10 insertions(+)

diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c b/drivers/crypto/amlogic/amlogic-gxl-cipher.c
index 5c5956a18744..2c026edb60ed 100644
--- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c
+++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c
@@ -41,6 +41,13 @@ static bool meson_cipher_need_fallback_sg(struct skcipher_request *areq,
 
 static bool meson_cipher_need_fallback(struct skcipher_request *areq)
 {
+	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq);
+	struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx_dma(tfm);
+	struct meson_dev *mc = op->mc;
+
+	if (op->keymode == DESC_MODE_AES_192 && !mc->pdata->support_192bit_key)
+		return true;
+
 	if (areq->cryptlen == 0)
 		return true;
 
diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c
index 2c8387906655..4acacd925a21 100644
--- a/drivers/crypto/amlogic/amlogic-gxl-core.c
+++ b/drivers/crypto/amlogic/amlogic-gxl-core.c
@@ -283,6 +283,7 @@ static const struct meson_pdata meson_gxl_pdata = {
 	.setup_desc_cnt = 3,
 	.hasher_supported = false,
 	.reverse_keyiv = true,
+	.support_192bit_key = true,
 };
 
 static const struct of_device_id meson_crypto_of_match_table[] = {
diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h
index de11e174f03d..01913daf1bf4 100644
--- a/drivers/crypto/amlogic/amlogic-gxl.h
+++ b/drivers/crypto/amlogic/amlogic-gxl.h
@@ -98,6 +98,7 @@ struct meson_flow {
  * @reg_status:	offset to status register
  * @setup_desc_cnt:	number of setup descriptor to configure.
  * @hasher_supported:	indecates whether hasher is supported.
+ * @support_192bit_key:	indicates whether platform support AES 192-bit key
  */
 struct meson_pdata {
 	u32 descs_reg;
@@ -105,6 +106,7 @@ struct meson_pdata {
 	u32 setup_desc_cnt;
 	bool hasher_supported;
 	bool reverse_keyiv;
+	bool support_192bit_key;
 };
 
 /*
-- 
2.34.1



From avromanov at salutedevices.com  Tue Aug 20 07:56:14 2024
From: avromanov at salutedevices.com (Alexey Romanov)
Date: Tue, 20 Aug 2024 17:56:14 +0300
Subject: [PATCH v9 14/23] drivers: crypto: meson: add support for G12-series
In-Reply-To: <20240820145623.3500864-1-avromanov@salutedevices.com>
References: <20240820145623.3500864-1-avromanov@salutedevices.com>
Message-ID: <20240820145623.3500864-15-avromanov@salutedevices.com>

Tested via tcrypt module and with custom tests.

Signed-off-by: Alexey Romanov <avromanov at salutedevices.com>
---
 drivers/crypto/amlogic/amlogic-gxl-core.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c
index 4acacd925a21..928751a6fc31 100644
--- a/drivers/crypto/amlogic/amlogic-gxl-core.c
+++ b/drivers/crypto/amlogic/amlogic-gxl-core.c
@@ -286,11 +286,24 @@ static const struct meson_pdata meson_gxl_pdata = {
 	.support_192bit_key = true,
 };
 
+static const struct meson_pdata meson_g12a_pdata = {
+	.descs_reg = 0x0,
+	.status_reg = 0x8,
+	.setup_desc_cnt = 1,
+	.hasher_supported = true,
+	.reverse_keyiv = true,
+	.support_192bit_key = false,
+};
+
 static const struct of_device_id meson_crypto_of_match_table[] = {
 	{
 		.compatible = "amlogic,gxl-crypto",
 		.data = &meson_gxl_pdata,
 	},
+	{
+		.compatible = "amlogic,g12a-crypto",
+		.data = &meson_g12a_pdata,
+	},
 	{},
 };
 MODULE_DEVICE_TABLE(of, meson_crypto_of_match_table);
-- 
2.34.1



From avromanov at salutedevices.com  Tue Aug 20 07:56:15 2024
From: avromanov at salutedevices.com (Alexey Romanov)
Date: Tue, 20 Aug 2024 17:56:15 +0300
Subject: [PATCH v9 15/23] drivers: crypto: meson: add support for AXG-series
In-Reply-To: <20240820145623.3500864-1-avromanov@salutedevices.com>
References: <20240820145623.3500864-1-avromanov@salutedevices.com>
Message-ID: <20240820145623.3500864-16-avromanov@salutedevices.com>

Tested via tcrypt module and with custom tests.

Signed-off-by: Alexey Romanov <avromanov at salutedevices.com>
---
 drivers/crypto/amlogic/amlogic-gxl-core.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c
index 928751a6fc31..4275f467d1c6 100644
--- a/drivers/crypto/amlogic/amlogic-gxl-core.c
+++ b/drivers/crypto/amlogic/amlogic-gxl-core.c
@@ -295,6 +295,15 @@ static const struct meson_pdata meson_g12a_pdata = {
 	.support_192bit_key = false,
 };
 
+static const struct meson_pdata meson_axg_pdata = {
+	.descs_reg = 0x0,
+	.status_reg = 0x8,
+	.setup_desc_cnt = 3,
+	.hasher_supported = true,
+	.reverse_keyiv = true,
+	.support_192bit_key = true,
+};
+
 static const struct of_device_id meson_crypto_of_match_table[] = {
 	{
 		.compatible = "amlogic,gxl-crypto",
@@ -304,6 +313,10 @@ static const struct of_device_id meson_crypto_of_match_table[] = {
 		.compatible = "amlogic,g12a-crypto",
 		.data = &meson_g12a_pdata,
 	},
+	{
+		.compatible = "amlogic,axg-crypto",
+		.data = &meson_axg_pdata,
+	},
 	{},
 };
 MODULE_DEVICE_TABLE(of, meson_crypto_of_match_table);
-- 
2.34.1



From avromanov at salutedevices.com  Tue Aug 20 07:56:16 2024
From: avromanov at salutedevices.com (Alexey Romanov)
Date: Tue, 20 Aug 2024 17:56:16 +0300
Subject: [PATCH v9 16/23] drivers: crypto: meson: add support for A1-series
In-Reply-To: <20240820145623.3500864-1-avromanov@salutedevices.com>
References: <20240820145623.3500864-1-avromanov@salutedevices.com>
Message-ID: <20240820145623.3500864-17-avromanov@salutedevices.com>

This platform data also can be used for S4 as fallback.
Tested via tcrypt module and with custom tests.

Signed-off-by: Alexey Romanov <avromanov at salutedevices.com>
---
 drivers/crypto/amlogic/amlogic-gxl-core.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c
index 4275f467d1c6..43cedc10294f 100644
--- a/drivers/crypto/amlogic/amlogic-gxl-core.c
+++ b/drivers/crypto/amlogic/amlogic-gxl-core.c
@@ -304,6 +304,15 @@ static const struct meson_pdata meson_axg_pdata = {
 	.support_192bit_key = true,
 };
 
+static const struct meson_pdata meson_a1_pdata = {
+	.descs_reg = 0x0,
+	.status_reg = 0x8,
+	.setup_desc_cnt = 1,
+	.hasher_supported = true,
+	.reverse_keyiv = false,
+	.support_192bit_key = false,
+};
+
 static const struct of_device_id meson_crypto_of_match_table[] = {
 	{
 		.compatible = "amlogic,gxl-crypto",
@@ -317,6 +326,14 @@ static const struct of_device_id meson_crypto_of_match_table[] = {
 		.compatible = "amlogic,axg-crypto",
 		.data = &meson_axg_pdata,
 	},
+	{
+		.compatible = "amlogic,a1-crypto",
+		.data = &meson_a1_pdata,
+	},
+	{
+		.compatible = "amlogic,s4-crypto",
+		.data = &meson_a1_pdata,
+	},
 	{},
 };
 MODULE_DEVICE_TABLE(of, meson_crypto_of_match_table);
-- 
2.34.1



From avromanov at salutedevices.com  Tue Aug 20 07:56:17 2024
From: avromanov at salutedevices.com (Alexey Romanov)
Date: Tue, 20 Aug 2024 17:56:17 +0300
Subject: [PATCH v9 17/23] dt-bindings: crypto: meson: correct clk and remove second interrupt line
In-Reply-To: <20240820145623.3500864-1-avromanov@salutedevices.com>
References: <20240820145623.3500864-1-avromanov@salutedevices.com>
Message-ID: <20240820145623.3500864-18-avromanov@salutedevices.com>

GXL and newer SoC's uses the DMA engine (not blkmv) for crypto HW.
Crypto HW doesn't actually use the blkmv clk. At RTL level, crypto
engine is hard-wired to a clk81 (CLKID_CLK81). Drop clock-names
field from schema: name "blkmv" is invalid and "clk81" is confusing
and sounds like something global.

Also, GXL crypto IP isn't connected to the second interrupt line.
This binding is useless, there are no users of this line.
We must remove it from dt-bindings.

Fixes: 7f7d115dfb51 ("dt-bindings: crypto: Add DT bindings documentation for amlogic-crypto")
Signed-off-by: Alexey Romanov <avromanov at salutedevices.com>
---
 .../bindings/crypto/amlogic,gxl-crypto.yaml           | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)

diff --git a/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml b/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml
index 948e11ebe4ee..7300328de1d5 100644
--- a/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml
+++ b/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml
@@ -20,20 +20,18 @@ properties:
   interrupts:
     items:
       - description: Interrupt for flow 0
-      - description: Interrupt for flow 1
 
   clocks:
     maxItems: 1
 
-  clock-names:
-    const: blkmv
+  power-domains:
+    maxItems: 1
 
 required:
   - compatible
   - reg
   - interrupts
   - clocks
-  - clock-names
 
 additionalProperties: false
 
@@ -46,7 +44,6 @@ examples:
     crypto: crypto-engine at c883e000 {
         compatible = "amlogic,gxl-crypto";
         reg = <0xc883e000 0x36>;
-        interrupts = <GIC_SPI 188 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>;
-        clocks = <&clkc CLKID_BLKMV>;
-        clock-names = "blkmv";
+        interrupts = <GIC_SPI 188 IRQ_TYPE_EDGE_RISING>;
+        clocks = <&clkc CLKID_CLK81>;
     };
-- 
2.34.1



From avromanov at salutedevices.com  Tue Aug 20 07:56:18 2024
From: avromanov at salutedevices.com (Alexey Romanov)
Date: Tue, 20 Aug 2024 17:56:18 +0300
Subject: [PATCH v9 18/23] dt-bindings: crypto: meson: support new SoC's
In-Reply-To: <20240820145623.3500864-1-avromanov@salutedevices.com>
References: <20240820145623.3500864-1-avromanov@salutedevices.com>
Message-ID: <20240820145623.3500864-19-avromanov@salutedevices.com>

Now crypto module available at G12A/G12B/S4/A1/SM1/AXG.

1. Add new compatibles:
  - amlogic,g12a-crypto
  - amlogic,axg-crypto
  - amlogic,a1-crypto
  - amlogic,s4-crypto (uses a1-crypto as fallback)

Difference between this compatibles:
 * Different registers offset and the number of setup descriptors.
 * GXL doesn't support hashing like the others.
 * G12A/B and A1/S4 crypto HW don't support 192 AES key.
 * GXL, G12A/B and AXG require a reverse IV key before processing.

2. Add power-domains in schema, which is required only for A1.
This is specific vendor design: in old SoC's power domain for
crypto HW was not configurable, but in A1-series it is configurable.

Signed-off-by: Alexey Romanov <avromanov at salutedevices.com>
---
 .../bindings/crypto/amlogic,gxl-crypto.yaml   | 21 +++++++++++++++++--
 1 file changed, 19 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml b/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml
index 7300328de1d5..106a9d1fed69 100644
--- a/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml
+++ b/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml
@@ -11,8 +11,16 @@ maintainers:
 
 properties:
   compatible:
-    items:
-      - const: amlogic,gxl-crypto
+    oneOf:
+      - items:
+          - enum:
+              - amlogic,s4-crypto
+          - const: amlogic,a1-crypto
+      - enum:
+          - amlogic,gxl-crypto
+          - amlogic,axg-crypto
+          - amlogic,g12a-crypto
+          - amlogic,a1-crypto
 
   reg:
     maxItems: 1
@@ -33,6 +41,15 @@ required:
   - interrupts
   - clocks
 
+allOf:
+  - if:
+      properties:
+        compatible:
+          const: amlogic,a1-crypto
+    then:
+      required:
+        - power-domains
+
 additionalProperties: false
 
 examples:
-- 
2.34.1



From avromanov at salutedevices.com  Tue Aug 20 07:56:19 2024
From: avromanov at salutedevices.com (Alexey Romanov)
Date: Tue, 20 Aug 2024 17:56:19 +0300
Subject: [PATCH v9 19/23] arch: arm64: dts: meson: gxl: correct crypto node definition
In-Reply-To: <20240820145623.3500864-1-avromanov@salutedevices.com>
References: <20240820145623.3500864-1-avromanov@salutedevices.com>
Message-ID: <20240820145623.3500864-20-avromanov@salutedevices.com>

GXL and newer SoC's uses the DMA engine (not blkmv) for crypto HW.
Crypto HW doesn't actually use the blkmv clk. At RTL level, crypto
engine is hard weired to clk81 (CLKID_CLK81). And remove clock-names
field: according to the new dt-binding, it is no longer required.

Also, GXL crypto IP isn't to seconnd interrput line. So we must
remove it from dt-bindings.

Fixes: c4a0457eb858 ("ARM64: dts: amlogic: adds crypto hardware node")
Signed-off-by: Alexey Romanov <avromanov at salutedevices.com>
---
 arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
index 17bcfa4702e1..c29d5b81ce67 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
@@ -68,10 +68,8 @@ acodec: audio-controller at c8832000 {
 		crypto: crypto at c883e000 {
 			compatible = "amlogic,gxl-crypto";
 			reg = <0x0 0xc883e000 0x0 0x36>;
-			interrupts = <GIC_SPI 188 IRQ_TYPE_EDGE_RISING>,
-				     <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>;
-			clocks = <&clkc CLKID_BLKMV>;
-			clock-names = "blkmv";
+			interrupts = <GIC_SPI 188 IRQ_TYPE_EDGE_RISING>;
+			clocks = <&clkc CLKID_CLK81>;
 			status = "okay";
 		};
 	};
-- 
2.34.1



From avromanov at salutedevices.com  Tue Aug 20 07:56:20 2024
From: avromanov at salutedevices.com (Alexey Romanov)
Date: Tue, 20 Aug 2024 17:56:20 +0300
Subject: [PATCH v9 20/23] arch: arm64: dts: meson: a1: add crypto node
In-Reply-To: <20240820145623.3500864-1-avromanov@salutedevices.com>
References: <20240820145623.3500864-1-avromanov@salutedevices.com>
Message-ID: <20240820145623.3500864-21-avromanov@salutedevices.com>

This patch adds a crypto node declaration. With the
Amlogic crypto driver we can use HW implementation
of SHA1/224/256 and AES algo.

Signed-off-by: Alexey Romanov <avromanov at salutedevices.com>
---
 arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
index 42cd5381bad3..89dd09b9f231 100644
--- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
@@ -162,6 +162,12 @@ spifc: spi at fd000400 {
 			status = "disabled";
 		};
 
+		clk81: clk81 {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <64000000>;
+		};
+
 		apb: bus at fe000000 {
 			compatible = "simple-bus";
 			reg = <0x0 0xfe000000 0x0 0x1000000>;
@@ -972,6 +978,14 @@ sd_emmc: sd at 10000 {
 				status = "disabled";
 			};
 
+			crypto: crypto at 6000 {
+				compatible = "amlogic,a1-crypto";
+				reg = <0x0 0x6000 0x0 0x48>;
+				interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING>;
+				clocks = <&clk81>;
+				power-domains = <&pwrc PWRC_DMA_ID>;
+			};
+
 			acodec: audio-controller at 4800 {
 				compatible = "amlogic,t9015-a1";
 				reg = <0x0 0x4800 0x0 0x14>;
-- 
2.34.1



From avromanov at salutedevices.com  Tue Aug 20 07:56:21 2024
From: avromanov at salutedevices.com (Alexey Romanov)
Date: Tue, 20 Aug 2024 17:56:21 +0300
Subject: [PATCH v9 21/23] arch: arm64: dts: meson: s4: add crypto node
In-Reply-To: <20240820145623.3500864-1-avromanov@salutedevices.com>
References: <20240820145623.3500864-1-avromanov@salutedevices.com>
Message-ID: <20240820145623.3500864-22-avromanov@salutedevices.com>

This patch adds a crypto node declaration for Amlogic S4-series.
With the Amlogic crypto driver we can use HW implementation
of SHA1/224/256 and AES algo.

Signed-off-by: Alexey Romanov <avromanov at salutedevices.com>
---
 arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
index 10896f9df682..5f1ffddd63f1 100644
--- a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
@@ -94,6 +94,12 @@ gic: interrupt-controller at fff01000 {
 			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
 		};
 
+		clk81: clk81 {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <166000000>;
+		};
+
 		apb4: bus at fe000000 {
 			compatible = "simple-bus";
 			reg = <0x0 0xfe000000 0x0 0x480000>;
@@ -344,6 +350,13 @@ mux {
 
 			};
 
+			crypto: crypto at 440400 {
+				compatible = "amlogic,s4-crypto", "amlogic,a1-crypto";
+				reg = <0x0 0x440400 0x0 0x48>;
+				interrupts = <GIC_SPI 24 IRQ_TYPE_EDGE_RISING>;
+				clocks = <&clk81>;
+			};
+
 			gpio_intc: interrupt-controller at 4080 {
 				compatible = "amlogic,meson-s4-gpio-intc",
 					     "amlogic,meson-gpio-intc";
-- 
2.34.1



From avromanov at salutedevices.com  Tue Aug 20 07:56:22 2024
From: avromanov at salutedevices.com (Alexey Romanov)
Date: Tue, 20 Aug 2024 17:56:22 +0300
Subject: [PATCH v9 22/23] arch: arm64: dts: meson: g12: add crypto node
In-Reply-To: <20240820145623.3500864-1-avromanov@salutedevices.com>
References: <20240820145623.3500864-1-avromanov@salutedevices.com>
Message-ID: <20240820145623.3500864-23-avromanov@salutedevices.com>

This patch adds a crypto node declaration for Amlogic G12-series.
With the Amlogic crypto driver we can use HW implementation
of SHA1/224/256 and AES algo.

Signed-off-by: Alexey Romanov <avromanov at salutedevices.com>
---
 arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
index b058ed78faf0..28bce1602007 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
@@ -1728,6 +1728,13 @@ internal_ephy: ethernet-phy at 8 {
 					};
 				};
 			};
+
+			crypto: crypto at 3e000 {
+				compatible = "amlogic,g12a-crypto";
+				reg = <0x0 0x3e000 0x0 0x48>;
+				interrupts = <GIC_SPI 180 IRQ_TYPE_EDGE_RISING>;
+				clocks = <&clkc CLKID_CLK81>;
+			};
 		};
 
 		aobus: bus at ff800000 {
-- 
2.34.1



From avromanov at salutedevices.com  Tue Aug 20 07:56:23 2024
From: avromanov at salutedevices.com (Alexey Romanov)
Date: Tue, 20 Aug 2024 17:56:23 +0300
Subject: [PATCH v9 23/23] arch: arm64: dts: meson: axg: add crypto node
In-Reply-To: <20240820145623.3500864-1-avromanov@salutedevices.com>
References: <20240820145623.3500864-1-avromanov@salutedevices.com>
Message-ID: <20240820145623.3500864-24-avromanov@salutedevices.com>

This patch adds a crypto node declaration. With the
Amlogic crypto driver we can use HW implementation
of SHA1/224/256 and AES algo.

Signed-off-by: Alexey Romanov <avromanov at salutedevices.com>
---
 arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index 6d12b760b90f..a29a73c50856 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -294,6 +294,13 @@ ethmac: ethernet at ff3f0000 {
 			status = "disabled";
 		};
 
+		crypto: crypto at ff63e000 {
+			compatible = "amlogic,axg-crypto";
+			reg = <0x0 0xff63e000 0x0 0x48>;
+			interrupts = <GIC_SPI 180 IRQ_TYPE_EDGE_RISING>;
+			clocks = <&clkc CLKID_CLK81>;
+		};
+
 		pcie_phy: phy at ff644000 {
 			compatible = "amlogic,axg-pcie-phy";
 			reg = <0x0 0xff644000 0x0 0x1c>;
-- 
2.34.1



From neil.armstrong at linaro.org  Tue Aug 20 08:19:27 2024
From: neil.armstrong at linaro.org (neil.armstrong at linaro.org)
Date: Tue, 20 Aug 2024 17:19:27 +0200
Subject: [PATCH v9 00/23] Support more Amlogic SoC families in crypto
 driver
In-Reply-To: <20240820145623.3500864-1-avromanov@salutedevices.com>
References: <20240820145623.3500864-1-avromanov@salutedevices.com>
Message-ID: <6e535895-6a06-42f8-abf3-e3b7472c97e0@linaro.org>

Hi,

On 20/08/2024 16:56, Alexey Romanov wrote:
> Hello!
> 
> This patchset expand the funcionality of the Amlogic
> crypto driver by adding support for more SoC families:
> AXG, G12A, G12B, SM1, A1, S4.
> 
> Also specify and enable crypto node in device tree
> for reference Amlogic devices.
> 
> Tested on GXL, AXG, G12A/B, SM1, A1 and S4 devices via
> custom tests [1] and tcrypt module.

On which tree did you base yourself ? It fails to apply patch 20 on next-20240820 and 6.11-rc4

Neil

> 
> ---
> 
> Changes V1 -> V2 [2]:
> 
> - Rebased over linux-next.
> - Adjusted device tree bindings description.
> - A1 and S4 dts use their own compatible, which is a G12 fallback.
> 
> Changes V2 -> V3 [3]:
> 
> - Fix errors in dt-bindings and device tree.
> - Add new field in platform data, which determines
> whether clock controller should be used for crypto IP.
> - Place back MODULE_DEVICE_TABLE.
> - Correct commit messages.
> 
> Changes V3 -> V4 [4]:
> 
> - Update dt-bindings as per Krzysztof Kozlowski comments.
> - Fix bisection: get rid of compiler errors in some patches.
> 
> Changes V4 -> V5 [5]:
> 
> - Tested on GXL board:
>    1. Fix panic detected by Corentin Labbe [6].
>    2. Disable hasher backend for GXL: in its current realization
>       is doesn't work. And there are no examples or docs in the
>       vendor SDK.
> - Fix AES-CTR realization: legacy boards (gxl, g12, axg) requires
>    inversion of the keyiv at keys setup stage.
> - A1 now uses its own compatible string.
> - S4 uses A1 compatible as fallback.
> - Code fixes based on comments Neil Atrmstrong and Rob Herring.
> - Style fixes (set correct indentations)
> 
> Changes V5 -> V6 [7]:
> 
> - Fix DMA sync warning reported by Corentin Labbe [8].
> - Remove CLK input from driver. Remove clk definition
>    and second interrput line from crypto node inside GXL dtsi.
> 
> Changes V6 -> V7 [9]:
> 
> - Fix dt-schema: power domain now required only for A1.
> - Use crypto_skcipher_ctx_dma() helper for cipher instead of
>    ____cacheline_aligned.
> - Add import/export functions for hasher.
> - Fix commit message for patch 17, acorrding to discussion [10].
> 
> Changes V7 -> V8 [11]:
> 
> - Test patchset with CONFIG_CRYPTO_MANAGER_EXTRA_TESTS: fix some bugs
>    in hasher logic.
> - Use crypto crypto_ahash_ctx_dma in hasher code.
> - Correct clock definition: clk81 is required for all SoC's.
> - Add fixed-clock (clk81) definition for A1/S4.
> - Add information (in commit messages) why different compatibles are used.
> 
> Changes V8 -> V9 [12]:
> 
> - Remove required field clk-names from dt-schema according to Rob Herring
> recommendation [13].
> - Fix commit order: all dt-bindings schema commits now located earlier
> than any changes in device tree.
> - Fix typos and add more clarifications in dt-schema patches.
> 
> Links:
>    - [1] https://gist.github.com/mRrvz/3fb8943a7487ab7b943ec140706995e7
>    - [2] https://lore.kernel.org/all/20240110201216.18016-1-avromanov at salutedevices.com/
>    - [3] https://lore.kernel.org/all/20240123165831.970023-1-avromanov at salutedevices.com/
>    - [4] https://lore.kernel.org/all/20240205155521.1795552-1-avromanov at salutedevices.com/
>    - [5] https://lore.kernel.org/all/20240212135108.549755-1-avromanov at salutedevices.com/
>    - [6] https://lore.kernel.org/all/ZcsYaPIUrBSg8iXu at Red/
>    - [7] https://lore.kernel.org/all/20240301132936.621238-1-avromanov at salutedevices.com/
>    - [8] https://lore.kernel.org/all/Zf1BAlYtiwPOG-Os at Red/
>    - [9] https://lore.kernel.org/all/20240326153219.2915080-1-avromanov at salutedevices.com/
>    - [10] https://lore.kernel.org/all/20240329-dotted-illusive-9f0593805a05 at wendy/
>    - [11] https://lore.kernel.org/all/20240411133832.2896463-1-avromanov at salutedevices.com/
>    - [12] https://lore.kernel.org/all/20240607141242.2616580-1-avromanov at salutedevices.com/
>    - [13] https://lore.kernel.org/all/20240610222827.GA3166929-robh at kernel.org/
> 
> Alexey Romanov (23):
>    drivers: crypto: meson: don't hardcode IRQ count
>    drviers: crypto: meson: add platform data
>    drivers: crypto: meson: remove clock input
>    drivers: crypto: meson: add MMIO helpers
>    drivers: crypto: meson: move get_engine_number()
>    drivers: crypto: meson: drop status field from meson_flow
>    drivers: crypto: meson: move algs definition and cipher API to
>      cipher.c
>    drivers: crypto: meson: cleanup defines
>    drivers: crypto: meson: process more than MAXDESCS descriptors
>    drivers: crypto: meson: avoid kzalloc in engine thread
>    drivers: crypto: meson: introduce hasher
>    drivers: crypto: meson: add support for AES-CTR
>    drivers: crypto: meson: use fallback for 192-bit keys
>    drivers: crypto: meson: add support for G12-series
>    drivers: crypto: meson: add support for AXG-series
>    drivers: crypto: meson: add support for A1-series
>    dt-bindings: crypto: meson: correct clk and remove second interrupt
>      line
>    dt-bindings: crypto: meson: support new SoC's
>    arch: arm64: dts: meson: gxl: correct crypto node definition
>    arch: arm64: dts: meson: a1: add crypto node
>    arch: arm64: dts: meson: s4: add crypto node
>    arch: arm64: dts: meson: g12: add crypto node
>    arch: arm64: dts: meson: axg: add crypto node
> 
>   .../bindings/crypto/amlogic,gxl-crypto.yaml   |  32 +-
>   arch/arm64/boot/dts/amlogic/meson-a1.dtsi     |  14 +
>   arch/arm64/boot/dts/amlogic/meson-axg.dtsi    |   7 +
>   .../boot/dts/amlogic/meson-g12-common.dtsi    |   7 +
>   arch/arm64/boot/dts/amlogic/meson-gxl.dtsi    |   6 +-
>   arch/arm64/boot/dts/amlogic/meson-s4.dtsi     |  13 +
>   drivers/crypto/amlogic/Makefile               |   2 +-
>   drivers/crypto/amlogic/amlogic-gxl-cipher.c   | 632 ++++++++++++------
>   drivers/crypto/amlogic/amlogic-gxl-core.c     | 292 ++++----
>   drivers/crypto/amlogic/amlogic-gxl-hasher.c   | 507 ++++++++++++++
>   drivers/crypto/amlogic/amlogic-gxl.h          | 118 +++-
>   11 files changed, 1269 insertions(+), 361 deletions(-)
>   create mode 100644 drivers/crypto/amlogic/amlogic-gxl-hasher.c
> 



From neil.armstrong at linaro.org  Tue Aug 20 08:21:03 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Tue, 20 Aug 2024 17:21:03 +0200
Subject: [PATCH v2 3/3] arm64: dts: amlogic: add C3 AW419 board
In-Reply-To: <20240820-c3_add_node-v2-3-8fd3f06b7bce@amlogic.com>
References: <20240820-c3_add_node-v2-0-8fd3f06b7bce@amlogic.com>
 <20240820-c3_add_node-v2-3-8fd3f06b7bce@amlogic.com>
Message-ID: <50004796-8229-4d4a-b7bf-11d27c90518b@linaro.org>

On 20/08/2024 11:41, Xianwei Zhao via B4 Relay wrote:
> From: Xianwei Zhao <xianwei.zhao at amlogic.com>
> 
> Add Amlogic C3 C308L AW419 board. The corresponding binding
> has been applied, therefore, this series does not need to
> add a binding corresponding to the AW419 board.
> 
> Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
> ---
>   arch/arm64/boot/dts/amlogic/Makefile               |   1 +
>   .../boot/dts/amlogic/amlogic-c3-c308l-aw419.dts    | 262 +++++++++++++++++++++
>   2 files changed, 263 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
> index 29417f04f886..2fbda8419c65 100644
> --- a/arch/arm64/boot/dts/amlogic/Makefile
> +++ b/arch/arm64/boot/dts/amlogic/Makefile
> @@ -2,6 +2,7 @@
>   dtb-$(CONFIG_ARCH_MESON) += amlogic-a4-a113l2-ba400.dtb
>   dtb-$(CONFIG_ARCH_MESON) += amlogic-a5-a113x2-av400.dtb
>   dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c302x-aw409.dtb
> +dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c308l-aw419.dtb
>   dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-an400.dtb
>   dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
>   dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3-c308l-aw419.dts b/arch/arm64/boot/dts/amlogic/amlogic-c3-c308l-aw419.dts
> new file mode 100644
> index 000000000000..4477a2659e27
> --- /dev/null
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-c3-c308l-aw419.dts
> @@ -0,0 +1,262 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
> + */
> +
> +/dts-v1/;
> +
> +#include "amlogic-c3.dtsi"
> +
> +/ {
> +	model = "Amlogic C308l aw419 Development Board";
> +	compatible = "amlogic,aw419", "amlogic,c3";
> +	interrupt-parent = <&gic>;
> +	#address-cells = <2>;
> +	#size-cells = <2>;
> +
> +	aliases {
> +		serial0 = &uart_b;
> +		spi0 = &spifc;
> +	};
> +
> +	memory at 0 {
> +		device_type = "memory";
> +		reg = <0x0 0x0 0x0 0x80000000>;
> +	};
> +
> +	reserved-memory {
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges;
> +
> +		/* 9 MiB reserved for ARM Trusted Firmware */
> +		secmon_reserved: secmon at 7f00000 {
> +			compatible = "shared-dma-pool";
> +			reg = <0x0 0x07f00000 0x0 0x900000>;
> +			no-map;
> +		};
> +	};
> +
> +	main_12v: regulator-main-12v {
> +		compatible = "regulator-fixed";
> +		regulator-name = "12V";
> +		regulator-min-microvolt = <12000000>;
> +		regulator-max-microvolt = <12000000>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	vcc_5v: regulator-vcc-5v {
> +		compatible = "regulator-fixed";
> +		regulator-name = "VCC5V";
> +		regulator-min-microvolt = <5000000>;
> +		regulator-max-microvolt = <5000000>;
> +		vin-supply = <&main_12v>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	vddq: regulator-vddq {
> +		compatible = "regulator-fixed";
> +		regulator-name = "VDDQ";
> +		regulator-min-microvolt = <1200000>;
> +		regulator-max-microvolt = <1200000>;
> +		vin-supply = <&main_12v>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	vddao_3v3: regulator-vddao-3v3 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "VDDAO3V3";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		vin-supply = <&main_12v>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	vddao_1v8: regulator-vddao-1v8 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "VDDAO1V8";
> +		regulator-min-microvolt = <1800000>;
> +		regulator-max-microvolt = <1800000>;
> +		vin-supply = <&vddao_3v3>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	ddr4_2v5: regulator-ddr4-2v5 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "DDR4_2V5";
> +		regulator-min-microvolt = <2500000>;
> +		regulator-max-microvolt = <2500000>;
> +		vin-supply = <&vddao_3v3>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	vcc_3v3: regulator-vcc-3v3 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "VCC3V3";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		vin-supply = <&vddao_3v3>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	vcc_1v8: regulator-vcc-1v8 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "VCC1V8";
> +		regulator-min-microvolt = <1800000>;
> +		regulator-max-microvolt = <1800000>;
> +		vin-supply = <&vcc_3v3>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	vdd_1v8: regulator-vdd-1v8 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "VDD1V8_BOOT";
> +		regulator-min-microvolt = <1800000>;
> +		regulator-max-microvolt = <1800000>;
> +		vin-supply = <&vcc_3v3>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	vddio_b: regulator-vddio-3v3-b {
> +		compatible = "regulator-fixed";
> +		regulator-name = "VDDIO_B";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		vin-supply = <&vcc_3v3>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	sdcard: regulator-sdcard {
> +		compatible = "regulator-fixed";
> +		regulator-name = "SDCARD_POWER";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		vin-supply = <&vddao_3v3>;
> +		gpio = <&gpio GPIOA_4 GPIO_ACTIVE_LOW>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +};
> +
> +&uart_b {
> +	status = "okay";
> +};
> +
> +&nand {
> +	status = "okay";
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +
> +	pinctrl-0 = <&nand_pins>;
> +	pinctrl-names = "default";
> +
> +	nand at 0 {
> +		reg = <0>;
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		nand-on-flash-bbt;
> +
> +		partition at 0 {
> +			label = "boot";
> +			reg = <0x0 0x00200000>;
> +		};
> +		partition at 200000 {
> +			label = "env";
> +			reg = <0x00200000 0x00400000>;
> +		};
> +		partition at 600000 {
> +			label = "system";
> +			reg = <0x00600000 0x00a00000>;
> +		};
> +		partition at 1000000 {
> +			label = "rootfs";
> +			reg = <0x01000000 0x03000000>;
> +		};
> +		partition at 4000000 {
> +			label = "media";
> +			reg = <0x04000000 0x8000000>;
> +		};
> +	};
> +};
> +
> +&ethmac {
> +	status = "okay";
> +	phy-handle = <&internal_ephy>;
> +	phy-mode = "rmii";
> +};
> +
> +&spifc {
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +
> +	pinctrl-0 = <&spifc_pins>;
> +	pinctrl-names = "default";
> +
> +	nand at 0 {
> +		compatible = "spi-nand";
> +		reg = <0>;
> +		spi-max-frequency = <83000000>;
> +		spi-tx-bus-width = <4>;
> +		spi-rx-bus-width = <4>;
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		status = "disabled";
> +
> +		partitions {
> +			compatible = "fixed-partitions";
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +
> +			partition at 0 {
> +				label = "boot";
> +				reg = <0 0x200000>;
> +			};
> +
> +			partition at 200000 {
> +				label = "env";
> +				reg = <0x200000 0x400000>;
> +			};
> +
> +			partition at 600000 {
> +				label = "system";
> +				reg = <0x600000 0xa00000>;
> +			};
> +
> +			partition at 1000000 {
> +				label = "rootfs";
> +				reg = <0x1000000 0x3000000>;
> +			};
> +
> +			partition at 4000000 {
> +				label = "data";
> +				reg = <0x4000000 0x8000000>;
> +			};
> +		};
> +	};
> +};
> +
> +&sd {
> +	status = "okay";
> +	pinctrl-0 = <&sdcard_pins>;
> +	pinctrl-1 = <&sdcard_clk_gate_pins>;
> +	pinctrl-names = "default","clk-gate";
> +
> +	bus-width = <4>;
> +	cap-sd-highspeed;
> +	max-frequency = <50000000>;
> +	disable-wp;
> +
> +	cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
> +	vmmc-supply = <&sdcard>;
> +	vqmmc-supply = <&sdcard>;
> +};
> 

Reviewed-by: Neil Armstrong <neil.armstrong at linaro.org>


From neil.armstrong at linaro.org  Tue Aug 20 08:22:03 2024
From: neil.armstrong at linaro.org (neil.armstrong at linaro.org)
Date: Tue, 20 Aug 2024 17:22:03 +0200
Subject: [PATCH v3 2/2] arm64: dts: amlogic: add support for Radxa ZERO 2
 Pro
In-Reply-To: <20240712215111.687478-2-naoki@radxa.com>
References: <20240712215111.687478-1-naoki@radxa.com>
 <20240712215111.687478-2-naoki@radxa.com>
Message-ID: <2e2fc3fc-33bc-4019-a3e5-9095cd7247c3@linaro.org>

On 12/07/2024 23:51, FUKAUMI Naoki wrote:
> Radxa ZERO 2 Pro is a ultra tiny high performance SBC[1] using the
> Amlogic A311D chip that ships in a number of eMMC configurations:
> 
> - Amlogic A311D SoC
> - Quad A73 + Dual A53 CPU
> - Mali G52-MP4 GPU
> - NPU (5 TOPs)
> - 4GB LPDDR4 RAM
> - 32/64/128GB eMMC
> - micro SD Card slot
> - Wi-Fi 5 and BT 5.0
> - 1x USB 2.0 Type-C port (OTG)
> - 1x USB 3.0 Type-C port (Host)
> - Micro HDMI 2.0
> - MIPI DSI
> - MIPI CSI
> - 40 Pin GPIO header
> 
> [1] https://radxa.com/products/zeros/zero2pro
> 
> Signed-off-by: FUKAUMI Naoki <naoki at radxa.com>
> ---
> Changes in v3:
> - fix file name and compatible string to use "zero-2-pro"
> - add missing --- in commit message
> Changes in v2:
> - fix dtb build error
> ---
>   arch/arm64/boot/dts/amlogic/Makefile          |   1 +
>   .../amlogic/meson-g12b-radxa-zero-2-pro.dts   |  14 +
>   .../dts/amlogic/meson-g12b-radxa-zero2.dts    | 527 +-----------------
>   ...-zero2.dts => meson-g12b-radxa-zero2.dtsi} |   6 +-
>   4 files changed, 30 insertions(+), 518 deletions(-)
>   create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero-2-pro.dts
>   rewrite arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts (98%)
>   copy arch/arm64/boot/dts/amlogic/{meson-g12b-radxa-zero2.dts => meson-g12b-radxa-zero2.dtsi} (98%)
> 
> diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
> index 29417f04f886..9708abdadd7c 100644
> --- a/arch/arm64/boot/dts/amlogic/Makefile
> +++ b/arch/arm64/boot/dts/amlogic/Makefile
> @@ -31,6 +31,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-g12b-odroid-go-ultra.dtb
>   dtb-$(CONFIG_ARCH_MESON) += meson-g12b-odroid-n2-plus.dtb
>   dtb-$(CONFIG_ARCH_MESON) += meson-g12b-odroid-n2.dtb
>   dtb-$(CONFIG_ARCH_MESON) += meson-g12b-odroid-n2l.dtb
> +dtb-$(CONFIG_ARCH_MESON) += meson-g12b-radxa-zero-2-pro.dtb
>   dtb-$(CONFIG_ARCH_MESON) += meson-g12b-radxa-zero2.dtb
>   dtb-$(CONFIG_ARCH_MESON) += meson-g12b-s922x-bananapi-m2s.dtb
>   dtb-$(CONFIG_ARCH_MESON) += meson-g12b-s922x-khadas-vim3.dtb
> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero-2-pro.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero-2-pro.dts
> new file mode 100644
> index 000000000000..5c9959cd60c6
> --- /dev/null
> +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero-2-pro.dts
> @@ -0,0 +1,14 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +
> +/dts-v1/;
> +
> +#include "meson-g12b-radxa-zero2.dtsi"
> +
> +/ {
> +	compatible = "radxa,zero-2-pro", "amlogic,a311d", "amlogic,g12b";
> +	model = "Radxa ZERO 2 Pro";
> +};
> +
> +&sound {
> +	model = "RADXA-ZERO2PRO";
> +};
> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts
> dissimilarity index 98%
> index 8445701100d0..b4734cb63aaa 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts
> +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts
> @@ -1,513 +1,14 @@
> -// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> -/*
> - * Copyright (c) 2019 BayLibre, SAS
> - * Author: Neil Armstrong <narmstrong at baylibre.com>
> - * Copyright (c) 2019 Christian Hewitt <christianshewitt at gmail.com>
> - * Copyright (c) 2022 Radxa Limited
> - * Author: Yuntian Zhang <yt at radxa.com>
> - */
> -
> -/dts-v1/;
> -
> -#include "meson-g12b-a311d.dtsi"
> -#include <dt-bindings/input/input.h>
> -#include <dt-bindings/leds/common.h>
> -#include <dt-bindings/gpio/meson-g12a-gpio.h>
> -#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
> -
> -/ {
> -	compatible = "radxa,zero2", "amlogic,a311d", "amlogic,g12b";
> -	model = "Radxa Zero2";
> -
> -	aliases {
> -		serial0 = &uart_AO;
> -		serial2 = &uart_A;
> -	};
> -
> -	chosen {
> -		stdout-path = "serial0:115200n8";
> -	};
> -
> -	memory at 0 {
> -		device_type = "memory";
> -		reg = <0x0 0x0 0x0 0x80000000>;
> -	};
> -
> -	fan0: pwm-fan {
> -		compatible = "pwm-fan";
> -		#cooling-cells = <2>;
> -		cooling-levels = <0 64 128 192 255>;
> -		pwms = <&pwm_AO_ab 0 40000 0>;
> -	};
> -
> -	gpio-keys-polled {
> -		compatible = "gpio-keys-polled";
> -		poll-interval = <100>;
> -		power-button {
> -			label = "power";
> -			linux,code = <KEY_POWER>;
> -			gpios = <&gpio_ao GPIOAO_3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
> -		};
> -	};
> -
> -	leds {
> -		compatible = "gpio-leds";
> -
> -		led-green {
> -			color = <LED_COLOR_ID_GREEN>;
> -			function = LED_FUNCTION_STATUS;
> -			gpios = <&gpio GPIOA_12 GPIO_ACTIVE_HIGH>;
> -			linux,default-trigger = "heartbeat";
> -		};
> -	};
> -
> -	hdmi-connector {
> -		compatible = "hdmi-connector";
> -		type = "a";
> -
> -		port {
> -			hdmi_connector_in: endpoint {
> -				remote-endpoint = <&hdmi_tx_tmds_out>;
> -			};
> -		};
> -	};
> -
> -	emmc_pwrseq: emmc-pwrseq {
> -		compatible = "mmc-pwrseq-emmc";
> -		reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
> -	};
> -
> -	sdio_pwrseq: sdio-pwrseq {
> -		compatible = "mmc-pwrseq-simple";
> -		reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
> -		clocks = <&wifi32k>;
> -		clock-names = "ext_clock";
> -	};
> -
> -	ao_5v: regulator-ao-5v {
> -		compatible = "regulator-fixed";
> -		regulator-name = "AO_5V";
> -		regulator-min-microvolt = <5000000>;
> -		regulator-max-microvolt = <5000000>;
> -		regulator-always-on;
> -	};
> -
> -	vcc_1v8: regulator-vcc-1v8 {
> -		compatible = "regulator-fixed";
> -		regulator-name = "VCC_1V8";
> -		regulator-min-microvolt = <1800000>;
> -		regulator-max-microvolt = <1800000>;
> -		vin-supply = <&vcc_3v3>;
> -		regulator-always-on;
> -	};
> -
> -	vcc_3v3: regulator-vcc-3v3 {
> -		compatible = "regulator-fixed";
> -		regulator-name = "VCC_3V3";
> -		regulator-min-microvolt = <3300000>;
> -		regulator-max-microvolt = <3300000>;
> -		vin-supply = <&vddao_3v3>;
> -		regulator-always-on;
> -		/* FIXME: actually controlled by VDDCPU_B_EN */
> -	};
> -
> -	vddao_1v8: regulator-vddao-1v8 {
> -		compatible = "regulator-fixed";
> -		regulator-name = "VDDIO_AO1V8";
> -		regulator-min-microvolt = <1800000>;
> -		regulator-max-microvolt = <1800000>;
> -		vin-supply = <&vddao_3v3>;
> -		regulator-always-on;
> -	};
> -
> -	vddao_3v3: regulator-vddao-3v3 {
> -		compatible = "regulator-fixed";
> -		regulator-name = "VDDAO_3V3";
> -		regulator-min-microvolt = <3300000>;
> -		regulator-max-microvolt = <3300000>;
> -		vin-supply = <&ao_5v>;
> -		regulator-always-on;
> -	};
> -
> -	vddcpu_a: regulator-vddcpu-a {
> -		/*
> -		 * MP8756GD Regulator.
> -		 */
> -		compatible = "pwm-regulator";
> -
> -		regulator-name = "VDDCPU_A";
> -		regulator-min-microvolt = <730000>;
> -		regulator-max-microvolt = <1022000>;
> -
> -		pwm-supply = <&ao_5v>;
> -
> -		pwms = <&pwm_ab 0 1250 0>;
> -		pwm-dutycycle-range = <100 0>;
> -
> -		regulator-boot-on;
> -		regulator-always-on;
> -	};
> -
> -	vddcpu_b: regulator-vddcpu-b {
> -		/*
> -		 * Silergy SY8120B1ABC Regulator.
> -		 */
> -		compatible = "pwm-regulator";
> -
> -		regulator-name = "VDDCPU_B";
> -		regulator-min-microvolt = <730000>;
> -		regulator-max-microvolt = <1022000>;
> -
> -		pwm-supply = <&ao_5v>;
> -
> -		pwms = <&pwm_AO_cd 1 1250 0>;
> -		pwm-dutycycle-range = <100 0>;
> -
> -		regulator-boot-on;
> -		regulator-always-on;
> -	};
> -
> -	sound {
> -		compatible = "amlogic,axg-sound-card";
> -		model = "RADXA-ZERO2";
> -		audio-aux-devs = <&tdmout_b>;
> -		audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
> -				"TDMOUT_B IN 1", "FRDDR_B OUT 1",
> -				"TDMOUT_B IN 2", "FRDDR_C OUT 1",
> -				"TDM_B Playback", "TDMOUT_B OUT";
> -
> -		assigned-clocks = <&clkc CLKID_MPLL2>,
> -				  <&clkc CLKID_MPLL0>,
> -				  <&clkc CLKID_MPLL1>;
> -		assigned-clock-parents = <0>, <0>, <0>;
> -		assigned-clock-rates = <294912000>,
> -				       <270950400>,
> -				       <393216000>;
> -
> -		dai-link-0 {
> -			sound-dai = <&frddr_a>;
> -		};
> -
> -		dai-link-1 {
> -			sound-dai = <&frddr_b>;
> -		};
> -
> -		dai-link-2 {
> -			sound-dai = <&frddr_c>;
> -		};
> -
> -		/* 8ch hdmi interface */
> -		dai-link-3 {
> -			sound-dai = <&tdmif_b>;
> -			dai-format = "i2s";
> -			dai-tdm-slot-tx-mask-0 = <1 1>;
> -			dai-tdm-slot-tx-mask-1 = <1 1>;
> -			dai-tdm-slot-tx-mask-2 = <1 1>;
> -			dai-tdm-slot-tx-mask-3 = <1 1>;
> -			mclk-fs = <256>;
> -
> -			codec {
> -				sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
> -			};
> -		};
> -
> -		/* hdmi glue */
> -		dai-link-4 {
> -			sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
> -
> -			codec {
> -				sound-dai = <&hdmi_tx>;
> -			};
> -		};
> -	};
> -
> -	wifi32k: clock-0 {
> -		compatible = "pwm-clock";
> -		#clock-cells = <0>;
> -		clock-frequency = <32768>;
> -		pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
> -	};
> -};
> -
> -&arb {
> -	status = "okay";
> -};
> -
> -&cec_AO {
> -	pinctrl-0 = <&cec_ao_a_h_pins>;
> -	pinctrl-names = "default";
> -	status = "disabled";
> -	hdmi-phandle = <&hdmi_tx>;
> -};
> -
> -&cecb_AO {
> -	pinctrl-0 = <&cec_ao_b_h_pins>;
> -	pinctrl-names = "default";
> -	status = "okay";
> -	hdmi-phandle = <&hdmi_tx>;
> -};
> -
> -&clkc_audio {
> -	status = "okay";
> -};
> -
> -&cpu0 {
> -	cpu-supply = <&vddcpu_b>;
> -	operating-points-v2 = <&cpu_opp_table_0>;
> -	clocks = <&clkc CLKID_CPU_CLK>;
> -	clock-latency = <50000>;
> -};
> -
> -&cpu1 {
> -	cpu-supply = <&vddcpu_b>;
> -	operating-points-v2 = <&cpu_opp_table_0>;
> -	clocks = <&clkc CLKID_CPU_CLK>;
> -	clock-latency = <50000>;
> -};
> -
> -&cpu100 {
> -	cpu-supply = <&vddcpu_a>;
> -	operating-points-v2 = <&cpub_opp_table_1>;
> -	clocks = <&clkc CLKID_CPUB_CLK>;
> -	clock-latency = <50000>;
> -};
> -
> -&cpu101 {
> -	cpu-supply = <&vddcpu_a>;
> -	operating-points-v2 = <&cpub_opp_table_1>;
> -	clocks = <&clkc CLKID_CPUB_CLK>;
> -	clock-latency = <50000>;
> -};
> -
> -&cpu102 {
> -	cpu-supply = <&vddcpu_a>;
> -	operating-points-v2 = <&cpub_opp_table_1>;
> -	clocks = <&clkc CLKID_CPUB_CLK>;
> -	clock-latency = <50000>;
> -};
> -
> -&cpu103 {
> -	cpu-supply = <&vddcpu_a>;
> -	operating-points-v2 = <&cpub_opp_table_1>;
> -	clocks = <&clkc CLKID_CPUB_CLK>;
> -	clock-latency = <50000>;
> -};
> -
> -&cpu_thermal {
> -	trips {
> -		cpu_active: cpu-active {
> -			temperature = <70000>; /* millicelsius */
> -			hysteresis = <2000>; /* millicelsius */
> -			type = "active";
> -		};
> -	};
> -
> -	cooling-maps {
> -		map2 {
> -			trip = <&cpu_active>;
> -			cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> -		};
> -	};
> -};
> -
> -&frddr_a {
> -	status = "okay";
> -};
> -
> -&frddr_b {
> -	status = "okay";
> -};
> -
> -&frddr_c {
> -	status = "okay";
> -};
> -
> -&gpio {
> -	gpio-line-names =
> -		/* GPIOZ */
> -		"PIN_27", "PIN_28", "PIN_7", "PIN_11", "PIN_13", "PIN_15", "PIN_18", "PIN_40",
> -		"", "", "", "", "", "", "", "",
> -		/* GPIOH */
> -		"", "", "", "", "PIN_19", "PIN_21", "PIN_24", "PIN_23",
> -		"",
> -		/* BOOT */
> -		"", "", "", "", "", "", "", "",
> -		"", "", "", "", "EMMC_PWRSEQ", "", "", "",
> -		/* GPIOC */
> -		"", "", "", "", "", "", "SD_CD", "PIN_36",
> -		/* GPIOA */
> -		"PIN_32", "PIN_12", "PIN_35", "", "", "PIN_38", "", "",
> -		"", "", "", "", "LED_GREEN", "PIN_31", "PIN_3", "PIN_5",
> -		/* GPIOX */
> -		"", "", "", "", "", "", "SDIO_PWRSEQ", "",
> -		"", "", "", "", "", "", "", "",
> -		"", "BT_SHUTDOWN", "", "";
> -};
> -
> -&gpio_ao {
> -	gpio-line-names =
> -		/* GPIOAO */
> -		"PIN_8", "PIN_10", "", "BTN_POWER", "", "", "", "PIN_29",
> -		"PIN_33", "PIN_37", "FAN", "",
> -		/* GPIOE */
> -		"", "", "";
> -};
> -
> -&hdmi_tx {
> -	status = "okay";
> -	pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
> -	pinctrl-names = "default";
> -	hdmi-supply = <&ao_5v>;
> -};
> -
> -&hdmi_tx_tmds_port {
> -	hdmi_tx_tmds_out: endpoint {
> -		remote-endpoint = <&hdmi_connector_in>;
> -	};
> -};
> -
> -&ir {
> -	status = "disabled";
> -	pinctrl-0 = <&remote_input_ao_pins>;
> -	pinctrl-names = "default";
> -};
> -
> -&pwm_ab {
> -	pinctrl-0 = <&pwm_a_e_pins>;
> -	pinctrl-names = "default";
> -	clocks = <&xtal>;
> -	clock-names = "clkin0";
> -	status = "okay";
> -};
> -
> -&pwm_ef {
> -	pinctrl-0 = <&pwm_e_pins>;
> -	pinctrl-names = "default";
> -	clocks = <&xtal>;
> -	clock-names = "clkin0";
> -	status = "okay";
> -};
> -
> -&pwm_AO_ab {
> -	pinctrl-0 = <&pwm_ao_a_pins>;
> -	pinctrl-names = "default";
> -	clocks = <&xtal>;
> -	clock-names = "clkin0";
> -	status = "okay";
> -};
> -
> -&pwm_AO_cd {
> -	pinctrl-0 = <&pwm_ao_d_e_pins>;
> -	pinctrl-names = "default";
> -	clocks = <&xtal>;
> -	clock-names = "clkin1";
> -	status = "okay";
> -};
> -
> -&saradc {
> -	status = "okay";
> -	vref-supply = <&vddao_1v8>;
> -};
> -
> -/* SDIO */
> -&sd_emmc_a {
> -	status = "okay";
> -	pinctrl-0 = <&sdio_pins>;
> -	pinctrl-1 = <&sdio_clk_gate_pins>;
> -	pinctrl-names = "default", "clk-gate";
> -	#address-cells = <1>;
> -	#size-cells = <0>;
> -
> -	bus-width = <4>;
> -	cap-sd-highspeed;
> -	max-frequency = <100000000>;
> -
> -	non-removable;
> -	disable-wp;
> -
> -	/* WiFi firmware requires power to be kept while in suspend */
> -	keep-power-in-suspend;
> -
> -	mmc-pwrseq = <&sdio_pwrseq>;
> -
> -	vmmc-supply = <&vddao_3v3>;
> -	vqmmc-supply = <&vddao_1v8>;
> -
> -	brcmf: wifi at 1 {
> -		reg = <1>;
> -		compatible = "brcm,bcm4329-fmac";
> -	};
> -};
> -
> -/* SD card */
> -&sd_emmc_b {
> -	status = "okay";
> -	pinctrl-0 = <&sdcard_c_pins>;
> -	pinctrl-1 = <&sdcard_clk_gate_c_pins>;
> -	pinctrl-names = "default", "clk-gate";
> -
> -	bus-width = <4>;
> -	cap-sd-highspeed;
> -	max-frequency = <50000000>;
> -	disable-wp;
> -
> -	cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
> -	vmmc-supply = <&vddao_3v3>;
> -	vqmmc-supply = <&vddao_3v3>;
> -};
> -
> -/* eMMC */
> -&sd_emmc_c {
> -	status = "okay";
> -	pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
> -	pinctrl-1 = <&emmc_clk_gate_pins>;
> -	pinctrl-names = "default", "clk-gate";
> -
> -	bus-width = <8>;
> -	cap-mmc-highspeed;
> -	mmc-ddr-1_8v;
> -	mmc-hs200-1_8v;
> -	max-frequency = <200000000>;
> -	disable-wp;
> -
> -	mmc-pwrseq = <&emmc_pwrseq>;
> -	vmmc-supply = <&vcc_3v3>;
> -	vqmmc-supply = <&vcc_1v8>;
> -};
> -
> -&tdmif_b {
> -	status = "okay";
> -};
> -
> -&tdmout_b {
> -	status = "okay";
> -};
> -
> -&tohdmitx {
> -	status = "okay";
> -};
> -
> -&uart_A {
> -	status = "okay";
> -	pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
> -	pinctrl-names = "default";
> -	uart-has-rtscts;
> -
> -	bluetooth {
> -		compatible = "brcm,bcm43438-bt";
> -		shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
> -		max-speed = <2000000>;
> -		clocks = <&wifi32k>;
> -		clock-names = "lpo";
> -	};
> -};
> -
> -&uart_AO {
> -	status = "okay";
> -	pinctrl-0 = <&uart_ao_a_pins>;
> -	pinctrl-names = "default";
> -};
> -
> -&usb {
> -	status = "okay";
> -};
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +
> +/dts-v1/;
> +
> +#include "meson-g12b-radxa-zero2.dtsi"
> +
> +/ {
> +	compatible = "radxa,zero2", "amlogic,a311d", "amlogic,g12b";
> +	model = "Radxa ZERO2";
> +};
> +
> +&sound {
> +	model = "RADXA-ZERO2";
> +};
> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dtsi
> similarity index 98%
> copy from arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts
> copy to arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dtsi
> index 8445701100d0..b73c4a423dfd 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts
> +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dtsi
> @@ -16,9 +16,6 @@
>   #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
>   
>   / {
> -	compatible = "radxa,zero2", "amlogic,a311d", "amlogic,g12b";
> -	model = "Radxa Zero2";
> -
>   	aliases {
>   		serial0 = &uart_AO;
>   		serial2 = &uart_A;
> @@ -167,9 +164,8 @@ vddcpu_b: regulator-vddcpu-b {
>   		regulator-always-on;
>   	};
>   
> -	sound {
> +	sound: sound {
>   		compatible = "amlogic,axg-sound-card";
> -		model = "RADXA-ZERO2";
>   		audio-aux-devs = <&tdmout_b>;
>   		audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
>   				"TDMOUT_B IN 1", "FRDDR_B OUT 1",

Reviewed-by: Neil Armstrong <neil.armstrong at linaro.org>


From neil.armstrong at linaro.org  Tue Aug 20 08:30:42 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Tue, 20 Aug 2024 17:30:42 +0200
Subject: [PATCH v3 1/2] dt-bindings: arm: amlogic: add support for
 Radxa ZERO 2 Pro
In-Reply-To: <20240712215111.687478-1-naoki@radxa.com>
References: <20240712215111.687478-1-naoki@radxa.com>
Message-ID: <172416784208.3050902.355272849812987526.b4-ty@linaro.org>

Hi,

On Sat, 13 Jul 2024 06:51:10 +0900, FUKAUMI Naoki wrote:
> Radxa ZERO 2 Pro is a ultra tiny high performance SBC[1] using the
> Amlogic A311D chip.
> 
> [1] https://radxa.com/products/zeros/zero2pro
> 
> 

Thanks, Applied to https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git (v6.12/arm64-dt)

[1/2] dt-bindings: arm: amlogic: add support for Radxa ZERO 2 Pro
      https://git.kernel.org/amlogic/c/8f97ee0c9f5c6fc250847d7492875a6d7152ba68
[2/2] arm64: dts: amlogic: add support for Radxa ZERO 2 Pro
      https://git.kernel.org/amlogic/c/69591796c5d585816a306134f6d565cf19da575e

These changes has been applied on the intermediate git tree [1].

The v6.12/arm64-dt branch will then be sent via a formal Pull Request to the Linux SoC maintainers
for inclusion in their intermediate git branches in order to be sent to Linus during
the next merge window, or sooner if it's a set of fixes.

In the cases of fixes, those will be merged in the current release candidate
kernel and as soon they appear on the Linux master branch they will be
backported to the previous Stable and Long-Stable kernels [2].

The intermediate git branches are merged daily in the linux-next tree [3],
people are encouraged testing these pre-release kernels and report issues on the
relevant mailing-lists.

If problems are discovered on those changes, please submit a signed-off-by revert
patch followed by a corrective changeset.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git
[2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
[3] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git

-- 
Neil



From neil.armstrong at linaro.org  Tue Aug 20 08:30:56 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Tue, 20 Aug 2024 17:30:56 +0200
Subject: (subset) [PATCH v3 0/6] Add new Amlogic SoCs info defines.
In-Reply-To: <20240719-soc_info-v3-0-020a3b687c0c@amlogic.com>
References: <20240719-soc_info-v3-0-020a3b687c0c@amlogic.com>
Message-ID: <172416785609.3051192.670388660690339577.b4-ty@linaro.org>

Hi,

On Fri, 19 Jul 2024 16:08:08 +0800, Xianwei Zhao wrote:
> Add more Amlogic SoCs info defines, include S4, C3
> T7, A4, A5.
> 
> 

Thanks, Applied to https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git (v6.12/drivers)

[1/6] dt-bindings: arm: amlogic: meson-gx-ao-secure: support more SoCs
      https://git.kernel.org/amlogic/c/dde3c64013035c9d6f0a5d0fd894a7a7e03c79ea
[2/6] soc: amlogic: meson-gx-socinfo: add new SoCs id
      https://git.kernel.org/amlogic/c/009ff80bfaec1aa3fa48bbe5e2903c95931a6f37

These changes has been applied on the intermediate git tree [1].

The v6.12/drivers branch will then be sent via a formal Pull Request to the Linux SoC maintainers
for inclusion in their intermediate git branches in order to be sent to Linus during
the next merge window, or sooner if it's a set of fixes.

In the cases of fixes, those will be merged in the current release candidate
kernel and as soon they appear on the Linux master branch they will be
backported to the previous Stable and Long-Stable kernels [2].

The intermediate git branches are merged daily in the linux-next tree [3],
people are encouraged testing these pre-release kernels and report issues on the
relevant mailing-lists.

If problems are discovered on those changes, please submit a signed-off-by revert
patch followed by a corrective changeset.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git
[2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
[3] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git

-- 
Neil



From neil.armstrong at linaro.org  Tue Aug 20 08:33:06 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Tue, 20 Aug 2024 17:33:06 +0200
Subject: (subset) [PATCH v3 0/6] Add new Amlogic SoCs info defines.
In-Reply-To: <20240719-soc_info-v3-0-020a3b687c0c@amlogic.com>
References: <20240719-soc_info-v3-0-020a3b687c0c@amlogic.com>
Message-ID: <172416798625.3053719.9732912917440614135.b4-ty@linaro.org>

Hi,

On Fri, 19 Jul 2024 16:08:08 +0800, Xianwei Zhao wrote:
> Add more Amlogic SoCs info defines, include S4, C3
> T7, A4, A5.
> 
> 

Thanks, Applied to https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git (v6.12/arm64-dt)

[3/6] arm64: dts: amlogic: s4: add ao secure node
      https://git.kernel.org/amlogic/c/4b26afe7d216183bcb2b1aa2c0096cafdf7a9ea2
[4/6] arm64: dts: amlogic: c3: add ao secure node
      https://git.kernel.org/amlogic/c/84ed73ee34d152032633e540f159c482ede4c10b
[5/6] arm64: dts: amlogic: t7: add ao secure node
      https://git.kernel.org/amlogic/c/4c23177c51884f5307e67875b1dc87d98543be7a
[6/6] arm64: dts: amlogic: a4: add ao secure node
      https://git.kernel.org/amlogic/c/b2d7fd0ecb292e77a2d04cb6836c909cb6b6655b

These changes has been applied on the intermediate git tree [1].

The v6.12/arm64-dt branch will then be sent via a formal Pull Request to the Linux SoC maintainers
for inclusion in their intermediate git branches in order to be sent to Linus during
the next merge window, or sooner if it's a set of fixes.

In the cases of fixes, those will be merged in the current release candidate
kernel and as soon they appear on the Linux master branch they will be
backported to the previous Stable and Long-Stable kernels [2].

The intermediate git branches are merged daily in the linux-next tree [3],
people are encouraged testing these pre-release kernels and report issues on the
relevant mailing-lists.

If problems are discovered on those changes, please submit a signed-off-by revert
patch followed by a corrective changeset.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git
[2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
[3] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git

-- 
Neil



From robh at kernel.org  Tue Aug 20 17:35:25 2024
From: robh at kernel.org (Rob Herring (Arm))
Date: Tue, 20 Aug 2024 19:35:25 -0500
Subject: [PATCH] media: dt-bindings: trivial white-space and example
 cleanup
In-Reply-To: <20240820073658.19045-1-krzysztof.kozlowski@linaro.org>
References: <20240820073658.19045-1-krzysztof.kozlowski@linaro.org>
Message-ID: <172420052496.2349176.18144624759283335223.robh@kernel.org>


On Tue, 20 Aug 2024 09:36:58 +0200, Krzysztof Kozlowski wrote:
> Minor cleanups without funcitonal impact:
>  - There should not be an empty blank line after SPDX tag,
>  - Convention is to indent DTS examples in coding style with 2- or
>    4-space indentation (4 is preferred),
>  - Drop unused labels in DTS examples.
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>
> ---
>  .../media/allwinner,sun50i-h6-vpu-g2.yaml     |  1 -
>  .../bindings/media/amlogic,meson-ir-tx.yaml   |  1 -
>  .../bindings/media/amphion,vpu.yaml           |  1 -
>  .../bindings/media/fsl,imx6ull-pxp.yaml       |  1 -
>  .../media/mediatek,vcodec-decoder.yaml        |  1 -
>  .../media/mediatek,vcodec-encoder.yaml        |  1 -
>  .../media/mediatek,vcodec-subdev-decoder.yaml |  1 -
>  .../media/microchip,sama5d4-vdec.yaml         | 17 ++++----
>  .../bindings/media/nxp,imx8mq-vpu.yaml        | 41 +++++++++----------
>  .../bindings/media/qcom,msm8916-camss.yaml    |  1 -
>  .../bindings/media/qcom,msm8996-camss.yaml    |  1 -
>  .../bindings/media/qcom,sdm660-camss.yaml     |  1 -
>  .../bindings/media/qcom,sdm845-camss.yaml     |  1 -
>  .../bindings/media/qcom,sm8250-camss.yaml     |  1 -
>  .../bindings/media/rockchip,rk3568-vepu.yaml  |  1 -
>  .../bindings/media/rockchip-vpu.yaml          | 29 +++++++------
>  16 files changed, 42 insertions(+), 58 deletions(-)
> 

Reviewed-by: Rob Herring (Arm) <robh at kernel.org>



From krzk at kernel.org  Wed Aug 21 01:28:09 2024
From: krzk at kernel.org (Krzysztof Kozlowski)
Date: Wed, 21 Aug 2024 10:28:09 +0200
Subject: [PATCH v9 23/23] arch: arm64: dts: meson: axg: add crypto node
In-Reply-To: <20240820145623.3500864-24-avromanov@salutedevices.com>
References: <20240820145623.3500864-1-avromanov@salutedevices.com>
 <20240820145623.3500864-24-avromanov@salutedevices.com>
Message-ID: <ryvwncu3m7rsja34h37osyoqvfhzalgim6op4itqulmysosncg@5vtil3qsoo2o>

On Tue, Aug 20, 2024 at 05:56:23PM +0300, Alexey Romanov wrote:
> This patch adds a crypto node declaration. With the
> Amlogic crypto driver we can use HW implementation
> of SHA1/224/256 and AES algo.
> 
> Signed-off-by: Alexey Romanov <avromanov at salutedevices.com>
> ---
>  arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 7 +++++++
>  1 file changed, 7 insertions(+)
>

Please use subject prefixes matching the subsystem. You can get them for
example with  on the directory
your patch is touching. For bindings, the preferred subjects are
explained here:
https://www.kernel.org/doc/html/latest/devicetree/bindings/submitting-patches.html#i-for-patch-submitters

Best regards,
Krzysztof



From avromanov at s2b.tech  Wed Aug 21 03:02:50 2024
From: avromanov at s2b.tech (Alexey Romanov)
Date: Wed, 21 Aug 2024 10:02:50 +0000
Subject: [PATCH v9 00/23] Support more Amlogic SoC families in crypto
 driver
In-Reply-To: <6e535895-6a06-42f8-abf3-e3b7472c97e0@linaro.org>
References: <20240820145623.3500864-1-avromanov@salutedevices.com>
 <6e535895-6a06-42f8-abf3-e3b7472c97e0@linaro.org>
Message-ID: <20240821100245.q5uptswxmx4rk35n@cab-wsm-0029881>

Hi Neil,

On Tue, Aug 20, 2024 at 05:19:27PM +0200, neil.armstrong at linaro.org wrote:
> Hi,
> 
> On 20/08/2024 16:56, Alexey Romanov wrote:
> > Hello!
> > 
> > This patchset expand the funcionality of the Amlogic
> > crypto driver by adding support for more SoC families:
> > AXG, G12A, G12B, SM1, A1, S4.
> > 
> > Also specify and enable crypto node in device tree
> > for reference Amlogic devices.
> > 
> > Tested on GXL, AXG, G12A/B, SM1, A1 and S4 devices via
> > custom tests [1] and tcrypt module.
> 
> On which tree did you base yourself ? It fails to apply patch 20 on next-20240820 and 6.11-rc4

Sorry, my tree is out of date (6.10.1). 

I can rebase it to linux-next and resend patchset.

> 
> Neil
> 
> > 
> > ---
> > 
> > Changes V1 -> V2 [2]:
> > 
> > - Rebased over linux-next.
> > - Adjusted device tree bindings description.
> > - A1 and S4 dts use their own compatible, which is a G12 fallback.
> > 
> > Changes V2 -> V3 [3]:
> > 
> > - Fix errors in dt-bindings and device tree.
> > - Add new field in platform data, which determines
> > whether clock controller should be used for crypto IP.
> > - Place back MODULE_DEVICE_TABLE.
> > - Correct commit messages.
> > 
> > Changes V3 -> V4 [4]:
> > 
> > - Update dt-bindings as per Krzysztof Kozlowski comments.
> > - Fix bisection: get rid of compiler errors in some patches.
> > 
> > Changes V4 -> V5 [5]:
> > 
> > - Tested on GXL board:
> >    1. Fix panic detected by Corentin Labbe [6].
> >    2. Disable hasher backend for GXL: in its current realization
> >       is doesn't work. And there are no examples or docs in the
> >       vendor SDK.
> > - Fix AES-CTR realization: legacy boards (gxl, g12, axg) requires
> >    inversion of the keyiv at keys setup stage.
> > - A1 now uses its own compatible string.
> > - S4 uses A1 compatible as fallback.
> > - Code fixes based on comments Neil Atrmstrong and Rob Herring.
> > - Style fixes (set correct indentations)
> > 
> > Changes V5 -> V6 [7]:
> > 
> > - Fix DMA sync warning reported by Corentin Labbe [8].
> > - Remove CLK input from driver. Remove clk definition
> >    and second interrput line from crypto node inside GXL dtsi.
> > 
> > Changes V6 -> V7 [9]:
> > 
> > - Fix dt-schema: power domain now required only for A1.
> > - Use crypto_skcipher_ctx_dma() helper for cipher instead of
> >    ____cacheline_aligned.
> > - Add import/export functions for hasher.
> > - Fix commit message for patch 17, acorrding to discussion [10].
> > 
> > Changes V7 -> V8 [11]:
> > 
> > - Test patchset with CONFIG_CRYPTO_MANAGER_EXTRA_TESTS: fix some bugs
> >    in hasher logic.
> > - Use crypto crypto_ahash_ctx_dma in hasher code.
> > - Correct clock definition: clk81 is required for all SoC's.
> > - Add fixed-clock (clk81) definition for A1/S4.
> > - Add information (in commit messages) why different compatibles are used.
> > 
> > Changes V8 -> V9 [12]:
> > 
> > - Remove required field clk-names from dt-schema according to Rob Herring
> > recommendation [13].
> > - Fix commit order: all dt-bindings schema commits now located earlier
> > than any changes in device tree.
> > - Fix typos and add more clarifications in dt-schema patches.
> > 
> > Links:
> >    - [1] https://gist.github.com/mRrvz/3fb8943a7487ab7b943ec140706995e7
> >    - [2] https://lore.kernel.org/all/20240110201216.18016-1-avromanov at salutedevices.com/
> >    - [3] https://lore.kernel.org/all/20240123165831.970023-1-avromanov at salutedevices.com/
> >    - [4] https://lore.kernel.org/all/20240205155521.1795552-1-avromanov at salutedevices.com/
> >    - [5] https://lore.kernel.org/all/20240212135108.549755-1-avromanov at salutedevices.com/
> >    - [6] https://lore.kernel.org/all/ZcsYaPIUrBSg8iXu at Red/
> >    - [7] https://lore.kernel.org/all/20240301132936.621238-1-avromanov at salutedevices.com/
> >    - [8] https://lore.kernel.org/all/Zf1BAlYtiwPOG-Os at Red/
> >    - [9] https://lore.kernel.org/all/20240326153219.2915080-1-avromanov at salutedevices.com/
> >    - [10] https://lore.kernel.org/all/20240329-dotted-illusive-9f0593805a05 at wendy/
> >    - [11] https://lore.kernel.org/all/20240411133832.2896463-1-avromanov at salutedevices.com/
> >    - [12] https://lore.kernel.org/all/20240607141242.2616580-1-avromanov at salutedevices.com/
> >    - [13] https://lore.kernel.org/all/20240610222827.GA3166929-robh at kernel.org/
> > 
> > Alexey Romanov (23):
> >    drivers: crypto: meson: don't hardcode IRQ count
> >    drviers: crypto: meson: add platform data
> >    drivers: crypto: meson: remove clock input
> >    drivers: crypto: meson: add MMIO helpers
> >    drivers: crypto: meson: move get_engine_number()
> >    drivers: crypto: meson: drop status field from meson_flow
> >    drivers: crypto: meson: move algs definition and cipher API to
> >      cipher.c
> >    drivers: crypto: meson: cleanup defines
> >    drivers: crypto: meson: process more than MAXDESCS descriptors
> >    drivers: crypto: meson: avoid kzalloc in engine thread
> >    drivers: crypto: meson: introduce hasher
> >    drivers: crypto: meson: add support for AES-CTR
> >    drivers: crypto: meson: use fallback for 192-bit keys
> >    drivers: crypto: meson: add support for G12-series
> >    drivers: crypto: meson: add support for AXG-series
> >    drivers: crypto: meson: add support for A1-series
> >    dt-bindings: crypto: meson: correct clk and remove second interrupt
> >      line
> >    dt-bindings: crypto: meson: support new SoC's
> >    arch: arm64: dts: meson: gxl: correct crypto node definition
> >    arch: arm64: dts: meson: a1: add crypto node
> >    arch: arm64: dts: meson: s4: add crypto node
> >    arch: arm64: dts: meson: g12: add crypto node
> >    arch: arm64: dts: meson: axg: add crypto node
> > 
> >   .../bindings/crypto/amlogic,gxl-crypto.yaml   |  32 +-
> >   arch/arm64/boot/dts/amlogic/meson-a1.dtsi     |  14 +
> >   arch/arm64/boot/dts/amlogic/meson-axg.dtsi    |   7 +
> >   .../boot/dts/amlogic/meson-g12-common.dtsi    |   7 +
> >   arch/arm64/boot/dts/amlogic/meson-gxl.dtsi    |   6 +-
> >   arch/arm64/boot/dts/amlogic/meson-s4.dtsi     |  13 +
> >   drivers/crypto/amlogic/Makefile               |   2 +-
> >   drivers/crypto/amlogic/amlogic-gxl-cipher.c   | 632 ++++++++++++------
> >   drivers/crypto/amlogic/amlogic-gxl-core.c     | 292 ++++----
> >   drivers/crypto/amlogic/amlogic-gxl-hasher.c   | 507 ++++++++++++++
> >   drivers/crypto/amlogic/amlogic-gxl.h          | 118 +++-
> >   11 files changed, 1269 insertions(+), 361 deletions(-)
> >   create mode 100644 drivers/crypto/amlogic/amlogic-gxl-hasher.c
> > 
> 

-- 
Thank you,
Alexey

From naoki at radxa.com  Wed Aug 21 20:11:58 2024
From: naoki at radxa.com (FUKAUMI Naoki)
Date: Thu, 22 Aug 2024 12:11:58 +0900
Subject: [PATCH v3 1/2] dt-bindings: arm: amlogic: add support for Radxa
 ZERO 2 Pro
In-Reply-To: <172416784208.3050902.355272849812987526.b4-ty@linaro.org>
References: <20240712215111.687478-1-naoki@radxa.com>
 <172416784208.3050902.355272849812987526.b4-ty@linaro.org>
Message-ID: <0D8F14444C69EB08+cfb9ef39-4243-4dd6-859f-98ca34e00e98@radxa.com>

Hi,

I'm sorry, could you drop these patches from amlogic/linux.git?

I changed my mind that adding new dts just for renaming product is wrong.

Best regards,

--
FUKAUMI Naoki
Radxa Computer (Shenzhen) Co., Ltd.

On 8/21/24 00:30, Neil Armstrong wrote:
> Hi,
> 
> On Sat, 13 Jul 2024 06:51:10 +0900, FUKAUMI Naoki wrote:
>> Radxa ZERO 2 Pro is a ultra tiny high performance SBC[1] using the
>> Amlogic A311D chip.
>>
>> [1] https://radxa.com/products/zeros/zero2pro
>>
>>
> 
> Thanks, Applied to https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git (v6.12/arm64-dt)
> 
> [1/2] dt-bindings: arm: amlogic: add support for Radxa ZERO 2 Pro
>        https://git.kernel.org/amlogic/c/8f97ee0c9f5c6fc250847d7492875a6d7152ba68
> [2/2] arm64: dts: amlogic: add support for Radxa ZERO 2 Pro
>        https://git.kernel.org/amlogic/c/69591796c5d585816a306134f6d565cf19da575e
> 
> These changes has been applied on the intermediate git tree [1].
> 
> The v6.12/arm64-dt branch will then be sent via a formal Pull Request to the Linux SoC maintainers
> for inclusion in their intermediate git branches in order to be sent to Linus during
> the next merge window, or sooner if it's a set of fixes.
> 
> In the cases of fixes, those will be merged in the current release candidate
> kernel and as soon they appear on the Linux master branch they will be
> backported to the previous Stable and Long-Stable kernels [2].
> 
> The intermediate git branches are merged daily in the linux-next tree [3],
> people are encouraged testing these pre-release kernels and report issues on the
> relevant mailing-lists.
> 
> If problems are discovered on those changes, please submit a signed-off-by revert
> patch followed by a corrective changeset.
> 
> [1] https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git
> [2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
> [3] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
> 


From neil.armstrong at linaro.org  Thu Aug 22 01:23:36 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Thu, 22 Aug 2024 10:23:36 +0200
Subject: [PATCH v3 1/2] dt-bindings: arm: amlogic: add support for Radxa
 ZERO 2 Pro
In-Reply-To: <0D8F14444C69EB08+cfb9ef39-4243-4dd6-859f-98ca34e00e98@radxa.com>
References: <20240712215111.687478-1-naoki@radxa.com>
 <172416784208.3050902.355272849812987526.b4-ty@linaro.org>
 <0D8F14444C69EB08+cfb9ef39-4243-4dd6-859f-98ca34e00e98@radxa.com>
Message-ID: <eacafb4c-ace9-429a-9359-1e2e602e5d7e@linaro.org>

On 22/08/2024 05:11, FUKAUMI Naoki wrote:
> Hi,
> 
> I'm sorry, could you drop these patches from amlogic/linux.git?
> 
> I changed my mind that adding new dts just for renaming product is wrong.

Ack, will drop the patches.

Neil

> 
> Best regards,
> 
> -- 
> FUKAUMI Naoki
> Radxa Computer (Shenzhen) Co., Ltd.
> 
> On 8/21/24 00:30, Neil Armstrong wrote:
>> Hi,
>>
>> On Sat, 13 Jul 2024 06:51:10 +0900, FUKAUMI Naoki wrote:
>>> Radxa ZERO 2 Pro is a ultra tiny high performance SBC[1] using the
>>> Amlogic A311D chip.
>>>
>>> [1] https://radxa.com/products/zeros/zero2pro
>>>
>>>
>>
>> Thanks, Applied to https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git (v6.12/arm64-dt)
>>
>> [1/2] dt-bindings: arm: amlogic: add support for Radxa ZERO 2 Pro
>> ?????? https://git.kernel.org/amlogic/c/8f97ee0c9f5c6fc250847d7492875a6d7152ba68
>> [2/2] arm64: dts: amlogic: add support for Radxa ZERO 2 Pro
>> ?????? https://git.kernel.org/amlogic/c/69591796c5d585816a306134f6d565cf19da575e
>>
>> These changes has been applied on the intermediate git tree [1].
>>
>> The v6.12/arm64-dt branch will then be sent via a formal Pull Request to the Linux SoC maintainers
>> for inclusion in their intermediate git branches in order to be sent to Linus during
>> the next merge window, or sooner if it's a set of fixes.
>>
>> In the cases of fixes, those will be merged in the current release candidate
>> kernel and as soon they appear on the Linux master branch they will be
>> backported to the previous Stable and Long-Stable kernels [2].
>>
>> The intermediate git branches are merged daily in the linux-next tree [3],
>> people are encouraged testing these pre-release kernels and report issues on the
>> relevant mailing-lists.
>>
>> If problems are discovered on those changes, please submit a signed-off-by revert
>> patch followed by a corrective changeset.
>>
>> [1] https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git
>> [2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
>> [3] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
>>



From neil.armstrong at linaro.org  Thu Aug 22 05:56:34 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Thu, 22 Aug 2024 14:56:34 +0200
Subject: next-20240822: rcu: Unless rcu_preempt kthread gets sufficient
 CPU time, OOM is now expected behavior.
In-Reply-To: <CA+G9fYvZAUOKhf+Yg6J=OUxnJ0ckv4jxyDLGyKsqwUpAak84hw@mail.gmail.com>
References: <CA+G9fYvZAUOKhf+Yg6J=OUxnJ0ckv4jxyDLGyKsqwUpAak84hw@mail.gmail.com>
Message-ID: <91ed1523-faeb-4e04-8000-c411dba5a542@linaro.org>

Hi,

On 22/08/2024 13:16, Naresh Kamboju wrote:
> The following kernel crash was noticed on arm64 Rock-pi 4b,
> Qcomm dragonboard 410c and 845c devices while booting / loading kernel modules
> on today's Linux next-20240822.

I see the same crash log on the following devices built with next-20240822 and ARM64 defconfig:
- Libre Computer AML-S805X-AC (Amlogic S805X)
- BananaPi M2S (Amlogic A311D)
- Snapdragon DB410c
- Qcom SM8250-HDK

I do not see the same crash log, but the following board fails to complete boot:
- Banana Pi BPI-M5 (Amlogic S905X3)
- Libre Computer AML-S905X-CC (Amlogic S905X)
- Qcom SM8150-HDK
- Qcom DB845c
- Qcom SM8350-HDK
- Qcom SM8450-HDK
- Qcom SM8550-HDK
- Qcom SM8550-QRD
- Qcom SM8650-HDK
- Qcom SM8650-QRD

Neil

> 
> First seen on next-20240822.
>    Good: next-20240821
>    BAD:  next-20240822
> 
> Reported-by: Linux Kernel Functional Testing <lkft at linaro.org>
> 
> We are bisecting this problem.
> 
> Crash log:
> --------
> [    0.000000] Linux version 6.11.0-rc4-next-20240822
> (tuxmake at tuxmake) (Debian clang version 18.1.8
> (++20240731024919+3b5b5c1ec4a3-1~exp1~20240731145017.142), Debian LLD
> 18.1.8) #1 SMP PREEMPT @1724309008
> [    0.000000] KASLR disabled due to lack of seed
> [    0.000000] Machine model: Radxa ROCK Pi 4B
> ...
> [   16.923808] coresight-cpu-debug fe430000.debug: Coresight
> debug-CPU0 initialized
> [   16.933919] coresight-cpu-debug fe432000.debug: Coresight
> debug-CPU1 initialized
> [   16.935653] coresight-cpu-debug fe434000.debug: Coresight
> debug-CPU2 initialized
> [   16.937846] coresight-cpu-debug fe436000.debug: Coresight
> debug-CPU3 initialized
> [   16.939744] coresight-cpu-debug fe610000.debug: Coresight
> debug-CPU4 initialized
> [   16.942132] coresight-cpu-debug fe710000.debug: Coresight
> debug-CPU5 initialized
> [   37.987966] rcu: INFO: rcu_preempt self-detected stall on CPU
> [   37.989037] rcu: 2-...!: (5248 ticks this GP)
> idle=d1f4/1/0x4000000000000000 softirq=1552/1553 fqs=0
> [   37.990715] rcu: (t=5250 jiffies g=1269 q=784 ncpus=6)
> [   37.991667] rcu: rcu_preempt kthread timer wakeup didn't happen for
> 5249 jiffies! g1269 f0x0 RCU_GP_WAIT_FQS(5) ->state=0x402
> [   37.993718] rcu: Possible timer handling issue on cpu=4 timer-softirq=296
> [   37.994966] rcu: rcu_preempt kthread starved for 5250 jiffies!
> g1269 f0x0 RCU_GP_WAIT_FQS(5) ->state=0x402 ->cpu=4
> [   37.996844] rcu: Unless rcu_preempt kthread gets sufficient CPU
> time, OOM is now expected behavior.
> [   37.998499] rcu: RCU grace-period kthread stack dump:
> [   37.999419] task:rcu_preempt     state:I stack:0     pid:18
> tgid:18    ppid:2      flags:0x00000008
> [   38.001117] Call trace:
> [   38.001565]  __switch_to+0x15c/0x208
> [   38.002229]  __schedule+0x54c/0x9d0
> [   38.002870]  schedule+0x12c/0x1e0
> [   38.003479]  schedule_timeout+0x9c/0x1b0
> [   38.004202]  rcu_gp_fqs_loop+0x1e0/0x880
> [   38.004926]  rcu_gp_kthread+0x70/0x230
> [   38.005616]  kthread+0x104/0x198
> [   38.006209]  ret_from_fork+0x10/0x20
> [   38.006877] CPU: 2 UID: 0 PID: 237 Comm: (udev-worker) Not tainted
> 6.11.0-rc4-next-20240822 #1
> [   38.008442] Hardware name: Radxa ROCK Pi 4B (DT)
> [   38.009284] pstate: 20000005 (nzCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
> [   38.010551] pc : smp_call_function_many_cond+0x468/0x6b8
> [   38.011521] lr : smp_call_function_many_cond+0x428/0x6b8
> [   38.012490] sp : ffff800083d1bb50
> [   38.013094] x29: ffff800083d1bb90 x28: 0000000000000006 x27: 0000000000000000
> [   38.014399] x26: ffff80008269e000 x25: 0000000000000000 x24: 0000000000000001
> [   38.015702] x23: ffff8000801bc470 x22: ffff800074e75000 x21: ffff0000f74d8c20
> [   38.017005] x20: ffff0000f746cb80 x19: ffff8000826a3470 x18: ffff80007afc2000
> [   38.018308] x17: 000000000909008e x16: 0000000000000000 x15: ffff8000816092a0
> [   38.019611] x14: 060a090000000000 x13: 0000000000000003 x12: 000000000000003f
> [   38.020914] x11: 0000000000000001 x10: 0000000000000000 x9 : 0000000000000011
> [   38.022218] x8 : ffff0000f74b6c28 x7 : 0000000000000000 x6 : 0000000000000080
> [   38.023520] x5 : 000000000000003f x4 : 0000000000000000 x3 : 0000000000000006
> [   38.024823] x2 : 0000000000000004 x1 : 0000000000000004 x0 : 0000000000000004
> [   38.026126] Call trace:
> [   38.026574]  smp_call_function_many_cond+0x468/0x6b8
> [   38.027481]  kick_all_cpus_sync+0x44/0x78
> [   38.028216]  flush_module_icache+0x38/0xe0
> [   38.028965]  load_module+0x1374/0x1778
> [   38.029654]  __arm64_sys_finit_module+0x238/0x348
> [   38.030516]  invoke_syscall+0x4c/0x110
> [   38.031207]  el0_svc_common+0x8c/0xf0
> [   38.031880]  do_el0_svc+0x28/0x40
> [   38.032490]  el0_svc+0x40/0x88
> [   38.033054]  el0t_64_sync_handler+0x90/0x100
> [   38.033837]  el0t_64_sync+0x190/0x198
> [   38.034509] Sending NMI from CPU 2 to CPUs 4:
> [   48.036555] Sending NMI from CPU 2 to CPUs 5:
> [   78.247966] sched: DL replenish lagged too much
> [  121.047963] rcu: INFO: rcu_preempt self-detected stall on CPU
> [  121.049009] rcu: 2-...!: (21002 ticks this GP)
> idle=d1f4/1/0x4000000000000000 softirq=1552/1553 fqs=0
> [  121.050702] rcu: (t=26015 jiffies g=1269 q=784 ncpus=6)
> [  121.051669] rcu: rcu_preempt kthread timer wakeup didn't happen for
> 26014 jiffies! g1269 f0x0 RCU_GP_WAIT_FQS(5) ->state=0x200
> [  121.053735] rcu: Possible timer handling issue on cpu=4 timer-softirq=296
> [  121.054982] rcu: rcu_preempt kthread starved for 26015 jiffies!
> g1269 f0x0 RCU_GP_WAIT_FQS(5) ->state=0x200 ->cpu=4
> [  121.056876] rcu: Unless rcu_preempt kthread gets sufficient CPU
> time, OOM is now expected behavior.
> [  121.058530] rcu: RCU grace-period kthread stack dump:
> [  121.059447] task:rcu_preempt     state:R stack:0     pid:18
> tgid:18    ppid:2      flags:0x00000008
> [  121.061140] Call trace:
> [  121.061587]  __switch_to+0x15c/0x208
> [  121.062245]  __schedule+0x54c/0x9d0
> [  121.062885]  schedule+0x12c/0x1e0
> [  121.063494]  schedule_timeout+0x9c/0x1b0
> [  121.064214]  rcu_gp_fqs_loop+0x1e0/0x880
> [  121.064936]  rcu_gp_kthread+0x70/0x230
> [  121.065625]  kthread+0x104/0x198
> [  121.066217]  ret_from_fork+0x10/0x20
> [  121.066874] CPU: 2 UID: 0 PID: 237 Comm: (udev-worker) Not tainted
> 6.11.0-rc4-next-20240822 #1
> ...
> [  785.590550] Sending NMI from CPU 2 to CPUs 4:
> [  795.592594] Sending NMI from CPU 2 to CPUs 5:
> 
> boot Log links,
> --------
>   - https://qa-reports.linaro.org/lkft/linux-next-master/build/next-20240822/testrun/24939658/suite/boot/test/clang-18-lkftconfig/log
>   - https://lkft.validation.linaro.org/scheduler/job/7816099#L523
>   - https://lkft.validation.linaro.org/scheduler/job/7815910#L2448
> 
> Boot failed comparison:
>   - https://qa-reports.linaro.org/lkft/linux-next-master/build/next-20240822/testrun/24939658/suite/boot/test/clang-18-lkftconfig/history/
> 
> metadata:
> ----
>    git describe: next-20240822
>    git repo: https://gitlab.com/Linaro/lkft/mirrors/next/linux-next
>    git sha: 6a7917c89f219f09b1d88d09f376000914a52763
>    kernel config:
> https://storage.tuxsuite.com/public/linaro/lkft/builds/2l0EZh4ZCNgUovHichD9yUraMrY/config
>    kernel version: 6.11.0-rc4
>    artifact location:
> https://storage.tuxsuite.com/public/linaro/lkft/builds/2l0EZh4ZCNgUovHichD9yUraMrY/
>    build url: https://storage.tuxsuite.com/public/linaro/lkft/builds/2l0EZh4ZCNgUovHichD9yUraMrY/
>    toolchain: clang-18 and gcc-13
> 
> Steps to reproduce:
> ---------
>   - https://tuxapi.tuxsuite.com/v1/groups/linaro/projects/lkft/tests/2l0EbxmBUpGzF37iIJ51WvkJFt8/reproducer
>   - https://tuxapi.tuxsuite.com/v1/groups/linaro/projects/lkft/tests/2l0EbxmBUpGzF37iIJ51WvkJFt8/tux_plan
> 
> --
> Linaro LKFT
> https://lkft.linaro.org
> 



From devnull+xianwei.zhao.amlogic.com at kernel.org  Thu Aug 22 19:29:17 2024
From: devnull+xianwei.zhao.amlogic.com at kernel.org (Xianwei Zhao via B4 Relay)
Date: Fri, 23 Aug 2024 10:29:17 +0800
Subject: [PATCH v3 1/3] dt-bindings: clock: fix C3 PLL input parameter
In-Reply-To: <20240823-c3_add_node-v3-0-3648376037f4@amlogic.com>
References: <20240823-c3_add_node-v3-0-3648376037f4@amlogic.com>
Message-ID: <20240823-c3_add_node-v3-1-3648376037f4@amlogic.com>

From: Xianwei Zhao <xianwei.zhao at amlogic.com>

Add C3 PLL controller input clock parameters "fix".

The clock named "fix" was initially implemented in PLL clock controller driver.
However, some registers required secure zone access, so we moved it to
the secure zone (BL31) and accessed it through SCMI. Since the PLL clock
driver needs to use this clock, the "fix" clock is used as an input source.
We updated the driver but forgot to modify the binding accordingly,
so we are adding it here.

It is an ABI break but on a new and immature platform.
Noboby could really use that platform at this stage, so nothing is going
to break on anyone really.

Fixes: 0e6be855a96d ("dt-bindings: clock: add Amlogic C3 PLL clock controller")
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>
Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
---
 Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
index 43de3c6fc1cf..700865cc9792 100644
--- a/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
+++ b/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
@@ -24,11 +24,13 @@ properties:
     items:
       - description: input top pll
       - description: input mclk pll
+      - description: input fix pll
 
   clock-names:
     items:
       - const: top
       - const: mclk
+      - const: fix
 
   "#clock-cells":
     const: 1
@@ -52,8 +54,9 @@ examples:
             compatible = "amlogic,c3-pll-clkc";
             reg = <0x0 0x8000 0x0 0x1a4>;
             clocks = <&scmi_clk 2>,
-                     <&scmi_clk 5>;
-            clock-names = "top", "mclk";
+                     <&scmi_clk 5>,
+                     <&scmi_clk 12>;
+            clock-names = "top", "mclk", "fix";
             #clock-cells = <1>;
         };
     };

-- 
2.37.1




From devnull+xianwei.zhao.amlogic.com at kernel.org  Thu Aug 22 19:29:19 2024
From: devnull+xianwei.zhao.amlogic.com at kernel.org (Xianwei Zhao via B4 Relay)
Date: Fri, 23 Aug 2024 10:29:19 +0800
Subject: [PATCH v3 3/3] arm64: dts: amlogic: add C3 AW419 board
In-Reply-To: <20240823-c3_add_node-v3-0-3648376037f4@amlogic.com>
References: <20240823-c3_add_node-v3-0-3648376037f4@amlogic.com>
Message-ID: <20240823-c3_add_node-v3-3-3648376037f4@amlogic.com>

From: Xianwei Zhao <xianwei.zhao at amlogic.com>

Add Amlogic C3 C308L AW419 board. The corresponding binding
has been applied, therefore, this series does not need to
add a binding corresponding to the AW419 board.

Reviewed-by: Neil Armstrong <neil.armstrong at linaro.org>
Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
---
 arch/arm64/boot/dts/amlogic/Makefile               |   1 +
 .../boot/dts/amlogic/amlogic-c3-c308l-aw419.dts    | 262 +++++++++++++++++++++
 2 files changed, 263 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
index 9708abdadd7c..8db42f26c1e6 100644
--- a/arch/arm64/boot/dts/amlogic/Makefile
+++ b/arch/arm64/boot/dts/amlogic/Makefile
@@ -2,6 +2,7 @@
 dtb-$(CONFIG_ARCH_MESON) += amlogic-a4-a113l2-ba400.dtb
 dtb-$(CONFIG_ARCH_MESON) += amlogic-a5-a113x2-av400.dtb
 dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c302x-aw409.dtb
+dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c308l-aw419.dtb
 dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-an400.dtb
 dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
 dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3-c308l-aw419.dts b/arch/arm64/boot/dts/amlogic/amlogic-c3-c308l-aw419.dts
new file mode 100644
index 000000000000..4477a2659e27
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/amlogic-c3-c308l-aw419.dts
@@ -0,0 +1,262 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "amlogic-c3.dtsi"
+
+/ {
+	model = "Amlogic C308l aw419 Development Board";
+	compatible = "amlogic,aw419", "amlogic,c3";
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	aliases {
+		serial0 = &uart_b;
+		spi0 = &spifc;
+	};
+
+	memory at 0 {
+		device_type = "memory";
+		reg = <0x0 0x0 0x0 0x80000000>;
+	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		/* 9 MiB reserved for ARM Trusted Firmware */
+		secmon_reserved: secmon at 7f00000 {
+			compatible = "shared-dma-pool";
+			reg = <0x0 0x07f00000 0x0 0x900000>;
+			no-map;
+		};
+	};
+
+	main_12v: regulator-main-12v {
+		compatible = "regulator-fixed";
+		regulator-name = "12V";
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vcc_5v: regulator-vcc-5v {
+		compatible = "regulator-fixed";
+		regulator-name = "VCC5V";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&main_12v>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddq: regulator-vddq {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDQ";
+		regulator-min-microvolt = <1200000>;
+		regulator-max-microvolt = <1200000>;
+		vin-supply = <&main_12v>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddao_3v3: regulator-vddao-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDAO3V3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&main_12v>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddao_1v8: regulator-vddao-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDAO1V8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vddao_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	ddr4_2v5: regulator-ddr4-2v5 {
+		compatible = "regulator-fixed";
+		regulator-name = "DDR4_2V5";
+		regulator-min-microvolt = <2500000>;
+		regulator-max-microvolt = <2500000>;
+		vin-supply = <&vddao_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vcc_3v3: regulator-vcc-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "VCC3V3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vddao_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vcc_1v8: regulator-vcc-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "VCC1V8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vdd_1v8: regulator-vdd-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "VDD1V8_BOOT";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddio_b: regulator-vddio-3v3-b {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDIO_B";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vcc_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	sdcard: regulator-sdcard {
+		compatible = "regulator-fixed";
+		regulator-name = "SDCARD_POWER";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vddao_3v3>;
+		gpio = <&gpio GPIOA_4 GPIO_ACTIVE_LOW>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+};
+
+&uart_b {
+	status = "okay";
+};
+
+&nand {
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	pinctrl-0 = <&nand_pins>;
+	pinctrl-names = "default";
+
+	nand at 0 {
+		reg = <0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		nand-on-flash-bbt;
+
+		partition at 0 {
+			label = "boot";
+			reg = <0x0 0x00200000>;
+		};
+		partition at 200000 {
+			label = "env";
+			reg = <0x00200000 0x00400000>;
+		};
+		partition at 600000 {
+			label = "system";
+			reg = <0x00600000 0x00a00000>;
+		};
+		partition at 1000000 {
+			label = "rootfs";
+			reg = <0x01000000 0x03000000>;
+		};
+		partition at 4000000 {
+			label = "media";
+			reg = <0x04000000 0x8000000>;
+		};
+	};
+};
+
+&ethmac {
+	status = "okay";
+	phy-handle = <&internal_ephy>;
+	phy-mode = "rmii";
+};
+
+&spifc {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	pinctrl-0 = <&spifc_pins>;
+	pinctrl-names = "default";
+
+	nand at 0 {
+		compatible = "spi-nand";
+		reg = <0>;
+		spi-max-frequency = <83000000>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		status = "disabled";
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition at 0 {
+				label = "boot";
+				reg = <0 0x200000>;
+			};
+
+			partition at 200000 {
+				label = "env";
+				reg = <0x200000 0x400000>;
+			};
+
+			partition at 600000 {
+				label = "system";
+				reg = <0x600000 0xa00000>;
+			};
+
+			partition at 1000000 {
+				label = "rootfs";
+				reg = <0x1000000 0x3000000>;
+			};
+
+			partition at 4000000 {
+				label = "data";
+				reg = <0x4000000 0x8000000>;
+			};
+		};
+	};
+};
+
+&sd {
+	status = "okay";
+	pinctrl-0 = <&sdcard_pins>;
+	pinctrl-1 = <&sdcard_clk_gate_pins>;
+	pinctrl-names = "default","clk-gate";
+
+	bus-width = <4>;
+	cap-sd-highspeed;
+	max-frequency = <50000000>;
+	disable-wp;
+
+	cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
+	vmmc-supply = <&sdcard>;
+	vqmmc-supply = <&sdcard>;
+};

-- 
2.37.1




From devnull+xianwei.zhao.amlogic.com at kernel.org  Thu Aug 22 19:29:16 2024
From: devnull+xianwei.zhao.amlogic.com at kernel.org (Xianwei Zhao via B4 Relay)
Date: Fri, 23 Aug 2024 10:29:16 +0800
Subject: [PATCH v3 0/3] add some node for amlogic c3
Message-ID: <20240823-c3_add_node-v3-0-3648376037f4@amlogic.com>

Add some node for board AW409 and support board C308l AW419.

Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
---
Changes in v3:
- Change clkc_periphs node to the first.
- Link to v2: https://lore.kernel.org/r/20240820-c3_add_node-v2-0-8fd3f06b7bce at amlogic.com

Changes in v2:
- Delete unused sdio node in board level dts.
- Add the description of modifying the binding in commit msg.
- Add the reason why some node property fileds place at board level in commit msg.
- Link to v1: https://lore.kernel.org/r/20240806-c3_add_node-v1-0-c0de41341632 at amlogic.com

---
Xianwei Zhao (3):
      dt-bindings: clock: fix C3 PLL input parameter
      arm64: dts: amlogic: add some device nodes for C3
      arm64: dts: amlogic: add C3 AW419 board

 .../bindings/clock/amlogic,c3-pll-clkc.yaml        |   7 +-
 arch/arm64/boot/dts/amlogic/Makefile               |   1 +
 .../boot/dts/amlogic/amlogic-c3-c302x-aw409.dts    | 233 ++++++++++
 .../boot/dts/amlogic/amlogic-c3-c308l-aw419.dts    | 262 +++++++++++
 arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi        | 488 ++++++++++++++++++++-
 5 files changed, 988 insertions(+), 3 deletions(-)
---
base-commit: 7a5d2ce79d1fc8535a6f10e51011ae9671bd86e8
change-id: 20240806-c3_add_node-420a37918f18

Best regards,
-- 
Xianwei Zhao <xianwei.zhao at amlogic.com>




From devnull+xianwei.zhao.amlogic.com at kernel.org  Thu Aug 22 19:29:18 2024
From: devnull+xianwei.zhao.amlogic.com at kernel.org (Xianwei Zhao via B4 Relay)
Date: Fri, 23 Aug 2024 10:29:18 +0800
Subject: [PATCH v3 2/3] arm64: dts: amlogic: add some device nodes for C3
In-Reply-To: <20240823-c3_add_node-v3-0-3648376037f4@amlogic.com>
References: <20240823-c3_add_node-v3-0-3648376037f4@amlogic.com>
Message-ID: <20240823-c3_add_node-v3-2-3648376037f4@amlogic.com>

From: Xianwei Zhao <xianwei.zhao at amlogic.com>

Add some device nodes for SoC C3, including periphs clock controller
node, PLL clock controller node, SPICC node, regulator node, NAND
controller node, sdcard node, Ethernet MAC and PHY node.

The sdacrd depends on regulator and pinctrl(select), so some
property fields are placed at the board level. The nand chip
is placed on the board, So some property fields about SPIFC
and NAND controller node are placed at the board level.
THe Ethernet MAC support outchip PHY, so place this property
field(select PHY) at the board level.

Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
---
 .../boot/dts/amlogic/amlogic-c3-c302x-aw409.dts    | 233 ++++++++++
 arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi        | 488 ++++++++++++++++++++-
 2 files changed, 720 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts b/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts
index edce8850b338..b8d2037afc00 100644
--- a/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts
+++ b/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts
@@ -16,14 +16,247 @@ / {
 
 	aliases {
 		serial0 = &uart_b;
+		spi0 = &spifc;
 	};
 
 	memory at 0 {
 		device_type = "memory";
 		reg = <0x0 0x0 0x0 0x10000000>;
 	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		/* 9 MiB reserved for ARM Trusted Firmware */
+		secmon_reserved: secmon at 7f00000 {
+			compatible = "shared-dma-pool";
+			reg = <0x0 0x07f00000 0x0 0x900000>;
+			no-map;
+		};
+	};
+
+	main_12v: regulator-main-12v {
+		compatible = "regulator-fixed";
+		regulator-name = "12V";
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vcc_5v: regulator-vcc-5v {
+		compatible = "regulator-fixed";
+		regulator-name = "VCC5V";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&main_12v>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddq: regulator-vddq {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDQ";
+		regulator-min-microvolt = <1200000>;
+		regulator-max-microvolt = <1200000>;
+		vin-supply = <&main_12v>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddao_3v3: regulator-vddao-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDAO3V3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&main_12v>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddao_1v8: regulator-vddao-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDAO1V8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vddao_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	ddr4_2v5: regulator-ddr4-2v5 {
+		compatible = "regulator-fixed";
+		regulator-name = "DDR4_2V5";
+		regulator-min-microvolt = <2500000>;
+		regulator-max-microvolt = <2500000>;
+		vin-supply = <&vddao_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vcc_3v3: regulator-vcc-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "VCC3V3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vddao_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vcc_1v8: regulator-vcc-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "VCC1V8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vdd_1v8: regulator-vdd-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "VDD1V8_BOOT";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddio_b: regulator-vddio-3v3-b {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDIO_B";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vcc_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	sdcard: regulator-sdcard {
+		compatible = "regulator-fixed";
+		regulator-name = "SDCARD_POWER";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vddao_3v3>;
+		gpio = <&gpio GPIOA_4 GPIO_ACTIVE_LOW>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
 };
 
 &uart_b {
 	status = "okay";
 };
+
+&nand {
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	pinctrl-0 = <&nand_pins>;
+	pinctrl-names = "default";
+
+	nand at 0 {
+		reg = <0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		nand-on-flash-bbt;
+
+		partition at 0 {
+			label = "boot";
+			reg = <0x0 0x00200000>;
+		};
+		partition at 200000 {
+			label = "env";
+			reg = <0x00200000 0x00400000>;
+		};
+		partition at 600000 {
+			label = "system";
+			reg = <0x00600000 0x00a00000>;
+		};
+		partition at 1000000 {
+			label = "rootfs";
+			reg = <0x01000000 0x03000000>;
+		};
+		partition at 4000000 {
+			label = "media";
+			reg = <0x04000000 0x8000000>;
+		};
+	};
+};
+
+&ethmac {
+	status = "okay";
+	phy-handle = <&internal_ephy>;
+	phy-mode = "rmii";
+};
+
+&spifc {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	pinctrl-0 = <&spifc_pins>;
+	pinctrl-names = "default";
+
+	nand at 0 {
+		compatible = "spi-nand";
+		reg = <0>;
+		spi-max-frequency = <83000000>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		status = "disabled";
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition at 0 {
+				label = "boot";
+				reg = <0 0x200000>;
+			};
+
+			partition at 200000 {
+				label = "env";
+				reg = <0x200000 0x400000>;
+			};
+
+			partition at 600000 {
+				label = "system";
+				reg = <0x600000 0xa00000>;
+			};
+
+			partition at 1000000 {
+				label = "rootfs";
+				reg = <0x1000000 0x3000000>;
+			};
+
+			partition at 4000000 {
+				label = "data";
+				reg = <0x4000000 0x8000000>;
+			};
+		};
+	};
+};
+
+&sd {
+	status = "okay";
+	pinctrl-0 = <&sdcard_pins>;
+	pinctrl-1 = <&sdcard_clk_gate_pins>;
+	pinctrl-names = "default","clk-gate";
+
+	bus-width = <4>;
+	cap-sd-highspeed;
+	max-frequency = <50000000>;
+	disable-wp;
+
+	cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
+	vmmc-supply = <&sdcard>;
+	vqmmc-supply = <&sdcard>;
+};
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
index c913dd409e64..c0ce776ec463 100644
--- a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
+++ b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
@@ -7,6 +7,11 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/reset/amlogic,c3-reset.h>
+#include <dt-bindings/clock/amlogic,c3-pll-clkc.h>
+#include <dt-bindings/clock/amlogic,c3-scmi-clkc.h>
+#include <dt-bindings/clock/amlogic,c3-peripherals-clkc.h>
+#include <dt-bindings/power/amlogic,c3-pwrc.h>
+#include <dt-bindings/gpio/amlogic-c3-gpio.h>
 
 / {
 	cpus {
@@ -57,6 +62,34 @@ pwrc: power-controller {
 		};
 	};
 
+	sram {
+		compatible = "mmio-sram";
+		reg = <0x0 0x07f50e00 0x0 0x100>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0x0 0x07f50e00 0x100>;
+
+		scmi_shmem: sram at 0 {
+			compatible = "arm,scmi-shmem";
+			reg = <0x0 0x100>;
+		};
+	};
+
+	firmware {
+		scmi: scmi {
+			compatible = "arm,scmi-smc";
+			arm,smc-id = <0x820000C1>;
+			shmem = <&scmi_shmem>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			scmi_clk: protocol at 14 {
+				reg = <0x14>;
+				#clock-cells = <1>;
+			};
+		};
+	};
+
 	soc {
 		compatible = "simple-bus";
 		#address-cells = <2>;
@@ -82,6 +115,44 @@ apb4: bus at fe000000 {
 			#size-cells = <2>;
 			ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
 
+			clkc_periphs: clock-controller at 0 {
+				compatible = "amlogic,c3-peripherals-clkc";
+				reg = <0x0 0x0 0x0 0x49c>;
+				#clock-cells = <1>;
+				clocks = <&xtal>,
+					 <&scmi_clk CLKID_OSC>,
+					 <&scmi_clk CLKID_FIXED_PLL_OSC>,
+					 <&clkc_pll CLKID_FCLK_DIV2>,
+					 <&clkc_pll CLKID_FCLK_DIV2P5>,
+					 <&clkc_pll CLKID_FCLK_DIV3>,
+					 <&clkc_pll CLKID_FCLK_DIV4>,
+					 <&clkc_pll CLKID_FCLK_DIV5>,
+					 <&clkc_pll CLKID_FCLK_DIV7>,
+					 <&clkc_pll CLKID_GP0_PLL>,
+					 <&scmi_clk CLKID_GP1_PLL_OSC>,
+					 <&clkc_pll CLKID_HIFI_PLL>,
+					 <&scmi_clk CLKID_SYS_CLK>,
+					 <&scmi_clk CLKID_AXI_CLK>,
+					 <&scmi_clk CLKID_SYS_PLL_DIV16>,
+					 <&scmi_clk CLKID_CPU_CLK_DIV16>;
+				clock-names = "xtal_24m",
+					      "oscin",
+					      "fix",
+					      "fdiv2",
+					      "fdiv2p5",
+					      "fdiv3",
+					      "fdiv4",
+					      "fdiv5",
+					      "fdiv7",
+					      "gp0",
+					      "gp1",
+					      "hifi",
+					      "sysclk",
+					      "axiclk",
+					      "sysplldiv16",
+					      "cpudiv16";
+			};
+
 			reset: reset-controller at 2000 {
 				compatible = "amlogic,c3-reset";
 				reg = <0x0 0x2000 0x0 0x98>;
@@ -108,6 +179,237 @@ gpio: bank at 4000 {
 					#gpio-cells = <2>;
 					gpio-ranges = <&periphs_pinctrl 0 0 55>;
 				};
+
+				i2c0_pins1: i2c0-pins1 {
+					mux {
+						groups = "i2c0_sda_e",
+							 "i2c0_scl_e";
+						function = "i2c0";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c0_pins2: i2c0-pins2 {
+					mux {
+						groups = "i2c0_sda_d",
+							 "i2c0_scl_d";
+						function = "i2c0";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c1_pins1: i2c1-pins1 {
+					mux {
+						groups = "i2c1_sda_x",
+							 "i2c1_scl_x";
+						function = "i2c1";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c1_pins2: i2c1-pins2 {
+					mux {
+						groups = "i2c1_sda_d",
+							 "i2c1_scl_d";
+						function = "i2c1";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c1_pins3: i2c1-pins3 {
+					mux {
+						groups = "i2c1_sda_a",
+							 "i2c1_scl_a";
+						function = "i2c1";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c1_pins4: i2c1-pins4 {
+					mux {
+						groups = "i2c1_sda_b",
+							 "i2c1_scl_b";
+						function = "i2c1";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c2_pins1: i2c2-pins1 {
+					mux {
+						groups = "i2c2_sda",
+							 "i2c2_scl";
+						function = "i2c2";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c3_pins1: i2c3-pins1 {
+					mux {
+						groups = "i2c3_sda_c",
+							 "i2c3_scl_c";
+						function = "i2c3";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c3_pins2: i2c3-pins2 {
+					mux {
+						groups = "i2c3_sda_x",
+							 "i2c3_scl_x";
+						function = "i2c3";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c3_pins3: i2c3-pins3 {
+					mux {
+						groups = "i2c3_sda_d",
+							 "i2c3_scl_d";
+						function = "i2c3";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				nand_pins: nand-pins {
+					mux {
+						groups = "emmc_nand_d0",
+							 "emmc_nand_d1",
+							 "emmc_nand_d2",
+							 "emmc_nand_d3",
+							 "emmc_nand_d4",
+							 "emmc_nand_d5",
+							 "emmc_nand_d6",
+							 "emmc_nand_d7",
+							 "nand_ce0",
+							 "nand_ale",
+							 "nand_cle",
+							 "nand_wen_clk",
+							 "nand_ren_wr";
+						function = "nand";
+						input-enable;
+					};
+				};
+
+				sdcard_pins: sdcard-pins {
+					mux {
+						groups = "sdcard_d0",
+							 "sdcard_d1",
+							 "sdcard_d2",
+							 "sdcard_d3",
+							 "sdcard_clk",
+							 "sdcard_cmd";
+						function = "sdcard";
+						bias-pull-up;
+						drive-strength-microamp = <4000>;
+					};
+				};
+
+				sdcard_clk_gate_pins: sdcard-clk-cmd-pins {
+					mux {
+						groups = "GPIOC_4";
+						function = "gpio_periphs";
+						bias-pull-down;
+						drive-strength-microamp = <4000>;
+					};
+				};
+
+				sdio_m_clk_gate_pins: sdio-m-clk-cmd-pins {
+					mux {
+						groups = "sdio_clk";
+						function = "sdio";
+						bias-pull-down;
+						drive-strength-microamp = <4000>;
+					};
+				};
+
+				sdio_m_pins: sdio-m-all-pins {
+					mux {
+						groups = "sdio_d0",
+							 "sdio_d1",
+							 "sdio_d2",
+							 "sdio_d3",
+							 "sdio_clk",
+							 "sdio_cmd";
+						function = "sdio";
+						input-enable;
+						bias-pull-up;
+						drive-strength-microamp = <4000>;
+					};
+				};
+
+				spicc0_pins1: spicc0-pins1 {
+					mux {
+						groups = "spi_a_mosi_b",
+							 "spi_a_miso_b",
+							 "spi_a_clk_b";
+						function = "spi_a";
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				spicc0_pins2: spicc0-pins2 {
+					mux {
+						groups = "spi_a_mosi_c",
+							 "spi_a_miso_c",
+							 "spi_a_clk_c";
+						function = "spi_a";
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				spicc0_pins3: spicc0-pins3 {
+					mux {
+						groups = "spi_a_mosi_x",
+							 "spi_a_miso_x",
+							 "spi_a_clk_x";
+						function = "spi_a";
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				spicc1_pins1: spicc1-pins1 {
+					mux {
+						groups = "spi_b_mosi_d",
+							 "spi_b_miso_d",
+							 "spi_b_clk_d";
+						function = "spi_b";
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				spicc1_pins2: spicc1-pins2 {
+					mux {
+						groups = "spi_b_mosi_x",
+							 "spi_b_miso_x",
+							 "spi_b_clk_x";
+						function = "spi_b";
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				spifc_pins: spifc-pins {
+					mux {
+						groups = "spif_mo",
+							 "spif_mi",
+							 "spif_clk",
+							 "spif_cs",
+							 "spif_hold",
+							 "spif_wp",
+							 "spif_clk_loop";
+						function = "spif";
+						drive-strength-microamp = <4000>;
+					};
+				};
 			};
 
 			gpio_intc: interrupt-controller at 4080 {
@@ -119,13 +421,131 @@ gpio_intc: interrupt-controller at 4080 {
 					<10 11 12 13 14 15 16 17 18 19 20 21>;
 			};
 
+			clkc_pll: clock-controller at 8000 {
+				compatible = "amlogic,c3-pll-clkc";
+				reg = <0x0 0x8000 0x0 0x1a4>;
+				#clock-cells = <1>;
+				clocks = <&scmi_clk CLKID_TOP_PLL_OSC>,
+					 <&scmi_clk CLKID_MCLK_PLL_OSC>,
+					 <&scmi_clk CLKID_FIXED_PLL_OSC>;
+				clock-names = "top",
+					      "mclk",
+					      "fix";
+			};
+
+			eth_phy: mdio-multiplexer at 28000 {
+				compatible = "amlogic,g12a-mdio-mux";
+				reg = <0x0 0x28000 0x0 0xa4>;
+
+				clocks = <&clkc_periphs CLKID_SYS_ETH_PHY>,
+					 <&xtal>,
+					 <&clkc_pll CLKID_FCLK_50M>;
+				clock-names = "pclk", "clkin0", "clkin1";
+				mdio-parent-bus = <&mdio0>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				ext_mdio: mdio at 0 {
+					reg = <0>;
+					#address-cells = <1>;
+					#size-cells = <0>;
+				};
+
+				int_mdio: mdio at 1 {
+					reg = <1>;
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					internal_ephy: ethernet_phy at 8 {
+						compatible = "ethernet-phy-id0180.3301",
+							     "ethernet-phy-ieee802.3-c22";
+						interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+						reg = <8>;
+						max-speed = <100>;
+					};
+				};
+			};
+
+			spicc0: spi at 50000 {
+				compatible = "amlogic,meson-g12a-spicc";
+				reg = <0x0 0x50000 0x0 0x44>;
+				interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clkc_periphs CLKID_SYS_SPICC_0>,
+					 <&clkc_periphs CLKID_SPICC_A>;
+				clock-names = "core", "pclk";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+
+			spicc1: spi at 52000 {
+				compatible = "amlogic,meson-g12a-spicc";
+				reg = <0x0 0x52000 0x0 0x44>;
+				interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clkc_periphs CLKID_SYS_SPICC_1>,
+					 <&clkc_periphs CLKID_SPICC_B>;
+				clock-names = "core", "pclk";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+
+			spifc: spi at 56000 {
+				compatible = "amlogic,a1-spifc";
+				reg = <0x0 0x56000 0x0 0x290>;
+				interrupts = <GIC_SPI 182 IRQ_TYPE_EDGE_RISING>;
+				clocks = <&clkc_periphs CLKID_SPIFC>;
+				clock-names = "core";
+				status = "disabled";
+			};
+
+			i2c0: i2c at 66000 {
+				compatible = "amlogic,meson-axg-i2c";
+				reg = <0x0 0x66000 0x0 0x24>;
+				interrupts = <GIC_SPI 160 IRQ_TYPE_EDGE_RISING>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&clkc_periphs CLKID_SYS_I2C_M_A>;
+				status = "disabled";
+			};
+
+			i2c1: i2c at 68000 {
+				compatible = "amlogic,meson-axg-i2c";
+				reg = <0x0 0x68000 0x0 0x24>;
+				interrupts = <GIC_SPI 161 IRQ_TYPE_EDGE_RISING>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&clkc_periphs CLKID_SYS_I2C_M_B>;
+				status = "disabled";
+			};
+
+			i2c2: i2c at 6a000 {
+				compatible = "amlogic,meson-axg-i2c";
+				reg = <0x0 0x6a000 0x0 0x24>;
+				interrupts = <GIC_SPI 162 IRQ_TYPE_EDGE_RISING>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&clkc_periphs CLKID_SYS_I2C_M_C>;
+				status = "disabled";
+			};
+
+			i2c3: i2c at 6c000 {
+				compatible = "amlogic,meson-axg-i2c";
+				reg = <0x0 0x6c000 0x0 0x24>;
+				interrupts = <GIC_SPI 163 IRQ_TYPE_EDGE_RISING>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&clkc_periphs CLKID_SYS_I2C_M_D>;
+				status = "disabled";
+			};
+
 			uart_b: serial at 7a000 {
 				compatible = "amlogic,meson-s4-uart",
 					   "amlogic,meson-ao-uart";
 				reg = <0x0 0x7a000 0x0 0x18>;
 				interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
 				status = "disabled";
-				clocks = <&xtal>, <&xtal>, <&xtal>;
+				clocks = <&xtal>, <&clkc_periphs CLKID_SYS_UART_B>, <&xtal>;
 				clock-names = "xtal", "pclk", "baud";
 			};
 
@@ -136,6 +556,72 @@ sec_ao: ao-secure at 10220 {
 				reg = <0x0 0x10220 0x0 0x140>;
 				amlogic,has-chip-id;
 			};
+
+			sdio: mmc at 88000 {
+				compatible = "amlogic,meson-axg-mmc";
+				reg = <0x0 0x88000 0x0 0x800>;
+				interrupts = <GIC_SPI 176 IRQ_TYPE_EDGE_RISING>;
+				power-domains = <&pwrc PWRC_C3_SDIOA_ID>;
+				clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_A>,
+					  <&clkc_periphs CLKID_SD_EMMC_A>,
+					  <&clkc_pll CLKID_FCLK_DIV2>;
+				clock-names = "core","clkin0", "clkin1";
+				no-mmc;
+				no-sd;
+				resets = <&reset RESET_SD_EMMC_A>;
+				status = "disabled";
+			};
+
+			sd: mmc at 8a000 {
+				compatible = "amlogic,meson-axg-mmc";
+				reg = <0x0 0x8a000 0x0 0x800>;
+				interrupts = <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>;
+				power-domains = <&pwrc PWRC_C3_SDCARD_ID>;
+				clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_B>,
+					<&clkc_periphs CLKID_SD_EMMC_B>,
+					<&clkc_pll CLKID_FCLK_DIV2>;
+				clock-names = "core", "clkin0", "clkin1";
+				no-mmc;
+				no-sdio;
+				resets = <&reset RESET_SD_EMMC_B>;
+				status = "disabled";
+			};
+
+			nand: nand-controller at 8d000 {
+				compatible = "amlogic,meson-axg-nfc";
+				reg = <0x0 0x8d000 0x0 0x200>,
+					<0x0 0x8C000 0x0 0x4>;
+				reg-names = "nfc", "emmc";
+				interrupts = <GIC_SPI 87 IRQ_TYPE_EDGE_RISING>;
+				clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_C>,
+					<&clkc_pll CLKID_FCLK_DIV2>;
+				clock-names = "core", "device";
+				status = "disabled";
+			};
+		};
+
+		ethmac: ethernet at fdc00000 {
+			compatible = "amlogic,meson-g12a-dwmac",
+				     "snps,dwmac-3.70a",
+				     "snps,dwmac";
+			reg = <0x0 0xfdc00000 0x0 0x10000>,
+			      <0x0 0xfe024000 0x0 0x8>;
+			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "macirq";
+			power-domains = <&pwrc PWRC_C3_ETH_ID>;
+			clocks = <&clkc_periphs CLKID_SYS_ETH_MAC>,
+				 <&clkc_pll CLKID_FCLK_DIV2>,
+				 <&clkc_pll CLKID_FCLK_50M>;
+			clock-names = "stmmaceth", "clkin0", "clkin1";
+			rx-fifo-depth = <4096>;
+			tx-fifo-depth = <2048>;
+			status = "disabled";
+
+			mdio0: mdio {
+				compatible = "snps,dwmac-mdio";
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
 		};
 	};
 };

-- 
2.37.1




From krzysztof.kozlowski at linaro.org  Thu Aug 22 23:41:16 2024
From: krzysztof.kozlowski at linaro.org (Krzysztof Kozlowski)
Date: Fri, 23 Aug 2024 08:41:16 +0200
Subject: [PATCH v3 1/3] dt-bindings: clock: fix C3 PLL input parameter
In-Reply-To: <20240823-c3_add_node-v3-1-3648376037f4@amlogic.com>
References: <20240823-c3_add_node-v3-0-3648376037f4@amlogic.com>
 <20240823-c3_add_node-v3-1-3648376037f4@amlogic.com>
Message-ID: <5hghvuv2hy4l2ofve4ghb3nhvg76pwpilulznzja25hurxxwcp@2idkyyomv5w5>

On Fri, Aug 23, 2024 at 10:29:17AM +0800, Xianwei Zhao wrote:
> Add C3 PLL controller input clock parameters "fix".
> 
> The clock named "fix" was initially implemented in PLL clock controller driver.
> However, some registers required secure zone access, so we moved it to
> the secure zone (BL31) and accessed it through SCMI. Since the PLL clock
> driver needs to use this clock, the "fix" clock is used as an input source.
> We updated the driver but forgot to modify the binding accordingly,

Please wrap commit message according to Linux coding style / submission
process (neither too early nor over the limit):
https://elixir.bootlin.com/linux/v6.4-rc1/source/Documentation/process/submitting-patches.rst#L597

Best regards,
Krzysztof



From devnull+xianwei.zhao.amlogic.com at kernel.org  Fri Aug 23 02:19:43 2024
From: devnull+xianwei.zhao.amlogic.com at kernel.org (Xianwei Zhao via B4 Relay)
Date: Fri, 23 Aug 2024 17:19:43 +0800
Subject: [PATCH 0/3] support for amlogic rtc
Message-ID: <20240823-rtc-v1-0-6f70381da283@amlogic.com>

Add rtc driver and bindigns for the amlogic A113L2 and A113X2 SoCs

Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
---
Yiting Deng (3):
      dt-bindings: rtc: Add Amlogic A311L2 and A113X2 rtc
      rtc: support for the Amlogic on-chip RTC
      MAINTAINERS: Add an entry for Amlogic RTC driver

 .../bindings/rtc/amlogic,amlogic-rtc.yaml          |  66 +++
 MAINTAINERS                                        |   8 +
 drivers/rtc/Kconfig                                |  12 +
 drivers/rtc/Makefile                               |   1 +
 drivers/rtc/rtc-amlogic.c                          | 589 +++++++++++++++++++++
 5 files changed, 676 insertions(+)
---
base-commit: dff71e5c6076314f3eefe700abd6af834c57bd64
change-id: 20240823-rtc-127cd8192a13

Best regards,
-- 
Xianwei Zhao <xianwei.zhao at amlogic.com>




From devnull+xianwei.zhao.amlogic.com at kernel.org  Fri Aug 23 02:19:46 2024
From: devnull+xianwei.zhao.amlogic.com at kernel.org (Xianwei Zhao via B4 Relay)
Date: Fri, 23 Aug 2024 17:19:46 +0800
Subject: [PATCH 3/3] MAINTAINERS: Add an entry for Amlogic RTC driver
In-Reply-To: <20240823-rtc-v1-0-6f70381da283@amlogic.com>
References: <20240823-rtc-v1-0-6f70381da283@amlogic.com>
Message-ID: <20240823-rtc-v1-3-6f70381da283@amlogic.com>

From: Yiting Deng <yiting.deng at amlogic.com>

Add Amlogic RTC entry to MAINTAINERS to clarify the maintainers

Signed-off-by: Yiting Deng <yiting.deng at amlogic.com>
Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
---
 MAINTAINERS | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 42decde38320..672290dddaaa 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2481,6 +2481,14 @@ F:	drivers/irqchip/irq-mvebu-*
 F:	drivers/pinctrl/mvebu/
 F:	drivers/rtc/rtc-armada38x.c
 
+ARM/Amlogic RTC Driver
+M:	Yiting Deng <yiting.deng at amlogic.com>
+M:	Xianwei Zhao <xianwei.zhao at amlogic.com>
+L:	linux-amlogic at lists.infradead.org
+S:	Maintained
+F:	Documentation/devicetree/bindings/rtc/amlogic,amlogic-rtc.yaml
+F:	drivers/rtc/rtc-amlogic.c
+
 ARM/Mediatek RTC DRIVER
 M:	Eddie Huang <eddie.huang at mediatek.com>
 M:	Sean Wang <sean.wang at mediatek.com>

-- 
2.37.1




From devnull+xianwei.zhao.amlogic.com at kernel.org  Fri Aug 23 02:19:45 2024
From: devnull+xianwei.zhao.amlogic.com at kernel.org (Xianwei Zhao via B4 Relay)
Date: Fri, 23 Aug 2024 17:19:45 +0800
Subject: [PATCH 2/3] rtc: support for the Amlogic on-chip RTC
In-Reply-To: <20240823-rtc-v1-0-6f70381da283@amlogic.com>
References: <20240823-rtc-v1-0-6f70381da283@amlogic.com>
Message-ID: <20240823-rtc-v1-2-6f70381da283@amlogic.com>

From: Yiting Deng <yiting.deng at amlogic.com>

Support for the on-chip RTC found in some of Amlogic's SoCs such as the
A113L2 and A113X2.

Signed-off-by: Yiting Deng <yiting.deng at amlogic.com>
Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
---
 drivers/rtc/Kconfig       |  12 +
 drivers/rtc/Makefile      |   1 +
 drivers/rtc/rtc-amlogic.c | 589 ++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 602 insertions(+)

diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 2a95b05982ad..0dd042701c3b 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -2043,4 +2043,16 @@ config RTC_DRV_SSD202D
 	  This driver can also be built as a module, if so, the module
 	  will be called "rtc-ssd20xd".
 
+config RTC_DRV_AMLOGIC
+	tristate "Amlogic RTC"
+	depends on ARCH_MESON || COMPILE_TEST
+	select REGMAP_MMIO
+	default y
+	help
+	  If you say yes here you get support for the RTC block on the
+	  Amlogic A113L2(A4) and A113X2(A5) SoCs.
+
+	  This driver can also be built as a module. If so, the module
+	  will be called "rtc-amlogic".
+
 endif # RTC_CLASS
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 3004e372f25f..d4a56ddb4246 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_RTC_DRV_ABB5ZES3)	+= rtc-ab-b5ze-s3.o
 obj-$(CONFIG_RTC_DRV_ABEOZ9)	+= rtc-ab-eoz9.o
 obj-$(CONFIG_RTC_DRV_ABX80X)	+= rtc-abx80x.o
 obj-$(CONFIG_RTC_DRV_AC100)	+= rtc-ac100.o
+obj-$(CONFIG_RTC_DRV_AMLOGIC)	+= rtc-amlogic.o
 obj-$(CONFIG_RTC_DRV_ARMADA38X)	+= rtc-armada38x.o
 obj-$(CONFIG_RTC_DRV_AS3722)	+= rtc-as3722.o
 obj-$(CONFIG_RTC_DRV_ASM9260)	+= rtc-asm9260.o
diff --git a/drivers/rtc/rtc-amlogic.c b/drivers/rtc/rtc-amlogic.c
new file mode 100644
index 000000000000..7c681a2320d3
--- /dev/null
+++ b/drivers/rtc/rtc-amlogic.c
@@ -0,0 +1,589 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
+/*
+ * Copyright (C) 2024 Amlogic, Inc. All rights reserved
+ * Author: Yiting Deng <yiting.deng at amlogic.com>
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/bitfield.h>
+#include <linux/rtc.h>
+#include <linux/clk.h>
+#include <linux/clk-provider.h>
+#include <linux/time64.h>
+#include <linux/delay.h>
+
+/* rtc oscillator rate */
+#define OSC_32K			(32768)
+#define OSC_24M			(24000000)
+
+#define RTC_CTRL		(0x0 << 2)		/* Control RTC */
+#define RTC_ALRM0_EN		BIT(0)
+#define RTC_OSC_SEL		BIT(8)
+#define RTC_ENABLE		BIT(12)
+
+#define RTC_COUNTER_REG		(0x1 << 2)		/* Program RTC counter initial value */
+
+#define RTC_ALARM0_REG		(0x2 << 2)		/* Program RTC alarm0 value */
+
+#define RTC_SEC_ADJUST_REG	(0x6 << 2)		/* Control second-based timing adjustment */
+#define RTC_MATCH_COUNTER	GENMASK(18, 0)
+#define RTC_SEC_ADJUST_CTRL	GENMASK(20, 19)
+#define RTC_ADJ_VALID		BIT(23)
+#define RTC_DIV256_ADJ_VAL	BIT(24)
+#define RTC_DIV256_ADJ_DSR	BIT(25)
+
+#define RTC_INT_MASK		(0x8 << 2)		/* RTC interrupt mask */
+#define RTC_ALRM0_IRQ_MSK	BIT(0)
+
+#define RTC_INT_CLR		(0x9 << 2)		/* Clear RTC interrupt */
+#define RTC_ALRM0_IRQ_CLR	BIT(0)
+
+#define RTC_OSCIN_CTRL0		(0xa << 2)		/* Control RTC clk from 24M */
+#define RTC_OSCIN_CTRL1		(0xb << 2)		/* Control RTC clk from 24M */
+#define RTC_OSCIN_IN_EN		BIT(31)
+#define RTC_OSCIN_OUT_CFG	GENMASK(29, 28)
+#define RTC_OSCIN_OUT_N0M0	GENMASK(11, 0)
+#define RTC_OSCIN_OUT_N1M1	GENMASK(23, 12)
+
+#define RTC_INT_STATUS		(0xc << 2)		/* RTC interrupt status */
+#define RTC_ALRM0_IRQ_STATUS	BIT(0)
+
+#define RTC_REAL_TIME		(0xd << 2)		/* RTC time value */
+
+#define RTC_OSCIN_OUT_32K_N0	0x2dc
+#define RTC_OSCIN_OUT_32K_N1	0x2db
+#define RTC_OSCIN_OUT_32K_M0	0x1
+#define RTC_OSCIN_OUT_32K_M1	0x2
+
+struct aml_rtc_config {
+	bool gray_stored;
+};
+
+struct aml_rtc_data {
+	struct regmap *map;
+	struct rtc_device *rtc_dev;
+	int irq;
+	struct clk *sclk;
+	const struct aml_rtc_config *config;
+};
+
+static const struct regmap_config aml_rtc_regmap_config = {
+	.reg_bits = 32,
+	.val_bits = 32,
+	.reg_stride = 4,
+	.max_register = RTC_REAL_TIME,
+};
+
+static u32 gray_to_binary(u32 gray)
+{
+	u32 bcd = gray;
+	int size = sizeof(bcd) * 8;
+	int i;
+
+	for (i = 0; (1 << i) < size; i++)
+		bcd ^= bcd >> (1 << i);
+
+	return bcd;
+}
+
+static u32 binary_to_gray(u32 bcd)
+{
+	return bcd ^ (bcd >> 1);
+}
+
+static void aml_set_time(struct aml_rtc_data *rtc, u32 time_sec)
+{
+	if (rtc->config->gray_stored)
+		time_sec = binary_to_gray(time_sec);
+	regmap_write(rtc->map, RTC_COUNTER_REG, time_sec);
+}
+
+static u32 aml_read_time(struct aml_rtc_data *rtc)
+{
+	u32 time_sec;
+
+	regmap_read(rtc->map, RTC_REAL_TIME, &time_sec);
+	if (rtc->config->gray_stored)
+		time_sec = gray_to_binary(time_sec);
+	return time_sec;
+}
+
+static u32 aml_read_alarm(struct aml_rtc_data *rtc)
+{
+	u32 alarm_sec;
+
+	regmap_read(rtc->map, RTC_ALARM0_REG, &alarm_sec);
+	if (rtc->config->gray_stored)
+		alarm_sec = gray_to_binary(alarm_sec);
+	return alarm_sec;
+}
+
+static void aml_set_alarm(struct aml_rtc_data *rtc, u32 alarm_sec)
+{
+	if (rtc->config->gray_stored)
+		alarm_sec = binary_to_gray(alarm_sec);
+	regmap_write(rtc->map, RTC_ALARM0_REG, alarm_sec);
+}
+
+static int aml_rtc_read_time(struct device *dev, struct rtc_time *tm)
+{
+	struct aml_rtc_data *rtc = dev_get_drvdata(dev);
+	u32 time_sec;
+
+	time_sec = aml_read_time(rtc);
+	rtc_time64_to_tm(time_sec, tm);
+	dev_dbg(dev, "%s: read time = %us\n", __func__, time_sec);
+
+	return 0;
+}
+
+static int aml_rtc_set_time(struct device *dev, struct rtc_time *tm)
+{
+	struct aml_rtc_data *rtc = dev_get_drvdata(dev);
+	u32 time_sec;
+
+	time_sec = rtc_tm_to_time64(tm);
+	aml_set_time(rtc, time_sec);
+	dev_dbg(dev, "%s: set time = %us\n", __func__, time_sec);
+
+	return 0;
+}
+
+static int aml_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
+{
+	struct aml_rtc_data *rtc = dev_get_drvdata(dev);
+	time64_t alarm_sec;
+
+	if (alarm->enabled) {
+		regmap_update_bits(rtc->map, RTC_CTRL,
+				   RTC_ALRM0_EN, RTC_ALRM0_EN);
+		regmap_update_bits(rtc->map, RTC_INT_MASK,
+				   RTC_ALRM0_IRQ_MSK, 0);
+
+		alarm_sec = rtc_tm_to_time64(&alarm->time);
+		if (alarm_sec > U32_MAX) {
+			dev_err(dev, "alarm value invalid!\n");
+			return -EINVAL;
+		}
+		aml_set_alarm(rtc, alarm_sec);
+	}
+	dev_dbg(dev, "%s: alarm->enabled=%d alarm_set=%llds\n", __func__,
+		alarm->enabled, alarm_sec);
+
+	return 0;
+}
+
+static int aml_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
+{
+	struct aml_rtc_data *rtc = dev_get_drvdata(dev);
+	u32 alarm_sec;
+	u32 reg_val;
+	int alarm_enable, alarm_mask;
+
+	alarm_sec = aml_read_alarm(rtc);
+	rtc_time64_to_tm(alarm_sec, &alarm->time);
+
+	regmap_read(rtc->map, RTC_CTRL, &reg_val);
+	alarm_enable = FIELD_GET(RTC_ALRM0_EN, reg_val);
+
+	regmap_read(rtc->map, RTC_INT_MASK, &reg_val);
+	alarm_mask = FIELD_GET(RTC_ALRM0_IRQ_MSK, reg_val);
+
+	alarm->enabled = (alarm_enable && !alarm_mask) ? 1 : 0;
+	dev_dbg(dev, "%s: alarm->enabled=%d alarm=%us\n", __func__,
+		alarm->enabled, alarm_sec);
+
+	return 0;
+}
+
+static int aml_rtc_alarm_enable(struct device *dev, unsigned int enabled)
+{
+	struct aml_rtc_data *rtc = dev_get_drvdata(dev);
+
+	if (enabled) {
+		regmap_update_bits(rtc->map, RTC_CTRL,
+				   RTC_ALRM0_EN, RTC_ALRM0_EN);
+		regmap_update_bits(rtc->map, RTC_INT_MASK,
+				   RTC_ALRM0_IRQ_MSK, 0);
+	} else {
+		regmap_update_bits(rtc->map, RTC_INT_MASK,
+				   RTC_ALRM0_IRQ_MSK, RTC_ALRM0_IRQ_MSK);
+		regmap_update_bits(rtc->map, RTC_CTRL,
+				   RTC_ALRM0_EN, 0);
+	}
+
+	return 0;
+}
+
+static const struct rtc_class_ops aml_rtc_ops = {
+	.read_time = aml_rtc_read_time,
+	.set_time = aml_rtc_set_time,
+	.read_alarm = aml_rtc_read_alarm,
+	.set_alarm = aml_rtc_set_alarm,
+	.alarm_irq_enable = aml_rtc_alarm_enable,
+};
+
+static irqreturn_t aml_rtc_handler(int irq, void *data)
+{
+	struct aml_rtc_data *rtc = (struct aml_rtc_data *)data;
+
+	regmap_write(rtc->map, RTC_ALARM0_REG, 0);
+	regmap_update_bits(rtc->map, RTC_INT_CLR,
+			   RTC_ALRM0_IRQ_STATUS, RTC_ALRM0_IRQ_STATUS);
+
+	rtc_update_irq(rtc->rtc_dev, 1, RTC_AF | RTC_IRQF);
+
+	return IRQ_HANDLED;
+}
+
+static int aml_rtc_adjust_sec(struct device *dev, u32 match_counter,
+			      int ops, int enable)
+{
+	struct aml_rtc_data *rtc = dev_get_drvdata(dev->parent);
+	u32 reg_val;
+
+	if (!FIELD_FIT(RTC_MATCH_COUNTER, match_counter)) {
+		pr_err("%s: invalid match_counter\n", __func__);
+		return -EINVAL;
+	}
+
+	reg_val = FIELD_PREP(RTC_SEC_ADJUST_CTRL, ops)
+		  | FIELD_PREP(RTC_MATCH_COUNTER, match_counter)
+		  | FIELD_PREP(RTC_ADJ_VALID, enable);
+	/* Set sec_adjust_ctrl, match_counter and Valid adjust */
+	regmap_write(rtc->map, RTC_SEC_ADJUST_REG, reg_val);
+
+	return 0;
+}
+
+static int aml_rtc_set_calibration(struct device *dev, u32 calibration)
+{
+	int cal_ops, enable, match_counter;
+	int ret;
+
+	match_counter = FIELD_GET(RTC_MATCH_COUNTER, calibration);
+	cal_ops = FIELD_GET(RTC_SEC_ADJUST_CTRL, calibration);
+	enable = FIELD_GET(RTC_ADJ_VALID, calibration);
+
+	ret = aml_rtc_adjust_sec(dev, match_counter, cal_ops, enable);
+	dev_dbg(dev, "%s: Success to store RTC calibration attribute\n",
+		__func__);
+
+	return ret;
+}
+
+static int aml_rtc_get_calibration(struct device *dev, u32 *calibration)
+{
+	struct aml_rtc_data *rtc = dev_get_drvdata(dev->parent);
+	u32 reg_val;
+
+	regmap_read(rtc->map, RTC_SEC_ADJUST_REG, &reg_val);
+	*calibration = FIELD_GET(RTC_SEC_ADJUST_CTRL | RTC_MATCH_COUNTER, reg_val);
+	/* BIT is only UL defined?and GENMASK has no type, its' donot used together */
+	*calibration |= FIELD_PREP(RTC_ADJ_VALID, FIELD_GET(RTC_ADJ_VALID, reg_val));
+
+	return 0;
+}
+
+/**
+ * The calibration value transferred from buf takes bit[18:0] to represent
+ * match_counter, while takes bit[20:19] to represent sec_adjust_ctrl, bit[23]
+ * to represent adj_valid. enable/disable sec_adjust_ctrl and match_counter.
+ * @buf: Separate buf to match_counter, sec_adjust_ctrl and adj_valid
+ *	 match_counter: bit[18:0], value is 0 ~ 0x7fff
+ *	 sec_adjust_ctrl: bit[20:19], value is 0 ~ 2. 3 to insert a second once every
+ *	 match_counter+1 seconds, 2 to swallow a second once every match_counter+1 seconds
+ *	 0 or 1 to no adjustment
+ *	 adj_valid: bit[23], value is 0 or 1, 0 to disable sec_adjust_ctrl and
+ *	 match_counter, and 1 to enable them.
+ */
+static ssize_t rtc_calibration_store(struct device *dev,
+				     struct device_attribute *attr,
+				     const char *buf, size_t count)
+{
+	int retval;
+	int calibration = 0;
+
+	if (sscanf(buf, " %i ", &calibration) != 1) {
+		dev_err(dev, "Failed to store RTC calibration attribute\n");
+		return -EINVAL;
+	}
+	retval = aml_rtc_set_calibration(dev, calibration);
+
+	return retval ? retval : count;
+}
+
+static ssize_t rtc_calibration_show(struct device *dev,
+				    struct device_attribute *attr, char *buf)
+{
+	int  retval = 0;
+	u32  calibration = 0;
+
+	retval = aml_rtc_get_calibration(dev, &calibration);
+	if (retval < 0) {
+		dev_err(dev, "Failed to read RTC calibration attribute\n");
+		sprintf(buf, "0\n");
+		return retval;
+	}
+
+	return sprintf(buf, "0x%x\n", calibration);
+}
+static DEVICE_ATTR_RW(rtc_calibration);
+
+static int rtc_set_div256_adjust(struct device *dev, u32 *value)
+{
+	struct aml_rtc_data *rtc = dev_get_drvdata(dev->parent);
+	u32 div256_adj;
+
+	div256_adj = FIELD_PREP(RTC_DIV256_ADJ_DSR | RTC_DIV256_ADJ_VAL, *value);
+	/*
+	 * AO_RTC_SEC_ADJUST_REG bit 24 insert/remove(1/0) a div256 cycle,
+	 * bit 25 valid/invalid(1/0) div256_adj_val
+	 */
+	regmap_write_bits(rtc->map, RTC_SEC_ADJUST_REG,
+			  RTC_DIV256_ADJ_DSR | RTC_DIV256_ADJ_VAL, div256_adj);
+	/* rtc need about 30ms to adjust its time after written */
+	mdelay(30);
+
+	return 0;
+}
+
+static int rtc_get_div256_adjust(struct device *dev, u32 *value)
+{
+	struct aml_rtc_data *rtc = dev_get_drvdata(dev->parent);
+	u32 reg_val;
+
+	regmap_read(rtc->map, RTC_SEC_ADJUST_REG, &reg_val);
+	*value = FIELD_GET(RTC_DIV256_ADJ_DSR | RTC_DIV256_ADJ_VAL, reg_val);
+
+	return 0;
+}
+
+/**
+ * div256 adjust function is controlled using bit[24] and bit[25].
+ * transferred buf takes bit[0] to represent div256 adj val, bit[1]
+ * to represent div256 adj enable/disable. div256 cycle means that adjust
+ * 1/32768/256 once by written once, it's val is equal to 1/128s
+ * @buf: 3: enable div256 adjust and insert a div256 cycle
+ *	 2: enable div256 adjust and remove a div256 cycle
+ *	 1 or 0: disable div256 adjust
+ */
+static ssize_t rtc_div256_adjust_store(struct device *dev,
+				       struct device_attribute *attr,
+				       const char *buf, size_t count)
+{
+	int retval;
+	u32 value = 0;
+
+	if (sscanf(buf, " %i ", &value) != 1) {
+		dev_err(dev, "Failed to store RTC div256 adjust attribute\n");
+		return -EINVAL;
+	}
+	retval = rtc_set_div256_adjust(dev, &value);
+
+	return retval ? retval : count;
+}
+
+static ssize_t rtc_div256_adjust_show(struct device *dev,
+				      struct device_attribute *attr, char *buf)
+{
+	int retval = 0;
+	u32 value = 0;
+
+	retval = rtc_get_div256_adjust(dev, &value);
+	if (retval < 0) {
+		dev_err(dev, "Failed to read RTC div256 adjust attribute\n");
+		sprintf(buf, "0\n");
+		return retval;
+	}
+
+	return sprintf(buf, "0x%x\n", value);
+}
+static DEVICE_ATTR_RW(rtc_div256_adjust);
+
+static struct attribute *aml_rtc_attrs[] = {
+	&dev_attr_rtc_calibration.attr,
+	&dev_attr_rtc_div256_adjust.attr,
+	NULL,
+};
+
+static const struct attribute_group aml_rtc_sysfs_files = {
+	.attrs	= aml_rtc_attrs,
+};
+
+static void aml_rtc_init(struct device *dev, struct aml_rtc_data *rtc)
+{
+	u32 reg_val;
+	u32 rtc_enable;
+
+	regmap_read(rtc->map, RTC_CTRL, &reg_val);
+	rtc_enable = FIELD_GET(RTC_ENABLE, reg_val);
+	if (!rtc_enable) {
+		if (clk_get_rate(rtc->sclk) == OSC_24M) {
+			/* select 24M oscillator */
+			regmap_update_bits(rtc->map, RTC_CTRL, RTC_OSC_SEL, RTC_OSC_SEL);
+
+			/*
+			 * Set RTC oscillator to freq_out to freq_in/((N0*M0+N1*M1)/(M0+M1))
+			 * Enable clock_in gate of oscillator 24MHz
+			 * Set N0 to 733, N1 to 732
+			 */
+			reg_val = FIELD_PREP(RTC_OSCIN_IN_EN, 1)
+				  | FIELD_PREP(RTC_OSCIN_OUT_CFG, 1)
+				  | FIELD_PREP(RTC_OSCIN_OUT_N0M0, RTC_OSCIN_OUT_32K_N0)
+				  | FIELD_PREP(RTC_OSCIN_OUT_N1M1, RTC_OSCIN_OUT_32K_N1);
+			regmap_write_bits(rtc->map, RTC_OSCIN_CTRL0, RTC_OSCIN_IN_EN
+					  | RTC_OSCIN_OUT_CFG | RTC_OSCIN_OUT_N0M0
+					  | RTC_OSCIN_OUT_N1M1, reg_val);
+
+			/* Set M0 to 2, M1 to 3, so freq_out = 32768 Hz*/
+			reg_val = FIELD_PREP(RTC_OSCIN_OUT_N0M0, RTC_OSCIN_OUT_32K_M0)
+				  | FIELD_PREP(RTC_OSCIN_OUT_N1M1, RTC_OSCIN_OUT_32K_M1);
+			regmap_write_bits(rtc->map, RTC_OSCIN_CTRL1, RTC_OSCIN_OUT_N0M0
+					  | RTC_OSCIN_OUT_N1M1, reg_val);
+		} else {
+			/* select 32K oscillator */
+			regmap_write_bits(rtc->map, RTC_CTRL, RTC_OSC_SEL, 0);
+		}
+		/* Enable RTC */
+		regmap_write_bits(rtc->map, RTC_CTRL, RTC_ENABLE, RTC_ENABLE);
+		usleep_range(100, 200);
+	}
+	regmap_write_bits(rtc->map, RTC_INT_MASK,
+			  RTC_ALRM0_IRQ_MSK, RTC_ALRM0_IRQ_MSK);
+	regmap_write_bits(rtc->map, RTC_CTRL, RTC_ALRM0_EN, 0);
+}
+
+static int aml_rtc_probe(struct platform_device *pdev)
+{
+	struct aml_rtc_data *rtc;
+	void __iomem *base;
+	struct clk *core_clk;
+	int ret = 0;
+
+	rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
+	if (!rtc)
+		return -ENOMEM;
+
+	rtc->config = of_device_get_match_data(&pdev->dev);
+	if (!rtc->config)
+		return -ENODEV;
+
+	base = devm_platform_ioremap_resource(pdev, 0);
+	if (IS_ERR(base)) {
+		dev_err(&pdev->dev, "resource ioremap failed\n");
+		return PTR_ERR(base);
+	}
+
+	rtc->map = devm_regmap_init_mmio(&pdev->dev, base, &aml_rtc_regmap_config);
+	if (IS_ERR(rtc->map)) {
+		dev_err(&pdev->dev, "regmap init failed\n");
+		return PTR_ERR(rtc->map);
+	}
+
+	rtc->irq = platform_get_irq(pdev, 0);
+	if (rtc->irq < 0)
+		return rtc->irq;
+
+	rtc->sclk = devm_clk_get(&pdev->dev, "rtc_osc");
+	if (IS_ERR(rtc->sclk))
+		return PTR_ERR(rtc->sclk);
+	if (clk_get_rate(rtc->sclk) != OSC_32K && clk_get_rate(rtc->sclk) != OSC_24M) {
+		dev_err(&pdev->dev, "Invalid clock configuration\n");
+		return -EINVAL;
+	}
+
+	core_clk = devm_clk_get(&pdev->dev, "rtc_sys_clk");
+	if (IS_ERR(core_clk)) {
+		dev_err(&pdev->dev, "failed to get rtc sys clk\n");
+		return PTR_ERR(core_clk);
+	}
+	clk_prepare_enable(core_clk);
+
+	aml_rtc_init(&pdev->dev, rtc);
+
+	device_init_wakeup(&pdev->dev, 1);
+	platform_set_drvdata(pdev, rtc);
+
+	rtc->rtc_dev = devm_rtc_allocate_device(&pdev->dev);
+	if (IS_ERR(rtc->rtc_dev))
+		return PTR_ERR(rtc->rtc_dev);
+
+	ret = devm_request_irq(&pdev->dev, rtc->irq, aml_rtc_handler,
+			       IRQF_ONESHOT, "aml-rtc alarm", rtc);
+	if (ret) {
+		dev_err(&pdev->dev, "IRQ%d request failed, ret = %d\n",
+			rtc->irq, ret);
+		return ret;
+	}
+
+	rtc->rtc_dev->ops = &aml_rtc_ops;
+	rtc->rtc_dev->range_min = 0;
+	rtc->rtc_dev->range_max = U32_MAX;
+
+	ret = rtc_add_group(rtc->rtc_dev, &aml_rtc_sysfs_files);
+	if (ret) {
+		dev_err(&pdev->dev, "Failed to create sysfs group: %d\n", ret);
+		return ret;
+	}
+
+	return devm_rtc_register_device(rtc->rtc_dev);
+}
+
+static int aml_rtc_suspend(struct device *dev)
+{
+	struct aml_rtc_data *rtc = dev_get_drvdata(dev);
+
+	if (device_may_wakeup(dev))
+		enable_irq_wake(rtc->irq);
+
+	return 0;
+}
+
+static int aml_rtc_resume(struct device *dev)
+{
+	struct aml_rtc_data *rtc = dev_get_drvdata(dev);
+
+	if (device_may_wakeup(dev))
+		disable_irq_wake(rtc->irq);
+
+	return 0;
+}
+
+static SIMPLE_DEV_PM_OPS(aml_rtc_pm_ops,
+			 aml_rtc_suspend, aml_rtc_resume);
+
+static const struct aml_rtc_config a5_rtc_config = {
+};
+
+static const struct aml_rtc_config a4_rtc_config = {
+	.gray_stored = true,
+};
+
+static const struct of_device_id aml_rtc_device_id[] = {
+	{
+		.compatible = "amlogic,a4-rtc",
+		.data = &a4_rtc_config,
+	},
+	{
+		.compatible = "amlogic,a5-rtc",
+		.data = &a5_rtc_config,
+	},
+};
+MODULE_DEVICE_TABLE(of, aml_rtc_device_id);
+
+static struct platform_driver aml_rtc_driver = {
+	.probe = aml_rtc_probe,
+	.driver = {
+		.name = "aml-rtc",
+		.of_match_table = of_match_ptr(aml_rtc_device_id),
+		.pm = &aml_rtc_pm_ops,
+	},
+};
+
+module_platform_driver(aml_rtc_driver);
+MODULE_DESCRIPTION("Amlogic RTC driver");
+MODULE_AUTHOR("Yiting Deng <yiting.deng at amlogic.com>");
+MODULE_LICENSE("GPL");

-- 
2.37.1




From devnull+xianwei.zhao.amlogic.com at kernel.org  Fri Aug 23 02:19:44 2024
From: devnull+xianwei.zhao.amlogic.com at kernel.org (Xianwei Zhao via B4 Relay)
Date: Fri, 23 Aug 2024 17:19:44 +0800
Subject: [PATCH 1/3] dt-bindings: rtc: Add Amlogic A311L2 and A113X2 rtc
In-Reply-To: <20240823-rtc-v1-0-6f70381da283@amlogic.com>
References: <20240823-rtc-v1-0-6f70381da283@amlogic.com>
Message-ID: <20240823-rtc-v1-1-6f70381da283@amlogic.com>

From: Yiting Deng <yiting.deng at amlogic.com>

Add documentation describing the Amlogic A113L2 and A113X2 rtc controller.

Signed-off-by: Yiting Deng <yiting.deng at amlogic.com>
Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
---
 .../bindings/rtc/amlogic,amlogic-rtc.yaml          | 66 ++++++++++++++++++++++
 1 file changed, 66 insertions(+)

diff --git a/Documentation/devicetree/bindings/rtc/amlogic,amlogic-rtc.yaml b/Documentation/devicetree/bindings/rtc/amlogic,amlogic-rtc.yaml
new file mode 100644
index 000000000000..fa3d7838022e
--- /dev/null
+++ b/Documentation/devicetree/bindings/rtc/amlogic,amlogic-rtc.yaml
@@ -0,0 +1,66 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) 2024 Amlogic, Inc. All rights reserved
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/rtc/amlogic,amlogic-rtc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Amlogic Real Time Clock controller include a4, a5
+
+maintainers:
+  - Yiting Deng <yiting.deng at amlogic.com>
+  - Xianwei Zhao <xianwei.zhao at amlogic.com>
+
+description:
+  The Amlogic new chips used RTC module.
+
+allOf:
+  - $ref: rtc.yaml#
+
+properties:
+  compatible:
+    enum:
+      - amlogic,a4-rtc
+      - amlogic,a5-rtc
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    items:
+      - description: RTC clock source, available 24M or 32K crystal
+          oscillator source. when using 24M, need to divide 24M into 32K.
+      - description: RTC module accesses the clock of the apb bus.
+
+  clock-names:
+    items:
+      - const: rtc_osc
+      - const: rtc_sys_clk
+
+  interrupts:
+    maxItems: 1
+
+required:
+  - compatible
+  - interrupts
+  - reg
+  - clocks
+  - clock-names
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    apb {
+        #address-cells = <2>;
+        #size-cells = <2>;
+
+        rtc: rtc at 8e600 {
+            compatible = "amlogic,a4-rtc";
+            interrupts = <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>;
+            reg = <0x0 0x8e600 0x0 0x38>;
+            clocks = <&xtal_32k>, <&clkc_periphs 1>;
+            clock-names = "rtc_osc", "rtc_sys_clk";
+        };
+    };

-- 
2.37.1




From xianwei.zhao at amlogic.com  Fri Aug 23 02:22:11 2024
From: xianwei.zhao at amlogic.com (Xianwei Zhao)
Date: Fri, 23 Aug 2024 17:22:11 +0800
Subject: [PATCH v3 1/3] dt-bindings: clock: fix C3 PLL input parameter
In-Reply-To: <5hghvuv2hy4l2ofve4ghb3nhvg76pwpilulznzja25hurxxwcp@2idkyyomv5w5>
References: <20240823-c3_add_node-v3-0-3648376037f4@amlogic.com>
 <20240823-c3_add_node-v3-1-3648376037f4@amlogic.com>
 <5hghvuv2hy4l2ofve4ghb3nhvg76pwpilulznzja25hurxxwcp@2idkyyomv5w5>
Message-ID: <b7fe2b5d-1faa-4cd0-8185-1321ada315a8@amlogic.com>

Hi Krzysztof,
     Thanks for your reply.

On 2024/8/23 14:41, Krzysztof Kozlowski wrote:
> [ EXTERNAL EMAIL ]
> 
> On Fri, Aug 23, 2024 at 10:29:17AM +0800, Xianwei Zhao wrote:
>> Add C3 PLL controller input clock parameters "fix".
>>
>> The clock named "fix" was initially implemented in PLL clock controller driver.
>> However, some registers required secure zone access, so we moved it to
>> the secure zone (BL31) and accessed it through SCMI. Since the PLL clock
>> driver needs to use this clock, the "fix" clock is used as an input source.
>> We updated the driver but forgot to modify the binding accordingly,
> 
> Please wrap commit message according to Linux coding style / submission
> process (neither too early nor over the limit):
> https://elixir.bootlin.com/linux/v6.4-rc1/source/Documentation/process/submitting-patches.rst#L597
> 

Will do.

> Best regards,
> Krzysztof
> 


From conor at kernel.org  Fri Aug 23 08:51:08 2024
From: conor at kernel.org (Conor Dooley)
Date: Fri, 23 Aug 2024 16:51:08 +0100
Subject: [PATCH 1/3] dt-bindings: rtc: Add Amlogic A311L2 and A113X2 rtc
In-Reply-To: <20240823-rtc-v1-1-6f70381da283@amlogic.com>
References: <20240823-rtc-v1-0-6f70381da283@amlogic.com>
 <20240823-rtc-v1-1-6f70381da283@amlogic.com>
Message-ID: <20240823-rotunda-machinist-4f8dabbff479@spud>

On Fri, Aug 23, 2024 at 05:19:44PM +0800, Xianwei Zhao via B4 Relay wrote:
> From: Yiting Deng <yiting.deng at amlogic.com>
> 
> Add documentation describing the Amlogic A113L2 and A113X2 rtc controller.
> 
> Signed-off-by: Yiting Deng <yiting.deng at amlogic.com>
> Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
> ---
>  .../bindings/rtc/amlogic,amlogic-rtc.yaml          | 66 ++++++++++++++++++++++
>  1 file changed, 66 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/rtc/amlogic,amlogic-rtc.yaml b/Documentation/devicetree/bindings/rtc/amlogic,amlogic-rtc.yaml
> new file mode 100644
> index 000000000000..fa3d7838022e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/rtc/amlogic,amlogic-rtc.yaml

Filename matching a compatible please.

> @@ -0,0 +1,66 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (C) 2024 Amlogic, Inc. All rights reserved
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/rtc/amlogic,amlogic-rtc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Amlogic Real Time Clock controller include a4, a5
> +
> +maintainers:
> +  - Yiting Deng <yiting.deng at amlogic.com>
> +  - Xianwei Zhao <xianwei.zhao at amlogic.com>
> +
> +description:
> +  The Amlogic new chips used RTC module.
> +
> +allOf:
> +  - $ref: rtc.yaml#
> +
> +properties:
> +  compatible:
> +    enum:
> +      - amlogic,a4-rtc
> +      - amlogic,a5-rtc

The names you have chosen here do not match the patch description. What
is going on there?

> +
> +  reg:
> +    maxItems: 1
> +
> +  clocks:
> +    items:
> +      - description: RTC clock source, available 24M or 32K crystal
> +          oscillator source. when using 24M, need to divide 24M into 32K.
> +      - description: RTC module accesses the clock of the apb bus.
> +
> +  clock-names:
> +    items:
> +      - const: rtc_osc
> +      - const: rtc_sys_clk

s/_clk//, they're all clocks.

> +
> +  interrupts:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - interrupts
> +  - reg
> +  - clocks
> +  - clock-names
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    apb {
> +        #address-cells = <2>;
> +        #size-cells = <2>;
> +
> +        rtc: rtc at 8e600 {

And the label here can go, you've got no references to it :)

Thanks,
Conor.

> +            compatible = "amlogic,a4-rtc";
> +            interrupts = <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>;
> +            reg = <0x0 0x8e600 0x0 0x38>;
> +            clocks = <&xtal_32k>, <&clkc_periphs 1>;
> +            clock-names = "rtc_osc", "rtc_sys_clk";
> +        };
> +    };
> 
> -- 
> 2.37.1
> 
> 
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From linus.walleij at linaro.org  Fri Aug 23 09:02:14 2024
From: linus.walleij at linaro.org (Linus Walleij)
Date: Fri, 23 Aug 2024 18:02:14 +0200
Subject: [PATCH v2] pinctrl: meson: Constify some structures
In-Reply-To: <f74e326bd7d48003c06219545bad7c2ef1a84bf8.1723053850.git.christophe.jaillet@wanadoo.fr>
References: <f74e326bd7d48003c06219545bad7c2ef1a84bf8.1723053850.git.christophe.jaillet@wanadoo.fr>
Message-ID: <CACRpkdYUaqtqQ7mggRu6BFTs9cP-jsvqFhHv939jGSjZ4F6MCA@mail.gmail.com>

On Wed, Aug 7, 2024 at 8:05?PM Christophe JAILLET
<christophe.jaillet at wanadoo.fr> wrote:

> The following structures are not modified in these drivers.
>   - struct meson_bank
>   - struct meson_pmx_bank
>   - struct meson_pmx_func
>   - struct meson_pmx_group
>   - struct meson_pinctrl_data
>   - struct meson_axg_pmx_data
>
> Constifying these structures moves some data to a read-only section, so
> increase overall security.

Patch applied.

Yours,
Linus Walleij


From linux.amoon at gmail.com  Fri Aug 23 11:09:54 2024
From: linux.amoon at gmail.com (Anand Moon)
Date: Fri, 23 Aug 2024 23:39:54 +0530
Subject: [PATCH v9 00/23] Support more Amlogic SoC families in crypto driver
In-Reply-To: <20240820145623.3500864-1-avromanov@salutedevices.com>
References: <20240820145623.3500864-1-avromanov@salutedevices.com>
Message-ID: <CANAwSgSwY+XSfw2styzY49Ti_zDntQBPMnbOLeJUt2srwde-6w@mail.gmail.com>

Hi Alexey,

Thanks for working on these changes.

On Tue, 20 Aug 2024 at 20:31, Alexey Romanov
<avromanov at salutedevices.com> wrote:
>
> Hello!
>
> This patchset expand the funcionality of the Amlogic
> crypto driver by adding support for more SoC families:
> AXG, G12A, G12B, SM1, A1, S4.
>
> Also specify and enable crypto node in device tree
> for reference Amlogic devices.
>
> Tested on GXL, AXG, G12A/B, SM1, A1 and S4 devices via
> custom tests [1] and tcrypt module.
>

I have tried these patches on my G12B, Odorid N2plus.

$ sudo cat /sys/kernel/debug/gxl-crypto/stats
[sudo] password for alarm:
Channel 0: nreq 330
cbc-aes-gxl cbc(aes) 135 2187
ecb-aes-gxl ecb(aes) 97 2005
ctr-aes-gxl ctr(aes) 98 992

But, I am observing the following with crypto/testmgr failed

[    1.915219] Key type .fscrypt registered
[    1.915238] Key type fscrypt-provisioning registered
[    2.418969] Key type encrypted registered
[    4.358508] alg: skcipher: blocksize for ctr-aes-gxl (16) doesn't
match generic impl (1)
[    4.361075] alg: self-tests for ctr(aes) using ctr-aes-gxl failed (rc=-22)
[    4.361089] ------------[ cut here ]------------
[    4.361102] alg: self-tests for ctr(aes) using ctr-aes-gxl failed (rc=-22)
[    4.361153] WARNING: CPU: 4 PID: 154 at crypto/testmgr.c:5887
alg_test+0x56c/0x600
[    4.367839] Modules linked in:
[    4.370871] CPU: 4 PID: 154 Comm: cryptomgr_test Not tainted
6.10.6-MANJARO-ARM+ #3
[    4.378497] Hardware name: Hardkernel ODROID-N2Plus (DT)
[    4.383784] pstate: 60400005 (nZCv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--)
[    4.390716] pc : alg_test+0x56c/0x600
[    4.394356] lr : alg_test+0x56c/0x600
[    4.397996] sp : ffff800084293d40
[    4.401289] x29: ffff800084293d40 x28: ffff80008124ac58 x27: 00000000ffffffff
[    4.408396] x26: 00000000ffffffea x25: 0000000000000048 x24: ffff80008308b000
[    4.415503] x23: ffff80008124ac58 x22: 0000000000010385 x21: ffff000004481c80
[    4.422609] x20: ffff000004481c00 x19: 000000000000003b x18: 00000000fffffffe
[    4.429716] x17: 656e656720686374 x16: 616d2074276e7365 x15: ffff800084293930
[    4.436823] x14: 0000000000000000 x13: ffff800082ed6153 x12: ffff8000821b1508
[    4.443929] x11: 0000000000000001 x10: 0000000000000001 x9 : ffff80008017e6d4
[    4.451036] x8 : c0000000ffffdfff x7 : ffff8000821012d0 x6 : 00000000000affa8
[    4.458143] x5 : ffff8000821b14b0 x4 : 0000000000000000 x3 : 0000000000000000
[    4.465250] x2 : 0000000000000000 x1 : 0000000000000000 x0 : ffff00000a739dc0
[    4.472357] Call trace:
[    4.474783]  alg_test+0x56c/0x600
[    4.478076]  cryptomgr_test+0x2c/0x50
[    4.481716]  kthread+0x108/0x120
[    4.484923]  ret_from_fork+0x10/0x20
[    4.488477] irq event stamp: 988
[    4.491683] hardirqs last  enabled at (987): [<ffff8000801808fc>]
console_unlock+0x134/0x148
[    4.500090] hardirqs last disabled at (988): [<ffff8000811a0554>]
el1_dbg+0x24/0x98
[    4.507716] softirqs last  enabled at (966): [<ffff8000800c2878>]
handle_softirqs+0x350/0x370
[    4.516209] softirqs last disabled at (959): [<ffff8000800105fc>]
__do_softirq+0x1c/0x28
[    4.524269] ---[ end trace 0000000000000000 ]---

Thanks
-Anand

> ---
>
> Changes V1 -> V2 [2]:
>
> - Rebased over linux-next.
> - Adjusted device tree bindings description.
> - A1 and S4 dts use their own compatible, which is a G12 fallback.
>
> Changes V2 -> V3 [3]:
>
> - Fix errors in dt-bindings and device tree.
> - Add new field in platform data, which determines
> whether clock controller should be used for crypto IP.
> - Place back MODULE_DEVICE_TABLE.
> - Correct commit messages.
>
> Changes V3 -> V4 [4]:
>
> - Update dt-bindings as per Krzysztof Kozlowski comments.
> - Fix bisection: get rid of compiler errors in some patches.
>
> Changes V4 -> V5 [5]:
>
> - Tested on GXL board:
>   1. Fix panic detected by Corentin Labbe [6].
>   2. Disable hasher backend for GXL: in its current realization
>      is doesn't work. And there are no examples or docs in the
>      vendor SDK.
> - Fix AES-CTR realization: legacy boards (gxl, g12, axg) requires
>   inversion of the keyiv at keys setup stage.
> - A1 now uses its own compatible string.
> - S4 uses A1 compatible as fallback.
> - Code fixes based on comments Neil Atrmstrong and Rob Herring.
> - Style fixes (set correct indentations)
>
> Changes V5 -> V6 [7]:
>
> - Fix DMA sync warning reported by Corentin Labbe [8].
> - Remove CLK input from driver. Remove clk definition
>   and second interrput line from crypto node inside GXL dtsi.
>
> Changes V6 -> V7 [9]:
>
> - Fix dt-schema: power domain now required only for A1.
> - Use crypto_skcipher_ctx_dma() helper for cipher instead of
>   ____cacheline_aligned.
> - Add import/export functions for hasher.
> - Fix commit message for patch 17, acorrding to discussion [10].
>
> Changes V7 -> V8 [11]:
>
> - Test patchset with CONFIG_CRYPTO_MANAGER_EXTRA_TESTS: fix some bugs
>   in hasher logic.
> - Use crypto crypto_ahash_ctx_dma in hasher code.
> - Correct clock definition: clk81 is required for all SoC's.
> - Add fixed-clock (clk81) definition for A1/S4.
> - Add information (in commit messages) why different compatibles are used.
>
> Changes V8 -> V9 [12]:
>
> - Remove required field clk-names from dt-schema according to Rob Herring
> recommendation [13].
> - Fix commit order: all dt-bindings schema commits now located earlier
> than any changes in device tree.
> - Fix typos and add more clarifications in dt-schema patches.
>
> Links:
>   - [1] https://gist.github.com/mRrvz/3fb8943a7487ab7b943ec140706995e7
>   - [2] https://lore.kernel.org/all/20240110201216.18016-1-avromanov at salutedevices.com/
>   - [3] https://lore.kernel.org/all/20240123165831.970023-1-avromanov at salutedevices.com/
>   - [4] https://lore.kernel.org/all/20240205155521.1795552-1-avromanov at salutedevices.com/
>   - [5] https://lore.kernel.org/all/20240212135108.549755-1-avromanov at salutedevices.com/
>   - [6] https://lore.kernel.org/all/ZcsYaPIUrBSg8iXu at Red/
>   - [7] https://lore.kernel.org/all/20240301132936.621238-1-avromanov at salutedevices.com/
>   - [8] https://lore.kernel.org/all/Zf1BAlYtiwPOG-Os at Red/
>   - [9] https://lore.kernel.org/all/20240326153219.2915080-1-avromanov at salutedevices.com/
>   - [10] https://lore.kernel.org/all/20240329-dotted-illusive-9f0593805a05 at wendy/
>   - [11] https://lore.kernel.org/all/20240411133832.2896463-1-avromanov at salutedevices.com/
>   - [12] https://lore.kernel.org/all/20240607141242.2616580-1-avromanov at salutedevices.com/
>   - [13] https://lore.kernel.org/all/20240610222827.GA3166929-robh at kernel.org/
>
> Alexey Romanov (23):
>   drivers: crypto: meson: don't hardcode IRQ count
>   drviers: crypto: meson: add platform data
>   drivers: crypto: meson: remove clock input
>   drivers: crypto: meson: add MMIO helpers
>   drivers: crypto: meson: move get_engine_number()
>   drivers: crypto: meson: drop status field from meson_flow
>   drivers: crypto: meson: move algs definition and cipher API to
>     cipher.c
>   drivers: crypto: meson: cleanup defines
>   drivers: crypto: meson: process more than MAXDESCS descriptors
>   drivers: crypto: meson: avoid kzalloc in engine thread
>   drivers: crypto: meson: introduce hasher
>   drivers: crypto: meson: add support for AES-CTR
>   drivers: crypto: meson: use fallback for 192-bit keys
>   drivers: crypto: meson: add support for G12-series
>   drivers: crypto: meson: add support for AXG-series
>   drivers: crypto: meson: add support for A1-series
>   dt-bindings: crypto: meson: correct clk and remove second interrupt
>     line
>   dt-bindings: crypto: meson: support new SoC's
>   arch: arm64: dts: meson: gxl: correct crypto node definition
>   arch: arm64: dts: meson: a1: add crypto node
>   arch: arm64: dts: meson: s4: add crypto node
>   arch: arm64: dts: meson: g12: add crypto node
>   arch: arm64: dts: meson: axg: add crypto node
>
>  .../bindings/crypto/amlogic,gxl-crypto.yaml   |  32 +-
>  arch/arm64/boot/dts/amlogic/meson-a1.dtsi     |  14 +
>  arch/arm64/boot/dts/amlogic/meson-axg.dtsi    |   7 +
>  .../boot/dts/amlogic/meson-g12-common.dtsi    |   7 +
>  arch/arm64/boot/dts/amlogic/meson-gxl.dtsi    |   6 +-
>  arch/arm64/boot/dts/amlogic/meson-s4.dtsi     |  13 +
>  drivers/crypto/amlogic/Makefile               |   2 +-
>  drivers/crypto/amlogic/amlogic-gxl-cipher.c   | 632 ++++++++++++------
>  drivers/crypto/amlogic/amlogic-gxl-core.c     | 292 ++++----
>  drivers/crypto/amlogic/amlogic-gxl-hasher.c   | 507 ++++++++++++++
>  drivers/crypto/amlogic/amlogic-gxl.h          | 118 +++-
>  11 files changed, 1269 insertions(+), 361 deletions(-)
>  create mode 100644 drivers/crypto/amlogic/amlogic-gxl-hasher.c
>
> --
> 2.34.1
>
>
> _______________________________________________
> linux-amlogic mailing list
> linux-amlogic at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-amlogic


From xianwei.zhao at amlogic.com  Sun Aug 25 19:36:42 2024
From: xianwei.zhao at amlogic.com (Xianwei Zhao)
Date: Mon, 26 Aug 2024 10:36:42 +0800
Subject: [PATCH 1/3] dt-bindings: rtc: Add Amlogic A311L2 and A113X2 rtc
In-Reply-To: <20240823-rotunda-machinist-4f8dabbff479@spud>
References: <20240823-rtc-v1-0-6f70381da283@amlogic.com>
 <20240823-rtc-v1-1-6f70381da283@amlogic.com>
 <20240823-rotunda-machinist-4f8dabbff479@spud>
Message-ID: <1039f02d-ca89-438c-b1dd-f49c2ffed6ff@amlogic.com>

Hi Conor,
    Thanks for your reply.

On 2024/8/23 23:51, Conor Dooley wrote:
> Subject:
> Re: [PATCH 1/3] dt-bindings: rtc: Add Amlogic A311L2 and A113X2 rtc
> From:
> Conor Dooley <conor at kernel.org>
> Date:
> 2024/8/23 23:51
> 
> To:
> xianwei.zhao at amlogic.com
> CC:
> Yiting Deng <yiting.deng at amlogic.com>, Alexandre Belloni 
> <alexandre.belloni at bootlin.com>, Rob Herring <robh at kernel.org>, 
> Krzysztof Kozlowski <krzk+dt at kernel.org>, Conor Dooley 
> <conor+dt at kernel.org>, linux-amlogic at lists.infradead.org, 
> linux-rtc at vger.kernel.org, devicetree at vger.kernel.org, 
> linux-kernel at vger.kernel.org
> 
> 
> On Fri, Aug 23, 2024 at 05:19:44PM +0800, Xianwei Zhao via B4 Relay wrote:
>> From: Yiting Deng<yiting.deng at amlogic.com>
>>
>> Add documentation describing the Amlogic A113L2 and A113X2 rtc controller.
>>
>> Signed-off-by: Yiting Deng<yiting.deng at amlogic.com>
>> Signed-off-by: Xianwei Zhao<xianwei.zhao at amlogic.com>
>> ---
>>   .../bindings/rtc/amlogic,amlogic-rtc.yaml          | 66 ++++++++++++++++++++++
>>   1 file changed, 66 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/rtc/amlogic,amlogic-rtc.yaml b/Documentation/devicetree/bindings/rtc/amlogic,amlogic-rtc.yaml
>> new file mode 100644
>> index 000000000000..fa3d7838022e
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/rtc/amlogic,amlogic-rtc.yaml
> Filename matching a compatible please.
> 

Will do, modify the name to "amlogic,a4-rtc.yaml".

>> @@ -0,0 +1,66 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +# Copyright (C) 2024 Amlogic, Inc. All rights reserved
>> +%YAML 1.2
>> +---
>> +$id:http://devicetree.org/schemas/rtc/amlogic,amlogic-rtc.yaml#
>> +$schema:http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Amlogic Real Time Clock controller include a4, a5
>> +
>> +maintainers:
>> +  - Yiting Deng<yiting.deng at amlogic.com>
>> +  - Xianwei Zhao<xianwei.zhao at amlogic.com>
>> +
>> +description:
>> +  The Amlogic new chips used RTC module.
>> +
>> +allOf:
>> +  - $ref: rtc.yaml#
>> +
>> +properties:
>> +  compatible:
>> +    enum:
>> +      - amlogic,a4-rtc
>> +      - amlogic,a5-rtc
> The names you have chosen here do not match the patch description. What
> is going on there?
> 

Will modify description to "Add Amlogic A4(A311L2) and A5(A113X2) rtc".

>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +  clocks:
>> +    items:
>> +      - description: RTC clock source, available 24M or 32K crystal
>> +          oscillator source. when using 24M, need to divide 24M into 32K.
>> +      - description: RTC module accesses the clock of the apb bus.
>> +
>> +  clock-names:
>> +    items:
>> +      - const: rtc_osc
>> +      - const: rtc_sys_clk
> s/_clk//, they're all clocks.
> 

Will do.

>> +
>> +  interrupts:
>> +    maxItems: 1
>> +
>> +required:
>> +  - compatible
>> +  - interrupts
>> +  - reg
>> +  - clocks
>> +  - clock-names
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> +  - |
>> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
>> +    apb {
>> +        #address-cells = <2>;
>> +        #size-cells = <2>;
>> +
>> +        rtc: rtc at 8e600 {
> And the label here can go, you've got no references to it ?
> 

Will delte rtc  label.

> Thanks,
> Conor.
> 
>> +            compatible = "amlogic,a4-rtc";
>> +            interrupts = <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>;
>> +            reg = <0x0 0x8e600 0x0 0x38>;
>> +            clocks = <&xtal_32k>, <&clkc_periphs 1>;
>> +            clock-names = "rtc_osc", "rtc_sys_clk";
>> +        };
>> +    };
>>
>> -- 
>> 2.37.1


From krzk at kernel.org  Mon Aug 26 01:27:06 2024
From: krzk at kernel.org (Krzysztof Kozlowski)
Date: Mon, 26 Aug 2024 10:27:06 +0200
Subject: [PATCH 2/3] rtc: support for the Amlogic on-chip RTC
In-Reply-To: <20240823-rtc-v1-2-6f70381da283@amlogic.com>
References: <20240823-rtc-v1-0-6f70381da283@amlogic.com>
 <20240823-rtc-v1-2-6f70381da283@amlogic.com>
Message-ID: <dcc28bf5-0b3e-4133-80c4-e677ecb38388@kernel.org>

On 23/08/2024 11:19, Xianwei Zhao via B4 Relay wrote:
> From: Yiting Deng <yiting.deng at amlogic.com>
> 
> Support for the on-chip RTC found in some of Amlogic's SoCs such as the
> A113L2 and A113X2.
> 
> Signed-off-by: Yiting Deng <yiting.deng at amlogic.com>
> Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
> ---
>  drivers/rtc/Kconfig       |  12 +
>  drivers/rtc/Makefile      |   1 +
>  drivers/rtc/rtc-amlogic.c | 589 ++++++++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 602 insertions(+)
> 
> diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
> index 2a95b05982ad..0dd042701c3b 100644
> --- a/drivers/rtc/Kconfig
> +++ b/drivers/rtc/Kconfig
> @@ -2043,4 +2043,16 @@ config RTC_DRV_SSD202D
>  	  This driver can also be built as a module, if so, the module
>  	  will be called "rtc-ssd20xd".
>  
> +config RTC_DRV_AMLOGIC
> +	tristate "Amlogic RTC"
> +	depends on ARCH_MESON || COMPILE_TEST

So the third driver? What is wrong with existing ones? And why this one
is named so differently?

> +	select REGMAP_MMIO
> +	default y
> +	help
> +	  If you say yes here you get support for the RTC block on the
> +	  Amlogic A113L2(A4) and A113X2(A5) SoCs.
> +
> +	  This driver can also be built as a module. If so, the module
> +	  will be called "rtc-amlogic".
> +
>  endif # RTC_CLASS
> diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
> index 3004e372f25f..d4a56ddb4246 100644
> --- a/drivers/rtc/Makefile
> +++ b/drivers/rtc/Makefile
> @@ -26,6 +26,7 @@ obj-$(CONFIG_RTC_DRV_ABB5ZES3)	+= rtc-ab-b5ze-s3.o
>  obj-$(CONFIG_RTC_DRV_ABEOZ9)	+= rtc-ab-eoz9.o
>  obj-$(CONFIG_RTC_DRV_ABX80X)	+= rtc-abx80x.o
>  obj-$(CONFIG_RTC_DRV_AC100)	+= rtc-ac100.o
> +obj-$(CONFIG_RTC_DRV_AMLOGIC)	+= rtc-amlogic.o
>  obj-$(CONFIG_RTC_DRV_ARMADA38X)	+= rtc-armada38x.o
>  obj-$(CONFIG_RTC_DRV_AS3722)	+= rtc-as3722.o
>  obj-$(CONFIG_RTC_DRV_ASM9260)	+= rtc-asm9260.o


> +
> +static int aml_rtc_adjust_sec(struct device *dev, u32 match_counter,
> +			      int ops, int enable)
> +{
> +	struct aml_rtc_data *rtc = dev_get_drvdata(dev->parent);
> +	u32 reg_val;
> +
> +	if (!FIELD_FIT(RTC_MATCH_COUNTER, match_counter)) {
> +		pr_err("%s: invalid match_counter\n", __func__);

No, do not use pr_, but driver ones.


> +		return -EINVAL;
> +	}
> +
> +	reg_val = FIELD_PREP(RTC_SEC_ADJUST_CTRL, ops)
> +		  | FIELD_PREP(RTC_MATCH_COUNTER, match_counter)
> +		  | FIELD_PREP(RTC_ADJ_VALID, enable);
> +	/* Set sec_adjust_ctrl, match_counter and Valid adjust */
> +	regmap_write(rtc->map, RTC_SEC_ADJUST_REG, reg_val);
> +
> +	return 0;
> +}
> +
> +static int aml_rtc_set_calibration(struct device *dev, u32 calibration)
> +{
> +	int cal_ops, enable, match_counter;
> +	int ret;
> +
> +	match_counter = FIELD_GET(RTC_MATCH_COUNTER, calibration);
> +	cal_ops = FIELD_GET(RTC_SEC_ADJUST_CTRL, calibration);
> +	enable = FIELD_GET(RTC_ADJ_VALID, calibration);
> +
> +	ret = aml_rtc_adjust_sec(dev, match_counter, cal_ops, enable);
> +	dev_dbg(dev, "%s: Success to store RTC calibration attribute\n",
> +		__func__);
> +
> +	return ret;
> +}
> +
> +static int aml_rtc_get_calibration(struct device *dev, u32 *calibration)
> +{
> +	struct aml_rtc_data *rtc = dev_get_drvdata(dev->parent);
> +	u32 reg_val;
> +
> +	regmap_read(rtc->map, RTC_SEC_ADJUST_REG, &reg_val);
> +	*calibration = FIELD_GET(RTC_SEC_ADJUST_CTRL | RTC_MATCH_COUNTER, reg_val);
> +	/* BIT is only UL defined?and GENMASK has no type, its' donot used together */
> +	*calibration |= FIELD_PREP(RTC_ADJ_VALID, FIELD_GET(RTC_ADJ_VALID, reg_val));
> +
> +	return 0;
> +}
> +
> +/**
> + * The calibration value transferred from buf takes bit[18:0] to represent
> + * match_counter, while takes bit[20:19] to represent sec_adjust_ctrl, bit[23]
> + * to represent adj_valid. enable/disable sec_adjust_ctrl and match_counter.
> + * @buf: Separate buf to match_counter, sec_adjust_ctrl and adj_valid
> + *	 match_counter: bit[18:0], value is 0 ~ 0x7fff
> + *	 sec_adjust_ctrl: bit[20:19], value is 0 ~ 2. 3 to insert a second once every
> + *	 match_counter+1 seconds, 2 to swallow a second once every match_counter+1 seconds
> + *	 0 or 1 to no adjustment
> + *	 adj_valid: bit[23], value is 0 or 1, 0 to disable sec_adjust_ctrl and
> + *	 match_counter, and 1 to enable them.

Messed kerneldoc. You have warning shere. Fix it.

> + */
> +static ssize_t rtc_calibration_store(struct device *dev,
> +				     struct device_attribute *attr,
> +				     const char *buf, size_t count)
> +{
> +	int retval;
> +	int calibration = 0;
> +
> +	if (sscanf(buf, " %i ", &calibration) != 1) {
> +		dev_err(dev, "Failed to store RTC calibration attribute\n");

Where is the ABI documented?

> +		return -EINVAL;
> +	}
> +	retval = aml_rtc_set_calibration(dev, calibration);
> +
> +	return retval ? retval : count;
> +}
> +
> +static ssize_t rtc_calibration_show(struct device *dev,
> +				    struct device_attribute *attr, char *buf)
> +{
> +	int  retval = 0;
> +	u32  calibration = 0;
> +
> +	retval = aml_rtc_get_calibration(dev, &calibration);
> +	if (retval < 0) {
> +		dev_err(dev, "Failed to read RTC calibration attribute\n");
> +		sprintf(buf, "0\n");
> +		return retval;
> +	}
> +
> +	return sprintf(buf, "0x%x\n", calibration);
> +}
> +static DEVICE_ATTR_RW(rtc_calibration);

Document the ABI.

> +
> +static int rtc_set_div256_adjust(struct device *dev, u32 *value)
> +{
> +	struct aml_rtc_data *rtc = dev_get_drvdata(dev->parent);
> +	u32 div256_adj;
> +
> +	div256_adj = FIELD_PREP(RTC_DIV256_ADJ_DSR | RTC_DIV256_ADJ_VAL, *value);
> +	/*
> +	 * AO_RTC_SEC_ADJUST_REG bit 24 insert/remove(1/0) a div256 cycle,
> +	 * bit 25 valid/invalid(1/0) div256_adj_val
> +	 */
> +	regmap_write_bits(rtc->map, RTC_SEC_ADJUST_REG,
> +			  RTC_DIV256_ADJ_DSR | RTC_DIV256_ADJ_VAL, div256_adj);
> +	/* rtc need about 30ms to adjust its time after written */
> +	mdelay(30);
> +
> +	return 0;
> +}
> +
> +static int rtc_get_div256_adjust(struct device *dev, u32 *value)
> +{
> +	struct aml_rtc_data *rtc = dev_get_drvdata(dev->parent);
> +	u32 reg_val;
> +
> +	regmap_read(rtc->map, RTC_SEC_ADJUST_REG, &reg_val);
> +	*value = FIELD_GET(RTC_DIV256_ADJ_DSR | RTC_DIV256_ADJ_VAL, reg_val);
> +
> +	return 0;
> +}
> +
> +/**
> + * div256 adjust function is controlled using bit[24] and bit[25].
> + * transferred buf takes bit[0] to represent div256 adj val, bit[1]
> + * to represent div256 adj enable/disable. div256 cycle means that adjust
> + * 1/32768/256 once by written once, it's val is equal to 1/128s
> + * @buf: 3: enable div256 adjust and insert a div256 cycle
> + *	 2: enable div256 adjust and remove a div256 cycle
> + *	 1 or 0: disable div256 adjust

Again incorrect kerneldoc.

> + */
> +static ssize_t rtc_div256_adjust_store(struct device *dev,
> +				       struct device_attribute *attr,
> +				       const char *buf, size_t count)
> +{
> +	int retval;
> +	u32 value = 0;
> +
> +	if (sscanf(buf, " %i ", &value) != 1) {
> +		dev_err(dev, "Failed to store RTC div256 adjust attribute\n");
> +		return -EINVAL;
> +	}
> +	retval = rtc_set_div256_adjust(dev, &value);
> +
> +	return retval ? retval : count;
> +}
> +
> +static ssize_t rtc_div256_adjust_show(struct device *dev,
> +				      struct device_attribute *attr, char *buf)
> +{
> +	int retval = 0;
> +	u32 value = 0;
> +
> +	retval = rtc_get_div256_adjust(dev, &value);
> +	if (retval < 0) {
> +		dev_err(dev, "Failed to read RTC div256 adjust attribute\n");
> +		sprintf(buf, "0\n");
> +		return retval;
> +	}
> +
> +	return sprintf(buf, "0x%x\n", value);
> +}
> +static DEVICE_ATTR_RW(rtc_div256_adjust);
> +
> +static struct attribute *aml_rtc_attrs[] = {
> +	&dev_attr_rtc_calibration.attr,
> +	&dev_attr_rtc_div256_adjust.attr,
> +	NULL,
> +};
> +
> +static const struct attribute_group aml_rtc_sysfs_files = {
> +	.attrs	= aml_rtc_attrs,
> +};
> +
> +static void aml_rtc_init(struct device *dev, struct aml_rtc_data *rtc)
> +{
> +	u32 reg_val;
> +	u32 rtc_enable;
> +
> +	regmap_read(rtc->map, RTC_CTRL, &reg_val);
> +	rtc_enable = FIELD_GET(RTC_ENABLE, reg_val);
> +	if (!rtc_enable) {
> +		if (clk_get_rate(rtc->sclk) == OSC_24M) {
> +			/* select 24M oscillator */
> +			regmap_update_bits(rtc->map, RTC_CTRL, RTC_OSC_SEL, RTC_OSC_SEL);
> +
> +			/*
> +			 * Set RTC oscillator to freq_out to freq_in/((N0*M0+N1*M1)/(M0+M1))
> +			 * Enable clock_in gate of oscillator 24MHz
> +			 * Set N0 to 733, N1 to 732
> +			 */
> +			reg_val = FIELD_PREP(RTC_OSCIN_IN_EN, 1)
> +				  | FIELD_PREP(RTC_OSCIN_OUT_CFG, 1)
> +				  | FIELD_PREP(RTC_OSCIN_OUT_N0M0, RTC_OSCIN_OUT_32K_N0)
> +				  | FIELD_PREP(RTC_OSCIN_OUT_N1M1, RTC_OSCIN_OUT_32K_N1);
> +			regmap_write_bits(rtc->map, RTC_OSCIN_CTRL0, RTC_OSCIN_IN_EN
> +					  | RTC_OSCIN_OUT_CFG | RTC_OSCIN_OUT_N0M0
> +					  | RTC_OSCIN_OUT_N1M1, reg_val);
> +
> +			/* Set M0 to 2, M1 to 3, so freq_out = 32768 Hz*/
> +			reg_val = FIELD_PREP(RTC_OSCIN_OUT_N0M0, RTC_OSCIN_OUT_32K_M0)
> +				  | FIELD_PREP(RTC_OSCIN_OUT_N1M1, RTC_OSCIN_OUT_32K_M1);
> +			regmap_write_bits(rtc->map, RTC_OSCIN_CTRL1, RTC_OSCIN_OUT_N0M0
> +					  | RTC_OSCIN_OUT_N1M1, reg_val);
> +		} else {
> +			/* select 32K oscillator */
> +			regmap_write_bits(rtc->map, RTC_CTRL, RTC_OSC_SEL, 0);
> +		}
> +		/* Enable RTC */
> +		regmap_write_bits(rtc->map, RTC_CTRL, RTC_ENABLE, RTC_ENABLE);
> +		usleep_range(100, 200);
> +	}
> +	regmap_write_bits(rtc->map, RTC_INT_MASK,
> +			  RTC_ALRM0_IRQ_MSK, RTC_ALRM0_IRQ_MSK);
> +	regmap_write_bits(rtc->map, RTC_CTRL, RTC_ALRM0_EN, 0);
> +}
> +
> +static int aml_rtc_probe(struct platform_device *pdev)
> +{
> +	struct aml_rtc_data *rtc;
> +	void __iomem *base;
> +	struct clk *core_clk;
> +	int ret = 0;
> +
> +	rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
> +	if (!rtc)
> +		return -ENOMEM;
> +
> +	rtc->config = of_device_get_match_data(&pdev->dev);
> +	if (!rtc->config)
> +		return -ENODEV;
> +
> +	base = devm_platform_ioremap_resource(pdev, 0);
> +	if (IS_ERR(base)) {
> +		dev_err(&pdev->dev, "resource ioremap failed\n");
> +		return PTR_ERR(base);
> +	}
> +
> +	rtc->map = devm_regmap_init_mmio(&pdev->dev, base, &aml_rtc_regmap_config);
> +	if (IS_ERR(rtc->map)) {
> +		dev_err(&pdev->dev, "regmap init failed\n");
> +		return PTR_ERR(rtc->map);
> +	}
> +
> +	rtc->irq = platform_get_irq(pdev, 0);
> +	if (rtc->irq < 0)
> +		return rtc->irq;
> +
> +	rtc->sclk = devm_clk_get(&pdev->dev, "rtc_osc");

Clock name should be: "osc"

> +	if (IS_ERR(rtc->sclk))
> +		return PTR_ERR(rtc->sclk);
> +	if (clk_get_rate(rtc->sclk) != OSC_32K && clk_get_rate(rtc->sclk) != OSC_24M) {
> +		dev_err(&pdev->dev, "Invalid clock configuration\n");
> +		return -EINVAL;
> +	}
> +
> +	core_clk = devm_clk_get(&pdev->dev, "rtc_sys_clk");

Clock name: "sys"

> +	if (IS_ERR(core_clk)) {
> +		dev_err(&pdev->dev, "failed to get rtc sys clk\n");

Syntax is return dev_err_probe.

> +		return PTR_ERR(core_clk);
> +	}
> +	clk_prepare_enable(core_clk);
> +
> +	aml_rtc_init(&pdev->dev, rtc);
> +
> +	device_init_wakeup(&pdev->dev, 1);
> +	platform_set_drvdata(pdev, rtc);
> +
> +	rtc->rtc_dev = devm_rtc_allocate_device(&pdev->dev);
> +	if (IS_ERR(rtc->rtc_dev))
> +		return PTR_ERR(rtc->rtc_dev);
> +
> +	ret = devm_request_irq(&pdev->dev, rtc->irq, aml_rtc_handler,
> +			       IRQF_ONESHOT, "aml-rtc alarm", rtc);
> +	if (ret) {
> +		dev_err(&pdev->dev, "IRQ%d request failed, ret = %d\n",
> +			rtc->irq, ret);

Your code is buggy. You leave with prepared clock.

Use devm_clk_get_enabled where applicable.

> +		return ret;
> +	}
> +
> +	rtc->rtc_dev->ops = &aml_rtc_ops;
> +	rtc->rtc_dev->range_min = 0;
> +	rtc->rtc_dev->range_max = U32_MAX;
> +
> +	ret = rtc_add_group(rtc->rtc_dev, &aml_rtc_sysfs_files);
> +	if (ret) {
> +		dev_err(&pdev->dev, "Failed to create sysfs group: %d\n", ret);
> +		return ret;
> +	}
> +
> +	return devm_rtc_register_device(rtc->rtc_dev);
> +}
> +
> +static int aml_rtc_suspend(struct device *dev)
> +{
> +	struct aml_rtc_data *rtc = dev_get_drvdata(dev);
> +
> +	if (device_may_wakeup(dev))
> +		enable_irq_wake(rtc->irq);
> +
> +	return 0;
> +}
> +
> +static int aml_rtc_resume(struct device *dev)
> +{
> +	struct aml_rtc_data *rtc = dev_get_drvdata(dev);
> +
> +	if (device_may_wakeup(dev))
> +		disable_irq_wake(rtc->irq);
> +
> +	return 0;
> +}
> +

Where is the remove to cleanup?

> +static SIMPLE_DEV_PM_OPS(aml_rtc_pm_ops,
> +			 aml_rtc_suspend, aml_rtc_resume);
> +
> +static const struct aml_rtc_config a5_rtc_config = {
> +};
> +
> +static const struct aml_rtc_config a4_rtc_config = {
> +	.gray_stored = true,
> +};
> +
> +static const struct of_device_id aml_rtc_device_id[] = {
> +	{
> +		.compatible = "amlogic,a4-rtc",
> +		.data = &a4_rtc_config,
> +	},
> +	{
> +		.compatible = "amlogic,a5-rtc",
> +		.data = &a5_rtc_config,
> +	},
> +};
> +MODULE_DEVICE_TABLE(of, aml_rtc_device_id);
> +
> +static struct platform_driver aml_rtc_driver = {
> +	.probe = aml_rtc_probe,
> +	.driver = {
> +		.name = "aml-rtc",
> +		.of_match_table = of_match_ptr(aml_rtc_device_id),

Drop of_match_ptr. You have a warning here.

> +		.pm = &aml_rtc_pm_ops,
> +	},
Best regards,
Krzysztof



From krzk at kernel.org  Mon Aug 26 01:28:06 2024
From: krzk at kernel.org (Krzysztof Kozlowski)
Date: Mon, 26 Aug 2024 10:28:06 +0200
Subject: [PATCH 3/3] MAINTAINERS: Add an entry for Amlogic RTC driver
In-Reply-To: <20240823-rtc-v1-3-6f70381da283@amlogic.com>
References: <20240823-rtc-v1-0-6f70381da283@amlogic.com>
 <20240823-rtc-v1-3-6f70381da283@amlogic.com>
Message-ID: <4b79fb7e-7ff6-499b-b615-e1bd69a46d0b@kernel.org>

On 23/08/2024 11:19, Xianwei Zhao via B4 Relay wrote:
> From: Yiting Deng <yiting.deng at amlogic.com>
> 
> Add Amlogic RTC entry to MAINTAINERS to clarify the maintainers
> 
> Signed-off-by: Yiting Deng <yiting.deng at amlogic.com>
> Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
> ---
>  MAINTAINERS | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 42decde38320..672290dddaaa 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -2481,6 +2481,14 @@ F:	drivers/irqchip/irq-mvebu-*
>  F:	drivers/pinctrl/mvebu/
>  F:	drivers/rtc/rtc-armada38x.c
>  
> +ARM/Amlogic RTC Driver

"ARM" is for Soc entries, not individual drivers. Drop. Place it
correctly and use capital letters.



Best regards,
Krzysztof



From ruanjinjie at huawei.com  Mon Aug 26 02:43:20 2024
From: ruanjinjie at huawei.com (Jinjie Ruan)
Date: Mon, 26 Aug 2024 17:43:20 +0800
Subject: [PATCH -next RESEND 02/10] mtd: rawnand: cadence: Use for_each_child_of_node_scoped()
In-Reply-To: <20240826094328.2991664-1-ruanjinjie@huawei.com>
References: <20240826094328.2991664-1-ruanjinjie@huawei.com>
Message-ID: <20240826094328.2991664-3-ruanjinjie@huawei.com>

Avoids the need for manual cleanup of_node_put() in early exits
from the loop by using for_each_child_of_node_scoped().

Signed-off-by: Jinjie Ruan <ruanjinjie at huawei.com>
---
 drivers/mtd/nand/raw/cadence-nand-controller.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/mtd/nand/raw/cadence-nand-controller.c b/drivers/mtd/nand/raw/cadence-nand-controller.c
index ff92c17def83..3bc89b356963 100644
--- a/drivers/mtd/nand/raw/cadence-nand-controller.c
+++ b/drivers/mtd/nand/raw/cadence-nand-controller.c
@@ -2836,7 +2836,6 @@ static void cadence_nand_chips_cleanup(struct cdns_nand_ctrl *cdns_ctrl)
 static int cadence_nand_chips_init(struct cdns_nand_ctrl *cdns_ctrl)
 {
 	struct device_node *np = cdns_ctrl->dev->of_node;
-	struct device_node *nand_np;
 	int max_cs = cdns_ctrl->caps2.max_banks;
 	int nchips, ret;
 
@@ -2849,10 +2848,9 @@ static int cadence_nand_chips_init(struct cdns_nand_ctrl *cdns_ctrl)
 		return -EINVAL;
 	}
 
-	for_each_child_of_node(np, nand_np) {
+	for_each_child_of_node_scoped(np, nand_np) {
 		ret = cadence_nand_chip_init(cdns_ctrl, nand_np);
 		if (ret) {
-			of_node_put(nand_np);
 			cadence_nand_chips_cleanup(cdns_ctrl);
 			return ret;
 		}
-- 
2.34.1



From ruanjinjie at huawei.com  Mon Aug 26 02:43:21 2024
From: ruanjinjie at huawei.com (Jinjie Ruan)
Date: Mon, 26 Aug 2024 17:43:21 +0800
Subject: [PATCH -next RESEND 03/10] mtd: rawnand: pl353: Use for_each_child_of_node_scoped()
In-Reply-To: <20240826094328.2991664-1-ruanjinjie@huawei.com>
References: <20240826094328.2991664-1-ruanjinjie@huawei.com>
Message-ID: <20240826094328.2991664-4-ruanjinjie@huawei.com>

Avoids the need for manual cleanup of_node_put() in early exits
from the loop by using for_each_child_of_node_scoped().

Signed-off-by: Jinjie Ruan <ruanjinjie at huawei.com>
---
 drivers/mtd/nand/raw/pl35x-nand-controller.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/nand/raw/pl35x-nand-controller.c b/drivers/mtd/nand/raw/pl35x-nand-controller.c
index 1c76ee98efb7..2570fd0beea0 100644
--- a/drivers/mtd/nand/raw/pl35x-nand-controller.c
+++ b/drivers/mtd/nand/raw/pl35x-nand-controller.c
@@ -1111,7 +1111,7 @@ static void pl35x_nand_chips_cleanup(struct pl35x_nandc *nfc)
 
 static int pl35x_nand_chips_init(struct pl35x_nandc *nfc)
 {
-	struct device_node *np = nfc->dev->of_node, *nand_np;
+	struct device_node *np = nfc->dev->of_node;
 	int nchips = of_get_child_count(np);
 	int ret;
 
@@ -1121,10 +1121,9 @@ static int pl35x_nand_chips_init(struct pl35x_nandc *nfc)
 		return -EINVAL;
 	}
 
-	for_each_child_of_node(np, nand_np) {
+	for_each_child_of_node_scoped(np, nand_np) {
 		ret = pl35x_nand_chip_init(nfc, nand_np);
 		if (ret) {
-			of_node_put(nand_np);
 			pl35x_nand_chips_cleanup(nfc);
 			break;
 		}
-- 
2.34.1



From ruanjinjie at huawei.com  Mon Aug 26 02:43:19 2024
From: ruanjinjie at huawei.com (Jinjie Ruan)
Date: Mon, 26 Aug 2024 17:43:19 +0800
Subject: [PATCH -next RESEND 01/10] mtd: rawnand: arasan: Use for_each_child_of_node_scoped()
In-Reply-To: <20240826094328.2991664-1-ruanjinjie@huawei.com>
References: <20240826094328.2991664-1-ruanjinjie@huawei.com>
Message-ID: <20240826094328.2991664-2-ruanjinjie@huawei.com>

Avoids the need for manual cleanup of_node_put() in early exits
from the loop.

Signed-off-by: Jinjie Ruan <ruanjinjie at huawei.com>
---
 drivers/mtd/nand/raw/arasan-nand-controller.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/nand/raw/arasan-nand-controller.c b/drivers/mtd/nand/raw/arasan-nand-controller.c
index 2ff1d2b13e3c..5436ec4a8fde 100644
--- a/drivers/mtd/nand/raw/arasan-nand-controller.c
+++ b/drivers/mtd/nand/raw/arasan-nand-controller.c
@@ -1360,7 +1360,7 @@ static void anfc_chips_cleanup(struct arasan_nfc *nfc)
 
 static int anfc_chips_init(struct arasan_nfc *nfc)
 {
-	struct device_node *np = nfc->dev->of_node, *nand_np;
+	struct device_node *np = nfc->dev->of_node;
 	int nchips = of_get_child_count(np);
 	int ret;
 
@@ -1370,10 +1370,9 @@ static int anfc_chips_init(struct arasan_nfc *nfc)
 		return -EINVAL;
 	}
 
-	for_each_child_of_node(np, nand_np) {
+	for_each_child_of_node_scoped(np, nand_np) {
 		ret = anfc_chip_init(nfc, nand_np);
 		if (ret) {
-			of_node_put(nand_np);
 			anfc_chips_cleanup(nfc);
 			break;
 		}
-- 
2.34.1



From ruanjinjie at huawei.com  Mon Aug 26 02:43:18 2024
From: ruanjinjie at huawei.com (Jinjie Ruan)
Date: Mon, 26 Aug 2024 17:43:18 +0800
Subject: [PATCH -next RESEND 00/10] mtd: Use for_each_child_of_node_scoped()
Message-ID: <20240826094328.2991664-1-ruanjinjie@huawei.com>

Use scoped for_each_available_child_of_node_scoped() when iterating over
device nodes to make code a bit simpler.

Jinjie Ruan (10):
  mtd: rawnand: arasan: Use for_each_child_of_node_scoped()
  mtd: rawnand: cadence: Use for_each_child_of_node_scoped()
  mtd: rawnand: pl353: Use for_each_child_of_node_scoped()
  mtd: rawnand: marvell: drm/rockchip: Use
    for_each_child_of_node_scoped()
  mtd: rawnand: rockchip: Use for_each_child_of_node_scoped()
  mtd: rawnand: meson: Use for_each_child_of_node_scoped()
  mtd: rawnand: mtk: Use for_each_child_of_node_scoped()
  mtd: rawnand: renesas: Use for_each_child_of_node_scoped()
  mtd: rawnand: stm32_fmc2: Use for_each_child_of_node_scoped()
  mtd: rawnand: sunxi: Use for_each_child_of_node_scoped()

 drivers/mtd/nand/raw/arasan-nand-controller.c   |  5 ++---
 drivers/mtd/nand/raw/cadence-nand-controller.c  |  4 +---
 drivers/mtd/nand/raw/marvell_nand.c             | 12 +++---------
 drivers/mtd/nand/raw/meson_nand.c               |  4 +---
 drivers/mtd/nand/raw/mtk_nand.c                 |  7 ++-----
 drivers/mtd/nand/raw/pl35x-nand-controller.c    |  5 ++---
 drivers/mtd/nand/raw/renesas-nand-controller.c  | 12 +++---------
 drivers/mtd/nand/raw/rockchip-nand-controller.c |  5 ++---
 drivers/mtd/nand/raw/stm32_fmc2_nand.c          |  7 ++-----
 drivers/mtd/nand/raw/sunxi_nand.c               |  4 +---
 10 files changed, 19 insertions(+), 46 deletions(-)

-- 
2.34.1



From ruanjinjie at huawei.com  Mon Aug 26 02:43:24 2024
From: ruanjinjie at huawei.com (Jinjie Ruan)
Date: Mon, 26 Aug 2024 17:43:24 +0800
Subject: [PATCH -next RESEND 06/10] mtd: rawnand: meson: Use for_each_child_of_node_scoped()
In-Reply-To: <20240826094328.2991664-1-ruanjinjie@huawei.com>
References: <20240826094328.2991664-1-ruanjinjie@huawei.com>
Message-ID: <20240826094328.2991664-7-ruanjinjie@huawei.com>

Avoids the need for manual cleanup of_node_put() in early exits
from the loop.

Signed-off-by: Jinjie Ruan <ruanjinjie at huawei.com>
---
 drivers/mtd/nand/raw/meson_nand.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/mtd/nand/raw/meson_nand.c b/drivers/mtd/nand/raw/meson_nand.c
index 9eb5470344d0..8806a06462ac 100644
--- a/drivers/mtd/nand/raw/meson_nand.c
+++ b/drivers/mtd/nand/raw/meson_nand.c
@@ -1495,14 +1495,12 @@ static int meson_nfc_nand_chips_init(struct device *dev,
 				     struct meson_nfc *nfc)
 {
 	struct device_node *np = dev->of_node;
-	struct device_node *nand_np;
 	int ret;
 
-	for_each_child_of_node(np, nand_np) {
+	for_each_child_of_node_scoped(np, nand_np) {
 		ret = meson_nfc_nand_chip_init(dev, nfc, nand_np);
 		if (ret) {
 			meson_nfc_nand_chip_cleanup(nfc);
-			of_node_put(nand_np);
 			return ret;
 		}
 	}
-- 
2.34.1



From ruanjinjie at huawei.com  Mon Aug 26 02:43:22 2024
From: ruanjinjie at huawei.com (Jinjie Ruan)
Date: Mon, 26 Aug 2024 17:43:22 +0800
Subject: [PATCH -next RESEND 04/10] mtd: rawnand: marvell: drm/rockchip: Use for_each_child_of_node_scoped()
In-Reply-To: <20240826094328.2991664-1-ruanjinjie@huawei.com>
References: <20240826094328.2991664-1-ruanjinjie@huawei.com>
Message-ID: <20240826094328.2991664-5-ruanjinjie@huawei.com>

Avoids the need for manual cleanup of_node_put() in early exits
from the loop.

Signed-off-by: Jinjie Ruan <ruanjinjie at huawei.com>
---
 drivers/mtd/nand/raw/marvell_nand.c | 12 +++---------
 1 file changed, 3 insertions(+), 9 deletions(-)

diff --git a/drivers/mtd/nand/raw/marvell_nand.c b/drivers/mtd/nand/raw/marvell_nand.c
index 5b0f5a9cef81..26648b72e691 100644
--- a/drivers/mtd/nand/raw/marvell_nand.c
+++ b/drivers/mtd/nand/raw/marvell_nand.c
@@ -2771,7 +2771,6 @@ static void marvell_nand_chips_cleanup(struct marvell_nfc *nfc)
 static int marvell_nand_chips_init(struct device *dev, struct marvell_nfc *nfc)
 {
 	struct device_node *np = dev->of_node;
-	struct device_node *nand_np;
 	int max_cs = nfc->caps->max_cs_nb;
 	int nchips;
 	int ret;
@@ -2798,20 +2797,15 @@ static int marvell_nand_chips_init(struct device *dev, struct marvell_nfc *nfc)
 		return ret;
 	}
 
-	for_each_child_of_node(np, nand_np) {
+	for_each_child_of_node_scoped(np, nand_np) {
 		ret = marvell_nand_chip_init(dev, nfc, nand_np);
 		if (ret) {
-			of_node_put(nand_np);
-			goto cleanup_chips;
+			marvell_nand_chips_cleanup(nfc);
+			return ret;
 		}
 	}
 
 	return 0;
-
-cleanup_chips:
-	marvell_nand_chips_cleanup(nfc);
-
-	return ret;
 }
 
 static int marvell_nfc_init_dma(struct marvell_nfc *nfc)
-- 
2.34.1



From ruanjinjie at huawei.com  Mon Aug 26 02:43:23 2024
From: ruanjinjie at huawei.com (Jinjie Ruan)
Date: Mon, 26 Aug 2024 17:43:23 +0800
Subject: [PATCH -next RESEND 05/10] mtd: rawnand: rockchip: Use for_each_child_of_node_scoped()
In-Reply-To: <20240826094328.2991664-1-ruanjinjie@huawei.com>
References: <20240826094328.2991664-1-ruanjinjie@huawei.com>
Message-ID: <20240826094328.2991664-6-ruanjinjie@huawei.com>

Avoids the need for manual cleanup of_node_put() in early exits
from the loop.

Signed-off-by: Jinjie Ruan <ruanjinjie at huawei.com>
---
 drivers/mtd/nand/raw/rockchip-nand-controller.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/nand/raw/rockchip-nand-controller.c b/drivers/mtd/nand/raw/rockchip-nand-controller.c
index 55580447633b..51c9cf9013dc 100644
--- a/drivers/mtd/nand/raw/rockchip-nand-controller.c
+++ b/drivers/mtd/nand/raw/rockchip-nand-controller.c
@@ -1211,7 +1211,7 @@ static void rk_nfc_chips_cleanup(struct rk_nfc *nfc)
 
 static int rk_nfc_nand_chips_init(struct device *dev, struct rk_nfc *nfc)
 {
-	struct device_node *np = dev->of_node, *nand_np;
+	struct device_node *np = dev->of_node;
 	int nchips = of_get_child_count(np);
 	int ret;
 
@@ -1221,10 +1221,9 @@ static int rk_nfc_nand_chips_init(struct device *dev, struct rk_nfc *nfc)
 		return -EINVAL;
 	}
 
-	for_each_child_of_node(np, nand_np) {
+	for_each_child_of_node_scoped(np, nand_np) {
 		ret = rk_nfc_nand_chip_init(dev, nfc, nand_np);
 		if (ret) {
-			of_node_put(nand_np);
 			rk_nfc_chips_cleanup(nfc);
 			return ret;
 		}
-- 
2.34.1



From ruanjinjie at huawei.com  Mon Aug 26 02:43:27 2024
From: ruanjinjie at huawei.com (Jinjie Ruan)
Date: Mon, 26 Aug 2024 17:43:27 +0800
Subject: [PATCH -next RESEND 09/10] mtd: rawnand: stm32_fmc2: Use for_each_child_of_node_scoped()
In-Reply-To: <20240826094328.2991664-1-ruanjinjie@huawei.com>
References: <20240826094328.2991664-1-ruanjinjie@huawei.com>
Message-ID: <20240826094328.2991664-10-ruanjinjie@huawei.com>

Avoids the need for manual cleanup of_node_put() in early exits
from the loop.

Signed-off-by: Jinjie Ruan <ruanjinjie at huawei.com>
---
 drivers/mtd/nand/raw/stm32_fmc2_nand.c | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
index 264556939a00..0f67e96cc240 100644
--- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c
+++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
@@ -1851,7 +1851,6 @@ static int stm32_fmc2_nfc_parse_child(struct stm32_fmc2_nfc *nfc,
 static int stm32_fmc2_nfc_parse_dt(struct stm32_fmc2_nfc *nfc)
 {
 	struct device_node *dn = nfc->dev->of_node;
-	struct device_node *child;
 	int nchips = of_get_child_count(dn);
 	int ret = 0;
 
@@ -1865,12 +1864,10 @@ static int stm32_fmc2_nfc_parse_dt(struct stm32_fmc2_nfc *nfc)
 		return -EINVAL;
 	}
 
-	for_each_child_of_node(dn, child) {
+	for_each_child_of_node_scoped(dn, child) {
 		ret = stm32_fmc2_nfc_parse_child(nfc, child);
-		if (ret < 0) {
-			of_node_put(child);
+		if (ret < 0)
 			return ret;
-		}
 	}
 
 	return ret;
-- 
2.34.1



From ruanjinjie at huawei.com  Mon Aug 26 02:43:25 2024
From: ruanjinjie at huawei.com (Jinjie Ruan)
Date: Mon, 26 Aug 2024 17:43:25 +0800
Subject: [PATCH -next RESEND 07/10] mtd: rawnand: mtk: Use for_each_child_of_node_scoped()
In-Reply-To: <20240826094328.2991664-1-ruanjinjie@huawei.com>
References: <20240826094328.2991664-1-ruanjinjie@huawei.com>
Message-ID: <20240826094328.2991664-8-ruanjinjie@huawei.com>

Avoids the need for manual cleanup of_node_put() in early exits
from the loop.

Signed-off-by: Jinjie Ruan <ruanjinjie at huawei.com>
---
 drivers/mtd/nand/raw/mtk_nand.c | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/mtd/nand/raw/mtk_nand.c b/drivers/mtd/nand/raw/mtk_nand.c
index 17477bb2d48f..d65e6371675b 100644
--- a/drivers/mtd/nand/raw/mtk_nand.c
+++ b/drivers/mtd/nand/raw/mtk_nand.c
@@ -1432,15 +1432,12 @@ static int mtk_nfc_nand_chip_init(struct device *dev, struct mtk_nfc *nfc,
 static int mtk_nfc_nand_chips_init(struct device *dev, struct mtk_nfc *nfc)
 {
 	struct device_node *np = dev->of_node;
-	struct device_node *nand_np;
 	int ret;
 
-	for_each_child_of_node(np, nand_np) {
+	for_each_child_of_node_scoped(np, nand_np) {
 		ret = mtk_nfc_nand_chip_init(dev, nfc, nand_np);
-		if (ret) {
-			of_node_put(nand_np);
+		if (ret)
 			return ret;
-		}
 	}
 
 	return 0;
-- 
2.34.1



From ruanjinjie at huawei.com  Mon Aug 26 02:43:26 2024
From: ruanjinjie at huawei.com (Jinjie Ruan)
Date: Mon, 26 Aug 2024 17:43:26 +0800
Subject: [PATCH -next RESEND 08/10] mtd: rawnand: renesas: Use for_each_child_of_node_scoped()
In-Reply-To: <20240826094328.2991664-1-ruanjinjie@huawei.com>
References: <20240826094328.2991664-1-ruanjinjie@huawei.com>
Message-ID: <20240826094328.2991664-9-ruanjinjie@huawei.com>

Avoids the need for manual cleanup of_node_put() in early exits
from the loop.

Signed-off-by: Jinjie Ruan <ruanjinjie at huawei.com>
---
 drivers/mtd/nand/raw/renesas-nand-controller.c | 12 +++---------
 1 file changed, 3 insertions(+), 9 deletions(-)

diff --git a/drivers/mtd/nand/raw/renesas-nand-controller.c b/drivers/mtd/nand/raw/renesas-nand-controller.c
index c9a01feff8df..0e92d50c5249 100644
--- a/drivers/mtd/nand/raw/renesas-nand-controller.c
+++ b/drivers/mtd/nand/raw/renesas-nand-controller.c
@@ -1297,23 +1297,17 @@ static void rnandc_chips_cleanup(struct rnandc *rnandc)
 
 static int rnandc_chips_init(struct rnandc *rnandc)
 {
-	struct device_node *np;
 	int ret;
 
-	for_each_child_of_node(rnandc->dev->of_node, np) {
+	for_each_child_of_node_scoped(rnandc->dev->of_node, np) {
 		ret = rnandc_chip_init(rnandc, np);
 		if (ret) {
-			of_node_put(np);
-			goto cleanup_chips;
+			rnandc_chips_cleanup(rnandc);
+			return ret;
 		}
 	}
 
 	return 0;
-
-cleanup_chips:
-	rnandc_chips_cleanup(rnandc);
-
-	return ret;
 }
 
 static int rnandc_probe(struct platform_device *pdev)
-- 
2.34.1



From ruanjinjie at huawei.com  Mon Aug 26 02:43:28 2024
From: ruanjinjie at huawei.com (Jinjie Ruan)
Date: Mon, 26 Aug 2024 17:43:28 +0800
Subject: [PATCH -next RESEND 10/10] mtd: rawnand: sunxi: Use for_each_child_of_node_scoped()
In-Reply-To: <20240826094328.2991664-1-ruanjinjie@huawei.com>
References: <20240826094328.2991664-1-ruanjinjie@huawei.com>
Message-ID: <20240826094328.2991664-11-ruanjinjie@huawei.com>

Avoids the need for manual cleanup of_node_put() in early exits
from the loop.

Signed-off-by: Jinjie Ruan <ruanjinjie at huawei.com>
---
 drivers/mtd/nand/raw/sunxi_nand.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c
index 4ec17c8bce5a..c28634e20abf 100644
--- a/drivers/mtd/nand/raw/sunxi_nand.c
+++ b/drivers/mtd/nand/raw/sunxi_nand.c
@@ -2025,13 +2025,11 @@ static int sunxi_nand_chip_init(struct device *dev, struct sunxi_nfc *nfc,
 static int sunxi_nand_chips_init(struct device *dev, struct sunxi_nfc *nfc)
 {
 	struct device_node *np = dev->of_node;
-	struct device_node *nand_np;
 	int ret;
 
-	for_each_child_of_node(np, nand_np) {
+	for_each_child_of_node_scoped(np, nand_np) {
 		ret = sunxi_nand_chip_init(dev, nfc, nand_np);
 		if (ret) {
-			of_node_put(nand_np);
 			sunxi_nand_chips_cleanup(nfc);
 			return ret;
 		}
-- 
2.34.1



From alexandre.belloni at bootlin.com  Mon Aug 26 02:45:19 2024
From: alexandre.belloni at bootlin.com (Alexandre Belloni)
Date: Mon, 26 Aug 2024 11:45:19 +0200
Subject: [PATCH 2/3] rtc: support for the Amlogic on-chip RTC
In-Reply-To: <20240823-rtc-v1-2-6f70381da283@amlogic.com>
References: <20240823-rtc-v1-0-6f70381da283@amlogic.com>
 <20240823-rtc-v1-2-6f70381da283@amlogic.com>
Message-ID: <2024082609451907fd19e2@mail.local>

On 23/08/2024 17:19:45+0800, Xianwei Zhao via B4 Relay wrote:
> From: Yiting Deng <yiting.deng at amlogic.com>
> 
> Support for the on-chip RTC found in some of Amlogic's SoCs such as the
> A113L2 and A113X2.
> 
> Signed-off-by: Yiting Deng <yiting.deng at amlogic.com>
> Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
> ---
>  drivers/rtc/Kconfig       |  12 +
>  drivers/rtc/Makefile      |   1 +
>  drivers/rtc/rtc-amlogic.c | 589 ++++++++++++++++++++++++++++++++++++++++++++++

As pointed out, this is the third amlogic driver so the name of the file
must be more specific.

> +static void aml_set_time(struct aml_rtc_data *rtc, u32 time_sec)

Is indirection necessary, this function is used only once

> +{
> +	if (rtc->config->gray_stored)
> +		time_sec = binary_to_gray(time_sec);
> +	regmap_write(rtc->map, RTC_COUNTER_REG, time_sec);
> +}
> +
> +static u32 aml_read_time(struct aml_rtc_data *rtc)
Ditto

> +{
> +	u32 time_sec;
> +
> +	regmap_read(rtc->map, RTC_REAL_TIME, &time_sec);
> +	if (rtc->config->gray_stored)
> +		time_sec = gray_to_binary(time_sec);
> +	return time_sec;
> +}
> +
> +static u32 aml_read_alarm(struct aml_rtc_data *rtc)
Ditto

> +{
> +	u32 alarm_sec;
> +
> +	regmap_read(rtc->map, RTC_ALARM0_REG, &alarm_sec);
> +	if (rtc->config->gray_stored)
> +		alarm_sec = gray_to_binary(alarm_sec);
> +	return alarm_sec;
> +}
> +
> +static void aml_set_alarm(struct aml_rtc_data *rtc, u32 alarm_sec)
Ditto

> +{
> +	if (rtc->config->gray_stored)
> +		alarm_sec = binary_to_gray(alarm_sec);
> +	regmap_write(rtc->map, RTC_ALARM0_REG, alarm_sec);
> +}
> +
> +static int aml_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
> +{
> +	struct aml_rtc_data *rtc = dev_get_drvdata(dev);
> +	time64_t alarm_sec;
> +
> +	if (alarm->enabled) {

Why aren't you setting the alarm when it is not enabled?

> +		regmap_update_bits(rtc->map, RTC_CTRL,
> +				   RTC_ALRM0_EN, RTC_ALRM0_EN);
> +		regmap_update_bits(rtc->map, RTC_INT_MASK,
> +				   RTC_ALRM0_IRQ_MSK, 0);
> +
> +		alarm_sec = rtc_tm_to_time64(&alarm->time);
> +		if (alarm_sec > U32_MAX) {

This is never going to happen, the test and error message are not
necessary.

> +			dev_err(dev, "alarm value invalid!\n");
> +			return -EINVAL;
> +		}
> +		aml_set_alarm(rtc, alarm_sec);
> +	}
> +	dev_dbg(dev, "%s: alarm->enabled=%d alarm_set=%llds\n", __func__,
> +		alarm->enabled, alarm_sec);
> +
> +	return 0;
> +}
> +
> +static int aml_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
> +{
> +	struct aml_rtc_data *rtc = dev_get_drvdata(dev);
> +	u32 alarm_sec;
> +	u32 reg_val;
> +	int alarm_enable, alarm_mask;
> +
> +	alarm_sec = aml_read_alarm(rtc);
> +	rtc_time64_to_tm(alarm_sec, &alarm->time);
> +
> +	regmap_read(rtc->map, RTC_CTRL, &reg_val);
> +	alarm_enable = FIELD_GET(RTC_ALRM0_EN, reg_val);
> +
> +	regmap_read(rtc->map, RTC_INT_MASK, &reg_val);
> +	alarm_mask = FIELD_GET(RTC_ALRM0_IRQ_MSK, reg_val);
> +
> +	alarm->enabled = (alarm_enable && !alarm_mask) ? 1 : 0;
> +	dev_dbg(dev, "%s: alarm->enabled=%d alarm=%us\n", __func__,
> +		alarm->enabled, alarm_sec);
> +
> +	return 0;
> +}
> +
> +static irqreturn_t aml_rtc_handler(int irq, void *data)
> +{
> +	struct aml_rtc_data *rtc = (struct aml_rtc_data *)data;
> +
> +	regmap_write(rtc->map, RTC_ALARM0_REG, 0);
> +	regmap_update_bits(rtc->map, RTC_INT_CLR,
> +			   RTC_ALRM0_IRQ_STATUS, RTC_ALRM0_IRQ_STATUS);

Are you sure regmap_update_bits is necessary here?

> +
> +	rtc_update_irq(rtc->rtc_dev, 1, RTC_AF | RTC_IRQF);
> +
> +	return IRQ_HANDLED;
> +}
> +


> +static int aml_rtc_adjust_sec(struct device *dev, u32 match_counter,
> +			      int ops, int enable)
> +{
> +	struct aml_rtc_data *rtc = dev_get_drvdata(dev->parent);
> +	u32 reg_val;
> +
> +	if (!FIELD_FIT(RTC_MATCH_COUNTER, match_counter)) {
> +		pr_err("%s: invalid match_counter\n", __func__);
> +		return -EINVAL;
> +	}
> +
> +	reg_val = FIELD_PREP(RTC_SEC_ADJUST_CTRL, ops)
> +		  | FIELD_PREP(RTC_MATCH_COUNTER, match_counter)
> +		  | FIELD_PREP(RTC_ADJ_VALID, enable);
> +	/* Set sec_adjust_ctrl, match_counter and Valid adjust */
> +	regmap_write(rtc->map, RTC_SEC_ADJUST_REG, reg_val);
> +
> +	return 0;
> +}
> +
> +static int aml_rtc_set_calibration(struct device *dev, u32 calibration)
> +{
> +	int cal_ops, enable, match_counter;
> +	int ret;
> +
> +	match_counter = FIELD_GET(RTC_MATCH_COUNTER, calibration);
> +	cal_ops = FIELD_GET(RTC_SEC_ADJUST_CTRL, calibration);
> +	enable = FIELD_GET(RTC_ADJ_VALID, calibration);
> +
> +	ret = aml_rtc_adjust_sec(dev, match_counter, cal_ops, enable);
> +	dev_dbg(dev, "%s: Success to store RTC calibration attribute\n",
> +		__func__);
> +
> +	return ret;
> +}
> +
> +static int aml_rtc_get_calibration(struct device *dev, u32 *calibration)
> +{
> +	struct aml_rtc_data *rtc = dev_get_drvdata(dev->parent);
> +	u32 reg_val;
> +
> +	regmap_read(rtc->map, RTC_SEC_ADJUST_REG, &reg_val);
> +	*calibration = FIELD_GET(RTC_SEC_ADJUST_CTRL | RTC_MATCH_COUNTER, reg_val);
> +	/* BIT is only UL defined?and GENMASK has no type, its' donot used together */
> +	*calibration |= FIELD_PREP(RTC_ADJ_VALID, FIELD_GET(RTC_ADJ_VALID, reg_val));
> +
> +	return 0;
> +}
> +
> +/**
> + * The calibration value transferred from buf takes bit[18:0] to represent
> + * match_counter, while takes bit[20:19] to represent sec_adjust_ctrl, bit[23]
> + * to represent adj_valid. enable/disable sec_adjust_ctrl and match_counter.
> + * @buf: Separate buf to match_counter, sec_adjust_ctrl and adj_valid
> + *	 match_counter: bit[18:0], value is 0 ~ 0x7fff
> + *	 sec_adjust_ctrl: bit[20:19], value is 0 ~ 2. 3 to insert a second once every
> + *	 match_counter+1 seconds, 2 to swallow a second once every match_counter+1 seconds
> + *	 0 or 1 to no adjustment
> + *	 adj_valid: bit[23], value is 0 or 1, 0 to disable sec_adjust_ctrl and
> + *	 match_counter, and 1 to enable them.
> + */
> +static ssize_t rtc_calibration_store(struct device *dev,
> +				     struct device_attribute *attr,
> +				     const char *buf, size_t count)
> +{
> +	int retval;
> +	int calibration = 0;
> +
> +	if (sscanf(buf, " %i ", &calibration) != 1) {
> +		dev_err(dev, "Failed to store RTC calibration attribute\n");
> +		return -EINVAL;
> +	}
> +	retval = aml_rtc_set_calibration(dev, calibration);
> +
> +	return retval ? retval : count;
> +}
> +
> +static ssize_t rtc_calibration_show(struct device *dev,
> +				    struct device_attribute *attr, char *buf)
> +{
> +	int  retval = 0;
> +	u32  calibration = 0;
> +
> +	retval = aml_rtc_get_calibration(dev, &calibration);
> +	if (retval < 0) {
> +		dev_err(dev, "Failed to read RTC calibration attribute\n");
> +		sprintf(buf, "0\n");
> +		return retval;
> +	}
> +
> +	return sprintf(buf, "0x%x\n", calibration);
> +}
> +static DEVICE_ATTR_RW(rtc_calibration);
> +
> +static int rtc_set_div256_adjust(struct device *dev, u32 *value)
> +{
> +	struct aml_rtc_data *rtc = dev_get_drvdata(dev->parent);
> +	u32 div256_adj;
> +
> +	div256_adj = FIELD_PREP(RTC_DIV256_ADJ_DSR | RTC_DIV256_ADJ_VAL, *value);
> +	/*
> +	 * AO_RTC_SEC_ADJUST_REG bit 24 insert/remove(1/0) a div256 cycle,
> +	 * bit 25 valid/invalid(1/0) div256_adj_val
> +	 */
> +	regmap_write_bits(rtc->map, RTC_SEC_ADJUST_REG,
> +			  RTC_DIV256_ADJ_DSR | RTC_DIV256_ADJ_VAL, div256_adj);
> +	/* rtc need about 30ms to adjust its time after written */
> +	mdelay(30);
> +
> +	return 0;
> +}
> +
> +static int rtc_get_div256_adjust(struct device *dev, u32 *value)
> +{
> +	struct aml_rtc_data *rtc = dev_get_drvdata(dev->parent);
> +	u32 reg_val;
> +
> +	regmap_read(rtc->map, RTC_SEC_ADJUST_REG, &reg_val);
> +	*value = FIELD_GET(RTC_DIV256_ADJ_DSR | RTC_DIV256_ADJ_VAL, reg_val);
> +
> +	return 0;
> +}
> +
> +/**
> + * div256 adjust function is controlled using bit[24] and bit[25].
> + * transferred buf takes bit[0] to represent div256 adj val, bit[1]
> + * to represent div256 adj enable/disable. div256 cycle means that adjust
> + * 1/32768/256 once by written once, it's val is equal to 1/128s
> + * @buf: 3: enable div256 adjust and insert a div256 cycle
> + *	 2: enable div256 adjust and remove a div256 cycle
> + *	 1 or 0: disable div256 adjust
> + */
> +static ssize_t rtc_div256_adjust_store(struct device *dev,
> +				       struct device_attribute *attr,
> +				       const char *buf, size_t count)
> +{
> +	int retval;
> +	u32 value = 0;
> +
> +	if (sscanf(buf, " %i ", &value) != 1) {
> +		dev_err(dev, "Failed to store RTC div256 adjust attribute\n");
> +		return -EINVAL;
> +	}
> +	retval = rtc_set_div256_adjust(dev, &value);
> +
> +	return retval ? retval : count;
> +}
> +
> +static ssize_t rtc_div256_adjust_show(struct device *dev,
> +				      struct device_attribute *attr, char *buf)
> +{
> +	int retval = 0;
> +	u32 value = 0;
> +
> +	retval = rtc_get_div256_adjust(dev, &value);
> +	if (retval < 0) {
> +		dev_err(dev, "Failed to read RTC div256 adjust attribute\n");
> +		sprintf(buf, "0\n");
> +		return retval;
> +	}
> +
> +	return sprintf(buf, "0x%x\n", value);
> +}
> +static DEVICE_ATTR_RW(rtc_div256_adjust);
> +
> +static struct attribute *aml_rtc_attrs[] = {
> +	&dev_attr_rtc_calibration.attr,
> +	&dev_attr_rtc_div256_adjust.attr,
> +	NULL,
> +};
> +
> +static const struct attribute_group aml_rtc_sysfs_files = {
> +	.attrs	= aml_rtc_attrs,
> +};
> +

You must use the standard RTC API to handle calibration, see
.read_offset and .set_offset

> +static void aml_rtc_init(struct device *dev, struct aml_rtc_data *rtc)
> +{
> +	u32 reg_val;
> +	u32 rtc_enable;
> +
> +	regmap_read(rtc->map, RTC_CTRL, &reg_val);
> +	rtc_enable = FIELD_GET(RTC_ENABLE, reg_val);
> +	if (!rtc_enable) {
> +		if (clk_get_rate(rtc->sclk) == OSC_24M) {
> +			/* select 24M oscillator */
> +			regmap_update_bits(rtc->map, RTC_CTRL, RTC_OSC_SEL, RTC_OSC_SEL);
> +
> +			/*
> +			 * Set RTC oscillator to freq_out to freq_in/((N0*M0+N1*M1)/(M0+M1))
> +			 * Enable clock_in gate of oscillator 24MHz
> +			 * Set N0 to 733, N1 to 732
> +			 */
> +			reg_val = FIELD_PREP(RTC_OSCIN_IN_EN, 1)
> +				  | FIELD_PREP(RTC_OSCIN_OUT_CFG, 1)
> +				  | FIELD_PREP(RTC_OSCIN_OUT_N0M0, RTC_OSCIN_OUT_32K_N0)
> +				  | FIELD_PREP(RTC_OSCIN_OUT_N1M1, RTC_OSCIN_OUT_32K_N1);
> +			regmap_write_bits(rtc->map, RTC_OSCIN_CTRL0, RTC_OSCIN_IN_EN
> +					  | RTC_OSCIN_OUT_CFG | RTC_OSCIN_OUT_N0M0
> +					  | RTC_OSCIN_OUT_N1M1, reg_val);
> +
> +			/* Set M0 to 2, M1 to 3, so freq_out = 32768 Hz*/
> +			reg_val = FIELD_PREP(RTC_OSCIN_OUT_N0M0, RTC_OSCIN_OUT_32K_M0)
> +				  | FIELD_PREP(RTC_OSCIN_OUT_N1M1, RTC_OSCIN_OUT_32K_M1);
> +			regmap_write_bits(rtc->map, RTC_OSCIN_CTRL1, RTC_OSCIN_OUT_N0M0
> +					  | RTC_OSCIN_OUT_N1M1, reg_val);
> +		} else {
> +			/* select 32K oscillator */
> +			regmap_write_bits(rtc->map, RTC_CTRL, RTC_OSC_SEL, 0);
> +		}
> +		/* Enable RTC */
> +		regmap_write_bits(rtc->map, RTC_CTRL, RTC_ENABLE, RTC_ENABLE);

		This must not be done at probe time, else you loose the
		important information taht the time has never been set. Instead,
		it should only be enabled on the first .set_time invocation do
		you could now in .read_time that the time is currently invalid.

> +		usleep_range(100, 200);
> +	}
> +	regmap_write_bits(rtc->map, RTC_INT_MASK,
> +			  RTC_ALRM0_IRQ_MSK, RTC_ALRM0_IRQ_MSK);
> +	regmap_write_bits(rtc->map, RTC_CTRL, RTC_ALRM0_EN, 0);
> +}
> +

-- 
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com


From miquel.raynal at bootlin.com  Mon Aug 26 02:52:13 2024
From: miquel.raynal at bootlin.com (Miquel Raynal)
Date: Mon, 26 Aug 2024 11:52:13 +0200
Subject: [PATCH -next RESEND 00/10] mtd: Use
 for_each_child_of_node_scoped()
In-Reply-To: <20240826094328.2991664-1-ruanjinjie@huawei.com>
References: <20240826094328.2991664-1-ruanjinjie@huawei.com>
Message-ID: <20240826115213.389acaef@xps-13>

Hi Jinjie,

ruanjinjie at huawei.com wrote on Mon, 26 Aug 2024 17:43:18 +0800:

> Use scoped for_each_available_child_of_node_scoped() when iterating over
> device nodes to make code a bit simpler.

Why is this a resend ? Did I miss a previous iteration?

Thanks,
Miqu?l


From geert at linux-m68k.org  Mon Aug 26 02:53:02 2024
From: geert at linux-m68k.org (Geert Uytterhoeven)
Date: Mon, 26 Aug 2024 11:53:02 +0200
Subject: [PATCH -next RESEND 08/10] mtd: rawnand: renesas: Use for_each_child_of_node_scoped()
In-Reply-To: <20240826094328.2991664-9-ruanjinjie@huawei.com>
References: <20240826094328.2991664-1-ruanjinjie@huawei.com> <20240826094328.2991664-9-ruanjinjie@huawei.com>
Message-ID: <CAMuHMdWhfDmRONWLjqgeCa4ZPKKXxXDv6T60OVSmEdvdm1RvvQ@mail.gmail.com>

On Mon, Aug 26, 2024 at 11:37?AM Jinjie Ruan <ruanjinjie at huawei.com> wrote:
> Avoids the need for manual cleanup of_node_put() in early exits
> from the loop.
>
> Signed-off-by: Jinjie Ruan <ruanjinjie at huawei.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas at glider.be>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds


From krzk at kernel.org  Mon Aug 26 03:19:07 2024
From: krzk at kernel.org (Krzysztof Kozlowski)
Date: Mon, 26 Aug 2024 12:19:07 +0200
Subject: [PATCH -next RESEND 00/10] mtd: Use
 for_each_child_of_node_scoped()
In-Reply-To: <20240826115213.389acaef@xps-13>
References: <20240826094328.2991664-1-ruanjinjie@huawei.com>
 <20240826115213.389acaef@xps-13>
Message-ID: <f7430f87-88d2-4c08-bc1e-6bb3da4e332c@kernel.org>

On 26/08/2024 11:52, Miquel Raynal wrote:
> Hi Jinjie,
> 
> ruanjinjie at huawei.com wrote on Mon, 26 Aug 2024 17:43:18 +0800:
> 
>> Use scoped for_each_available_child_of_node_scoped() when iterating over
>> device nodes to make code a bit simpler.
> 
> Why is this a resend ? Did I miss a previous iteration?

You were not cc-ed on previous iteration. I asked for proper split
between subsystems and sending to maintainers, thus this resend.

Although for such big patchset, I would expect some waiting time, not
sending immediately.

Best regards,
Krzysztof



From ruanjinjie at huawei.com  Mon Aug 26 03:53:42 2024
From: ruanjinjie at huawei.com (Jinjie Ruan)
Date: Mon, 26 Aug 2024 18:53:42 +0800
Subject: [PATCH -next RESEND 00/10] mtd: Use
 for_each_child_of_node_scoped()
In-Reply-To: <20240826115213.389acaef@xps-13>
References: <20240826094328.2991664-1-ruanjinjie@huawei.com>
 <20240826115213.389acaef@xps-13>
Message-ID: <3e0ba029-d658-be41-77ac-6edec75762d1@huawei.com>



On 2024/8/26 17:52, Miquel Raynal wrote:
> Hi Jinjie,
> 
> ruanjinjie at huawei.com wrote on Mon, 26 Aug 2024 17:43:18 +0800:
> 
>> Use scoped for_each_available_child_of_node_scoped() when iterating over
>> device nodes to make code a bit simpler.
> 
> Why is this a resend ? Did I miss a previous iteration?

Hi Miquel,

The previous cc list has missing some entries.

> 
> Thanks,
> Miqu?l


From ruanjinjie at huawei.com  Mon Aug 26 03:56:37 2024
From: ruanjinjie at huawei.com (Jinjie Ruan)
Date: Mon, 26 Aug 2024 18:56:37 +0800
Subject: [PATCH -next RESEND 00/10] mtd: Use
 for_each_child_of_node_scoped()
In-Reply-To: <f7430f87-88d2-4c08-bc1e-6bb3da4e332c@kernel.org>
References: <20240826094328.2991664-1-ruanjinjie@huawei.com>
 <20240826115213.389acaef@xps-13>
 <f7430f87-88d2-4c08-bc1e-6bb3da4e332c@kernel.org>
Message-ID: <ade6d403-e54c-80fb-7d51-1e00602fcbfb@huawei.com>



On 2024/8/26 18:19, Krzysztof Kozlowski wrote:
> On 26/08/2024 11:52, Miquel Raynal wrote:
>> Hi Jinjie,
>>
>> ruanjinjie at huawei.com wrote on Mon, 26 Aug 2024 17:43:18 +0800:
>>
>>> Use scoped for_each_available_child_of_node_scoped() when iterating over
>>> device nodes to make code a bit simpler.
>>
>> Why is this a resend ? Did I miss a previous iteration?
> 
> You were not cc-ed on previous iteration. I asked for proper split
> between subsystems and sending to maintainers, thus this resend.
> 
> Although for such big patchset, I would expect some waiting time, not
> sending immediately.

Sorry, I will pay attention to it later.

> 
> Best regards,
> Krzysztof
> 


From m.szyprowski at samsung.com  Mon Aug 26 04:31:52 2024
From: m.szyprowski at samsung.com (Marek Szyprowski)
Date: Mon, 26 Aug 2024 13:31:52 +0200
Subject: [PATCH v3 12/14] thermal/of: Use the .should_bind() thermal
 zone callback
In-Reply-To: <2236794.NgBsaNRSFp@rjwysocki.net>
References: <2205737.irdbgypaU6@rjwysocki.net>
	<2236794.NgBsaNRSFp@rjwysocki.net>
	<CGME20240826113153eucas1p110e90b4cd98aa70601770fe93d7aa1e5@eucas1p1.samsung.com>
Message-ID: <ef729a47-b7f9-48b6-a14d-692565ef1d38@samsung.com>

On 19.08.2024 18:30, Rafael J. Wysocki wrote:
> From: Rafael J. Wysocki <rafael.j.wysocki at intel.com>
>
> Make the thermal_of driver use the .should_bind() thermal zone callback
> to provide the thermal core with the information on whether or not to
> bind the given cooling device to the given trip point in the given
> thermal zone.  If it returns 'true', the thermal core will bind the
> cooling device to the trip and the corresponding unbinding will be
> taken care of automatically by the core on the removal of the involved
> thermal zone or cooling device.
>
> This replaces the .bind() and .unbind() thermal zone callbacks which
> assumed the same trip points ordering in the driver and in the thermal
> core (that may not be true any more in the future).  The .bind()
> callback would walk the given thermal zone's cooling maps to find all
> of the valid trip point combinations with the given cooling device and
> it would call thermal_zone_bind_cooling_device() for all of them using
> trip point indices reflecting the ordering of the trips in the DT.
>
> The .should_bind() callback still walks the thermal zone's cooling maps,
> but it can use the trip object passed to it by the thermal core to find
> the trip in question in the first place and then it uses the
> corresponding 'cooling-device' entries to look up the given cooling
> device.  To be able to match the trip object provided by the thermal
> core to a specific device node, the driver sets the 'priv' field of each
> trip to the corresponding device node pointer during initialization.
>
> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki at intel.com>

This patch landed recently in linux-next as commit 6d71d55c3b12 
("thermal/of: Use the .should_bind() thermal zone callback"). In my 
tests I found that it breaks booting some on my test boars: Exynos-based 
(OdroidXU4 with ARM32 bit kernel from multi_v7_defconfig) and Amlogic 
Meson based boards (OdroidC4, VIM3 with ARM64 defconfig+some debug 
options). Reverting $subject on top of next-20240823 together with 
c1ee6e1f68f5 ("thermal: core: Clean up trip bind/unbind functions") and 
526954900465 ("thermal: core: Drop unused bind/unbind functions and 
callbacks") due to compile dependencies fixes the issue.

On Odroid C4 I see the following warnings before the boards hangs:

BUG: sleeping function called from invalid context at 
kernel/locking/rwsem.c:1578
in_atomic(): 1, irqs_disabled(): 1, non_block: 0, pid: 263, name: 
systemd-udevd
preempt_count: 1, expected: 0
RCU nest depth: 0, expected: 0
4 locks held by systemd-udevd/263:
 ?#0: ffff0000013768f8 (&dev->mutex){....}-{3:3}, at: 
__driver_attach+0x90/0x1ac
 ?#1: ffff80008349e1a0 (thermal_list_lock){+.+.}-{3:3}, at: 
__thermal_cooling_device_register.part.0+0x154/0x2f4
 ?#2: ffff000000988700 (&tz->lock){+.+.}-{3:3}, at: 
thermal_zone_cdev_binding+0x84/0x1e4
 ?#3: ffff8000834b8a98 (devtree_lock){....}-{2:2}, at: 
of_get_next_child+0x2c/0x80
irq event stamp: 7936
hardirqs last? enabled at (7935): [<ffff8000812b1700>] 
_raw_spin_unlock_irqrestore+0x74/0x78
hardirqs last disabled at (7936): [<ffff8000812b0b14>] 
_raw_spin_lock_irqsave+0x84/0x88
softirqs last? enabled at (7302): [<ffff8000800b13dc>] 
handle_softirqs+0x4cc/0x4e4
softirqs last disabled at (7295): [<ffff8000800105b0>] 
__do_softirq+0x14/0x20
CPU: 3 UID: 0 PID: 263 Comm: systemd-udevd Not tainted 6.11.0-rc3+ #15264
Hardware name: Hardkernel ODROID-C4 (DT)
Call trace:
 ?dump_backtrace+0x94/0xec
 ?show_stack+0x18/0x24
 ?dump_stack_lvl+0x90/0xd0
 ?dump_stack+0x18/0x24
 ?__might_resched+0x144/0x248
 ?__might_sleep+0x48/0x98
 ?down_write+0x28/0xe8
 ?kernfs_remove+0x34/0x58
 ?sysfs_remove_dir+0x54/0x70
 ?__kobject_del+0x40/0xb8
 ?kobject_put+0x104/0x124
 ?of_node_put+0x18/0x28
 ?of_get_next_child+0x4c/0x80
 ?thermal_of_should_bind+0xec/0x28c
 ?thermal_zone_cdev_binding+0x104/0x1e4
 ?__thermal_cooling_device_register.part.0+0x194/0x2f4
 ?thermal_of_cooling_device_register+0x3c/0x54
 ?of_devfreq_cooling_register_power+0x220/0x298
 ?devfreq_cooling_em_register+0x48/0xa8
 ?panfrost_devfreq_init+0x294/0x320 [panfrost]
 ?panfrost_device_init+0x16c/0x5c8 [panfrost]
 ?panfrost_probe+0xbc/0x194 [panfrost]
 ?platform_probe+0x68/0xdc
 ?really_probe+0xbc/0x298
 ?__driver_probe_device+0x78/0x12c
 ?driver_probe_device+0x40/0x164
 ?__driver_attach+0x9c/0x1ac
 ?bus_for_each_dev+0x74/0xd4
 ?driver_attach+0x24/0x30
 ?bus_add_driver+0xe4/0x208
 ?driver_register+0x60/0x128
 ?__platform_driver_register+0x28/0x34
 ?panfrost_driver_init+0x20/0x1000 [panfrost]
 ?do_one_initcall+0x68/0x300
 ?do_init_module+0x60/0x224
 ?load_module+0x1b0c/0x1cb0
 ?init_module_from_file+0x84/0xc4
 ?idempotent_init_module+0x18c/0x284
 ?__arm64_sys_finit_module+0x64/0xa0
 ?invoke_syscall+0x48/0x110
 ?el0_svc_common.constprop.0+0x40/0xe8
 ?do_el0_svc_compat+0x20/0x3c
 ?el0_svc_compat+0x44/0xe0
 ?el0t_32_sync_handler+0x98/0x148
 ?el0t_32_sync+0x194/0x198

=============================
[ BUG: Invalid wait context ]
6.11.0-rc3+ #15264 Tainted: G??????? W
-----------------------------
systemd-udevd/263 is trying to lock:
ffff0000000e5948 (&root->kernfs_rwsem){++++}-{3:3}, at: 
kernfs_remove+0x34/0x58
other info that might help us debug this:
context-{4:4}
4 locks held by systemd-udevd/263:
 ?#0: ffff0000013768f8 (&dev->mutex){....}-{3:3}, at: 
__driver_attach+0x90/0x1ac
 ?#1: ffff80008349e1a0 (thermal_list_lock){+.+.}-{3:3}, at: 
__thermal_cooling_device_register.part.0+0x154/0x2f4
 ?#2: ffff000000988700 (&tz->lock){+.+.}-{3:3}, at: 
thermal_zone_cdev_binding+0x84/0x1e4
 ?#3: ffff8000834b8a98 (devtree_lock){....}-{2:2}, at: 
of_get_next_child+0x2c/0x80
stack backtrace:
CPU: 3 UID: 0 PID: 263 Comm: systemd-udevd Tainted: G W????????? 
6.11.0-rc3+ #15264
Tainted: [W]=WARN
Hardware name: Hardkernel ODROID-C4 (DT)
Call trace:
 ?dump_backtrace+0x94/0xec
 ?show_stack+0x18/0x24
 ?dump_stack_lvl+0x90/0xd0
 ?dump_stack+0x18/0x24
 ?__lock_acquire+0x9fc/0x21a0
 ?lock_acquire+0x200/0x340
 ?down_write+0x50/0xe8
 ?kernfs_remove+0x34/0x58
 ?sysfs_remove_dir+0x54/0x70
 ?__kobject_del+0x40/0xb8
 ?kobject_put+0x104/0x124
 ?of_node_put+0x18/0x28
 ?of_get_next_child+0x4c/0x80
 ?thermal_of_should_bind+0xec/0x28c
 ?thermal_zone_cdev_binding+0x104/0x1e4
 ?__thermal_cooling_device_register.part.0+0x194/0x2f4
 ?thermal_of_cooling_device_register+0x3c/0x54
 ?of_devfreq_cooling_register_power+0x220/0x298
 ?devfreq_cooling_em_register+0x48/0xa8
 ?panfrost_devfreq_init+0x294/0x320 [panfrost]
 ?panfrost_device_init+0x16c/0x5c8 [panfrost]
 ?panfrost_probe+0xbc/0x194 [panfrost]
 ?platform_probe+0x68/0xdc
 ?really_probe+0xbc/0x298
 ?__driver_probe_device+0x78/0x12c
 ?driver_probe_device+0x40/0x164
 ?__driver_attach+0x9c/0x1ac
 ?bus_for_each_dev+0x74/0xd4
 ?driver_attach+0x24/0x30
 ?bus_add_driver+0xe4/0x208
 ?driver_register+0x60/0x128
 ?__platform_driver_register+0x28/0x34
 ?panfrost_driver_init+0x20/0x1000 [panfrost]
 ?do_one_initcall+0x68/0x300
 ?do_init_module+0x60/0x224
 ?load_module+0x1b0c/0x1cb0
 ?init_module_from_file+0x84/0xc4
 ?idempotent_init_module+0x18c/0x284
 ?__arm64_sys_finit_module+0x64/0xa0
 ?invoke_syscall+0x48/0x110
 ?el0_svc_common.constprop.0+0x40/0xe8
 ?do_el0_svc_compat+0x20/0x3c
 ?el0_svc_compat+0x44/0xe0
 ?el0t_32_sync_handler+0x98/0x148
 ?el0t_32_sync+0x194/0x198
rcu: INFO: rcu_preempt detected stalls on CPUs/tasks:
rcu:???? 2-...!: (0 ticks this GP) idle=2aac/1/0x4000000000000000 
softirq=798/798 fqs=4
rcu:???? 3-...!: (0 ticks this GP) idle=28a4/1/0x4000000000000000 
softirq=1007/1007 fqs=4
rcu:???? (detected by 0, t=6505 jiffies, g=349, q=46 ncpus=4)
Sending NMI from CPU 0 to CPUs 2:
Sending NMI from CPU 0 to CPUs 3:
rcu: rcu_preempt kthread timer wakeup didn't happen for 6483 jiffies! 
g349 f0x0 RCU_GP_WAIT_FQS(5) ->state=0x402
rcu:???? Possible timer handling issue on cpu=1 timer-softirq=260
rcu: rcu_preempt kthread starved for 6484 jiffies! g349 f0x0 
RCU_GP_WAIT_FQS(5) ->state=0x402 ->cpu=1
rcu:???? Unless rcu_preempt kthread gets sufficient CPU time, OOM is now 
expected behavior.
rcu: RCU grace-period kthread stack dump:
task:rcu_preempt???? state:I stack:0???? pid:16??? tgid:16 ppid:2????? 
flags:0x00000008
Call trace:
 ?__switch_to+0xe0/0x124
 ?__schedule+0x318/0xc30
 ?schedule+0x50/0x15c
 ?schedule_timeout+0xac/0x134
 ?rcu_gp_fqs_loop+0x16c/0x8b4
 ?rcu_gp_kthread+0x280/0x314
 ?kthread+0x124/0x128
 ?ret_from_fork+0x10/0x20
rcu: Stack dump where RCU GP kthread last ran:
Sending NMI from CPU 0 to CPUs 1:
rcu: INFO: rcu_preempt detected stalls on CPUs/tasks:
rcu:???? 2-...!: (0 ticks this GP) idle=2aac/1/0x4000000000000000 
softirq=798/798 fqs=4
rcu:???? 3-...!: (0 ticks this GP) idle=28a4/1/0x4000000000000000 
softirq=1007/1007 fqs=4
rcu:???? (detected by 0, t=26013 jiffies, g=349, q=46 ncpus=4)
Sending NMI from CPU 0 to CPUs 2:
Sending NMI from CPU 0 to CPUs 3:

Let me know if I can help debugging this issue further.

> ---
>
> v2 -> v3: Reorder (previously [14/17])
>
> v1 -> v2:
>     * Fix a build issue (undefined symbol)
>
> This patch only depends on the [06/14] introducing the .should_bind()
> thermal zone callback:
>
> https://lore.kernel.org/linux-pm/9334403.CDJkKcVGEf at rjwysocki.net/
>
> ---
>   drivers/thermal/thermal_of.c |  171 ++++++++++---------------------------------
>   1 file changed, 41 insertions(+), 130 deletions(-)
>
> Index: linux-pm/drivers/thermal/thermal_of.c
> ===================================================================
> --- linux-pm.orig/drivers/thermal/thermal_of.c
> +++ linux-pm/drivers/thermal/thermal_of.c
> @@ -20,37 +20,6 @@
>   
>   /***   functions parsing device tree nodes   ***/
>   
> -static int of_find_trip_id(struct device_node *np, struct device_node *trip)
> -{
> -	struct device_node *trips;
> -	struct device_node *t;
> -	int i = 0;
> -
> -	trips = of_get_child_by_name(np, "trips");
> -	if (!trips) {
> -		pr_err("Failed to find 'trips' node\n");
> -		return -EINVAL;
> -	}
> -
> -	/*
> -	 * Find the trip id point associated with the cooling device map
> -	 */
> -	for_each_child_of_node(trips, t) {
> -
> -		if (t == trip) {
> -			of_node_put(t);
> -			goto out;
> -		}
> -		i++;
> -	}
> -
> -	i = -ENXIO;
> -out:
> -	of_node_put(trips);
> -
> -	return i;
> -}
> -
>   /*
>    * It maps 'enum thermal_trip_type' found in include/linux/thermal.h
>    * into the device tree binding of 'trip', property type.
> @@ -119,6 +88,8 @@ static int thermal_of_populate_trip(stru
>   
>   	trip->flags = THERMAL_TRIP_FLAG_RW_TEMP;
>   
> +	trip->priv = np;
> +
>   	return 0;
>   }
>   
> @@ -290,39 +261,9 @@ static struct device_node *thermal_of_zo
>   	return tz_np;
>   }
>   
> -static int __thermal_of_unbind(struct device_node *map_np, int index, int trip_id,
> -			       struct thermal_zone_device *tz, struct thermal_cooling_device *cdev)
> -{
> -	struct of_phandle_args cooling_spec;
> -	int ret;
> -
> -	ret = of_parse_phandle_with_args(map_np, "cooling-device", "#cooling-cells",
> -					 index, &cooling_spec);
> -
> -	if (ret < 0) {
> -		pr_err("Invalid cooling-device entry\n");
> -		return ret;
> -	}
> -
> -	of_node_put(cooling_spec.np);
> -
> -	if (cooling_spec.args_count < 2) {
> -		pr_err("wrong reference to cooling device, missing limits\n");
> -		return -EINVAL;
> -	}
> -
> -	if (cooling_spec.np != cdev->np)
> -		return 0;
> -
> -	ret = thermal_zone_unbind_cooling_device(tz, trip_id, cdev);
> -	if (ret)
> -		pr_err("Failed to unbind '%s' with '%s': %d\n", tz->type, cdev->type, ret);
> -
> -	return ret;
> -}
> -
> -static int __thermal_of_bind(struct device_node *map_np, int index, int trip_id,
> -			     struct thermal_zone_device *tz, struct thermal_cooling_device *cdev)
> +static bool thermal_of_get_cooling_spec(struct device_node *map_np, int index,
> +					struct thermal_cooling_device *cdev,
> +					struct cooling_spec *c)
>   {
>   	struct of_phandle_args cooling_spec;
>   	int ret, weight = THERMAL_WEIGHT_DEFAULT;
> @@ -334,104 +275,75 @@ static int __thermal_of_bind(struct devi
>   
>   	if (ret < 0) {
>   		pr_err("Invalid cooling-device entry\n");
> -		return ret;
> +		return false;
>   	}
>   
>   	of_node_put(cooling_spec.np);
>   
>   	if (cooling_spec.args_count < 2) {
>   		pr_err("wrong reference to cooling device, missing limits\n");
> -		return -EINVAL;
> +		return false;
>   	}
>   
>   	if (cooling_spec.np != cdev->np)
> -		return 0;
> -
> -	ret = thermal_zone_bind_cooling_device(tz, trip_id, cdev, cooling_spec.args[1],
> -					       cooling_spec.args[0],
> -					       weight);
> -	if (ret)
> -		pr_err("Failed to bind '%s' with '%s': %d\n", tz->type, cdev->type, ret);
> -
> -	return ret;
> -}
> -
> -static int thermal_of_for_each_cooling_device(struct device_node *tz_np, struct device_node *map_np,
> -					      struct thermal_zone_device *tz, struct thermal_cooling_device *cdev,
> -					      int (*action)(struct device_node *, int, int,
> -							    struct thermal_zone_device *, struct thermal_cooling_device *))
> -{
> -	struct device_node *tr_np;
> -	int count, i, trip_id;
> -
> -	tr_np = of_parse_phandle(map_np, "trip", 0);
> -	if (!tr_np)
> -		return -ENODEV;
> -
> -	trip_id = of_find_trip_id(tz_np, tr_np);
> -	if (trip_id < 0)
> -		return trip_id;
> -
> -	count = of_count_phandle_with_args(map_np, "cooling-device", "#cooling-cells");
> -	if (count <= 0) {
> -		pr_err("Add a cooling_device property with at least one device\n");
> -		return -ENOENT;
> -	}
> +		return false;
>   
> -	/*
> -	 * At this point, we don't want to bail out when there is an
> -	 * error, we will try to bind/unbind as many as possible
> -	 * cooling devices
> -	 */
> -	for (i = 0; i < count; i++)
> -		action(map_np, i, trip_id, tz, cdev);
> +	c->lower = cooling_spec.args[0];
> +	c->upper = cooling_spec.args[1];
> +	c->weight = weight;
>   
> -	return 0;
> +	return true;
>   }
>   
> -static int thermal_of_for_each_cooling_maps(struct thermal_zone_device *tz,
> -					    struct thermal_cooling_device *cdev,
> -					    int (*action)(struct device_node *, int, int,
> -							  struct thermal_zone_device *, struct thermal_cooling_device *))
> +static bool thermal_of_should_bind(struct thermal_zone_device *tz,
> +				   const struct thermal_trip *trip,
> +				   struct thermal_cooling_device *cdev,
> +				   struct cooling_spec *c)
>   {
>   	struct device_node *tz_np, *cm_np, *child;
> -	int ret = 0;
> +	bool result = false;
>   
>   	tz_np = thermal_of_zone_get_by_name(tz);
>   	if (IS_ERR(tz_np)) {
>   		pr_err("Failed to get node tz by name\n");
> -		return PTR_ERR(tz_np);
> +		return false;
>   	}
>   
>   	cm_np = of_get_child_by_name(tz_np, "cooling-maps");
>   	if (!cm_np)
>   		goto out;
>   
> +	/* Look up the trip and the cdev in the cooling maps. */
>   	for_each_child_of_node(cm_np, child) {
> -		ret = thermal_of_for_each_cooling_device(tz_np, child, tz, cdev, action);
> -		if (ret) {
> +		struct device_node *tr_np;
> +		int count, i;
> +
> +		tr_np = of_parse_phandle(child, "trip", 0);
> +		if (tr_np != trip->priv) {
>   			of_node_put(child);
> -			break;
> +			continue;
> +		}
> +
> +		/* The trip has been found, look up the cdev. */
> +		count = of_count_phandle_with_args(child, "cooling-device", "#cooling-cells");
> +		if (count <= 0)
> +			pr_err("Add a cooling_device property with at least one device\n");
> +
> +		for (i = 0; i < count; i++) {
> +			result = thermal_of_get_cooling_spec(child, i, cdev, c);
> +			if (result)
> +				break;
>   		}
> +
> +		of_node_put(child);
> +		break;
>   	}
>   
>   	of_node_put(cm_np);
>   out:
>   	of_node_put(tz_np);
>   
> -	return ret;
> -}
> -
> -static int thermal_of_bind(struct thermal_zone_device *tz,
> -			   struct thermal_cooling_device *cdev)
> -{
> -	return thermal_of_for_each_cooling_maps(tz, cdev, __thermal_of_bind);
> -}
> -
> -static int thermal_of_unbind(struct thermal_zone_device *tz,
> -			     struct thermal_cooling_device *cdev)
> -{
> -	return thermal_of_for_each_cooling_maps(tz, cdev, __thermal_of_unbind);
> +	return result;
>   }
>   
>   /**
> @@ -502,8 +414,7 @@ static struct thermal_zone_device *therm
>   
>   	thermal_of_parameters_init(np, &tzp);
>   
> -	of_ops.bind = thermal_of_bind;
> -	of_ops.unbind = thermal_of_unbind;
> +	of_ops.should_bind = thermal_of_should_bind;
>   
>   	ret = of_property_read_string(np, "critical-action", &action);
>   	if (!ret)
>
>
>
>
Best regards
-- 
Marek Szyprowski, PhD
Samsung R&D Institute Poland



From rafael at kernel.org  Mon Aug 26 05:14:17 2024
From: rafael at kernel.org (Rafael J. Wysocki)
Date: Mon, 26 Aug 2024 14:14:17 +0200
Subject: [PATCH v3 12/14] thermal/of: Use the .should_bind() thermal zone callback
In-Reply-To: <ef729a47-b7f9-48b6-a14d-692565ef1d38@samsung.com>
References: <2205737.irdbgypaU6@rjwysocki.net> <CGME20240826113153eucas1p110e90b4cd98aa70601770fe93d7aa1e5@eucas1p1.samsung.com>
 <2236794.NgBsaNRSFp@rjwysocki.net> <ef729a47-b7f9-48b6-a14d-692565ef1d38@samsung.com>
Message-ID: <CAJZ5v0gOqNi+-Hi8uyeEJ9dHzhwU6GyL6t_7Xjt5Knf2yJmH-w@mail.gmail.com>

On Mon, Aug 26, 2024 at 1:32?PM Marek Szyprowski
<m.szyprowski at samsung.com> wrote:
>
> On 19.08.2024 18:30, Rafael J. Wysocki wrote:
> > From: Rafael J. Wysocki <rafael.j.wysocki at intel.com>
> >
> > Make the thermal_of driver use the .should_bind() thermal zone callback
> > to provide the thermal core with the information on whether or not to
> > bind the given cooling device to the given trip point in the given
> > thermal zone.  If it returns 'true', the thermal core will bind the
> > cooling device to the trip and the corresponding unbinding will be
> > taken care of automatically by the core on the removal of the involved
> > thermal zone or cooling device.
> >
> > This replaces the .bind() and .unbind() thermal zone callbacks which
> > assumed the same trip points ordering in the driver and in the thermal
> > core (that may not be true any more in the future).  The .bind()
> > callback would walk the given thermal zone's cooling maps to find all
> > of the valid trip point combinations with the given cooling device and
> > it would call thermal_zone_bind_cooling_device() for all of them using
> > trip point indices reflecting the ordering of the trips in the DT.
> >
> > The .should_bind() callback still walks the thermal zone's cooling maps,
> > but it can use the trip object passed to it by the thermal core to find
> > the trip in question in the first place and then it uses the
> > corresponding 'cooling-device' entries to look up the given cooling
> > device.  To be able to match the trip object provided by the thermal
> > core to a specific device node, the driver sets the 'priv' field of each
> > trip to the corresponding device node pointer during initialization.
> >
> > Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki at intel.com>
>
> This patch landed recently in linux-next as commit 6d71d55c3b12
> ("thermal/of: Use the .should_bind() thermal zone callback")

It has been fixed since and it is commit  94c6110b0b13c6416146 now.

Bottom line is that it was calling of_node_put() too many times due to
a coding mistake.

> In my tests I found that it breaks booting some on my test boars: Exynos-based
> (OdroidXU4 with ARM32 bit kernel from multi_v7_defconfig) and Amlogic
> Meson based boards (OdroidC4, VIM3 with ARM64 defconfig+some debug
> options). Reverting $subject on top of next-20240823 together with
> c1ee6e1f68f5 ("thermal: core: Clean up trip bind/unbind functions") and
> 526954900465 ("thermal: core: Drop unused bind/unbind functions and
> callbacks") due to compile dependencies fixes the issue.

Thanks for the report!


From miquel.raynal at bootlin.com  Mon Aug 26 05:49:17 2024
From: miquel.raynal at bootlin.com (Miquel Raynal)
Date: Mon, 26 Aug 2024 14:49:17 +0200
Subject: [PATCH -next RESEND 00/10] mtd: Use
 for_each_child_of_node_scoped()
In-Reply-To: <f7430f87-88d2-4c08-bc1e-6bb3da4e332c@kernel.org>
References: <20240826094328.2991664-1-ruanjinjie@huawei.com>
	<20240826115213.389acaef@xps-13>
	<f7430f87-88d2-4c08-bc1e-6bb3da4e332c@kernel.org>
Message-ID: <20240826144917.2c4e202d@xps-13>

Hi Krzysztof,

krzk at kernel.org wrote on Mon, 26 Aug 2024 12:19:07 +0200:

> On 26/08/2024 11:52, Miquel Raynal wrote:
> > Hi Jinjie,
> > 
> > ruanjinjie at huawei.com wrote on Mon, 26 Aug 2024 17:43:18 +0800:
> >   
> >> Use scoped for_each_available_child_of_node_scoped() when iterating over
> >> device nodes to make code a bit simpler.  
> > 
> > Why is this a resend ? Did I miss a previous iteration?  
> 
> You were not cc-ed on previous iteration. I asked for proper split
> between subsystems and sending to maintainers, thus this resend.

Ok. Makes sense, and the patchset looks fine.

Jinjie, please always include a changelog when you send new versions,
and explanations for a RESEND.

Thanks,
Miqu?l


From ruanjinjie at huawei.com  Mon Aug 26 05:56:02 2024
From: ruanjinjie at huawei.com (Jinjie Ruan)
Date: Mon, 26 Aug 2024 20:56:02 +0800
Subject: [PATCH -next RESEND 00/10] mtd: Use
 for_each_child_of_node_scoped()
In-Reply-To: <20240826144917.2c4e202d@xps-13>
References: <20240826094328.2991664-1-ruanjinjie@huawei.com>
 <20240826115213.389acaef@xps-13>
 <f7430f87-88d2-4c08-bc1e-6bb3da4e332c@kernel.org>
 <20240826144917.2c4e202d@xps-13>
Message-ID: <061c39b9-c2fb-34e8-5848-dc2d2d9ca5eb@huawei.com>



On 2024/8/26 20:49, Miquel Raynal wrote:
> Hi Krzysztof,
> 
> krzk at kernel.org wrote on Mon, 26 Aug 2024 12:19:07 +0200:
> 
>> On 26/08/2024 11:52, Miquel Raynal wrote:
>>> Hi Jinjie,
>>>
>>> ruanjinjie at huawei.com wrote on Mon, 26 Aug 2024 17:43:18 +0800:
>>>   
>>>> Use scoped for_each_available_child_of_node_scoped() when iterating over
>>>> device nodes to make code a bit simpler.  
>>>
>>> Why is this a resend ? Did I miss a previous iteration?  
>>
>> You were not cc-ed on previous iteration. I asked for proper split
>> between subsystems and sending to maintainers, thus this resend.
> 
> Ok. Makes sense, and the patchset looks fine.
> 
> Jinjie, please always include a changelog when you send new versions,
> and explanations for a RESEND.

Ok, thanks for the advice.

> 
> Thanks,
> Miqu?l


From lkp at intel.com  Mon Aug 26 05:57:58 2024
From: lkp at intel.com (kernel test robot)
Date: Mon, 26 Aug 2024 20:57:58 +0800
Subject: [PATCH 2/3] rtc: support for the Amlogic on-chip RTC
In-Reply-To: <20240823-rtc-v1-2-6f70381da283@amlogic.com>
References: <20240823-rtc-v1-2-6f70381da283@amlogic.com>
Message-ID: <202408262035.4BysJ5CK-lkp@intel.com>

Hi Xianwei,

kernel test robot noticed the following build warnings:

[auto build test WARNING on dff71e5c6076314f3eefe700abd6af834c57bd64]

url:    https://github.com/intel-lab-lkp/linux/commits/Xianwei-Zhao-via-B4-Relay/dt-bindings-rtc-Add-Amlogic-A311L2-and-A113X2-rtc/20240826-125504
base:   dff71e5c6076314f3eefe700abd6af834c57bd64
patch link:    https://lore.kernel.org/r/20240823-rtc-v1-2-6f70381da283%40amlogic.com
patch subject: [PATCH 2/3] rtc: support for the Amlogic on-chip RTC
config: i386-buildonly-randconfig-003-20240826 (https://download.01.org/0day-ci/archive/20240826/202408262035.4BysJ5CK-lkp at intel.com/config)
compiler: clang version 18.1.5 (https://github.com/llvm/llvm-project 617a15a9eac96088ae5e9134248d8236e34b91b1)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240826/202408262035.4BysJ5CK-lkp at intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp at intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202408262035.4BysJ5CK-lkp at intel.com/

All warnings (new ones prefixed by >>):

>> drivers/rtc/rtc-amlogic.c:159:6: warning: variable 'alarm_sec' is used uninitialized whenever 'if' condition is false [-Wsometimes-uninitialized]
     159 |         if (alarm->enabled) {
         |             ^~~~~~~~~~~~~~
   drivers/rtc/rtc-amlogic.c:173:19: note: uninitialized use occurs here
     173 |                 alarm->enabled, alarm_sec);
         |                                 ^~~~~~~~~
   include/linux/dev_printk.h:168:46: note: expanded from macro 'dev_dbg'
     168 |         dev_printk(KERN_DEBUG, dev, dev_fmt(fmt), ##__VA_ARGS__)
         |                                                     ^~~~~~~~~~~
   include/linux/dev_printk.h:129:34: note: expanded from macro 'dev_printk'
     129 |                 _dev_printk(level, dev, fmt, ##__VA_ARGS__);            \
         |                                                ^~~~~~~~~~~
   drivers/rtc/rtc-amlogic.c:159:2: note: remove the 'if' if its condition is always true
     159 |         if (alarm->enabled) {
         |         ^~~~~~~~~~~~~~~~~~~
   drivers/rtc/rtc-amlogic.c:157:20: note: initialize the variable 'alarm_sec' to silence this warning
     157 |         time64_t alarm_sec;
         |                           ^
         |                            = 0
>> drivers/rtc/rtc-amlogic.c:565:34: warning: unused variable 'aml_rtc_device_id' [-Wunused-const-variable]
     565 | static const struct of_device_id aml_rtc_device_id[] = {
         |                                  ^~~~~~~~~~~~~~~~~
   2 warnings generated.


vim +159 drivers/rtc/rtc-amlogic.c

   153	
   154	static int aml_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
   155	{
   156		struct aml_rtc_data *rtc = dev_get_drvdata(dev);
   157		time64_t alarm_sec;
   158	
 > 159		if (alarm->enabled) {
   160			regmap_update_bits(rtc->map, RTC_CTRL,
   161					   RTC_ALRM0_EN, RTC_ALRM0_EN);
   162			regmap_update_bits(rtc->map, RTC_INT_MASK,
   163					   RTC_ALRM0_IRQ_MSK, 0);
   164	
   165			alarm_sec = rtc_tm_to_time64(&alarm->time);
   166			if (alarm_sec > U32_MAX) {
   167				dev_err(dev, "alarm value invalid!\n");
   168				return -EINVAL;
   169			}
   170			aml_set_alarm(rtc, alarm_sec);
   171		}
   172		dev_dbg(dev, "%s: alarm->enabled=%d alarm_set=%llds\n", __func__,
   173			alarm->enabled, alarm_sec);
   174	
   175		return 0;
   176	}
   177	

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki


From lkp at intel.com  Mon Aug 26 06:19:14 2024
From: lkp at intel.com (kernel test robot)
Date: Mon, 26 Aug 2024 21:19:14 +0800
Subject: [PATCH 2/3] rtc: support for the Amlogic on-chip RTC
In-Reply-To: <20240823-rtc-v1-2-6f70381da283@amlogic.com>
References: <20240823-rtc-v1-2-6f70381da283@amlogic.com>
Message-ID: <202408262106.tU1zTUfx-lkp@intel.com>

Hi Xianwei,

kernel test robot noticed the following build warnings:

[auto build test WARNING on dff71e5c6076314f3eefe700abd6af834c57bd64]

url:    https://github.com/intel-lab-lkp/linux/commits/Xianwei-Zhao-via-B4-Relay/dt-bindings-rtc-Add-Amlogic-A311L2-and-A113X2-rtc/20240826-125504
base:   dff71e5c6076314f3eefe700abd6af834c57bd64
patch link:    https://lore.kernel.org/r/20240823-rtc-v1-2-6f70381da283%40amlogic.com
patch subject: [PATCH 2/3] rtc: support for the Amlogic on-chip RTC
config: arc-randconfig-002-20240826 (https://download.01.org/0day-ci/archive/20240826/202408262106.tU1zTUfx-lkp at intel.com/config)
compiler: arc-elf-gcc (GCC) 13.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240826/202408262106.tU1zTUfx-lkp at intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp at intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202408262106.tU1zTUfx-lkp at intel.com/

All warnings (new ones prefixed by >>):

>> drivers/rtc/rtc-amlogic.c:545:12: warning: 'aml_rtc_resume' defined but not used [-Wunused-function]
     545 | static int aml_rtc_resume(struct device *dev)
         |            ^~~~~~~~~~~~~~
>> drivers/rtc/rtc-amlogic.c:535:12: warning: 'aml_rtc_suspend' defined but not used [-Wunused-function]
     535 | static int aml_rtc_suspend(struct device *dev)
         |            ^~~~~~~~~~~~~~~


vim +/aml_rtc_resume +545 drivers/rtc/rtc-amlogic.c

   534	
 > 535	static int aml_rtc_suspend(struct device *dev)
   536	{
   537		struct aml_rtc_data *rtc = dev_get_drvdata(dev);
   538	
   539		if (device_may_wakeup(dev))
   540			enable_irq_wake(rtc->irq);
   541	
   542		return 0;
   543	}
   544	
 > 545	static int aml_rtc_resume(struct device *dev)
   546	{
   547		struct aml_rtc_data *rtc = dev_get_drvdata(dev);
   548	
   549		if (device_may_wakeup(dev))
   550			disable_irq_wake(rtc->irq);
   551	
   552		return 0;
   553	}
   554	

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki


From robh at kernel.org  Mon Aug 26 06:50:31 2024
From: robh at kernel.org (Rob Herring)
Date: Mon, 26 Aug 2024 08:50:31 -0500
Subject: [PATCH v9 19/23] arch: arm64: dts: meson: gxl: correct crypto
 node definition
In-Reply-To: <20240820145623.3500864-20-avromanov@salutedevices.com>
References: <20240820145623.3500864-1-avromanov@salutedevices.com>
 <20240820145623.3500864-20-avromanov@salutedevices.com>
Message-ID: <20240826135031.GA55751-robh@kernel.org>

On Tue, Aug 20, 2024 at 05:56:19PM +0300, Alexey Romanov wrote:
> GXL and newer SoC's uses the DMA engine (not blkmv) for crypto HW.
> Crypto HW doesn't actually use the blkmv clk. At RTL level, crypto
> engine is hard weired to clk81 (CLKID_CLK81). And remove clock-names
> field: according to the new dt-binding, it is no longer required.

Subject should be "arm64: dts: amlogic: ...". IIRC, Amlogic stuff has 
moved away from using "meson".

> 
> Also, GXL crypto IP isn't to seconnd interrput line. So we must
> remove it from dt-bindings.
> 
> Fixes: c4a0457eb858 ("ARM64: dts: amlogic: adds crypto hardware node")
> Signed-off-by: Alexey Romanov <avromanov at salutedevices.com>
> ---
>  arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 6 ++----
>  1 file changed, 2 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
> index 17bcfa4702e1..c29d5b81ce67 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
> @@ -68,10 +68,8 @@ acodec: audio-controller at c8832000 {
>  		crypto: crypto at c883e000 {
>  			compatible = "amlogic,gxl-crypto";
>  			reg = <0x0 0xc883e000 0x0 0x36>;
> -			interrupts = <GIC_SPI 188 IRQ_TYPE_EDGE_RISING>,
> -				     <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>;
> -			clocks = <&clkc CLKID_BLKMV>;
> -			clock-names = "blkmv";
> +			interrupts = <GIC_SPI 188 IRQ_TYPE_EDGE_RISING>;
> +			clocks = <&clkc CLKID_CLK81>;
>  			status = "okay";
>  		};
>  	};
> -- 
> 2.34.1
> 


From robh at kernel.org  Mon Aug 26 06:50:47 2024
From: robh at kernel.org (Rob Herring (Arm))
Date: Mon, 26 Aug 2024 08:50:47 -0500
Subject: [PATCH v9 17/23] dt-bindings: crypto: meson: correct clk and
 remove second interrupt line
In-Reply-To: <20240820145623.3500864-18-avromanov@salutedevices.com>
References: <20240820145623.3500864-1-avromanov@salutedevices.com>
 <20240820145623.3500864-18-avromanov@salutedevices.com>
Message-ID: <172468024695.61392.174903956615697419.robh@kernel.org>


On Tue, 20 Aug 2024 17:56:17 +0300, Alexey Romanov wrote:
> GXL and newer SoC's uses the DMA engine (not blkmv) for crypto HW.
> Crypto HW doesn't actually use the blkmv clk. At RTL level, crypto
> engine is hard-wired to a clk81 (CLKID_CLK81). Drop clock-names
> field from schema: name "blkmv" is invalid and "clk81" is confusing
> and sounds like something global.
> 
> Also, GXL crypto IP isn't connected to the second interrupt line.
> This binding is useless, there are no users of this line.
> We must remove it from dt-bindings.
> 
> Fixes: 7f7d115dfb51 ("dt-bindings: crypto: Add DT bindings documentation for amlogic-crypto")
> Signed-off-by: Alexey Romanov <avromanov at salutedevices.com>
> ---
>  .../bindings/crypto/amlogic,gxl-crypto.yaml           | 11 ++++-------
>  1 file changed, 4 insertions(+), 7 deletions(-)
> 

Reviewed-by: Rob Herring (Arm) <robh at kernel.org>



From robh at kernel.org  Mon Aug 26 06:52:28 2024
From: robh at kernel.org (Rob Herring)
Date: Mon, 26 Aug 2024 08:52:28 -0500
Subject: [PATCH v9 18/23] dt-bindings: crypto: meson: support new SoC's
In-Reply-To: <20240820145623.3500864-19-avromanov@salutedevices.com>
References: <20240820145623.3500864-1-avromanov@salutedevices.com>
 <20240820145623.3500864-19-avromanov@salutedevices.com>
Message-ID: <20240826135228.GA61588-robh@kernel.org>

On Tue, Aug 20, 2024 at 05:56:18PM +0300, Alexey Romanov wrote:
> Now crypto module available at G12A/G12B/S4/A1/SM1/AXG.
> 
> 1. Add new compatibles:
>   - amlogic,g12a-crypto
>   - amlogic,axg-crypto
>   - amlogic,a1-crypto
>   - amlogic,s4-crypto (uses a1-crypto as fallback)
> 
> Difference between this compatibles:
>  * Different registers offset and the number of setup descriptors.
>  * GXL doesn't support hashing like the others.
>  * G12A/B and A1/S4 crypto HW don't support 192 AES key.
>  * GXL, G12A/B and AXG require a reverse IV key before processing.
> 
> 2. Add power-domains in schema, which is required only for A1.
> This is specific vendor design: in old SoC's power domain for
> crypto HW was not configurable, but in A1-series it is configurable.

You added this in the previous patch. So I withdraw my Reviewed-by.

> 
> Signed-off-by: Alexey Romanov <avromanov at salutedevices.com>
> ---
>  .../bindings/crypto/amlogic,gxl-crypto.yaml   | 21 +++++++++++++++++--
>  1 file changed, 19 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml b/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml
> index 7300328de1d5..106a9d1fed69 100644
> --- a/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml
> +++ b/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml
> @@ -11,8 +11,16 @@ maintainers:
>  
>  properties:
>    compatible:
> -    items:
> -      - const: amlogic,gxl-crypto
> +    oneOf:
> +      - items:
> +          - enum:
> +              - amlogic,s4-crypto
> +          - const: amlogic,a1-crypto
> +      - enum:
> +          - amlogic,gxl-crypto
> +          - amlogic,axg-crypto
> +          - amlogic,g12a-crypto
> +          - amlogic,a1-crypto
>  
>    reg:
>      maxItems: 1
> @@ -33,6 +41,15 @@ required:
>    - interrupts
>    - clocks
>  
> +allOf:
> +  - if:
> +      properties:
> +        compatible:
> +          const: amlogic,a1-crypto
> +    then:
> +      required:
> +        - power-domains
> +
>  additionalProperties: false
>  
>  examples:
> -- 
> 2.34.1
> 


From m.szyprowski at samsung.com  Mon Aug 26 13:49:45 2024
From: m.szyprowski at samsung.com (Marek Szyprowski)
Date: Mon, 26 Aug 2024 22:49:45 +0200
Subject: [PATCH v3 12/14] thermal/of: Use the .should_bind() thermal
 zone callback
In-Reply-To: <CAJZ5v0gOqNi+-Hi8uyeEJ9dHzhwU6GyL6t_7Xjt5Knf2yJmH-w@mail.gmail.com>
References: <2205737.irdbgypaU6@rjwysocki.net>
	<CGME20240826113153eucas1p110e90b4cd98aa70601770fe93d7aa1e5@eucas1p1.samsung.com>
	<2236794.NgBsaNRSFp@rjwysocki.net>
	<ef729a47-b7f9-48b6-a14d-692565ef1d38@samsung.com>
	<CAJZ5v0gOqNi+-Hi8uyeEJ9dHzhwU6GyL6t_7Xjt5Knf2yJmH-w@mail.gmail.com>
Message-ID: <0e710ff1-4ff4-403a-b85d-b1e51c03378a@samsung.com>

On 26.08.2024 14:14, Rafael J. Wysocki wrote:
> On Mon, Aug 26, 2024 at 1:32?PM Marek Szyprowski
> <m.szyprowski at samsung.com> wrote:
>> On 19.08.2024 18:30, Rafael J. Wysocki wrote:
>>> From: Rafael J. Wysocki <rafael.j.wysocki at intel.com>
>>>
>>> Make the thermal_of driver use the .should_bind() thermal zone callback
>>> to provide the thermal core with the information on whether or not to
>>> bind the given cooling device to the given trip point in the given
>>> thermal zone.  If it returns 'true', the thermal core will bind the
>>> cooling device to the trip and the corresponding unbinding will be
>>> taken care of automatically by the core on the removal of the involved
>>> thermal zone or cooling device.
>>>
>>> This replaces the .bind() and .unbind() thermal zone callbacks which
>>> assumed the same trip points ordering in the driver and in the thermal
>>> core (that may not be true any more in the future).  The .bind()
>>> callback would walk the given thermal zone's cooling maps to find all
>>> of the valid trip point combinations with the given cooling device and
>>> it would call thermal_zone_bind_cooling_device() for all of them using
>>> trip point indices reflecting the ordering of the trips in the DT.
>>>
>>> The .should_bind() callback still walks the thermal zone's cooling maps,
>>> but it can use the trip object passed to it by the thermal core to find
>>> the trip in question in the first place and then it uses the
>>> corresponding 'cooling-device' entries to look up the given cooling
>>> device.  To be able to match the trip object provided by the thermal
>>> core to a specific device node, the driver sets the 'priv' field of each
>>> trip to the corresponding device node pointer during initialization.
>>>
>>> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki at intel.com>
>> This patch landed recently in linux-next as commit 6d71d55c3b12
>> ("thermal/of: Use the .should_bind() thermal zone callback")
> It has been fixed since and it is commit  94c6110b0b13c6416146 now.


Confirmed. Thanks for fixing it and sorry for the noise.


> Bottom line is that it was calling of_node_put() too many times due to
> a coding mistake.
>
>> In my tests I found that it breaks booting some on my test boars: Exynos-based
>> (OdroidXU4 with ARM32 bit kernel from multi_v7_defconfig) and Amlogic
>> Meson based boards (OdroidC4, VIM3 with ARM64 defconfig+some debug
>> options). Reverting $subject on top of next-20240823 together with
>> c1ee6e1f68f5 ("thermal: core: Clean up trip bind/unbind functions") and
>> 526954900465 ("thermal: core: Drop unused bind/unbind functions and
>> callbacks") due to compile dependencies fixes the issue.
> Thanks for the report!
>
Best regards
-- 
Marek Szyprowski, PhD
Samsung R&D Institute Poland



From rafael at kernel.org  Tue Aug 27 04:39:36 2024
From: rafael at kernel.org (Rafael J. Wysocki)
Date: Tue, 27 Aug 2024 13:39:36 +0200
Subject: [PATCH v3 12/14] thermal/of: Use the .should_bind() thermal zone callback
In-Reply-To: <0e710ff1-4ff4-403a-b85d-b1e51c03378a@samsung.com>
References: <2205737.irdbgypaU6@rjwysocki.net> <CGME20240826113153eucas1p110e90b4cd98aa70601770fe93d7aa1e5@eucas1p1.samsung.com>
 <2236794.NgBsaNRSFp@rjwysocki.net> <ef729a47-b7f9-48b6-a14d-692565ef1d38@samsung.com>
 <CAJZ5v0gOqNi+-Hi8uyeEJ9dHzhwU6GyL6t_7Xjt5Knf2yJmH-w@mail.gmail.com> <0e710ff1-4ff4-403a-b85d-b1e51c03378a@samsung.com>
Message-ID: <CAJZ5v0h2pF3E_Ni1D7_6jB0NpQrkhcZ6tCCmww8CX02-5qAYEw@mail.gmail.com>

On Mon, Aug 26, 2024 at 10:49?PM Marek Szyprowski
<m.szyprowski at samsung.com> wrote:
>
> On 26.08.2024 14:14, Rafael J. Wysocki wrote:
> > On Mon, Aug 26, 2024 at 1:32?PM Marek Szyprowski
> > <m.szyprowski at samsung.com> wrote:
> >> On 19.08.2024 18:30, Rafael J. Wysocki wrote:
> >>> From: Rafael J. Wysocki <rafael.j.wysocki at intel.com>
> >>>
> >>> Make the thermal_of driver use the .should_bind() thermal zone callback
> >>> to provide the thermal core with the information on whether or not to
> >>> bind the given cooling device to the given trip point in the given
> >>> thermal zone.  If it returns 'true', the thermal core will bind the
> >>> cooling device to the trip and the corresponding unbinding will be
> >>> taken care of automatically by the core on the removal of the involved
> >>> thermal zone or cooling device.
> >>>
> >>> This replaces the .bind() and .unbind() thermal zone callbacks which
> >>> assumed the same trip points ordering in the driver and in the thermal
> >>> core (that may not be true any more in the future).  The .bind()
> >>> callback would walk the given thermal zone's cooling maps to find all
> >>> of the valid trip point combinations with the given cooling device and
> >>> it would call thermal_zone_bind_cooling_device() for all of them using
> >>> trip point indices reflecting the ordering of the trips in the DT.
> >>>
> >>> The .should_bind() callback still walks the thermal zone's cooling maps,
> >>> but it can use the trip object passed to it by the thermal core to find
> >>> the trip in question in the first place and then it uses the
> >>> corresponding 'cooling-device' entries to look up the given cooling
> >>> device.  To be able to match the trip object provided by the thermal
> >>> core to a specific device node, the driver sets the 'priv' field of each
> >>> trip to the corresponding device node pointer during initialization.
> >>>
> >>> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki at intel.com>
> >> This patch landed recently in linux-next as commit 6d71d55c3b12
> >> ("thermal/of: Use the .should_bind() thermal zone callback")
> > It has been fixed since and it is commit  94c6110b0b13c6416146 now.
>
>
> Confirmed. Thanks for fixing it and sorry for the noise.

Thank you!

And it wasn't noise.  You reported the problem as soon as you saw it
and before you could see the fix.  Somebody else saw it earlier, but
there's nothing wrong with that.


From robdclark at gmail.com  Tue Aug 27 15:04:42 2024
From: robdclark at gmail.com (Rob Clark)
Date: Tue, 27 Aug 2024 15:04:42 -0700
Subject: [PATCH v1] drm/ci: increase timeout for all jobs
In-Reply-To: <20240820070818.1124403-1-vignesh.raman@collabora.com>
References: <20240820070818.1124403-1-vignesh.raman@collabora.com>
Message-ID: <CAF6AEGu-T4=3jPRcnq3BFBtfb_yhmWE2b8EgxgTm5Q0bqSv04Q@mail.gmail.com>

On Tue, Aug 20, 2024 at 12:09?AM Vignesh Raman
<vignesh.raman at collabora.com> wrote:
>
> Set the timeout of all drm-ci jobs to 1h30m since
> some jobs takes more than 1 hour to complete.
>
> Signed-off-by: Vignesh Raman <vignesh.raman at collabora.com>

Acked-by: Rob Clark <robdclark at gmail.com>

> ---
>  drivers/gpu/drm/ci/test.yml | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/ci/test.yml b/drivers/gpu/drm/ci/test.yml
> index b6f428cdaf94..09d8447840e9 100644
> --- a/drivers/gpu/drm/ci/test.yml
> +++ b/drivers/gpu/drm/ci/test.yml
> @@ -10,6 +10,7 @@
>  .lava-test:
>    extends:
>      - .test-rules
> +  timeout: "1h30m"
>    script:
>      # Note: Build dir (and thus install) may be dirty due to GIT_STRATEGY
>      - rm -rf install
> @@ -71,6 +72,7 @@
>      - .baremetal-test-arm64
>      - .use-debian/baremetal_arm64_test
>      - .test-rules
> +  timeout: "1h30m"
>    variables:
>      FDO_CI_CONCURRENT: 10
>      HWCI_TEST_SCRIPT: "/install/igt_runner.sh"
> @@ -215,7 +217,6 @@ panfrost:rk3399:
>    extends:
>      - .lava-igt:x86_64
>    stage: i915
> -  timeout: "1h30m"
>    variables:
>      DRIVER_NAME: i915
>      DTB: ""
> @@ -414,6 +415,7 @@ panfrost:g12b:
>
>  virtio_gpu:none:
>    stage: software-driver
> +  timeout: "1h30m"
>    variables:
>      CROSVM_GALLIUM_DRIVER: llvmpipe
>      DRIVER_NAME: virtio_gpu
> @@ -436,6 +438,7 @@ virtio_gpu:none:
>
>  vkms:none:
>    stage: software-driver
> +  timeout: "1h30m"
>    variables:
>      DRIVER_NAME: vkms
>      GPU_VERSION: none
> --
> 2.43.0
>


From neil.armstrong at linaro.org  Wed Aug 28 03:00:38 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Wed, 28 Aug 2024 12:00:38 +0200
Subject: [PATCH v2 0/3] Add support for Amlogic T7 reset controller
In-Reply-To: <c11bfe7e-e917-4ecd-ab2c-548332a4d22d@linaro.org>
References: <20240422-t7-reset-v2-0-cb82271d3296@amlogic.com>
 <c11bfe7e-e917-4ecd-ab2c-548332a4d22d@linaro.org>
Message-ID: <3e7bdc54-294a-467f-a437-2cabe640f624@linaro.org>

Hi,

On 05/06/2024 14:51, Neil Armstrong wrote:
> Hi Philipp,
> 
> On 22/04/2024 13:11, Kelvin Zhang via B4 Relay wrote:
>> Add a new compatible and device node for Amlogic T7 reset controller.
>> And modify the driver accordingly.
>>
>> Signed-off-by: Zelong Dong <zelong.dong at amlogic.com>
>> Signed-off-by: Kelvin Zhang <kelvin.zhang at amlogic.com>
>> ---
>> Changes in v2:
>> - Drop the compatible comment in dt-binding.
>> - Move t7-reset.h to arch/arm64/boot/dts/amlogic.
>> - Link to v1: https://lore.kernel.org/r/20240329-t7-reset-v1-0-4c6e2e68359e at amlogic.com
>>
>> ---
>> Zelong Dong (3):
>> ?????? dt-bindings: reset: Add Amlogic T7 reset controller
>> ?????? reset: reset-meson: Add support for Amlogic T7 SoC reset controller
>> ?????? arm64: dts: amlogic: Add Amlogic T7 reset controller
>>
>> ? .../bindings/reset/amlogic,meson-reset.yaml??????? |?? 1 +
>> ? arch/arm64/boot/dts/amlogic/amlogic-t7-reset.h???? | 197 +++++++++++++++++++++
>> ? arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi??????? |?? 7 +
> 
> I applied the DT change, could you pick the bindings & driver change ?

Gentle ping, could you apply the bindings & driver changes ?
If you lack time, please tell me if it's ok for you for me to apply the bindings via the amlogic tree ?

Neil

> 
> Thanks,
> Neil
> 
>> ? drivers/reset/reset-meson.c??????????????????????? |?? 6 +
>> ? 4 files changed, 211 insertions(+)
>> ---
>> base-commit: f529a6d274b3b8c75899e949649d231298f30a32
>> change-id: 20240329-t7-reset-f87e8346fadb
>>
>> Best regards,



From abelova at astralinux.ru  Wed Aug 28 04:04:21 2024
From: abelova at astralinux.ru (Anastasia Belova)
Date: Wed, 28 Aug 2024 14:04:21 +0300
Subject: [PATCH] drm/meson: switch to a managed drm device
Message-ID: <20240828110421.14956-1-abelova@astralinux.ru>

Switch to a managed drm device to cleanup some error handling
and make future work easier.

Fix dereference of NULL in meson_drv_bind_master by removing
drm_dev_put(drm) before meson_encoder_*_remove where drm
dereferenced.

Co-developed by Linux Verification Center (linuxtesting.org).

Signed-off-by: Anastasia Belova <abelova at astralinux.ru>
---
 drivers/gpu/drm/meson/meson_crtc.c         | 10 +--
 drivers/gpu/drm/meson/meson_drv.c          | 71 ++++++++++------------
 drivers/gpu/drm/meson/meson_drv.h          |  2 +-
 drivers/gpu/drm/meson/meson_encoder_cvbs.c |  8 +--
 drivers/gpu/drm/meson/meson_overlay.c      |  8 +--
 drivers/gpu/drm/meson/meson_plane.c        | 10 +--
 6 files changed, 51 insertions(+), 58 deletions(-)

diff --git a/drivers/gpu/drm/meson/meson_crtc.c b/drivers/gpu/drm/meson/meson_crtc.c
index d70616da8ce2..e1c0bf3baeea 100644
--- a/drivers/gpu/drm/meson/meson_crtc.c
+++ b/drivers/gpu/drm/meson/meson_crtc.c
@@ -662,13 +662,13 @@ void meson_crtc_irq(struct meson_drm *priv)
 
 	drm_crtc_handle_vblank(priv->crtc);
 
-	spin_lock_irqsave(&priv->drm->event_lock, flags);
+	spin_lock_irqsave(&priv->drm.event_lock, flags);
 	if (meson_crtc->event) {
 		drm_crtc_send_vblank_event(priv->crtc, meson_crtc->event);
 		drm_crtc_vblank_put(priv->crtc);
 		meson_crtc->event = NULL;
 	}
-	spin_unlock_irqrestore(&priv->drm->event_lock, flags);
+	spin_unlock_irqrestore(&priv->drm.event_lock, flags);
 }
 
 int meson_crtc_create(struct meson_drm *priv)
@@ -677,18 +677,18 @@ int meson_crtc_create(struct meson_drm *priv)
 	struct drm_crtc *crtc;
 	int ret;
 
-	meson_crtc = devm_kzalloc(priv->drm->dev, sizeof(*meson_crtc),
+	meson_crtc = devm_kzalloc(priv->drm.dev, sizeof(*meson_crtc),
 				  GFP_KERNEL);
 	if (!meson_crtc)
 		return -ENOMEM;
 
 	meson_crtc->priv = priv;
 	crtc = &meson_crtc->base;
-	ret = drm_crtc_init_with_planes(priv->drm, crtc,
+	ret = drm_crtc_init_with_planes(&priv->drm, crtc,
 					priv->primary_plane, NULL,
 					&meson_crtc_funcs, "meson_crtc");
 	if (ret) {
-		dev_err(priv->drm->dev, "Failed to init CRTC\n");
+		dev_err(priv->drm.dev, "Failed to init CRTC\n");
 		return ret;
 	}
 
diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c
index 4bd0baa2a4f5..2e7c2e7c7b82 100644
--- a/drivers/gpu/drm/meson/meson_drv.c
+++ b/drivers/gpu/drm/meson/meson_drv.c
@@ -182,7 +182,6 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
 	struct platform_device *pdev = to_platform_device(dev);
 	const struct meson_drm_match_data *match;
 	struct meson_drm *priv;
-	struct drm_device *drm;
 	struct resource *res;
 	void __iomem *regs;
 	int ret, i;
@@ -197,17 +196,13 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
 	if (!match)
 		return -ENODEV;
 
-	drm = drm_dev_alloc(&meson_driver, dev);
-	if (IS_ERR(drm))
-		return PTR_ERR(drm);
+	priv = devm_drm_dev_alloc(dev, &meson_driver,
+				 struct meson_drm, drm);
 
-	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
-	if (!priv) {
-		ret = -ENOMEM;
-		goto free_drm;
-	}
-	drm->dev_private = priv;
-	priv->drm = drm;
+	if (IS_ERR(priv))
+		return PTR_ERR(priv);
+
+	priv->drm.dev_private = priv;
 	priv->dev = dev;
 	priv->compat = match->compat;
 	priv->afbcd.ops = match->afbcd_ops;
@@ -215,7 +210,7 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
 	regs = devm_platform_ioremap_resource_byname(pdev, "vpu");
 	if (IS_ERR(regs)) {
 		ret = PTR_ERR(regs);
-		goto free_drm;
+		goto remove_encoders;
 	}
 
 	priv->io_base = regs;
@@ -223,13 +218,13 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi");
 	if (!res) {
 		ret = -EINVAL;
-		goto free_drm;
+		goto remove_encoders;
 	}
 	/* Simply ioremap since it may be a shared register zone */
 	regs = devm_ioremap(dev, res->start, resource_size(res));
 	if (!regs) {
 		ret = -EADDRNOTAVAIL;
-		goto free_drm;
+		goto remove_encoders;
 	}
 
 	priv->hhi = devm_regmap_init_mmio(dev, regs,
@@ -237,18 +232,18 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
 	if (IS_ERR(priv->hhi)) {
 		dev_err(&pdev->dev, "Couldn't create the HHI regmap\n");
 		ret = PTR_ERR(priv->hhi);
-		goto free_drm;
+		goto remove_encoders;
 	}
 
 	priv->canvas = meson_canvas_get(dev);
 	if (IS_ERR(priv->canvas)) {
 		ret = PTR_ERR(priv->canvas);
-		goto free_drm;
+		goto remove_encoders;
 	}
 
 	ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1);
 	if (ret)
-		goto free_drm;
+		goto remove_encoders;
 	ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0);
 	if (ret)
 		goto free_canvas_osd1;
@@ -261,7 +256,7 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
 
 	priv->vsync_irq = platform_get_irq(pdev, 0);
 
-	ret = drm_vblank_init(drm, 1);
+	ret = drm_vblank_init(&priv->drm, 1);
 	if (ret)
 		goto free_canvas_vd1_2;
 
@@ -284,10 +279,10 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
 	ret = drmm_mode_config_init(drm);
 	if (ret)
 		goto free_canvas_vd1_2;
-	drm->mode_config.max_width = 3840;
-	drm->mode_config.max_height = 2160;
-	drm->mode_config.funcs = &meson_mode_config_funcs;
-	drm->mode_config.helper_private	= &meson_mode_config_helpers;
+	priv->drm.mode_config.max_width = 3840;
+	priv->drm.mode_config.max_height = 2160;
+	priv->drm.mode_config.funcs = &meson_mode_config_funcs;
+	priv->drm.mode_config.helper_private = &meson_mode_config_helpers;
 
 	/* Hardware Initialization */
 
@@ -308,9 +303,9 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
 		goto exit_afbcd;
 
 	if (has_components) {
-		ret = component_bind_all(dev, drm);
+		ret = component_bind_all(dev, &priv->drm);
 		if (ret) {
-			dev_err(drm->dev, "Couldn't bind all components\n");
+			dev_err(priv->drm.dev, "Couldn't bind all components\n");
 			/* Do not try to unbind */
 			has_components = false;
 			goto exit_afbcd;
@@ -339,26 +334,26 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
 	if (ret)
 		goto exit_afbcd;
 
-	ret = request_irq(priv->vsync_irq, meson_irq, 0, drm->driver->name, drm);
+	ret = request_irq(priv->vsync_irq, meson_irq, 0, priv->drm.driver->name, &priv->drm);
 	if (ret)
 		goto exit_afbcd;
 
-	drm_mode_config_reset(drm);
+	drm_mode_config_reset(&priv->drm);
 
-	drm_kms_helper_poll_init(drm);
+	drm_kms_helper_poll_init(&priv->drm);
 
 	platform_set_drvdata(pdev, priv);
 
-	ret = drm_dev_register(drm, 0);
+	ret = drm_dev_register(&priv->drm, 0);
 	if (ret)
 		goto uninstall_irq;
 
-	drm_fbdev_dma_setup(drm, 32);
+	drm_fbdev_dma_setup(&priv->drm, 32);
 
 	return 0;
 
 uninstall_irq:
-	free_irq(priv->vsync_irq, drm);
+	free_irq(priv->vsync_irq, &priv->drm);
 exit_afbcd:
 	if (priv->afbcd.ops)
 		priv->afbcd.ops->exit(priv);
@@ -370,15 +365,14 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
 	meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
 free_canvas_osd1:
 	meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
-free_drm:
-	drm_dev_put(drm);
+remove_encoders:
 
 	meson_encoder_dsi_remove(priv);
 	meson_encoder_hdmi_remove(priv);
 	meson_encoder_cvbs_remove(priv);
 
 	if (has_components)
-		component_unbind_all(dev, drm);
+		component_unbind_all(dev, &priv->drm);
 
 	return ret;
 }
@@ -391,7 +385,7 @@ static int meson_drv_bind(struct device *dev)
 static void meson_drv_unbind(struct device *dev)
 {
 	struct meson_drm *priv = dev_get_drvdata(dev);
-	struct drm_device *drm = priv->drm;
+	struct drm_device *drm = &priv->drm;
 
 	if (priv->canvas) {
 		meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
@@ -404,7 +398,6 @@ static void meson_drv_unbind(struct device *dev)
 	drm_kms_helper_poll_fini(drm);
 	drm_atomic_helper_shutdown(drm);
 	free_irq(priv->vsync_irq, drm);
-	drm_dev_put(drm);
 
 	meson_encoder_dsi_remove(priv);
 	meson_encoder_hdmi_remove(priv);
@@ -428,7 +421,7 @@ static int __maybe_unused meson_drv_pm_suspend(struct device *dev)
 	if (!priv)
 		return 0;
 
-	return drm_mode_config_helper_suspend(priv->drm);
+	return drm_mode_config_helper_suspend(&priv->drm);
 }
 
 static int __maybe_unused meson_drv_pm_resume(struct device *dev)
@@ -445,7 +438,7 @@ static int __maybe_unused meson_drv_pm_resume(struct device *dev)
 	if (priv->afbcd.ops)
 		priv->afbcd.ops->init(priv);
 
-	return drm_mode_config_helper_resume(priv->drm);
+	return drm_mode_config_helper_resume(&priv->drm);
 }
 
 static void meson_drv_shutdown(struct platform_device *pdev)
@@ -455,8 +448,8 @@ static void meson_drv_shutdown(struct platform_device *pdev)
 	if (!priv)
 		return;
 
-	drm_kms_helper_poll_fini(priv->drm);
-	drm_atomic_helper_shutdown(priv->drm);
+	drm_kms_helper_poll_fini(&priv->drm);
+	drm_atomic_helper_shutdown(&priv->drm);
 }
 
 /*
diff --git a/drivers/gpu/drm/meson/meson_drv.h b/drivers/gpu/drm/meson/meson_drv.h
index 3f9345c14f31..c4c6c810cb20 100644
--- a/drivers/gpu/drm/meson/meson_drv.h
+++ b/drivers/gpu/drm/meson/meson_drv.h
@@ -53,7 +53,7 @@ struct meson_drm {
 	u8 canvas_id_vd1_1;
 	u8 canvas_id_vd1_2;
 
-	struct drm_device *drm;
+	struct drm_device drm;
 	struct drm_crtc *crtc;
 	struct drm_plane *primary_plane;
 	struct drm_plane *overlay_plane;
diff --git a/drivers/gpu/drm/meson/meson_encoder_cvbs.c b/drivers/gpu/drm/meson/meson_encoder_cvbs.c
index d1191de855d9..ddca22c8c1ff 100644
--- a/drivers/gpu/drm/meson/meson_encoder_cvbs.c
+++ b/drivers/gpu/drm/meson/meson_encoder_cvbs.c
@@ -104,7 +104,7 @@ static int meson_encoder_cvbs_get_modes(struct drm_bridge *bridge,
 	for (i = 0; i < MESON_CVBS_MODES_COUNT; ++i) {
 		struct meson_cvbs_mode *meson_mode = &meson_cvbs_modes[i];
 
-		mode = drm_mode_duplicate(priv->drm, &meson_mode->mode);
+		mode = drm_mode_duplicate(&priv->drm, &meson_mode->mode);
 		if (!mode) {
 			dev_err(priv->dev, "Failed to create a new display mode\n");
 			return 0;
@@ -221,7 +221,7 @@ static const struct drm_bridge_funcs meson_encoder_cvbs_bridge_funcs = {
 
 int meson_encoder_cvbs_probe(struct meson_drm *priv)
 {
-	struct drm_device *drm = priv->drm;
+	struct drm_device *drm = &priv->drm;
 	struct meson_encoder_cvbs *meson_encoder_cvbs;
 	struct drm_connector *connector;
 	struct device_node *remote;
@@ -256,7 +256,7 @@ int meson_encoder_cvbs_probe(struct meson_drm *priv)
 	meson_encoder_cvbs->priv = priv;
 
 	/* Encoder */
-	ret = drm_simple_encoder_init(priv->drm, &meson_encoder_cvbs->encoder,
+	ret = drm_simple_encoder_init(&priv->drm, &meson_encoder_cvbs->encoder,
 				      DRM_MODE_ENCODER_TVDAC);
 	if (ret)
 		return dev_err_probe(priv->dev, ret,
@@ -273,7 +273,7 @@ int meson_encoder_cvbs_probe(struct meson_drm *priv)
 	}
 
 	/* Initialize & attach Bridge Connector */
-	connector = drm_bridge_connector_init(priv->drm, &meson_encoder_cvbs->encoder);
+	connector = drm_bridge_connector_init(&priv->drm, &meson_encoder_cvbs->encoder);
 	if (IS_ERR(connector))
 		return dev_err_probe(priv->dev, PTR_ERR(connector),
 				     "Unable to create CVBS bridge connector\n");
diff --git a/drivers/gpu/drm/meson/meson_overlay.c b/drivers/gpu/drm/meson/meson_overlay.c
index 7f98de38842b..60ee7f758723 100644
--- a/drivers/gpu/drm/meson/meson_overlay.c
+++ b/drivers/gpu/drm/meson/meson_overlay.c
@@ -484,7 +484,7 @@ static void meson_overlay_atomic_update(struct drm_plane *plane,
 
 	interlace_mode = new_state->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE;
 
-	spin_lock_irqsave(&priv->drm->event_lock, flags);
+	spin_lock_irqsave(&priv->drm.event_lock, flags);
 
 	if ((fb->modifier & DRM_FORMAT_MOD_AMLOGIC_FBC(0, 0)) ==
 			    DRM_FORMAT_MOD_AMLOGIC_FBC(0, 0)) {
@@ -717,7 +717,7 @@ static void meson_overlay_atomic_update(struct drm_plane *plane,
 
 	priv->viu.vd1_enabled = true;
 
-	spin_unlock_irqrestore(&priv->drm->event_lock, flags);
+	spin_unlock_irqrestore(&priv->drm.event_lock, flags);
 
 	DRM_DEBUG_DRIVER("\n");
 }
@@ -838,7 +838,7 @@ int meson_overlay_create(struct meson_drm *priv)
 
 	DRM_DEBUG_DRIVER("\n");
 
-	meson_overlay = devm_kzalloc(priv->drm->dev, sizeof(*meson_overlay),
+	meson_overlay = devm_kzalloc(priv->drm.dev, sizeof(*meson_overlay),
 				   GFP_KERNEL);
 	if (!meson_overlay)
 		return -ENOMEM;
@@ -846,7 +846,7 @@ int meson_overlay_create(struct meson_drm *priv)
 	meson_overlay->priv = priv;
 	plane = &meson_overlay->base;
 
-	drm_universal_plane_init(priv->drm, plane, 0xFF,
+	drm_universal_plane_init(&priv->drm, plane, 0xFF,
 				 &meson_overlay_funcs,
 				 supported_drm_formats,
 				 ARRAY_SIZE(supported_drm_formats),
diff --git a/drivers/gpu/drm/meson/meson_plane.c b/drivers/gpu/drm/meson/meson_plane.c
index b43ac61201f3..13be94309bf4 100644
--- a/drivers/gpu/drm/meson/meson_plane.c
+++ b/drivers/gpu/drm/meson/meson_plane.c
@@ -157,7 +157,7 @@ static void meson_plane_atomic_update(struct drm_plane *plane,
 	 * Update Buffer
 	 * Enable Plane
 	 */
-	spin_lock_irqsave(&priv->drm->event_lock, flags);
+	spin_lock_irqsave(&priv->drm.event_lock, flags);
 
 	/* Check if AFBC decoder is required for this buffer */
 	if ((meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXM) ||
@@ -393,7 +393,7 @@ static void meson_plane_atomic_update(struct drm_plane *plane,
 
 	priv->viu.osd1_enabled = true;
 
-	spin_unlock_irqrestore(&priv->drm->event_lock, flags);
+	spin_unlock_irqrestore(&priv->drm.event_lock, flags);
 }
 
 static void meson_plane_atomic_disable(struct drm_plane *plane,
@@ -536,7 +536,7 @@ int meson_plane_create(struct meson_drm *priv)
 	const uint64_t *format_modifiers = format_modifiers_default;
 	int ret;
 
-	meson_plane = devm_kzalloc(priv->drm->dev, sizeof(*meson_plane),
+	meson_plane = devm_kzalloc(priv->drm.dev, sizeof(*meson_plane),
 				   GFP_KERNEL);
 	if (!meson_plane)
 		return -ENOMEM;
@@ -549,14 +549,14 @@ int meson_plane_create(struct meson_drm *priv)
 	else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A))
 		format_modifiers = format_modifiers_afbc_g12a;
 
-	ret = drm_universal_plane_init(priv->drm, plane, 0xFF,
+	ret = drm_universal_plane_init(&priv->drm, plane, 0xFF,
 					&meson_plane_funcs,
 					supported_drm_formats,
 					ARRAY_SIZE(supported_drm_formats),
 					format_modifiers,
 					DRM_PLANE_TYPE_PRIMARY, "meson_primary_plane");
 	if (ret) {
-		devm_kfree(priv->drm->dev, meson_plane);
+		devm_kfree(priv->drm.dev, meson_plane);
 		return ret;
 	}
 
-- 
2.30.2



From pstanner at redhat.com  Wed Aug 28 05:57:12 2024
From: pstanner at redhat.com (Philipp Stanner)
Date: Wed, 28 Aug 2024 14:57:12 +0200
Subject: [PATCH] drm/meson: switch to a managed drm device
In-Reply-To: <20240828110421.14956-1-abelova@astralinux.ru>
References: <20240828110421.14956-1-abelova@astralinux.ru>
Message-ID: <75c06da11741d46cd67dbb685b7473ae94c2feb5.camel@redhat.com>

On Wed, 2024-08-28 at 14:04 +0300, Anastasia Belova wrote:
> Switch to a managed drm device to cleanup some error handling
> and make future work easier.

It's best to state what the current situation is like and then how this
patch addresses it.

If the cleanup topic is separate from the addressed NULL pointer issue
referenced below, it might make sense to split it into two patches, one
that does the cleanup, and another that addresses the NULL pointer
deref.

> 
> Fix dereference of NULL in meson_drv_bind_master by removing
> drm_dev_put(drm) before meson_encoder_*_remove where drm
> dereferenced.

(-> "where drm *is* dereferenced" )

Can this be backported to older versions?

If yes, stable at vger.kernel.org should be put on CC.


> 
> Co-developed by Linux Verification Center (linuxtesting.org).
> 
> Signed-off-by: Anastasia Belova <abelova at astralinux.ru>

Should also include:

Cc: stable at vger.kernel.org # vX.Y
Fixes: <commit>

???????,
P.

> ---
> ?drivers/gpu/drm/meson/meson_crtc.c???????? | 10 +--
> ?drivers/gpu/drm/meson/meson_drv.c????????? | 71 ++++++++++----------
> --
> ?drivers/gpu/drm/meson/meson_drv.h????????? |? 2 +-
> ?drivers/gpu/drm/meson/meson_encoder_cvbs.c |? 8 +--
> ?drivers/gpu/drm/meson/meson_overlay.c????? |? 8 +--
> ?drivers/gpu/drm/meson/meson_plane.c??????? | 10 +--
> ?6 files changed, 51 insertions(+), 58 deletions(-)
> 
> diff --git a/drivers/gpu/drm/meson/meson_crtc.c
> b/drivers/gpu/drm/meson/meson_crtc.c
> index d70616da8ce2..e1c0bf3baeea 100644
> --- a/drivers/gpu/drm/meson/meson_crtc.c
> +++ b/drivers/gpu/drm/meson/meson_crtc.c
> @@ -662,13 +662,13 @@ void meson_crtc_irq(struct meson_drm *priv)
> ?
> ?	drm_crtc_handle_vblank(priv->crtc);
> ?
> -	spin_lock_irqsave(&priv->drm->event_lock, flags);
> +	spin_lock_irqsave(&priv->drm.event_lock, flags);
> ?	if (meson_crtc->event) {
> ?		drm_crtc_send_vblank_event(priv->crtc, meson_crtc-
> >event);
> ?		drm_crtc_vblank_put(priv->crtc);
> ?		meson_crtc->event = NULL;
> ?	}
> -	spin_unlock_irqrestore(&priv->drm->event_lock, flags);
> +	spin_unlock_irqrestore(&priv->drm.event_lock, flags);
> ?}
> ?
> ?int meson_crtc_create(struct meson_drm *priv)
> @@ -677,18 +677,18 @@ int meson_crtc_create(struct meson_drm *priv)
> ?	struct drm_crtc *crtc;
> ?	int ret;
> ?
> -	meson_crtc = devm_kzalloc(priv->drm->dev,
> sizeof(*meson_crtc),
> +	meson_crtc = devm_kzalloc(priv->drm.dev,
> sizeof(*meson_crtc),
> ?				? GFP_KERNEL);
> ?	if (!meson_crtc)
> ?		return -ENOMEM;
> ?
> ?	meson_crtc->priv = priv;
> ?	crtc = &meson_crtc->base;
> -	ret = drm_crtc_init_with_planes(priv->drm, crtc,
> +	ret = drm_crtc_init_with_planes(&priv->drm, crtc,
> ?					priv->primary_plane, NULL,
> ?					&meson_crtc_funcs,
> "meson_crtc");
> ?	if (ret) {
> -		dev_err(priv->drm->dev, "Failed to init CRTC\n");
> +		dev_err(priv->drm.dev, "Failed to init CRTC\n");
> ?		return ret;
> ?	}
> ?
> diff --git a/drivers/gpu/drm/meson/meson_drv.c
> b/drivers/gpu/drm/meson/meson_drv.c
> index 4bd0baa2a4f5..2e7c2e7c7b82 100644
> --- a/drivers/gpu/drm/meson/meson_drv.c
> +++ b/drivers/gpu/drm/meson/meson_drv.c
> @@ -182,7 +182,6 @@ static int meson_drv_bind_master(struct device
> *dev, bool has_components)
> ?	struct platform_device *pdev = to_platform_device(dev);
> ?	const struct meson_drm_match_data *match;
> ?	struct meson_drm *priv;
> -	struct drm_device *drm;
> ?	struct resource *res;
> ?	void __iomem *regs;
> ?	int ret, i;
> @@ -197,17 +196,13 @@ static int meson_drv_bind_master(struct device
> *dev, bool has_components)
> ?	if (!match)
> ?		return -ENODEV;
> ?
> -	drm = drm_dev_alloc(&meson_driver, dev);
> -	if (IS_ERR(drm))
> -		return PTR_ERR(drm);
> +	priv = devm_drm_dev_alloc(dev, &meson_driver,
> +				 struct meson_drm, drm);
> ?
> -	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> -	if (!priv) {
> -		ret = -ENOMEM;
> -		goto free_drm;
> -	}
> -	drm->dev_private = priv;
> -	priv->drm = drm;
> +	if (IS_ERR(priv))
> +		return PTR_ERR(priv);
> +
> +	priv->drm.dev_private = priv;
> ?	priv->dev = dev;
> ?	priv->compat = match->compat;
> ?	priv->afbcd.ops = match->afbcd_ops;
> @@ -215,7 +210,7 @@ static int meson_drv_bind_master(struct device
> *dev, bool has_components)
> ?	regs = devm_platform_ioremap_resource_byname(pdev, "vpu");
> ?	if (IS_ERR(regs)) {
> ?		ret = PTR_ERR(regs);
> -		goto free_drm;
> +		goto remove_encoders;
> ?	}
> ?
> ?	priv->io_base = regs;
> @@ -223,13 +218,13 @@ static int meson_drv_bind_master(struct device
> *dev, bool has_components)
> ?	res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
> "hhi");
> ?	if (!res) {
> ?		ret = -EINVAL;
> -		goto free_drm;
> +		goto remove_encoders;
> ?	}
> ?	/* Simply ioremap since it may be a shared register zone */
> ?	regs = devm_ioremap(dev, res->start, resource_size(res));
> ?	if (!regs) {
> ?		ret = -EADDRNOTAVAIL;
> -		goto free_drm;
> +		goto remove_encoders;
> ?	}
> ?
> ?	priv->hhi = devm_regmap_init_mmio(dev, regs,
> @@ -237,18 +232,18 @@ static int meson_drv_bind_master(struct device
> *dev, bool has_components)
> ?	if (IS_ERR(priv->hhi)) {
> ?		dev_err(&pdev->dev, "Couldn't create the HHI
> regmap\n");
> ?		ret = PTR_ERR(priv->hhi);
> -		goto free_drm;
> +		goto remove_encoders;
> ?	}
> ?
> ?	priv->canvas = meson_canvas_get(dev);
> ?	if (IS_ERR(priv->canvas)) {
> ?		ret = PTR_ERR(priv->canvas);
> -		goto free_drm;
> +		goto remove_encoders;
> ?	}
> ?
> ?	ret = meson_canvas_alloc(priv->canvas, &priv-
> >canvas_id_osd1);
> ?	if (ret)
> -		goto free_drm;
> +		goto remove_encoders;
> ?	ret = meson_canvas_alloc(priv->canvas, &priv-
> >canvas_id_vd1_0);
> ?	if (ret)
> ?		goto free_canvas_osd1;
> @@ -261,7 +256,7 @@ static int meson_drv_bind_master(struct device
> *dev, bool has_components)
> ?
> ?	priv->vsync_irq = platform_get_irq(pdev, 0);
> ?
> -	ret = drm_vblank_init(drm, 1);
> +	ret = drm_vblank_init(&priv->drm, 1);
> ?	if (ret)
> ?		goto free_canvas_vd1_2;
> ?
> @@ -284,10 +279,10 @@ static int meson_drv_bind_master(struct device
> *dev, bool has_components)
> ?	ret = drmm_mode_config_init(drm);
> ?	if (ret)
> ?		goto free_canvas_vd1_2;
> -	drm->mode_config.max_width = 3840;
> -	drm->mode_config.max_height = 2160;
> -	drm->mode_config.funcs = &meson_mode_config_funcs;
> -	drm->mode_config.helper_private	=
> &meson_mode_config_helpers;
> +	priv->drm.mode_config.max_width = 3840;
> +	priv->drm.mode_config.max_height = 2160;
> +	priv->drm.mode_config.funcs = &meson_mode_config_funcs;
> +	priv->drm.mode_config.helper_private =
> &meson_mode_config_helpers;
> ?
> ?	/* Hardware Initialization */
> ?
> @@ -308,9 +303,9 @@ static int meson_drv_bind_master(struct device
> *dev, bool has_components)
> ?		goto exit_afbcd;
> ?
> ?	if (has_components) {
> -		ret = component_bind_all(dev, drm);
> +		ret = component_bind_all(dev, &priv->drm);
> ?		if (ret) {
> -			dev_err(drm->dev, "Couldn't bind all
> components\n");
> +			dev_err(priv->drm.dev, "Couldn't bind all
> components\n");
> ?			/* Do not try to unbind */
> ?			has_components = false;
> ?			goto exit_afbcd;
> @@ -339,26 +334,26 @@ static int meson_drv_bind_master(struct device
> *dev, bool has_components)
> ?	if (ret)
> ?		goto exit_afbcd;
> ?
> -	ret = request_irq(priv->vsync_irq, meson_irq, 0, drm-
> >driver->name, drm);
> +	ret = request_irq(priv->vsync_irq, meson_irq, 0, priv-
> >drm.driver->name, &priv->drm);
> ?	if (ret)
> ?		goto exit_afbcd;
> ?
> -	drm_mode_config_reset(drm);
> +	drm_mode_config_reset(&priv->drm);
> ?
> -	drm_kms_helper_poll_init(drm);
> +	drm_kms_helper_poll_init(&priv->drm);
> ?
> ?	platform_set_drvdata(pdev, priv);
> ?
> -	ret = drm_dev_register(drm, 0);
> +	ret = drm_dev_register(&priv->drm, 0);
> ?	if (ret)
> ?		goto uninstall_irq;
> ?
> -	drm_fbdev_dma_setup(drm, 32);
> +	drm_fbdev_dma_setup(&priv->drm, 32);
> ?
> ?	return 0;
> ?
> ?uninstall_irq:
> -	free_irq(priv->vsync_irq, drm);
> +	free_irq(priv->vsync_irq, &priv->drm);
> ?exit_afbcd:
> ?	if (priv->afbcd.ops)
> ?		priv->afbcd.ops->exit(priv);
> @@ -370,15 +365,14 @@ static int meson_drv_bind_master(struct device
> *dev, bool has_components)
> ?	meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
> ?free_canvas_osd1:
> ?	meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
> -free_drm:
> -	drm_dev_put(drm);
> +remove_encoders:
> ?
> ?	meson_encoder_dsi_remove(priv);
> ?	meson_encoder_hdmi_remove(priv);
> ?	meson_encoder_cvbs_remove(priv);
> ?
> ?	if (has_components)
> -		component_unbind_all(dev, drm);
> +		component_unbind_all(dev, &priv->drm);
> ?
> ?	return ret;
> ?}
> @@ -391,7 +385,7 @@ static int meson_drv_bind(struct device *dev)
> ?static void meson_drv_unbind(struct device *dev)
> ?{
> ?	struct meson_drm *priv = dev_get_drvdata(dev);
> -	struct drm_device *drm = priv->drm;
> +	struct drm_device *drm = &priv->drm;
> ?
> ?	if (priv->canvas) {
> ?		meson_canvas_free(priv->canvas, priv-
> >canvas_id_osd1);
> @@ -404,7 +398,6 @@ static void meson_drv_unbind(struct device *dev)
> ?	drm_kms_helper_poll_fini(drm);
> ?	drm_atomic_helper_shutdown(drm);
> ?	free_irq(priv->vsync_irq, drm);
> -	drm_dev_put(drm);
> ?
> ?	meson_encoder_dsi_remove(priv);
> ?	meson_encoder_hdmi_remove(priv);
> @@ -428,7 +421,7 @@ static int __maybe_unused
> meson_drv_pm_suspend(struct device *dev)
> ?	if (!priv)
> ?		return 0;
> ?
> -	return drm_mode_config_helper_suspend(priv->drm);
> +	return drm_mode_config_helper_suspend(&priv->drm);
> ?}
> ?
> ?static int __maybe_unused meson_drv_pm_resume(struct device *dev)
> @@ -445,7 +438,7 @@ static int __maybe_unused
> meson_drv_pm_resume(struct device *dev)
> ?	if (priv->afbcd.ops)
> ?		priv->afbcd.ops->init(priv);
> ?
> -	return drm_mode_config_helper_resume(priv->drm);
> +	return drm_mode_config_helper_resume(&priv->drm);
> ?}
> ?
> ?static void meson_drv_shutdown(struct platform_device *pdev)
> @@ -455,8 +448,8 @@ static void meson_drv_shutdown(struct
> platform_device *pdev)
> ?	if (!priv)
> ?		return;
> ?
> -	drm_kms_helper_poll_fini(priv->drm);
> -	drm_atomic_helper_shutdown(priv->drm);
> +	drm_kms_helper_poll_fini(&priv->drm);
> +	drm_atomic_helper_shutdown(&priv->drm);
> ?}
> ?
> ?/*
> diff --git a/drivers/gpu/drm/meson/meson_drv.h
> b/drivers/gpu/drm/meson/meson_drv.h
> index 3f9345c14f31..c4c6c810cb20 100644
> --- a/drivers/gpu/drm/meson/meson_drv.h
> +++ b/drivers/gpu/drm/meson/meson_drv.h
> @@ -53,7 +53,7 @@ struct meson_drm {
> ?	u8 canvas_id_vd1_1;
> ?	u8 canvas_id_vd1_2;
> ?
> -	struct drm_device *drm;
> +	struct drm_device drm;
> ?	struct drm_crtc *crtc;
> ?	struct drm_plane *primary_plane;
> ?	struct drm_plane *overlay_plane;
> diff --git a/drivers/gpu/drm/meson/meson_encoder_cvbs.c
> b/drivers/gpu/drm/meson/meson_encoder_cvbs.c
> index d1191de855d9..ddca22c8c1ff 100644
> --- a/drivers/gpu/drm/meson/meson_encoder_cvbs.c
> +++ b/drivers/gpu/drm/meson/meson_encoder_cvbs.c
> @@ -104,7 +104,7 @@ static int meson_encoder_cvbs_get_modes(struct
> drm_bridge *bridge,
> ?	for (i = 0; i < MESON_CVBS_MODES_COUNT; ++i) {
> ?		struct meson_cvbs_mode *meson_mode =
> &meson_cvbs_modes[i];
> ?
> -		mode = drm_mode_duplicate(priv->drm, &meson_mode-
> >mode);
> +		mode = drm_mode_duplicate(&priv->drm, &meson_mode-
> >mode);
> ?		if (!mode) {
> ?			dev_err(priv->dev, "Failed to create a new
> display mode\n");
> ?			return 0;
> @@ -221,7 +221,7 @@ static const struct drm_bridge_funcs
> meson_encoder_cvbs_bridge_funcs = {
> ?
> ?int meson_encoder_cvbs_probe(struct meson_drm *priv)
> ?{
> -	struct drm_device *drm = priv->drm;
> +	struct drm_device *drm = &priv->drm;
> ?	struct meson_encoder_cvbs *meson_encoder_cvbs;
> ?	struct drm_connector *connector;
> ?	struct device_node *remote;
> @@ -256,7 +256,7 @@ int meson_encoder_cvbs_probe(struct meson_drm
> *priv)
> ?	meson_encoder_cvbs->priv = priv;
> ?
> ?	/* Encoder */
> -	ret = drm_simple_encoder_init(priv->drm,
> &meson_encoder_cvbs->encoder,
> +	ret = drm_simple_encoder_init(&priv->drm,
> &meson_encoder_cvbs->encoder,
> ?				????? DRM_MODE_ENCODER_TVDAC);
> ?	if (ret)
> ?		return dev_err_probe(priv->dev, ret,
> @@ -273,7 +273,7 @@ int meson_encoder_cvbs_probe(struct meson_drm
> *priv)
> ?	}
> ?
> ?	/* Initialize & attach Bridge Connector */
> -	connector = drm_bridge_connector_init(priv->drm,
> &meson_encoder_cvbs->encoder);
> +	connector = drm_bridge_connector_init(&priv->drm,
> &meson_encoder_cvbs->encoder);
> ?	if (IS_ERR(connector))
> ?		return dev_err_probe(priv->dev, PTR_ERR(connector),
> ?				???? "Unable to create CVBS bridge
> connector\n");
> diff --git a/drivers/gpu/drm/meson/meson_overlay.c
> b/drivers/gpu/drm/meson/meson_overlay.c
> index 7f98de38842b..60ee7f758723 100644
> --- a/drivers/gpu/drm/meson/meson_overlay.c
> +++ b/drivers/gpu/drm/meson/meson_overlay.c
> @@ -484,7 +484,7 @@ static void meson_overlay_atomic_update(struct
> drm_plane *plane,
> ?
> ?	interlace_mode = new_state->crtc->mode.flags &
> DRM_MODE_FLAG_INTERLACE;
> ?
> -	spin_lock_irqsave(&priv->drm->event_lock, flags);
> +	spin_lock_irqsave(&priv->drm.event_lock, flags);
> ?
> ?	if ((fb->modifier & DRM_FORMAT_MOD_AMLOGIC_FBC(0, 0)) ==
> ?			??? DRM_FORMAT_MOD_AMLOGIC_FBC(0, 0)) {
> @@ -717,7 +717,7 @@ static void meson_overlay_atomic_update(struct
> drm_plane *plane,
> ?
> ?	priv->viu.vd1_enabled = true;
> ?
> -	spin_unlock_irqrestore(&priv->drm->event_lock, flags);
> +	spin_unlock_irqrestore(&priv->drm.event_lock, flags);
> ?
> ?	DRM_DEBUG_DRIVER("\n");
> ?}
> @@ -838,7 +838,7 @@ int meson_overlay_create(struct meson_drm *priv)
> ?
> ?	DRM_DEBUG_DRIVER("\n");
> ?
> -	meson_overlay = devm_kzalloc(priv->drm->dev,
> sizeof(*meson_overlay),
> +	meson_overlay = devm_kzalloc(priv->drm.dev,
> sizeof(*meson_overlay),
> ?				?? GFP_KERNEL);
> ?	if (!meson_overlay)
> ?		return -ENOMEM;
> @@ -846,7 +846,7 @@ int meson_overlay_create(struct meson_drm *priv)
> ?	meson_overlay->priv = priv;
> ?	plane = &meson_overlay->base;
> ?
> -	drm_universal_plane_init(priv->drm, plane, 0xFF,
> +	drm_universal_plane_init(&priv->drm, plane, 0xFF,
> ?				 &meson_overlay_funcs,
> ?				 supported_drm_formats,
> ?				 ARRAY_SIZE(supported_drm_formats),
> diff --git a/drivers/gpu/drm/meson/meson_plane.c
> b/drivers/gpu/drm/meson/meson_plane.c
> index b43ac61201f3..13be94309bf4 100644
> --- a/drivers/gpu/drm/meson/meson_plane.c
> +++ b/drivers/gpu/drm/meson/meson_plane.c
> @@ -157,7 +157,7 @@ static void meson_plane_atomic_update(struct
> drm_plane *plane,
> ?	 * Update Buffer
> ?	 * Enable Plane
> ?	 */
> -	spin_lock_irqsave(&priv->drm->event_lock, flags);
> +	spin_lock_irqsave(&priv->drm.event_lock, flags);
> ?
> ?	/* Check if AFBC decoder is required for this buffer */
> ?	if ((meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXM) ||
> @@ -393,7 +393,7 @@ static void meson_plane_atomic_update(struct
> drm_plane *plane,
> ?
> ?	priv->viu.osd1_enabled = true;
> ?
> -	spin_unlock_irqrestore(&priv->drm->event_lock, flags);
> +	spin_unlock_irqrestore(&priv->drm.event_lock, flags);
> ?}
> ?
> ?static void meson_plane_atomic_disable(struct drm_plane *plane,
> @@ -536,7 +536,7 @@ int meson_plane_create(struct meson_drm *priv)
> ?	const uint64_t *format_modifiers = format_modifiers_default;
> ?	int ret;
> ?
> -	meson_plane = devm_kzalloc(priv->drm->dev,
> sizeof(*meson_plane),
> +	meson_plane = devm_kzalloc(priv->drm.dev,
> sizeof(*meson_plane),
> ?				?? GFP_KERNEL);
> ?	if (!meson_plane)
> ?		return -ENOMEM;
> @@ -549,14 +549,14 @@ int meson_plane_create(struct meson_drm *priv)
> ?	else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A))
> ?		format_modifiers = format_modifiers_afbc_g12a;
> ?
> -	ret = drm_universal_plane_init(priv->drm, plane, 0xFF,
> +	ret = drm_universal_plane_init(&priv->drm, plane, 0xFF,
> ?					&meson_plane_funcs,
> ?					supported_drm_formats,
> ?					ARRAY_SIZE(supported_drm_for
> mats),
> ?					format_modifiers,
> ?					DRM_PLANE_TYPE_PRIMARY,
> "meson_primary_plane");
> ?	if (ret) {
> -		devm_kfree(priv->drm->dev, meson_plane);
> +		devm_kfree(priv->drm.dev, meson_plane);
> ?		return ret;
> ?	}
> ?



From neil.armstrong at linaro.org  Wed Aug 28 06:53:54 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Wed, 28 Aug 2024 15:53:54 +0200
Subject: [PATCH v2 1/3] ASoC: dt-bindings: amlogic,axg-sound-card: document
 clocks property
In-Reply-To: <20240828-topic-amlogic-upstream-bindings-fixes-audio-snd-card-v2-0-58159abf0779@linaro.org>
References: <20240828-topic-amlogic-upstream-bindings-fixes-audio-snd-card-v2-0-58159abf0779@linaro.org>
Message-ID: <20240828-topic-amlogic-upstream-bindings-fixes-audio-snd-card-v2-1-58159abf0779@linaro.org>

The sound card design is based on reference PLL frequencies that
are the root of all clock rates calculations.

Today, those frequencies are currently specified in DT via assigned-clocks,
because they correspond to the basic audio use-case.

It makes no sense to setup clock rates for a sound card without
referencing the clocks for the sound card, mainly because at
some point more complex audio use cases will be supported
and those root rates would need to change.

To solve this situation, let's legitimize the presence of assigned-clocks
in the sound card by documenting those clocks, as it describes a true
dependency of the sound card and paths the way of more complex
audio uses-cases involving those root frequencies.

Signed-off-by: Neil Armstrong <neil.armstrong at linaro.org>
---
 .../devicetree/bindings/sound/amlogic,axg-sound-card.yaml          | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-sound-card.yaml b/Documentation/devicetree/bindings/sound/amlogic,axg-sound-card.yaml
index 5db718e4d0e7..4f13e8ab50b2 100644
--- a/Documentation/devicetree/bindings/sound/amlogic,axg-sound-card.yaml
+++ b/Documentation/devicetree/bindings/sound/amlogic,axg-sound-card.yaml
@@ -26,6 +26,13 @@ properties:
       A list off component DAPM widget. Each entry is a pair of strings,
       the first being the widget type, the second being the widget name
 
+  clocks:
+    minItems: 1
+    maxItems: 3
+    description:
+      Base PLL clocks of audio susbsytem, used to configure base clock
+      frequencies for different audio use-cases.
+
 patternProperties:
   "^dai-link-[0-9]+$":
     type: object

-- 
2.34.1



From neil.armstrong at linaro.org  Wed Aug 28 06:53:53 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Wed, 28 Aug 2024 15:53:53 +0200
Subject: [PATCH v2 0/3] ASoC: dt-bindings: amlogic-sound-cards: document
 clocks property
Message-ID: <20240828-topic-amlogic-upstream-bindings-fixes-audio-snd-card-v2-0-58159abf0779@linaro.org>

Following an off-list discution with Jerome about fixing the following
DTBs check errors:
    sound: Unevaluated properties are not allowed ('assigned-clock-parents', 'assigned-clock-rates', 'assigned-clocks' were unexpected)
        from schema $id: http://devicetree.org/schemas/sound/amlogic,axg-sound-card.yaml#
    sound: Unevaluated properties are not allowed ('assigned-clock-parents', 'assigned-clock-rates', 'assigned-clocks' were unexpected)
        from schema $id: http://devicetree.org/schemas/sound/amlogic,gx-sound-card.yaml#
    sound: 'anyOf' conditional failed, one must be fixed:
        'clocks' is a required property
        '#clock-cells' is a required property
        from schema $id: http://devicetree.org/schemas/clock/clock.yaml#

It has been agreed documenting the clock in the sound card is a better solution
than moving them to a random clock controller or consumer node which is not
related to the actual meaning of those root frequencies.

The patchset adds the clocks proprty to the bindings and finally adds the
properties to the DT files.

Signed-off-by: Neil Armstrong <neil.armstrong at linaro.org>
---
Changes in v2:
- drop clock-names in bindings & commit messages
- fix new boards
- drop RFS
- Link to v1: https://lore.kernel.org/r/20240614-topic-amlogic-upstream-bindings-fixes-audio-snd-card-v1-0-9f57d9e01834 at linaro.org

---
Neil Armstrong (3):
      ASoC: dt-bindings: amlogic,axg-sound-card: document clocks property
      ASoC: dt-bindings: amlogic,gx-sound-card: document clocks property
      arm64: dts: amlogic: add clock and clock-names to sound cards

 .../devicetree/bindings/sound/amlogic,axg-sound-card.yaml          | 7 +++++++
 Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml | 7 +++++++
 arch/arm64/boot/dts/amlogic/meson-axg-s400.dts                     | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts                  | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts              | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts                  | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts                    | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts                 | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-cm4io.dts      | 4 ++++
 .../arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-mnt-reform2.dts | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi               | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi               | 6 ++++++
 arch/arm64/boot/dts/amlogic/meson-g12b-gsking-x.dts                | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12b-gtking-pro.dts              | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12b-gtking.dts                  | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12b-odroid-go-ultra.dts         | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi              | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2l.dts              | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts             | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12b-ugoos-am6.dts               | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi             | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi                | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxbb-kii-pro.dts                 | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts               | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts             | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts                | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts                    | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts                    | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi               | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts               | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts             | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dts       | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts               | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts         | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc-v2.dts    | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts       | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts               | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxl-s905x-vero4k.dts             | 5 +++++
 arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts              | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts                | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts                 | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi                 | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi        | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-gbit.dts          | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air.dts               | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m2-pro.dts          | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m5.dts              | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-sm1-h96-max.dts                  | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi                  | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts                   | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-gbit.dts             | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-sm1-x96-air.dts                  | 4 ++++
 52 files changed, 217 insertions(+)
---
base-commit: cb2361c78068ec47c3a6222d71f664b67665550e
change-id: 20240614-topic-amlogic-upstream-bindings-fixes-audio-snd-card-2c642ccd2c6e

Best regards,
-- 
Neil Armstrong <neil.armstrong at linaro.org>



From neil.armstrong at linaro.org  Wed Aug 28 06:53:55 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Wed, 28 Aug 2024 15:53:55 +0200
Subject: [PATCH v2 2/3] ASoC: dt-bindings: amlogic,gx-sound-card: document
 clocks property
In-Reply-To: <20240828-topic-amlogic-upstream-bindings-fixes-audio-snd-card-v2-0-58159abf0779@linaro.org>
References: <20240828-topic-amlogic-upstream-bindings-fixes-audio-snd-card-v2-0-58159abf0779@linaro.org>
Message-ID: <20240828-topic-amlogic-upstream-bindings-fixes-audio-snd-card-v2-2-58159abf0779@linaro.org>

The sound card design is based on reference PLL frequencies that
are the root of all clock rates calculations.

Today, those frequencies are currently specified in DT via assigned-clocks,
because they correspond to the basic audio use-case.

It makes no sense to setup clock rates for a sound card without
referencing the clocks for the sound card, mainly because at
some point more complex audio use cases will be supported
and those root rates would need to change.

To solve this situation, let's legitimize the presence of assigned-clocks
in the sound card by documenting those clocks, as it describes a true
dependency of the sound card and paths the way of more complex
audio uses-cases involving those root frequencies.

Signed-off-by: Neil Armstrong <neil.armstrong at linaro.org>
---
 Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml b/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml
index 0ecdaf7190e9..413b47778181 100644
--- a/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml
+++ b/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml
@@ -27,6 +27,13 @@ properties:
       A list off component DAPM widget. Each entry is a pair of strings,
       the first being the widget type, the second being the widget name
 
+  clocks:
+    minItems: 1
+    maxItems: 3
+    description:
+      Base PLL clocks of audio susbsytem, used to configure base clock
+      frequencies for different audio use-cases.
+
 patternProperties:
   "^dai-link-[0-9]+$":
     type: object

-- 
2.34.1



From neil.armstrong at linaro.org  Wed Aug 28 06:53:56 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Wed, 28 Aug 2024 15:53:56 +0200
Subject: [PATCH v2 3/3] arm64: dts: amlogic: add clock and clock-names to
 sound cards
In-Reply-To: <20240828-topic-amlogic-upstream-bindings-fixes-audio-snd-card-v2-0-58159abf0779@linaro.org>
References: <20240828-topic-amlogic-upstream-bindings-fixes-audio-snd-card-v2-0-58159abf0779@linaro.org>
Message-ID: <20240828-topic-amlogic-upstream-bindings-fixes-audio-snd-card-v2-3-58159abf0779@linaro.org>

Add the missing clocks in the sound card nodes according to the
AXG and GX sound card bindings changes.

It solves the following errors:
sound: Unevaluated properties are not allowed ('assigned-clock-parents', 'assigned-clock-rates', 'assigned-clocks' were unexpected)
    from schema $id: http://devicetree.org/schemas/sound/amlogic,axg-sound-card.yaml#
sound: Unevaluated properties are not allowed ('assigned-clock-parents', 'assigned-clock-rates', 'assigned-clocks' were unexpected)
    from schema $id: http://devicetree.org/schemas/sound/amlogic,gx-sound-card.yaml#
sound: 'anyOf' conditional failed, one must be fixed:
    'clocks' is a required property
    '#clock-cells' is a required property
    from schema $id: http://devicetree.org/schemas/clock/clock.yaml#

Signed-off-by: Neil Armstrong <neil.armstrong at linaro.org>
---
 arch/arm64/boot/dts/amlogic/meson-axg-s400.dts                      | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts                   | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts               | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts                   | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts                     | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts                  | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-cm4io.dts       | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-mnt-reform2.dts | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi                | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi                | 6 ++++++
 arch/arm64/boot/dts/amlogic/meson-g12b-gsking-x.dts                 | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12b-gtking-pro.dts               | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12b-gtking.dts                   | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12b-odroid-go-ultra.dts          | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi               | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2l.dts               | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts              | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12b-ugoos-am6.dts                | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi              | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi                 | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxbb-kii-pro.dts                  | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts                | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts              | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts                 | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts                     | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts                     | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi                | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts                | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts              | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dts        | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts                | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts          | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc-v2.dts     | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts        | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts                | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxl-s905x-vero4k.dts              | 5 +++++
 arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts               | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts                 | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts                  | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi                  | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi         | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-gbit.dts           | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air.dts                | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m2-pro.dts           | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m5.dts               | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-sm1-h96-max.dts                   | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi                   | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts                    | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-gbit.dts              | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-sm1-x96-air.dts                   | 4 ++++
 50 files changed, 203 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
index 7ed526f45175..9611775b81ee 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
@@ -268,6 +268,10 @@ sound {
 				"Speaker1 Right", "SPK1 OUT_D",
 				"Linein AINL", "Linein",
 				"Linein AINR", "Linein";
+		clocks = <&clkc CLKID_HIFI_PLL>,
+			 <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>;
+
 		assigned-clocks = <&clkc CLKID_HIFI_PLL>,
 				  <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts
index af211d8f3952..a457b3f4397b 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts
@@ -176,6 +176,10 @@ sound {
 				"SPDIFOUT_A IN 1", "FRDDR_B OUT 3",
 				"SPDIFOUT_A IN 2", "FRDDR_C OUT 3";
 
+		clocks = <&clkc CLKID_MPLL2>,
+			 <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>;
+
 		assigned-clocks = <&clkc CLKID_MPLL2>,
 				  <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
index 15b9bc280706..c779a5da7d1e 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
@@ -138,6 +138,10 @@ sound {
 				"TDMOUT_B IN 2", "FRDDR_C OUT 1",
 				"TDM_B Playback", "TDMOUT_B OUT";
 
+		clocks = <&clkc CLKID_MPLL2>,
+			 <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>;
+
 		assigned-clocks = <&clkc CLKID_MPLL2>,
 				  <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
index 61cb8135a392..ea51341f031b 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
@@ -201,6 +201,10 @@ sound {
 				"TODDR_B IN 1", "TDMIN_B OUT",
 				"TODDR_C IN 1", "TDMIN_B OUT";
 
+		clocks = <&clkc CLKID_MPLL2>,
+			 <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>;
+
 		assigned-clocks = <&clkc CLKID_MPLL2>,
 				  <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
index 0e239939ade6..f70a46967e2b 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
@@ -238,6 +238,10 @@ sound {
 				"Lineout", "10U2 OUTL",
 				"Lineout", "10U2 OUTR";
 
+		clocks = <&clkc CLKID_MPLL2>,
+			 <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>;
+
 		assigned-clocks = <&clkc CLKID_MPLL2>,
 				  <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
index 05c7a1e3f1b7..32f98a192494 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
@@ -158,6 +158,10 @@ sound {
 				"SPDIFOUT_A IN 1", "FRDDR_B OUT 3",
 				"SPDIFOUT_A IN 2", "FRDDR_C OUT 3";
 
+		clocks = <&clkc CLKID_MPLL2>,
+			 <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>;
+
 		assigned-clocks = <&clkc CLKID_MPLL2>,
 				  <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-cm4io.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-cm4io.dts
index 13d478f9c891..2d74456e685d 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-cm4io.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-cm4io.dts
@@ -70,6 +70,10 @@ sound {
 				"TDMOUT_B IN 2", "FRDDR_C OUT 1",
 				"TDM_B Playback", "TDMOUT_B OUT";
 
+		clocks = <&clkc CLKID_MPLL2>,
+			 <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>;
+
 		assigned-clocks = <&clkc CLKID_MPLL2>,
 				  <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-mnt-reform2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-mnt-reform2.dts
index 003efed529ba..0f48c32bec97 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-mnt-reform2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-mnt-reform2.dts
@@ -79,6 +79,10 @@ sound {
 				"LINPUT1", "Mic Jack",
 				"Mic Jack", "MICB";
 
+		clocks = <&clkc CLKID_MPLL2>,
+			 <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>;
+
 		assigned-clocks = <&clkc CLKID_MPLL2>,
 					<&clkc CLKID_MPLL0>,
 					<&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi
index 6a346cb86a53..d4e1990b5f26 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi
@@ -194,6 +194,10 @@ sound {
 				"TDMOUT_B IN 2", "FRDDR_C OUT 1",
 				"TDM_B Playback", "TDMOUT_B OUT";
 
+		clocks = <&clkc CLKID_MPLL2>,
+			 <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>;
+
 		assigned-clocks = <&clkc CLKID_MPLL2>,
 				  <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi
index 3a24c2411552..de35fa2d7a6d 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi
@@ -38,6 +38,12 @@ sound {
 				"SPDIFOUT_A IN 0", "FRDDR_A OUT 3",
 				"SPDIFOUT_A IN 1", "FRDDR_B OUT 3",
 				"SPDIFOUT_A IN 2", "FRDDR_C OUT 3";
+
+		clocks = <&clkc CLKID_MPLL2>,
+			 <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>;
+
+
 		assigned-clocks = <&clkc CLKID_MPLL2>,
 				  <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-gsking-x.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-gsking-x.dts
index bb73e10b5e74..369c5cf889b6 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-gsking-x.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-gsking-x.dts
@@ -48,6 +48,10 @@ sound {
 				"TDMOUT_A IN 2", "FRDDR_C OUT 1",
 				"TDM_A Playback", "TDMOUT_A OUT";
 
+		clocks = <&clkc CLKID_MPLL2>,
+			 <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>;
+
 		assigned-clocks = <&clkc CLKID_MPLL2>,
 				  <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-gtking-pro.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-gtking-pro.dts
index 6eeedd54ab91..654449afd3a4 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-gtking-pro.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-gtking-pro.dts
@@ -49,6 +49,10 @@ sound {
 				"TDMOUT_B IN 2", "FRDDR_C OUT 1",
 				"TDM_B Playback", "TDMOUT_B OUT";
 
+		clocks = <&clkc CLKID_MPLL2>,
+			 <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>;
+
 		assigned-clocks = <&clkc CLKID_MPLL2>,
 				  <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-gtking.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-gtking.dts
index 0da386cabe1a..e20311386745 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-gtking.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-gtking.dts
@@ -37,6 +37,10 @@ sound {
 				"SPDIFOUT_A IN 1", "FRDDR_B OUT 3",
 				"SPDIFOUT_A IN 2", "FRDDR_C OUT 3";
 
+		clocks = <&clkc CLKID_MPLL2>,
+			 <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>;
+
 		assigned-clocks = <&clkc CLKID_MPLL2>,
 				  <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-go-ultra.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-go-ultra.dts
index eed2a23047ca..e21831dfceee 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-go-ultra.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-go-ultra.dts
@@ -234,6 +234,10 @@ sound {
 				"Internal Speakers", "Speaker Amplifier OUTL",
 				"Internal Speakers", "Speaker Amplifier OUTR";
 
+		clocks = <&clkc CLKID_MPLL2>,
+			 <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>;
+
 		assigned-clocks = <&clkc CLKID_MPLL2>,
 				  <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
index 86eb81112232..3bca8023638d 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
@@ -95,6 +95,10 @@ sound {
 				"Lineout", "U19 OUTL",
 				"Lineout", "U19 OUTR";
 
+		clocks = <&clkc CLKID_MPLL2>,
+			 <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>;
+
 		assigned-clocks = <&clkc CLKID_MPLL2>,
 				  <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2l.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2l.dts
index e26f3e3258e1..1b9097a30251 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2l.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2l.dts
@@ -39,6 +39,10 @@ sound {
 				"TODDR_B IN 6", "TDMIN_LB OUT",
 				"TODDR_C IN 6", "TDMIN_LB OUT";
 
+		clocks = <&clkc CLKID_MPLL2>,
+			 <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>;
+
 		assigned-clocks = <&clkc CLKID_MPLL2>,
 				  <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts
index 8445701100d0..39feba7f2d08 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts
@@ -176,6 +176,10 @@ sound {
 				"TDMOUT_B IN 2", "FRDDR_C OUT 1",
 				"TDM_B Playback", "TDMOUT_B OUT";
 
+		clocks = <&clkc CLKID_MPLL2>,
+			 <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>;
+
 		assigned-clocks = <&clkc CLKID_MPLL2>,
 				  <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-ugoos-am6.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-ugoos-am6.dts
index 6396f190d703..4c1a75b926ee 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-ugoos-am6.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-ugoos-am6.dts
@@ -32,6 +32,10 @@ sound {
 				"SPDIFOUT_A IN 1", "FRDDR_B OUT 3",
 				"SPDIFOUT_A IN 2", "FRDDR_C OUT 3";
 
+		clocks = <&clkc CLKID_MPLL2>,
+			 <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>;
+
 		assigned-clocks = <&clkc CLKID_MPLL2>,
 				  <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi
index efd662a452e8..d38c3a224fbe 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi
@@ -194,6 +194,10 @@ sound {
 				"AU2 INR", "ACODEC LORN",
 				"7J4-14 LEFT", "AU2 OUTL",
 				"7J4-11 RIGHT", "AU2 OUTR";
+		clocks = <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>,
+			 <&clkc CLKID_MPLL2>;
+
 		assigned-clocks = <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>,
 				  <&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
index 08d6b69ba469..45ccddd1aaf0 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
@@ -129,6 +129,10 @@ sound {
 				"AU2 INR", "ACODEC LORN",
 				"Lineout", "AU2 OUTL",
 				"Lineout", "AU2 OUTR";
+		clocks = <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>,
+			 <&clkc CLKID_MPLL2>;
+
 		assigned-clocks = <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>,
 				  <&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-kii-pro.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-kii-pro.dts
index f28452b9f00f..073b47ce8c3c 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-kii-pro.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-kii-pro.dts
@@ -45,6 +45,10 @@ button-reset {
 	sound {
 		compatible = "amlogic,gx-sound-card";
 		model = "KII-PRO";
+		clocks = <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>,
+			 <&clkc CLKID_MPLL2>;
+
 		assigned-clocks = <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>,
 				  <&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
index 1fd2e56e6b08..cf2e2ef81680 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
@@ -135,6 +135,10 @@ hdmi_connector_in: endpoint {
 	sound {
 		compatible = "amlogic,gx-sound-card";
 		model = "NANOPI-K2";
+		clocks = <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>,
+			 <&clkc CLKID_MPLL2>;
+
 		assigned-clocks = <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>,
 				  <&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
index cca129ce2c58..7d7dde93fff3 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
@@ -142,6 +142,10 @@ hdmi_connector_in: endpoint {
 	sound {
 		compatible = "amlogic,gx-sound-card";
 		model = "NEXBOX-A95X";
+		clocks = <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>,
+			 <&clkc CLKID_MPLL2>;
+
 		assigned-clocks = <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>,
 				  <&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
index c37cc6b036cd..959bd8d77a82 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
@@ -177,6 +177,10 @@ hdmi_connector_in: endpoint {
 	sound {
 		compatible = "amlogic,gx-sound-card";
 		model = "ODROID-C2";
+		clocks = <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>,
+			 <&clkc CLKID_MPLL2>;
+
 		assigned-clocks = <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>,
 				  <&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
index 7f94716876d3..bfac00e76ba3 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
@@ -68,6 +68,10 @@ button-menu {
 	sound {
 		compatible = "amlogic,gx-sound-card";
 		model = "P200";
+		clocks = <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>,
+			 <&clkc CLKID_MPLL2>;
+
 		assigned-clocks = <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>,
 				  <&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts
index 6f81eed83bec..c10f66031ecd 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts
@@ -17,6 +17,10 @@ / {
 	sound {
 		compatible = "amlogic,gx-sound-card";
 		model = "P201";
+		clocks = <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>,
+			 <&clkc CLKID_MPLL2>;
+
 		assigned-clocks = <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>,
 				  <&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
index 255e93a0b36d..3807a184810b 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
@@ -108,6 +108,10 @@ sdio_pwrseq: sdio-pwrseq {
 	sound {
 		compatible = "amlogic,gx-sound-card";
 		model = "VEGA-S95";
+		clocks = <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>,
+			 <&clkc CLKID_MPLL2>;
+
 		assigned-clocks = <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>,
 				  <&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts
index af9ea32a2876..ec281a9e9e77 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts
@@ -16,6 +16,10 @@ / {
 	sound {
 		compatible = "amlogic,gx-sound-card";
 		model = "WETEK-HUB";
+		clocks = <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>,
+			 <&clkc CLKID_MPLL2>;
+
 		assigned-clocks = <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>,
 				  <&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts
index 376760d86766..924414861b72 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts
@@ -48,6 +48,10 @@ button {
 	sound {
 		compatible = "amlogic,gx-sound-card";
 		model = "WETEK-PLAY2";
+		clocks = <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>,
+			 <&clkc CLKID_MPLL2>;
+
 		assigned-clocks = <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>,
 				  <&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dts
index 90ef9c17d80b..c6132fb71dfc 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dts
@@ -123,6 +123,10 @@ sound {
 				"Speaker", "9J5-2 RIGHT";
 		audio-routing = "9J5-3 LEFT", "ACODEC LOLN",
 				"9J5-2 RIGHT", "ACODEC LORN";
+		clocks = <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>,
+			 <&clkc CLKID_MPLL2>;
+
 		assigned-clocks = <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>,
 				  <&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts
index 08a4718219b1..c5e2306ad7a4 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts
@@ -128,6 +128,10 @@ sound {
 				"AU2 INR", "ACODEC LORN",
 				"Lineout", "AU2 OUTL",
 				"Lineout", "AU2 OUTR";
+		clocks = <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>,
+			 <&clkc CLKID_MPLL2>;
+
 		assigned-clocks = <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>,
 				  <&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
index fea65f20523a..a80f0ea2773b 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
@@ -67,6 +67,10 @@ hdmi_connector_in: endpoint {
 	sound {
 		compatible = "amlogic,gx-sound-card";
 		model = "KHADAS-VIM";
+		clocks = <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>,
+			 <&clkc CLKID_MPLL2>;
+
 		assigned-clocks = <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>,
 				  <&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc-v2.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc-v2.dts
index 63b20860067c..6cbdfde00e12 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc-v2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc-v2.dts
@@ -160,6 +160,10 @@ vcc_1v8: regulator-vcc-1v8 {
 	sound {
 		compatible = "amlogic,gx-sound-card";
 		model = "LIBRETECH-CC-V2";
+		clocks = <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>,
+			 <&clkc CLKID_MPLL2>;
+
 		assigned-clocks = <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>,
 				  <&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts
index 8b26c9661be1..401064b0428d 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts
@@ -142,6 +142,10 @@ sound {
 				"AU2 INR", "ACODEC LORN",
 				"Lineout", "AU2 OUTL",
 				"Lineout", "AU2 OUTR";
+		clocks = <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>,
+			 <&clkc CLKID_MPLL2>;
+
 		assigned-clocks = <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>,
 				  <&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts
index 9b4ea6a49398..8b41e340f919 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts
@@ -50,6 +50,10 @@ sound {
 				"AU2 INR", "ACODEC LORN",
 				"Lineout", "AU2 OUTL",
 				"Lineout", "AU2 OUTR";
+		clocks = <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>,
+			 <&clkc CLKID_MPLL2>;
+
 		assigned-clocks = <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>,
 				  <&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-vero4k.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-vero4k.dts
index de996e930b82..a9c5881c9783 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-vero4k.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-vero4k.dts
@@ -90,6 +90,11 @@ sound {
 				"AU2 INR", "ACODEC LORN",
 				"Lineout", "AU2 OUTL",
 				"Lineout", "AU2 OUTR";
+
+		clocks = <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>,
+			 <&clkc CLKID_MPLL2>;
+
 		assigned-clocks = <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>,
 				  <&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
index 07e7c3bedea0..96a3dd2d8a99 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
@@ -150,6 +150,10 @@ wifi32k: wifi32k {
 	sound {
 		compatible = "amlogic,gx-sound-card";
 		model = "KHADAS-VIM2";
+		clocks = <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>,
+			 <&clkc CLKID_MPLL2>;
+
 		assigned-clocks = <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>,
 				  <&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts
index ad2dd4ad0a31..773107cc47dd 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts
@@ -86,6 +86,10 @@ hdmi_connector_in: endpoint {
 	sound {
 		compatible = "amlogic,gx-sound-card";
 		model = "NEXBOX-A1";
+		clocks = <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>,
+			 <&clkc CLKID_MPLL2>;
+
 		assigned-clocks = <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>,
 				  <&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts
index d05dde8da5c5..7356d3b628b1 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts
@@ -101,6 +101,10 @@ sdio_pwrseq: sdio-pwrseq {
 	sound {
 		compatible = "amlogic,gx-sound-card";
 		model = "RBOX-PRO";
+		clocks = <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>,
+			 <&clkc CLKID_MPLL2>;
+
 		assigned-clocks = <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>,
 				  <&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi b/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi
index e78cc9b577a0..7daa9b122d5c 100644
--- a/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi
@@ -182,6 +182,10 @@ sound {
 				"TODDR_B IN 0", "TDMIN_A OUT",
 				"TODDR_C IN 0", "TDMIN_A OUT";
 
+		clocks = <&clkc CLKID_MPLL2>,
+			 <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>;
+
 		assigned-clocks = <&clkc CLKID_MPLL2>,
 				  <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi b/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi
index 082b72703cdf..929e4720ae76 100644
--- a/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi
@@ -200,6 +200,10 @@ sound {
 				 <&tdmin_a>, <&tdmin_b>, <&tdmin_c>,
 				 <&dioo2133>;
 
+		clocks = <&clkc CLKID_MPLL2>,
+			 <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>;
+
 		assigned-clocks = <&clkc CLKID_MPLL2>,
 				  <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-gbit.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-gbit.dts
index 9b2eb6e42651..3c43d3490e14 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-gbit.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-gbit.dts
@@ -22,6 +22,10 @@ sound {
 				"TDMOUT_B IN 2", "FRDDR_C OUT 1",
 				"TDM_B Playback", "TDMOUT_B OUT";
 
+		clocks = <&clkc CLKID_MPLL2>,
+			 <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>;
+
 		assigned-clocks = <&clkc CLKID_MPLL2>,
 				  <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air.dts
index 6e34fd80ed71..445c1671ede7 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air.dts
@@ -22,6 +22,10 @@ sound {
 				"TDMOUT_B IN 2", "FRDDR_C OUT 1",
 				"TDM_B Playback", "TDMOUT_B OUT";
 
+		clocks = <&clkc CLKID_MPLL2>,
+			 <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>;
+
 		assigned-clocks = <&clkc CLKID_MPLL2>,
 				  <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m2-pro.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m2-pro.dts
index 586034316ec3..eeaff22edade 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m2-pro.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m2-pro.dts
@@ -22,6 +22,10 @@ sound {
 				"TDMOUT_B IN 2", "FRDDR_C OUT 1",
 				"TDM_B Playback", "TDMOUT_B OUT";
 
+		clocks = <&clkc CLKID_MPLL2>,
+			 <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>;
+
 		assigned-clocks = <&clkc CLKID_MPLL2>,
 				  <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m5.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m5.dts
index f045bf851638..697855fec476 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m5.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m5.dts
@@ -57,6 +57,10 @@ sound {
 				"Lineout", "ACODEC LOLP",
 				"Lineout", "ACODEC LORP";
 
+		clocks = <&clkc CLKID_MPLL2>,
+			 <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>;
+
 		assigned-clocks = <&clkc CLKID_MPLL2>,
 				  <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-h96-max.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-h96-max.dts
index e6e9410d40cb..7b3a014d4cde 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-h96-max.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-h96-max.dts
@@ -22,6 +22,10 @@ sound {
 				"TDMOUT_B IN 2", "FRDDR_C OUT 1",
 				"TDM_B Playback", "TDMOUT_B OUT";
 
+		clocks = <&clkc CLKID_MPLL2>,
+			 <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>;
+
 		assigned-clocks = <&clkc CLKID_MPLL2>,
 				  <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
index 951eb8e3f0c0..7b0e9817a615 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
@@ -174,6 +174,10 @@ sound {
 				"TDMOUT_B IN 2", "FRDDR_C OUT 1",
 				"TDM_B Playback", "TDMOUT_B OUT";
 
+		clocks = <&clkc CLKID_MPLL2>,
+			 <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>;
+
 		assigned-clocks = <&clkc CLKID_MPLL2>,
 				  <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts
index 3581e14cbf18..2e3397e55da2 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts
@@ -239,6 +239,10 @@ sound {
 				"TODDR_B IN 1", "TDMIN_B OUT",
 				"TODDR_C IN 1", "TDMIN_B OUT";
 
+		clocks = <&clkc CLKID_MPLL2>,
+			 <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>;
+
 		assigned-clocks = <&clkc CLKID_MPLL2>,
 				  <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-gbit.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-gbit.dts
index fc9b961133cd..e4a3a2a8ad06 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-gbit.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-gbit.dts
@@ -22,6 +22,10 @@ sound {
 				"TDMOUT_B IN 2", "FRDDR_C OUT 1",
 				"TDM_B Playback", "TDMOUT_B OUT";
 
+		clocks = <&clkc CLKID_MPLL2>,
+			 <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>;
+
 		assigned-clocks = <&clkc CLKID_MPLL2>,
 				  <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air.dts
index 9ea969255b4f..fff92e0d6dd5 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air.dts
@@ -22,6 +22,10 @@ sound {
 				"TDMOUT_B IN 2", "FRDDR_C OUT 1",
 				"TDM_B Playback", "TDMOUT_B OUT";
 
+		clocks = <&clkc CLKID_MPLL2>,
+			 <&clkc CLKID_MPLL0>,
+			 <&clkc CLKID_MPLL1>;
+
 		assigned-clocks = <&clkc CLKID_MPLL2>,
 				  <&clkc CLKID_MPLL0>,
 				  <&clkc CLKID_MPLL1>;

-- 
2.34.1



From conor at kernel.org  Wed Aug 28 08:03:12 2024
From: conor at kernel.org (Conor Dooley)
Date: Wed, 28 Aug 2024 16:03:12 +0100
Subject: [PATCH v2 0/3] ASoC: dt-bindings: amlogic-sound-cards: document
 clocks property
In-Reply-To: <20240828-topic-amlogic-upstream-bindings-fixes-audio-snd-card-v2-0-58159abf0779@linaro.org>
References: <20240828-topic-amlogic-upstream-bindings-fixes-audio-snd-card-v2-0-58159abf0779@linaro.org>
Message-ID: <20240828-brittle-swapping-8b04379725c8@spud>

On Wed, Aug 28, 2024 at 03:53:53PM +0200, Neil Armstrong wrote:
> Following an off-list discution with Jerome about fixing the following
> DTBs check errors:
>     sound: Unevaluated properties are not allowed ('assigned-clock-parents', 'assigned-clock-rates', 'assigned-clocks' were unexpected)
>         from schema $id: http://devicetree.org/schemas/sound/amlogic,axg-sound-card.yaml#
>     sound: Unevaluated properties are not allowed ('assigned-clock-parents', 'assigned-clock-rates', 'assigned-clocks' were unexpected)
>         from schema $id: http://devicetree.org/schemas/sound/amlogic,gx-sound-card.yaml#
>     sound: 'anyOf' conditional failed, one must be fixed:
>         'clocks' is a required property
>         '#clock-cells' is a required property
>         from schema $id: http://devicetree.org/schemas/clock/clock.yaml#
> 
> It has been agreed documenting the clock in the sound card is a better solution
> than moving them to a random clock controller or consumer node which is not
> related to the actual meaning of those root frequencies.
> 
> The patchset adds the clocks proprty to the bindings and finally adds the
> properties to the DT files.
> 
> Signed-off-by: Neil Armstrong <neil.armstrong at linaro.org>

Acked-by: Conor Dooley <conor.dooley at microchip.com>
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From neil.armstrong at linaro.org  Thu Aug 29 05:14:11 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Thu, 29 Aug 2024 14:14:11 +0200
Subject: [PATCH] drm/meson: switch to a managed drm device
In-Reply-To: <20240828110421.14956-1-abelova@astralinux.ru>
References: <20240828110421.14956-1-abelova@astralinux.ru>
Message-ID: <64ef8b1d-40ab-4c10-b217-58a3e4cbf652@linaro.org>

Hi,

On 28/08/2024 13:04, Anastasia Belova wrote:
> Switch to a managed drm device to cleanup some error handling
> and make future work easier.
> 
> Fix dereference of NULL in meson_drv_bind_master by removing
> drm_dev_put(drm) before meson_encoder_*_remove where drm
> dereferenced.

Please send the fix separately with a Fixes tag.

Thanks,
Neil

> 
> Co-developed by Linux Verification Center (linuxtesting.org).
> 
> Signed-off-by: Anastasia Belova <abelova at astralinux.ru>
> ---
>   drivers/gpu/drm/meson/meson_crtc.c         | 10 +--
>   drivers/gpu/drm/meson/meson_drv.c          | 71 ++++++++++------------
>   drivers/gpu/drm/meson/meson_drv.h          |  2 +-
>   drivers/gpu/drm/meson/meson_encoder_cvbs.c |  8 +--
>   drivers/gpu/drm/meson/meson_overlay.c      |  8 +--
>   drivers/gpu/drm/meson/meson_plane.c        | 10 +--
>   6 files changed, 51 insertions(+), 58 deletions(-)
> 
> diff --git a/drivers/gpu/drm/meson/meson_crtc.c b/drivers/gpu/drm/meson/meson_crtc.c
> index d70616da8ce2..e1c0bf3baeea 100644
> --- a/drivers/gpu/drm/meson/meson_crtc.c
> +++ b/drivers/gpu/drm/meson/meson_crtc.c
> @@ -662,13 +662,13 @@ void meson_crtc_irq(struct meson_drm *priv)
>   
>   	drm_crtc_handle_vblank(priv->crtc);
>   
> -	spin_lock_irqsave(&priv->drm->event_lock, flags);
> +	spin_lock_irqsave(&priv->drm.event_lock, flags);
>   	if (meson_crtc->event) {
>   		drm_crtc_send_vblank_event(priv->crtc, meson_crtc->event);
>   		drm_crtc_vblank_put(priv->crtc);
>   		meson_crtc->event = NULL;
>   	}
> -	spin_unlock_irqrestore(&priv->drm->event_lock, flags);
> +	spin_unlock_irqrestore(&priv->drm.event_lock, flags);
>   }
>   
>   int meson_crtc_create(struct meson_drm *priv)
> @@ -677,18 +677,18 @@ int meson_crtc_create(struct meson_drm *priv)
>   	struct drm_crtc *crtc;
>   	int ret;
>   
> -	meson_crtc = devm_kzalloc(priv->drm->dev, sizeof(*meson_crtc),
> +	meson_crtc = devm_kzalloc(priv->drm.dev, sizeof(*meson_crtc),
>   				  GFP_KERNEL);
>   	if (!meson_crtc)
>   		return -ENOMEM;
>   
>   	meson_crtc->priv = priv;
>   	crtc = &meson_crtc->base;
> -	ret = drm_crtc_init_with_planes(priv->drm, crtc,
> +	ret = drm_crtc_init_with_planes(&priv->drm, crtc,
>   					priv->primary_plane, NULL,
>   					&meson_crtc_funcs, "meson_crtc");
>   	if (ret) {
> -		dev_err(priv->drm->dev, "Failed to init CRTC\n");
> +		dev_err(priv->drm.dev, "Failed to init CRTC\n");
>   		return ret;
>   	}
>   
> diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c
> index 4bd0baa2a4f5..2e7c2e7c7b82 100644
> --- a/drivers/gpu/drm/meson/meson_drv.c
> +++ b/drivers/gpu/drm/meson/meson_drv.c
> @@ -182,7 +182,6 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
>   	struct platform_device *pdev = to_platform_device(dev);
>   	const struct meson_drm_match_data *match;
>   	struct meson_drm *priv;
> -	struct drm_device *drm;
>   	struct resource *res;
>   	void __iomem *regs;
>   	int ret, i;
> @@ -197,17 +196,13 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
>   	if (!match)
>   		return -ENODEV;
>   
> -	drm = drm_dev_alloc(&meson_driver, dev);
> -	if (IS_ERR(drm))
> -		return PTR_ERR(drm);
> +	priv = devm_drm_dev_alloc(dev, &meson_driver,
> +				 struct meson_drm, drm);
>   
> -	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> -	if (!priv) {
> -		ret = -ENOMEM;
> -		goto free_drm;
> -	}
> -	drm->dev_private = priv;
> -	priv->drm = drm;
> +	if (IS_ERR(priv))
> +		return PTR_ERR(priv);
> +
> +	priv->drm.dev_private = priv;
>   	priv->dev = dev;
>   	priv->compat = match->compat;
>   	priv->afbcd.ops = match->afbcd_ops;
> @@ -215,7 +210,7 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
>   	regs = devm_platform_ioremap_resource_byname(pdev, "vpu");
>   	if (IS_ERR(regs)) {
>   		ret = PTR_ERR(regs);
> -		goto free_drm;
> +		goto remove_encoders;
>   	}
>   
>   	priv->io_base = regs;
> @@ -223,13 +218,13 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
>   	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi");
>   	if (!res) {
>   		ret = -EINVAL;
> -		goto free_drm;
> +		goto remove_encoders;
>   	}
>   	/* Simply ioremap since it may be a shared register zone */
>   	regs = devm_ioremap(dev, res->start, resource_size(res));
>   	if (!regs) {
>   		ret = -EADDRNOTAVAIL;
> -		goto free_drm;
> +		goto remove_encoders;
>   	}
>   
>   	priv->hhi = devm_regmap_init_mmio(dev, regs,
> @@ -237,18 +232,18 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
>   	if (IS_ERR(priv->hhi)) {
>   		dev_err(&pdev->dev, "Couldn't create the HHI regmap\n");
>   		ret = PTR_ERR(priv->hhi);
> -		goto free_drm;
> +		goto remove_encoders;
>   	}
>   
>   	priv->canvas = meson_canvas_get(dev);
>   	if (IS_ERR(priv->canvas)) {
>   		ret = PTR_ERR(priv->canvas);
> -		goto free_drm;
> +		goto remove_encoders;
>   	}
>   
>   	ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1);
>   	if (ret)
> -		goto free_drm;
> +		goto remove_encoders;
>   	ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0);
>   	if (ret)
>   		goto free_canvas_osd1;
> @@ -261,7 +256,7 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
>   
>   	priv->vsync_irq = platform_get_irq(pdev, 0);
>   
> -	ret = drm_vblank_init(drm, 1);
> +	ret = drm_vblank_init(&priv->drm, 1);
>   	if (ret)
>   		goto free_canvas_vd1_2;
>   
> @@ -284,10 +279,10 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
>   	ret = drmm_mode_config_init(drm);
>   	if (ret)
>   		goto free_canvas_vd1_2;
> -	drm->mode_config.max_width = 3840;
> -	drm->mode_config.max_height = 2160;
> -	drm->mode_config.funcs = &meson_mode_config_funcs;
> -	drm->mode_config.helper_private	= &meson_mode_config_helpers;
> +	priv->drm.mode_config.max_width = 3840;
> +	priv->drm.mode_config.max_height = 2160;
> +	priv->drm.mode_config.funcs = &meson_mode_config_funcs;
> +	priv->drm.mode_config.helper_private = &meson_mode_config_helpers;
>   
>   	/* Hardware Initialization */
>   
> @@ -308,9 +303,9 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
>   		goto exit_afbcd;
>   
>   	if (has_components) {
> -		ret = component_bind_all(dev, drm);
> +		ret = component_bind_all(dev, &priv->drm);
>   		if (ret) {
> -			dev_err(drm->dev, "Couldn't bind all components\n");
> +			dev_err(priv->drm.dev, "Couldn't bind all components\n");
>   			/* Do not try to unbind */
>   			has_components = false;
>   			goto exit_afbcd;
> @@ -339,26 +334,26 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
>   	if (ret)
>   		goto exit_afbcd;
>   
> -	ret = request_irq(priv->vsync_irq, meson_irq, 0, drm->driver->name, drm);
> +	ret = request_irq(priv->vsync_irq, meson_irq, 0, priv->drm.driver->name, &priv->drm);
>   	if (ret)
>   		goto exit_afbcd;
>   
> -	drm_mode_config_reset(drm);
> +	drm_mode_config_reset(&priv->drm);
>   
> -	drm_kms_helper_poll_init(drm);
> +	drm_kms_helper_poll_init(&priv->drm);
>   
>   	platform_set_drvdata(pdev, priv);
>   
> -	ret = drm_dev_register(drm, 0);
> +	ret = drm_dev_register(&priv->drm, 0);
>   	if (ret)
>   		goto uninstall_irq;
>   
> -	drm_fbdev_dma_setup(drm, 32);
> +	drm_fbdev_dma_setup(&priv->drm, 32);
>   
>   	return 0;
>   
>   uninstall_irq:
> -	free_irq(priv->vsync_irq, drm);
> +	free_irq(priv->vsync_irq, &priv->drm);
>   exit_afbcd:
>   	if (priv->afbcd.ops)
>   		priv->afbcd.ops->exit(priv);
> @@ -370,15 +365,14 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
>   	meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
>   free_canvas_osd1:
>   	meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
> -free_drm:
> -	drm_dev_put(drm);
> +remove_encoders:
>   
>   	meson_encoder_dsi_remove(priv);
>   	meson_encoder_hdmi_remove(priv);
>   	meson_encoder_cvbs_remove(priv);
>   
>   	if (has_components)
> -		component_unbind_all(dev, drm);
> +		component_unbind_all(dev, &priv->drm);
>   
>   	return ret;
>   }
> @@ -391,7 +385,7 @@ static int meson_drv_bind(struct device *dev)
>   static void meson_drv_unbind(struct device *dev)
>   {
>   	struct meson_drm *priv = dev_get_drvdata(dev);
> -	struct drm_device *drm = priv->drm;
> +	struct drm_device *drm = &priv->drm;
>   
>   	if (priv->canvas) {
>   		meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
> @@ -404,7 +398,6 @@ static void meson_drv_unbind(struct device *dev)
>   	drm_kms_helper_poll_fini(drm);
>   	drm_atomic_helper_shutdown(drm);
>   	free_irq(priv->vsync_irq, drm);
> -	drm_dev_put(drm);
>   
>   	meson_encoder_dsi_remove(priv);
>   	meson_encoder_hdmi_remove(priv);
> @@ -428,7 +421,7 @@ static int __maybe_unused meson_drv_pm_suspend(struct device *dev)
>   	if (!priv)
>   		return 0;
>   
> -	return drm_mode_config_helper_suspend(priv->drm);
> +	return drm_mode_config_helper_suspend(&priv->drm);
>   }
>   
>   static int __maybe_unused meson_drv_pm_resume(struct device *dev)
> @@ -445,7 +438,7 @@ static int __maybe_unused meson_drv_pm_resume(struct device *dev)
>   	if (priv->afbcd.ops)
>   		priv->afbcd.ops->init(priv);
>   
> -	return drm_mode_config_helper_resume(priv->drm);
> +	return drm_mode_config_helper_resume(&priv->drm);
>   }
>   
>   static void meson_drv_shutdown(struct platform_device *pdev)
> @@ -455,8 +448,8 @@ static void meson_drv_shutdown(struct platform_device *pdev)
>   	if (!priv)
>   		return;
>   
> -	drm_kms_helper_poll_fini(priv->drm);
> -	drm_atomic_helper_shutdown(priv->drm);
> +	drm_kms_helper_poll_fini(&priv->drm);
> +	drm_atomic_helper_shutdown(&priv->drm);
>   }
>   
>   /*
> diff --git a/drivers/gpu/drm/meson/meson_drv.h b/drivers/gpu/drm/meson/meson_drv.h
> index 3f9345c14f31..c4c6c810cb20 100644
> --- a/drivers/gpu/drm/meson/meson_drv.h
> +++ b/drivers/gpu/drm/meson/meson_drv.h
> @@ -53,7 +53,7 @@ struct meson_drm {
>   	u8 canvas_id_vd1_1;
>   	u8 canvas_id_vd1_2;
>   
> -	struct drm_device *drm;
> +	struct drm_device drm;
>   	struct drm_crtc *crtc;
>   	struct drm_plane *primary_plane;
>   	struct drm_plane *overlay_plane;
> diff --git a/drivers/gpu/drm/meson/meson_encoder_cvbs.c b/drivers/gpu/drm/meson/meson_encoder_cvbs.c
> index d1191de855d9..ddca22c8c1ff 100644
> --- a/drivers/gpu/drm/meson/meson_encoder_cvbs.c
> +++ b/drivers/gpu/drm/meson/meson_encoder_cvbs.c
> @@ -104,7 +104,7 @@ static int meson_encoder_cvbs_get_modes(struct drm_bridge *bridge,
>   	for (i = 0; i < MESON_CVBS_MODES_COUNT; ++i) {
>   		struct meson_cvbs_mode *meson_mode = &meson_cvbs_modes[i];
>   
> -		mode = drm_mode_duplicate(priv->drm, &meson_mode->mode);
> +		mode = drm_mode_duplicate(&priv->drm, &meson_mode->mode);
>   		if (!mode) {
>   			dev_err(priv->dev, "Failed to create a new display mode\n");
>   			return 0;
> @@ -221,7 +221,7 @@ static const struct drm_bridge_funcs meson_encoder_cvbs_bridge_funcs = {
>   
>   int meson_encoder_cvbs_probe(struct meson_drm *priv)
>   {
> -	struct drm_device *drm = priv->drm;
> +	struct drm_device *drm = &priv->drm;
>   	struct meson_encoder_cvbs *meson_encoder_cvbs;
>   	struct drm_connector *connector;
>   	struct device_node *remote;
> @@ -256,7 +256,7 @@ int meson_encoder_cvbs_probe(struct meson_drm *priv)
>   	meson_encoder_cvbs->priv = priv;
>   
>   	/* Encoder */
> -	ret = drm_simple_encoder_init(priv->drm, &meson_encoder_cvbs->encoder,
> +	ret = drm_simple_encoder_init(&priv->drm, &meson_encoder_cvbs->encoder,
>   				      DRM_MODE_ENCODER_TVDAC);
>   	if (ret)
>   		return dev_err_probe(priv->dev, ret,
> @@ -273,7 +273,7 @@ int meson_encoder_cvbs_probe(struct meson_drm *priv)
>   	}
>   
>   	/* Initialize & attach Bridge Connector */
> -	connector = drm_bridge_connector_init(priv->drm, &meson_encoder_cvbs->encoder);
> +	connector = drm_bridge_connector_init(&priv->drm, &meson_encoder_cvbs->encoder);
>   	if (IS_ERR(connector))
>   		return dev_err_probe(priv->dev, PTR_ERR(connector),
>   				     "Unable to create CVBS bridge connector\n");
> diff --git a/drivers/gpu/drm/meson/meson_overlay.c b/drivers/gpu/drm/meson/meson_overlay.c
> index 7f98de38842b..60ee7f758723 100644
> --- a/drivers/gpu/drm/meson/meson_overlay.c
> +++ b/drivers/gpu/drm/meson/meson_overlay.c
> @@ -484,7 +484,7 @@ static void meson_overlay_atomic_update(struct drm_plane *plane,
>   
>   	interlace_mode = new_state->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE;
>   
> -	spin_lock_irqsave(&priv->drm->event_lock, flags);
> +	spin_lock_irqsave(&priv->drm.event_lock, flags);
>   
>   	if ((fb->modifier & DRM_FORMAT_MOD_AMLOGIC_FBC(0, 0)) ==
>   			    DRM_FORMAT_MOD_AMLOGIC_FBC(0, 0)) {
> @@ -717,7 +717,7 @@ static void meson_overlay_atomic_update(struct drm_plane *plane,
>   
>   	priv->viu.vd1_enabled = true;
>   
> -	spin_unlock_irqrestore(&priv->drm->event_lock, flags);
> +	spin_unlock_irqrestore(&priv->drm.event_lock, flags);
>   
>   	DRM_DEBUG_DRIVER("\n");
>   }
> @@ -838,7 +838,7 @@ int meson_overlay_create(struct meson_drm *priv)
>   
>   	DRM_DEBUG_DRIVER("\n");
>   
> -	meson_overlay = devm_kzalloc(priv->drm->dev, sizeof(*meson_overlay),
> +	meson_overlay = devm_kzalloc(priv->drm.dev, sizeof(*meson_overlay),
>   				   GFP_KERNEL);
>   	if (!meson_overlay)
>   		return -ENOMEM;
> @@ -846,7 +846,7 @@ int meson_overlay_create(struct meson_drm *priv)
>   	meson_overlay->priv = priv;
>   	plane = &meson_overlay->base;
>   
> -	drm_universal_plane_init(priv->drm, plane, 0xFF,
> +	drm_universal_plane_init(&priv->drm, plane, 0xFF,
>   				 &meson_overlay_funcs,
>   				 supported_drm_formats,
>   				 ARRAY_SIZE(supported_drm_formats),
> diff --git a/drivers/gpu/drm/meson/meson_plane.c b/drivers/gpu/drm/meson/meson_plane.c
> index b43ac61201f3..13be94309bf4 100644
> --- a/drivers/gpu/drm/meson/meson_plane.c
> +++ b/drivers/gpu/drm/meson/meson_plane.c
> @@ -157,7 +157,7 @@ static void meson_plane_atomic_update(struct drm_plane *plane,
>   	 * Update Buffer
>   	 * Enable Plane
>   	 */
> -	spin_lock_irqsave(&priv->drm->event_lock, flags);
> +	spin_lock_irqsave(&priv->drm.event_lock, flags);
>   
>   	/* Check if AFBC decoder is required for this buffer */
>   	if ((meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXM) ||
> @@ -393,7 +393,7 @@ static void meson_plane_atomic_update(struct drm_plane *plane,
>   
>   	priv->viu.osd1_enabled = true;
>   
> -	spin_unlock_irqrestore(&priv->drm->event_lock, flags);
> +	spin_unlock_irqrestore(&priv->drm.event_lock, flags);
>   }
>   
>   static void meson_plane_atomic_disable(struct drm_plane *plane,
> @@ -536,7 +536,7 @@ int meson_plane_create(struct meson_drm *priv)
>   	const uint64_t *format_modifiers = format_modifiers_default;
>   	int ret;
>   
> -	meson_plane = devm_kzalloc(priv->drm->dev, sizeof(*meson_plane),
> +	meson_plane = devm_kzalloc(priv->drm.dev, sizeof(*meson_plane),
>   				   GFP_KERNEL);
>   	if (!meson_plane)
>   		return -ENOMEM;
> @@ -549,14 +549,14 @@ int meson_plane_create(struct meson_drm *priv)
>   	else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A))
>   		format_modifiers = format_modifiers_afbc_g12a;
>   
> -	ret = drm_universal_plane_init(priv->drm, plane, 0xFF,
> +	ret = drm_universal_plane_init(&priv->drm, plane, 0xFF,
>   					&meson_plane_funcs,
>   					supported_drm_formats,
>   					ARRAY_SIZE(supported_drm_formats),
>   					format_modifiers,
>   					DRM_PLANE_TYPE_PRIMARY, "meson_primary_plane");
>   	if (ret) {
> -		devm_kfree(priv->drm->dev, meson_plane);
> +		devm_kfree(priv->drm.dev, meson_plane);
>   		return ret;
>   	}
>   



From jonathan.capeluto at neteris.com  Thu Aug 29 15:11:31 2024
From: jonathan.capeluto at neteris.com (Roy Kessier)
Date: 29 Aug 2024 15:11:31 -0700
Subject: =?UTF-8?B?SW50ZXJuYXRpb25hbGUgV8OkaHJ1bmdzZm9uZHMgKElXRik=?=
Message-ID: <20240829151130.D9B5EFFB852F3CC4@neteris.com>

Sehr geehrter Empf?nger:

Die Europ?ische Investitionsbank in Luxemburg und der 
Internationale W?hrungsfonds (IWF) haben uns beauftragt, die 
Ursache f?r die Verz?gerung bei der Auszahlung ihrer gesetzlich 
genehmigten Mittel zu untersuchen.

Unsere Untersuchung ergab, dass seine Zahlung aufgrund korrupter 
Bankangestellte verz?gert wurde, die versuchten, sein Geld auf 
seine Privatkonten bei ABANCA umzuleiten. Um diese Art von 
betr?gerischen Aktivit?ten zu verhindern, haben wir eine 
Vereinbarung mit der Europ?ischen Investitionsbank und dem IWF 
zur Verwaltung und ?berwachung Ihrer Zahlung. F?r Ihre Zahlung 
haben wir daher von MFY eine unwiderrufliche Zahlungsgarantie 
erhalten.

Wir freuen uns, Ihnen mitteilen zu k?nnen, dass die Europ?ische 
Investitionsbank beschlossen hat, Ihnen den Betrag von 
3.500.000,00 EUR zur?ckzuerstatten und ihn per Bank?berweisung 
direkt auf Ihr Bankkonto zu ?berweisen.

Um einen reibungslosen und problemlosen Zahlungsvorgang zu 
gew?hrleisten, kontaktieren Sie bitte unseren Vertreter, Herrn 
Roy Kessier, unter der folgenden E-Mail-Adresse:
E-Mail: info at elibertytrust.us

Bitte teilen Sie uns auch Ihre WhatsApp-Nummer mit, um die 
Kommunikation zu erleichtern.

Vielen Dank f?r Ihre Aufmerksamkeit in dieser Angelegenheit.

Aufrichtig,
Herr Roy Kessier
info at elibertytrust.us


From devnull+xianwei.zhao.amlogic.com at kernel.org  Thu Aug 29 22:26:07 2024
From: devnull+xianwei.zhao.amlogic.com at kernel.org (Xianwei Zhao via B4 Relay)
Date: Fri, 30 Aug 2024 13:26:07 +0800
Subject: [PATCH v4 0/3] add some node for amlogic c3
Message-ID: <20240830-c3_add_node-v4-0-b56c0511e9dc@amlogic.com>

Add some node for board AW409 and support board C308l AW419.

Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
---
Changes in v4:
- Adjust the format of commit message.
- Link to v3: https://lore.kernel.org/r/20240823-c3_add_node-v3-0-3648376037f4 at amlogic.com

Changes in v3:
- Change clkc_periphs node to the first.
- Link to v2: https://lore.kernel.org/r/20240820-c3_add_node-v2-0-8fd3f06b7bce at amlogic.com

Changes in v2:
- Delete unused sdio node in board level dts.
- Add the description of modifying the binding in commit msg.
- Add the reason why some node property fileds place at board level in commit msg.
- Link to v1: https://lore.kernel.org/r/20240806-c3_add_node-v1-0-c0de41341632 at amlogic.com

---
Xianwei Zhao (3):
      dt-bindings: clock: fix C3 PLL input parameter
      arm64: dts: amlogic: add some device nodes for C3
      arm64: dts: amlogic: add C3 AW419 board

 .../bindings/clock/amlogic,c3-pll-clkc.yaml        |   7 +-
 arch/arm64/boot/dts/amlogic/Makefile               |   1 +
 .../boot/dts/amlogic/amlogic-c3-c302x-aw409.dts    | 233 ++++++++++
 .../boot/dts/amlogic/amlogic-c3-c308l-aw419.dts    | 262 +++++++++++
 arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi        | 488 ++++++++++++++++++++-
 5 files changed, 988 insertions(+), 3 deletions(-)
---
base-commit: 7a5d2ce79d1fc8535a6f10e51011ae9671bd86e8
change-id: 20240806-c3_add_node-420a37918f18

Best regards,
-- 
Xianwei Zhao <xianwei.zhao at amlogic.com>




From devnull+xianwei.zhao.amlogic.com at kernel.org  Thu Aug 29 22:26:10 2024
From: devnull+xianwei.zhao.amlogic.com at kernel.org (Xianwei Zhao via B4 Relay)
Date: Fri, 30 Aug 2024 13:26:10 +0800
Subject: [PATCH v4 3/3] arm64: dts: amlogic: add C3 AW419 board
In-Reply-To: <20240830-c3_add_node-v4-0-b56c0511e9dc@amlogic.com>
References: <20240830-c3_add_node-v4-0-b56c0511e9dc@amlogic.com>
Message-ID: <20240830-c3_add_node-v4-3-b56c0511e9dc@amlogic.com>

From: Xianwei Zhao <xianwei.zhao at amlogic.com>

Add Amlogic C3 C308L AW419 board. The corresponding binding
has been applied, therefore, this series does not need to
add a binding corresponding to the AW419 board.

Reviewed-by: Neil Armstrong <neil.armstrong at linaro.org>
Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
---
 arch/arm64/boot/dts/amlogic/Makefile               |   1 +
 .../boot/dts/amlogic/amlogic-c3-c308l-aw419.dts    | 262 +++++++++++++++++++++
 2 files changed, 263 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
index 9708abdadd7c..8db42f26c1e6 100644
--- a/arch/arm64/boot/dts/amlogic/Makefile
+++ b/arch/arm64/boot/dts/amlogic/Makefile
@@ -2,6 +2,7 @@
 dtb-$(CONFIG_ARCH_MESON) += amlogic-a4-a113l2-ba400.dtb
 dtb-$(CONFIG_ARCH_MESON) += amlogic-a5-a113x2-av400.dtb
 dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c302x-aw409.dtb
+dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c308l-aw419.dtb
 dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-an400.dtb
 dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
 dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3-c308l-aw419.dts b/arch/arm64/boot/dts/amlogic/amlogic-c3-c308l-aw419.dts
new file mode 100644
index 000000000000..4477a2659e27
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/amlogic-c3-c308l-aw419.dts
@@ -0,0 +1,262 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "amlogic-c3.dtsi"
+
+/ {
+	model = "Amlogic C308l aw419 Development Board";
+	compatible = "amlogic,aw419", "amlogic,c3";
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	aliases {
+		serial0 = &uart_b;
+		spi0 = &spifc;
+	};
+
+	memory at 0 {
+		device_type = "memory";
+		reg = <0x0 0x0 0x0 0x80000000>;
+	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		/* 9 MiB reserved for ARM Trusted Firmware */
+		secmon_reserved: secmon at 7f00000 {
+			compatible = "shared-dma-pool";
+			reg = <0x0 0x07f00000 0x0 0x900000>;
+			no-map;
+		};
+	};
+
+	main_12v: regulator-main-12v {
+		compatible = "regulator-fixed";
+		regulator-name = "12V";
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vcc_5v: regulator-vcc-5v {
+		compatible = "regulator-fixed";
+		regulator-name = "VCC5V";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&main_12v>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddq: regulator-vddq {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDQ";
+		regulator-min-microvolt = <1200000>;
+		regulator-max-microvolt = <1200000>;
+		vin-supply = <&main_12v>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddao_3v3: regulator-vddao-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDAO3V3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&main_12v>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddao_1v8: regulator-vddao-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDAO1V8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vddao_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	ddr4_2v5: regulator-ddr4-2v5 {
+		compatible = "regulator-fixed";
+		regulator-name = "DDR4_2V5";
+		regulator-min-microvolt = <2500000>;
+		regulator-max-microvolt = <2500000>;
+		vin-supply = <&vddao_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vcc_3v3: regulator-vcc-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "VCC3V3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vddao_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vcc_1v8: regulator-vcc-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "VCC1V8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vdd_1v8: regulator-vdd-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "VDD1V8_BOOT";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddio_b: regulator-vddio-3v3-b {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDIO_B";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vcc_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	sdcard: regulator-sdcard {
+		compatible = "regulator-fixed";
+		regulator-name = "SDCARD_POWER";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vddao_3v3>;
+		gpio = <&gpio GPIOA_4 GPIO_ACTIVE_LOW>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+};
+
+&uart_b {
+	status = "okay";
+};
+
+&nand {
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	pinctrl-0 = <&nand_pins>;
+	pinctrl-names = "default";
+
+	nand at 0 {
+		reg = <0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		nand-on-flash-bbt;
+
+		partition at 0 {
+			label = "boot";
+			reg = <0x0 0x00200000>;
+		};
+		partition at 200000 {
+			label = "env";
+			reg = <0x00200000 0x00400000>;
+		};
+		partition at 600000 {
+			label = "system";
+			reg = <0x00600000 0x00a00000>;
+		};
+		partition at 1000000 {
+			label = "rootfs";
+			reg = <0x01000000 0x03000000>;
+		};
+		partition at 4000000 {
+			label = "media";
+			reg = <0x04000000 0x8000000>;
+		};
+	};
+};
+
+&ethmac {
+	status = "okay";
+	phy-handle = <&internal_ephy>;
+	phy-mode = "rmii";
+};
+
+&spifc {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	pinctrl-0 = <&spifc_pins>;
+	pinctrl-names = "default";
+
+	nand at 0 {
+		compatible = "spi-nand";
+		reg = <0>;
+		spi-max-frequency = <83000000>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		status = "disabled";
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition at 0 {
+				label = "boot";
+				reg = <0 0x200000>;
+			};
+
+			partition at 200000 {
+				label = "env";
+				reg = <0x200000 0x400000>;
+			};
+
+			partition at 600000 {
+				label = "system";
+				reg = <0x600000 0xa00000>;
+			};
+
+			partition at 1000000 {
+				label = "rootfs";
+				reg = <0x1000000 0x3000000>;
+			};
+
+			partition at 4000000 {
+				label = "data";
+				reg = <0x4000000 0x8000000>;
+			};
+		};
+	};
+};
+
+&sd {
+	status = "okay";
+	pinctrl-0 = <&sdcard_pins>;
+	pinctrl-1 = <&sdcard_clk_gate_pins>;
+	pinctrl-names = "default","clk-gate";
+
+	bus-width = <4>;
+	cap-sd-highspeed;
+	max-frequency = <50000000>;
+	disable-wp;
+
+	cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
+	vmmc-supply = <&sdcard>;
+	vqmmc-supply = <&sdcard>;
+};

-- 
2.37.1




From devnull+xianwei.zhao.amlogic.com at kernel.org  Thu Aug 29 22:26:09 2024
From: devnull+xianwei.zhao.amlogic.com at kernel.org (Xianwei Zhao via B4 Relay)
Date: Fri, 30 Aug 2024 13:26:09 +0800
Subject: [PATCH v4 2/3] arm64: dts: amlogic: add some device nodes for C3
In-Reply-To: <20240830-c3_add_node-v4-0-b56c0511e9dc@amlogic.com>
References: <20240830-c3_add_node-v4-0-b56c0511e9dc@amlogic.com>
Message-ID: <20240830-c3_add_node-v4-2-b56c0511e9dc@amlogic.com>

From: Xianwei Zhao <xianwei.zhao at amlogic.com>

Add some device nodes for SoC C3, including periphs clock controller
node, PLL clock controller node, SPICC node, regulator node, NAND
controller node, sdcard node, Ethernet MAC and PHY node.

The sdacrd depends on regulator and pinctrl(select), so some
property fields are placed at the board level. The nand chip
is placed on the board, So some property fields about SPIFC
and NAND controller node are placed at the board level.
THe Ethernet MAC support outchip PHY, so place this property
field(select PHY) at the board level.

Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
---
 .../boot/dts/amlogic/amlogic-c3-c302x-aw409.dts    | 233 ++++++++++
 arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi        | 488 ++++++++++++++++++++-
 2 files changed, 720 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts b/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts
index edce8850b338..b8d2037afc00 100644
--- a/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts
+++ b/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts
@@ -16,14 +16,247 @@ / {
 
 	aliases {
 		serial0 = &uart_b;
+		spi0 = &spifc;
 	};
 
 	memory at 0 {
 		device_type = "memory";
 		reg = <0x0 0x0 0x0 0x10000000>;
 	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		/* 9 MiB reserved for ARM Trusted Firmware */
+		secmon_reserved: secmon at 7f00000 {
+			compatible = "shared-dma-pool";
+			reg = <0x0 0x07f00000 0x0 0x900000>;
+			no-map;
+		};
+	};
+
+	main_12v: regulator-main-12v {
+		compatible = "regulator-fixed";
+		regulator-name = "12V";
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vcc_5v: regulator-vcc-5v {
+		compatible = "regulator-fixed";
+		regulator-name = "VCC5V";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&main_12v>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddq: regulator-vddq {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDQ";
+		regulator-min-microvolt = <1200000>;
+		regulator-max-microvolt = <1200000>;
+		vin-supply = <&main_12v>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddao_3v3: regulator-vddao-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDAO3V3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&main_12v>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddao_1v8: regulator-vddao-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDAO1V8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vddao_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	ddr4_2v5: regulator-ddr4-2v5 {
+		compatible = "regulator-fixed";
+		regulator-name = "DDR4_2V5";
+		regulator-min-microvolt = <2500000>;
+		regulator-max-microvolt = <2500000>;
+		vin-supply = <&vddao_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vcc_3v3: regulator-vcc-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "VCC3V3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vddao_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vcc_1v8: regulator-vcc-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "VCC1V8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vdd_1v8: regulator-vdd-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "VDD1V8_BOOT";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vddio_b: regulator-vddio-3v3-b {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDIO_B";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vcc_3v3>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	sdcard: regulator-sdcard {
+		compatible = "regulator-fixed";
+		regulator-name = "SDCARD_POWER";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vddao_3v3>;
+		gpio = <&gpio GPIOA_4 GPIO_ACTIVE_LOW>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
 };
 
 &uart_b {
 	status = "okay";
 };
+
+&nand {
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	pinctrl-0 = <&nand_pins>;
+	pinctrl-names = "default";
+
+	nand at 0 {
+		reg = <0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		nand-on-flash-bbt;
+
+		partition at 0 {
+			label = "boot";
+			reg = <0x0 0x00200000>;
+		};
+		partition at 200000 {
+			label = "env";
+			reg = <0x00200000 0x00400000>;
+		};
+		partition at 600000 {
+			label = "system";
+			reg = <0x00600000 0x00a00000>;
+		};
+		partition at 1000000 {
+			label = "rootfs";
+			reg = <0x01000000 0x03000000>;
+		};
+		partition at 4000000 {
+			label = "media";
+			reg = <0x04000000 0x8000000>;
+		};
+	};
+};
+
+&ethmac {
+	status = "okay";
+	phy-handle = <&internal_ephy>;
+	phy-mode = "rmii";
+};
+
+&spifc {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	pinctrl-0 = <&spifc_pins>;
+	pinctrl-names = "default";
+
+	nand at 0 {
+		compatible = "spi-nand";
+		reg = <0>;
+		spi-max-frequency = <83000000>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		status = "disabled";
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition at 0 {
+				label = "boot";
+				reg = <0 0x200000>;
+			};
+
+			partition at 200000 {
+				label = "env";
+				reg = <0x200000 0x400000>;
+			};
+
+			partition at 600000 {
+				label = "system";
+				reg = <0x600000 0xa00000>;
+			};
+
+			partition at 1000000 {
+				label = "rootfs";
+				reg = <0x1000000 0x3000000>;
+			};
+
+			partition at 4000000 {
+				label = "data";
+				reg = <0x4000000 0x8000000>;
+			};
+		};
+	};
+};
+
+&sd {
+	status = "okay";
+	pinctrl-0 = <&sdcard_pins>;
+	pinctrl-1 = <&sdcard_clk_gate_pins>;
+	pinctrl-names = "default","clk-gate";
+
+	bus-width = <4>;
+	cap-sd-highspeed;
+	max-frequency = <50000000>;
+	disable-wp;
+
+	cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
+	vmmc-supply = <&sdcard>;
+	vqmmc-supply = <&sdcard>;
+};
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
index c913dd409e64..c0ce776ec463 100644
--- a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
+++ b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
@@ -7,6 +7,11 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/reset/amlogic,c3-reset.h>
+#include <dt-bindings/clock/amlogic,c3-pll-clkc.h>
+#include <dt-bindings/clock/amlogic,c3-scmi-clkc.h>
+#include <dt-bindings/clock/amlogic,c3-peripherals-clkc.h>
+#include <dt-bindings/power/amlogic,c3-pwrc.h>
+#include <dt-bindings/gpio/amlogic-c3-gpio.h>
 
 / {
 	cpus {
@@ -57,6 +62,34 @@ pwrc: power-controller {
 		};
 	};
 
+	sram {
+		compatible = "mmio-sram";
+		reg = <0x0 0x07f50e00 0x0 0x100>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0x0 0x07f50e00 0x100>;
+
+		scmi_shmem: sram at 0 {
+			compatible = "arm,scmi-shmem";
+			reg = <0x0 0x100>;
+		};
+	};
+
+	firmware {
+		scmi: scmi {
+			compatible = "arm,scmi-smc";
+			arm,smc-id = <0x820000C1>;
+			shmem = <&scmi_shmem>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			scmi_clk: protocol at 14 {
+				reg = <0x14>;
+				#clock-cells = <1>;
+			};
+		};
+	};
+
 	soc {
 		compatible = "simple-bus";
 		#address-cells = <2>;
@@ -82,6 +115,44 @@ apb4: bus at fe000000 {
 			#size-cells = <2>;
 			ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
 
+			clkc_periphs: clock-controller at 0 {
+				compatible = "amlogic,c3-peripherals-clkc";
+				reg = <0x0 0x0 0x0 0x49c>;
+				#clock-cells = <1>;
+				clocks = <&xtal>,
+					 <&scmi_clk CLKID_OSC>,
+					 <&scmi_clk CLKID_FIXED_PLL_OSC>,
+					 <&clkc_pll CLKID_FCLK_DIV2>,
+					 <&clkc_pll CLKID_FCLK_DIV2P5>,
+					 <&clkc_pll CLKID_FCLK_DIV3>,
+					 <&clkc_pll CLKID_FCLK_DIV4>,
+					 <&clkc_pll CLKID_FCLK_DIV5>,
+					 <&clkc_pll CLKID_FCLK_DIV7>,
+					 <&clkc_pll CLKID_GP0_PLL>,
+					 <&scmi_clk CLKID_GP1_PLL_OSC>,
+					 <&clkc_pll CLKID_HIFI_PLL>,
+					 <&scmi_clk CLKID_SYS_CLK>,
+					 <&scmi_clk CLKID_AXI_CLK>,
+					 <&scmi_clk CLKID_SYS_PLL_DIV16>,
+					 <&scmi_clk CLKID_CPU_CLK_DIV16>;
+				clock-names = "xtal_24m",
+					      "oscin",
+					      "fix",
+					      "fdiv2",
+					      "fdiv2p5",
+					      "fdiv3",
+					      "fdiv4",
+					      "fdiv5",
+					      "fdiv7",
+					      "gp0",
+					      "gp1",
+					      "hifi",
+					      "sysclk",
+					      "axiclk",
+					      "sysplldiv16",
+					      "cpudiv16";
+			};
+
 			reset: reset-controller at 2000 {
 				compatible = "amlogic,c3-reset";
 				reg = <0x0 0x2000 0x0 0x98>;
@@ -108,6 +179,237 @@ gpio: bank at 4000 {
 					#gpio-cells = <2>;
 					gpio-ranges = <&periphs_pinctrl 0 0 55>;
 				};
+
+				i2c0_pins1: i2c0-pins1 {
+					mux {
+						groups = "i2c0_sda_e",
+							 "i2c0_scl_e";
+						function = "i2c0";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c0_pins2: i2c0-pins2 {
+					mux {
+						groups = "i2c0_sda_d",
+							 "i2c0_scl_d";
+						function = "i2c0";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c1_pins1: i2c1-pins1 {
+					mux {
+						groups = "i2c1_sda_x",
+							 "i2c1_scl_x";
+						function = "i2c1";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c1_pins2: i2c1-pins2 {
+					mux {
+						groups = "i2c1_sda_d",
+							 "i2c1_scl_d";
+						function = "i2c1";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c1_pins3: i2c1-pins3 {
+					mux {
+						groups = "i2c1_sda_a",
+							 "i2c1_scl_a";
+						function = "i2c1";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c1_pins4: i2c1-pins4 {
+					mux {
+						groups = "i2c1_sda_b",
+							 "i2c1_scl_b";
+						function = "i2c1";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c2_pins1: i2c2-pins1 {
+					mux {
+						groups = "i2c2_sda",
+							 "i2c2_scl";
+						function = "i2c2";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c3_pins1: i2c3-pins1 {
+					mux {
+						groups = "i2c3_sda_c",
+							 "i2c3_scl_c";
+						function = "i2c3";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c3_pins2: i2c3-pins2 {
+					mux {
+						groups = "i2c3_sda_x",
+							 "i2c3_scl_x";
+						function = "i2c3";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				i2c3_pins3: i2c3-pins3 {
+					mux {
+						groups = "i2c3_sda_d",
+							 "i2c3_scl_d";
+						function = "i2c3";
+						bias-disable;
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				nand_pins: nand-pins {
+					mux {
+						groups = "emmc_nand_d0",
+							 "emmc_nand_d1",
+							 "emmc_nand_d2",
+							 "emmc_nand_d3",
+							 "emmc_nand_d4",
+							 "emmc_nand_d5",
+							 "emmc_nand_d6",
+							 "emmc_nand_d7",
+							 "nand_ce0",
+							 "nand_ale",
+							 "nand_cle",
+							 "nand_wen_clk",
+							 "nand_ren_wr";
+						function = "nand";
+						input-enable;
+					};
+				};
+
+				sdcard_pins: sdcard-pins {
+					mux {
+						groups = "sdcard_d0",
+							 "sdcard_d1",
+							 "sdcard_d2",
+							 "sdcard_d3",
+							 "sdcard_clk",
+							 "sdcard_cmd";
+						function = "sdcard";
+						bias-pull-up;
+						drive-strength-microamp = <4000>;
+					};
+				};
+
+				sdcard_clk_gate_pins: sdcard-clk-cmd-pins {
+					mux {
+						groups = "GPIOC_4";
+						function = "gpio_periphs";
+						bias-pull-down;
+						drive-strength-microamp = <4000>;
+					};
+				};
+
+				sdio_m_clk_gate_pins: sdio-m-clk-cmd-pins {
+					mux {
+						groups = "sdio_clk";
+						function = "sdio";
+						bias-pull-down;
+						drive-strength-microamp = <4000>;
+					};
+				};
+
+				sdio_m_pins: sdio-m-all-pins {
+					mux {
+						groups = "sdio_d0",
+							 "sdio_d1",
+							 "sdio_d2",
+							 "sdio_d3",
+							 "sdio_clk",
+							 "sdio_cmd";
+						function = "sdio";
+						input-enable;
+						bias-pull-up;
+						drive-strength-microamp = <4000>;
+					};
+				};
+
+				spicc0_pins1: spicc0-pins1 {
+					mux {
+						groups = "spi_a_mosi_b",
+							 "spi_a_miso_b",
+							 "spi_a_clk_b";
+						function = "spi_a";
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				spicc0_pins2: spicc0-pins2 {
+					mux {
+						groups = "spi_a_mosi_c",
+							 "spi_a_miso_c",
+							 "spi_a_clk_c";
+						function = "spi_a";
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				spicc0_pins3: spicc0-pins3 {
+					mux {
+						groups = "spi_a_mosi_x",
+							 "spi_a_miso_x",
+							 "spi_a_clk_x";
+						function = "spi_a";
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				spicc1_pins1: spicc1-pins1 {
+					mux {
+						groups = "spi_b_mosi_d",
+							 "spi_b_miso_d",
+							 "spi_b_clk_d";
+						function = "spi_b";
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				spicc1_pins2: spicc1-pins2 {
+					mux {
+						groups = "spi_b_mosi_x",
+							 "spi_b_miso_x",
+							 "spi_b_clk_x";
+						function = "spi_b";
+						drive-strength-microamp = <3000>;
+					};
+				};
+
+				spifc_pins: spifc-pins {
+					mux {
+						groups = "spif_mo",
+							 "spif_mi",
+							 "spif_clk",
+							 "spif_cs",
+							 "spif_hold",
+							 "spif_wp",
+							 "spif_clk_loop";
+						function = "spif";
+						drive-strength-microamp = <4000>;
+					};
+				};
 			};
 
 			gpio_intc: interrupt-controller at 4080 {
@@ -119,13 +421,131 @@ gpio_intc: interrupt-controller at 4080 {
 					<10 11 12 13 14 15 16 17 18 19 20 21>;
 			};
 
+			clkc_pll: clock-controller at 8000 {
+				compatible = "amlogic,c3-pll-clkc";
+				reg = <0x0 0x8000 0x0 0x1a4>;
+				#clock-cells = <1>;
+				clocks = <&scmi_clk CLKID_TOP_PLL_OSC>,
+					 <&scmi_clk CLKID_MCLK_PLL_OSC>,
+					 <&scmi_clk CLKID_FIXED_PLL_OSC>;
+				clock-names = "top",
+					      "mclk",
+					      "fix";
+			};
+
+			eth_phy: mdio-multiplexer at 28000 {
+				compatible = "amlogic,g12a-mdio-mux";
+				reg = <0x0 0x28000 0x0 0xa4>;
+
+				clocks = <&clkc_periphs CLKID_SYS_ETH_PHY>,
+					 <&xtal>,
+					 <&clkc_pll CLKID_FCLK_50M>;
+				clock-names = "pclk", "clkin0", "clkin1";
+				mdio-parent-bus = <&mdio0>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				ext_mdio: mdio at 0 {
+					reg = <0>;
+					#address-cells = <1>;
+					#size-cells = <0>;
+				};
+
+				int_mdio: mdio at 1 {
+					reg = <1>;
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					internal_ephy: ethernet_phy at 8 {
+						compatible = "ethernet-phy-id0180.3301",
+							     "ethernet-phy-ieee802.3-c22";
+						interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+						reg = <8>;
+						max-speed = <100>;
+					};
+				};
+			};
+
+			spicc0: spi at 50000 {
+				compatible = "amlogic,meson-g12a-spicc";
+				reg = <0x0 0x50000 0x0 0x44>;
+				interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clkc_periphs CLKID_SYS_SPICC_0>,
+					 <&clkc_periphs CLKID_SPICC_A>;
+				clock-names = "core", "pclk";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+
+			spicc1: spi at 52000 {
+				compatible = "amlogic,meson-g12a-spicc";
+				reg = <0x0 0x52000 0x0 0x44>;
+				interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clkc_periphs CLKID_SYS_SPICC_1>,
+					 <&clkc_periphs CLKID_SPICC_B>;
+				clock-names = "core", "pclk";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+
+			spifc: spi at 56000 {
+				compatible = "amlogic,a1-spifc";
+				reg = <0x0 0x56000 0x0 0x290>;
+				interrupts = <GIC_SPI 182 IRQ_TYPE_EDGE_RISING>;
+				clocks = <&clkc_periphs CLKID_SPIFC>;
+				clock-names = "core";
+				status = "disabled";
+			};
+
+			i2c0: i2c at 66000 {
+				compatible = "amlogic,meson-axg-i2c";
+				reg = <0x0 0x66000 0x0 0x24>;
+				interrupts = <GIC_SPI 160 IRQ_TYPE_EDGE_RISING>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&clkc_periphs CLKID_SYS_I2C_M_A>;
+				status = "disabled";
+			};
+
+			i2c1: i2c at 68000 {
+				compatible = "amlogic,meson-axg-i2c";
+				reg = <0x0 0x68000 0x0 0x24>;
+				interrupts = <GIC_SPI 161 IRQ_TYPE_EDGE_RISING>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&clkc_periphs CLKID_SYS_I2C_M_B>;
+				status = "disabled";
+			};
+
+			i2c2: i2c at 6a000 {
+				compatible = "amlogic,meson-axg-i2c";
+				reg = <0x0 0x6a000 0x0 0x24>;
+				interrupts = <GIC_SPI 162 IRQ_TYPE_EDGE_RISING>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&clkc_periphs CLKID_SYS_I2C_M_C>;
+				status = "disabled";
+			};
+
+			i2c3: i2c at 6c000 {
+				compatible = "amlogic,meson-axg-i2c";
+				reg = <0x0 0x6c000 0x0 0x24>;
+				interrupts = <GIC_SPI 163 IRQ_TYPE_EDGE_RISING>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&clkc_periphs CLKID_SYS_I2C_M_D>;
+				status = "disabled";
+			};
+
 			uart_b: serial at 7a000 {
 				compatible = "amlogic,meson-s4-uart",
 					   "amlogic,meson-ao-uart";
 				reg = <0x0 0x7a000 0x0 0x18>;
 				interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
 				status = "disabled";
-				clocks = <&xtal>, <&xtal>, <&xtal>;
+				clocks = <&xtal>, <&clkc_periphs CLKID_SYS_UART_B>, <&xtal>;
 				clock-names = "xtal", "pclk", "baud";
 			};
 
@@ -136,6 +556,72 @@ sec_ao: ao-secure at 10220 {
 				reg = <0x0 0x10220 0x0 0x140>;
 				amlogic,has-chip-id;
 			};
+
+			sdio: mmc at 88000 {
+				compatible = "amlogic,meson-axg-mmc";
+				reg = <0x0 0x88000 0x0 0x800>;
+				interrupts = <GIC_SPI 176 IRQ_TYPE_EDGE_RISING>;
+				power-domains = <&pwrc PWRC_C3_SDIOA_ID>;
+				clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_A>,
+					  <&clkc_periphs CLKID_SD_EMMC_A>,
+					  <&clkc_pll CLKID_FCLK_DIV2>;
+				clock-names = "core","clkin0", "clkin1";
+				no-mmc;
+				no-sd;
+				resets = <&reset RESET_SD_EMMC_A>;
+				status = "disabled";
+			};
+
+			sd: mmc at 8a000 {
+				compatible = "amlogic,meson-axg-mmc";
+				reg = <0x0 0x8a000 0x0 0x800>;
+				interrupts = <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>;
+				power-domains = <&pwrc PWRC_C3_SDCARD_ID>;
+				clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_B>,
+					<&clkc_periphs CLKID_SD_EMMC_B>,
+					<&clkc_pll CLKID_FCLK_DIV2>;
+				clock-names = "core", "clkin0", "clkin1";
+				no-mmc;
+				no-sdio;
+				resets = <&reset RESET_SD_EMMC_B>;
+				status = "disabled";
+			};
+
+			nand: nand-controller at 8d000 {
+				compatible = "amlogic,meson-axg-nfc";
+				reg = <0x0 0x8d000 0x0 0x200>,
+					<0x0 0x8C000 0x0 0x4>;
+				reg-names = "nfc", "emmc";
+				interrupts = <GIC_SPI 87 IRQ_TYPE_EDGE_RISING>;
+				clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_C>,
+					<&clkc_pll CLKID_FCLK_DIV2>;
+				clock-names = "core", "device";
+				status = "disabled";
+			};
+		};
+
+		ethmac: ethernet at fdc00000 {
+			compatible = "amlogic,meson-g12a-dwmac",
+				     "snps,dwmac-3.70a",
+				     "snps,dwmac";
+			reg = <0x0 0xfdc00000 0x0 0x10000>,
+			      <0x0 0xfe024000 0x0 0x8>;
+			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "macirq";
+			power-domains = <&pwrc PWRC_C3_ETH_ID>;
+			clocks = <&clkc_periphs CLKID_SYS_ETH_MAC>,
+				 <&clkc_pll CLKID_FCLK_DIV2>,
+				 <&clkc_pll CLKID_FCLK_50M>;
+			clock-names = "stmmaceth", "clkin0", "clkin1";
+			rx-fifo-depth = <4096>;
+			tx-fifo-depth = <2048>;
+			status = "disabled";
+
+			mdio0: mdio {
+				compatible = "snps,dwmac-mdio";
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
 		};
 	};
 };

-- 
2.37.1




From devnull+xianwei.zhao.amlogic.com at kernel.org  Thu Aug 29 22:26:08 2024
From: devnull+xianwei.zhao.amlogic.com at kernel.org (Xianwei Zhao via B4 Relay)
Date: Fri, 30 Aug 2024 13:26:08 +0800
Subject: [PATCH v4 1/3] dt-bindings: clock: fix C3 PLL input parameter
In-Reply-To: <20240830-c3_add_node-v4-0-b56c0511e9dc@amlogic.com>
References: <20240830-c3_add_node-v4-0-b56c0511e9dc@amlogic.com>
Message-ID: <20240830-c3_add_node-v4-1-b56c0511e9dc@amlogic.com>

From: Xianwei Zhao <xianwei.zhao at amlogic.com>

Add C3 PLL controller input clock parameters "fix".

The clock named "fix" was initially implemented in PLL clock controller
driver. However, some registers required secure zone access, so we moved
it to the secure zone (BL31) and accessed it through SCMI. Since the PLL
clock driver needs to use this clock, the "fix" clock is used as an input
source. We updated the driver but forgot to modify the binding accordingly,
so we are adding it here.

It is an ABI break but on a new and immature platform. Noboby could really
use that platform at this stage, so nothing is going to break on anyone
really.

Fixes: 0e6be855a96d ("dt-bindings: clock: add Amlogic C3 PLL clock controller")
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>
Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
---
 Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
index 43de3c6fc1cf..700865cc9792 100644
--- a/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
+++ b/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
@@ -24,11 +24,13 @@ properties:
     items:
       - description: input top pll
       - description: input mclk pll
+      - description: input fix pll
 
   clock-names:
     items:
       - const: top
       - const: mclk
+      - const: fix
 
   "#clock-cells":
     const: 1
@@ -52,8 +54,9 @@ examples:
             compatible = "amlogic,c3-pll-clkc";
             reg = <0x0 0x8000 0x0 0x1a4>;
             clocks = <&scmi_clk 2>,
-                     <&scmi_clk 5>;
-            clock-names = "top", "mclk";
+                     <&scmi_clk 5>,
+                     <&scmi_clk 12>;
+            clock-names = "top", "mclk", "fix";
             #clock-cells = <1>;
         };
     };

-- 
2.37.1




From ruanjinjie at huawei.com  Thu Aug 29 23:34:38 2024
From: ruanjinjie at huawei.com (Jinjie Ruan)
Date: Fri, 30 Aug 2024 14:34:38 +0800
Subject: [PATCH -next RESEND 00/10] mtd: Use
 for_each_child_of_node_scoped()
In-Reply-To: <20240826144917.2c4e202d@xps-13>
References: <20240826094328.2991664-1-ruanjinjie@huawei.com>
 <20240826115213.389acaef@xps-13>
 <f7430f87-88d2-4c08-bc1e-6bb3da4e332c@kernel.org>
 <20240826144917.2c4e202d@xps-13>
Message-ID: <c29263ae-89f1-edd7-003a-bd03cdddc821@huawei.com>



On 2024/8/26 20:49, Miquel Raynal wrote:
> Hi Krzysztof,
> 
> krzk at kernel.org wrote on Mon, 26 Aug 2024 12:19:07 +0200:
> 
>> On 26/08/2024 11:52, Miquel Raynal wrote:
>>> Hi Jinjie,
>>>
>>> ruanjinjie at huawei.com wrote on Mon, 26 Aug 2024 17:43:18 +0800:
>>>   
>>>> Use scoped for_each_available_child_of_node_scoped() when iterating over
>>>> device nodes to make code a bit simpler.  
>>>
>>> Why is this a resend ? Did I miss a previous iteration?  
>>
>> You were not cc-ed on previous iteration. I asked for proper split
>> between subsystems and sending to maintainers, thus this resend.
> 
> Ok. Makes sense, and the patchset looks fine.

Hi, Miquel,

Could this series be merged, thank you!

> 
> Jinjie, please always include a changelog when you send new versions,
> and explanations for a RESEND.
> 
> Thanks,
> Miqu?l


From miquel.raynal at bootlin.com  Fri Aug 30 00:45:49 2024
From: miquel.raynal at bootlin.com (Miquel Raynal)
Date: Fri, 30 Aug 2024 09:45:49 +0200
Subject: [PATCH -next RESEND 00/10] mtd: Use
 for_each_child_of_node_scoped()
In-Reply-To: <c29263ae-89f1-edd7-003a-bd03cdddc821@huawei.com>
References: <20240826094328.2991664-1-ruanjinjie@huawei.com>
	<20240826115213.389acaef@xps-13>
	<f7430f87-88d2-4c08-bc1e-6bb3da4e332c@kernel.org>
	<20240826144917.2c4e202d@xps-13>
	<c29263ae-89f1-edd7-003a-bd03cdddc821@huawei.com>
Message-ID: <20240830094549.1c513ba2@xps-13>

Jinjie,

ruanjinjie at huawei.com wrote on Fri, 30 Aug 2024 14:34:38 +0800:

> On 2024/8/26 20:49, Miquel Raynal wrote:
> > Hi Krzysztof,
> > 
> > krzk at kernel.org wrote on Mon, 26 Aug 2024 12:19:07 +0200:
> >   
> >> On 26/08/2024 11:52, Miquel Raynal wrote:  
> >>> Hi Jinjie,
> >>>
> >>> ruanjinjie at huawei.com wrote on Mon, 26 Aug 2024 17:43:18 +0800:
> >>>     
> >>>> Use scoped for_each_available_child_of_node_scoped() when iterating over
> >>>> device nodes to make code a bit simpler.    
> >>>
> >>> Why is this a resend ? Did I miss a previous iteration?    
> >>
> >> You were not cc-ed on previous iteration. I asked for proper split
> >> between subsystems and sending to maintainers, thus this resend.  
> > 
> > Ok. Makes sense, and the patchset looks fine.  
> 
> Hi, Miquel,
> 
> Could this series be merged, thank you!

You've sent this series on Monday, we are Friday. I answered a first
time within 5h and reviewed it within 8h. So that means I will take the
patchset:
- when I have the time to do so
- after several days to give a chance to other to review it as well
- unless someone speaks up against it in a "reasonable time frame"
- unless a robot that parses the patches on the mailing lists complains
  about it (usually within few days, up to a week).

In general, a good rule of thumb is to refrain yourself from pinging
within 2 weeks for non-urgent matters like this series.

Thanks,
Miqu?l


From neil.armstrong at linaro.org  Fri Aug 30 01:00:38 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Fri, 30 Aug 2024 10:00:38 +0200
Subject: [PATCH v4 1/3] dt-bindings: clock: fix C3 PLL input parameter
In-Reply-To: <20240830-c3_add_node-v4-1-b56c0511e9dc@amlogic.com>
References: <20240830-c3_add_node-v4-0-b56c0511e9dc@amlogic.com>
 <20240830-c3_add_node-v4-1-b56c0511e9dc@amlogic.com>
Message-ID: <0e74dbc8-88ed-43db-95ef-0fe55d92091d@linaro.org>

Hi Jerome,

On 30/08/2024 07:26, Xianwei Zhao via B4 Relay wrote:
> From: Xianwei Zhao <xianwei.zhao at amlogic.com>
> 
> Add C3 PLL controller input clock parameters "fix".
> 
> The clock named "fix" was initially implemented in PLL clock controller
> driver. However, some registers required secure zone access, so we moved
> it to the secure zone (BL31) and accessed it through SCMI. Since the PLL
> clock driver needs to use this clock, the "fix" clock is used as an input
> source. We updated the driver but forgot to modify the binding accordingly,
> so we are adding it here.
> 
> It is an ABI break but on a new and immature platform. Noboby could really
> use that platform at this stage, so nothing is going to break on anyone
> really.
> 
> Fixes: 0e6be855a96d ("dt-bindings: clock: add Amlogic C3 PLL clock controller")
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>
> Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
> ---
>   Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml | 7 +++++--

So you mind if I take this one via my arm64-dt tree ?

Neil

<snip>



From chenyufan at vivo.com  Fri Aug 30 01:01:03 2024
From: chenyufan at vivo.com (Chen Yufan)
Date: Fri, 30 Aug 2024 16:01:03 +0800
Subject: [PATCH v1] clk: meson: axg-audio: Use dev_err_probe() to simplfy code
Message-ID: <20240830080103.12811-1-chenyufan@vivo.com>

Use dev_err_probe() can make code a bit simpler.

Signed-off-by: Chen Yufan <chenyufan at vivo.com>
---
 drivers/clk/meson/axg-audio.c | 12 ++++--------
 1 file changed, 4 insertions(+), 8 deletions(-)

diff --git a/drivers/clk/meson/axg-audio.c b/drivers/clk/meson/axg-audio.c
index e03a5bf899c0..0637b05a4c89 100644
--- a/drivers/clk/meson/axg-audio.c
+++ b/drivers/clk/meson/axg-audio.c
@@ -1761,10 +1761,8 @@ static int axg_audio_clkc_probe(struct platform_device *pdev)
 		return PTR_ERR(regs);
 
 	map = devm_regmap_init_mmio(dev, regs, &axg_audio_regmap_cfg);
-	if (IS_ERR(map)) {
-		dev_err(dev, "failed to init regmap: %ld\n", PTR_ERR(map));
-		return PTR_ERR(map);
-	}
+	if (IS_ERR(map))
+		return dev_err_probe(dev, PTR_ERR(map), "failed to init regmap: %ld\n");
 
 	/* Get the mandatory peripheral clock */
 	clk = devm_clk_get_enabled(dev, "pclk");
@@ -1772,10 +1770,8 @@ static int axg_audio_clkc_probe(struct platform_device *pdev)
 		return PTR_ERR(clk);
 
 	ret = device_reset(dev);
-	if (ret) {
-		dev_err_probe(dev, ret, "failed to reset device\n");
-		return ret;
-	}
+	if (ret)
+		return dev_err_probe(dev, ret, "failed to reset device\n");
 
 	/* Populate regmap for the regmap backed clocks */
 	for (i = 0; i < data->regmap_clk_num; i++)
-- 
2.39.0



From jbrunet at baylibre.com  Fri Aug 30 01:10:10 2024
From: jbrunet at baylibre.com (Jerome Brunet)
Date: Fri, 30 Aug 2024 10:10:10 +0200
Subject: [PATCH v4 1/3] dt-bindings: clock: fix C3 PLL input parameter
In-Reply-To: <0e74dbc8-88ed-43db-95ef-0fe55d92091d@linaro.org> (Neil
	Armstrong's message of "Fri, 30 Aug 2024 10:00:38 +0200")
References: <20240830-c3_add_node-v4-0-b56c0511e9dc@amlogic.com>
	<20240830-c3_add_node-v4-1-b56c0511e9dc@amlogic.com>
	<0e74dbc8-88ed-43db-95ef-0fe55d92091d@linaro.org>
Message-ID: <1jplpqsa71.fsf@starbuckisacylon.baylibre.com>

On Fri 30 Aug 2024 at 10:00, Neil Armstrong <neil.armstrong at linaro.org> wrote:

> Hi Jerome,
>
> On 30/08/2024 07:26, Xianwei Zhao via B4 Relay wrote:
>> From: Xianwei Zhao <xianwei.zhao at amlogic.com>
>> Add C3 PLL controller input clock parameters "fix".
>> The clock named "fix" was initially implemented in PLL clock controller
>> driver. However, some registers required secure zone access, so we moved
>> it to the secure zone (BL31) and accessed it through SCMI. Since the PLL
>> clock driver needs to use this clock, the "fix" clock is used as an input
>> source. We updated the driver but forgot to modify the binding accordingly,
>> so we are adding it here.
>> It is an ABI break but on a new and immature platform. Noboby could
>> really
>> use that platform at this stage, so nothing is going to break on anyone
>> really.
>> Fixes: 0e6be855a96d ("dt-bindings: clock: add Amlogic C3 PLL clock
>> controller")
>> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>
>> Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
>> ---
>>   Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml | 7 +++++--
>
> So you mind if I take this one via my arm64-dt tree ?

There is no conflicting change in my tree so it's fine, yes.

>
> Neil
>
> <snip>

-- 
Jerome


From neil.armstrong at linaro.org  Fri Aug 30 01:10:54 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Fri, 30 Aug 2024 10:10:54 +0200
Subject: [PATCH v4 2/3] arm64: dts: amlogic: add some device nodes for C3
In-Reply-To: <20240830-c3_add_node-v4-2-b56c0511e9dc@amlogic.com>
References: <20240830-c3_add_node-v4-0-b56c0511e9dc@amlogic.com>
 <20240830-c3_add_node-v4-2-b56c0511e9dc@amlogic.com>
Message-ID: <4f36f29d-93c9-4f7d-bb35-c29e5ba55966@linaro.org>

On 30/08/2024 07:26, Xianwei Zhao via B4 Relay wrote:
> From: Xianwei Zhao <xianwei.zhao at amlogic.com>
> 
> Add some device nodes for SoC C3, including periphs clock controller
> node, PLL clock controller node, SPICC node, regulator node, NAND
> controller node, sdcard node, Ethernet MAC and PHY node.
> 
> The sdacrd depends on regulator and pinctrl(select), so some
> property fields are placed at the board level. The nand chip
> is placed on the board, So some property fields about SPIFC
> and NAND controller node are placed at the board level.
> THe Ethernet MAC support outchip PHY, so place this property
> field(select PHY) at the board level.
> 
> Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
> ---
>   .../boot/dts/amlogic/amlogic-c3-c302x-aw409.dts    | 233 ++++++++++
>   arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi        | 488 ++++++++++++++++++++-
>   2 files changed, 720 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts b/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts
> index edce8850b338..b8d2037afc00 100644
> --- a/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts
> @@ -16,14 +16,247 @@ / {
>   
>   	aliases {
>   		serial0 = &uart_b;
> +		spi0 = &spifc;
>   	};
>   
>   	memory at 0 {
>   		device_type = "memory";
>   		reg = <0x0 0x0 0x0 0x10000000>;
>   	};
> +
> +	reserved-memory {
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges;
> +
> +		/* 9 MiB reserved for ARM Trusted Firmware */
> +		secmon_reserved: secmon at 7f00000 {
> +			compatible = "shared-dma-pool";
> +			reg = <0x0 0x07f00000 0x0 0x900000>;
> +			no-map;
> +		};
> +	};
> +
> +	main_12v: regulator-main-12v {
> +		compatible = "regulator-fixed";
> +		regulator-name = "12V";
> +		regulator-min-microvolt = <12000000>;
> +		regulator-max-microvolt = <12000000>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	vcc_5v: regulator-vcc-5v {
> +		compatible = "regulator-fixed";
> +		regulator-name = "VCC5V";
> +		regulator-min-microvolt = <5000000>;
> +		regulator-max-microvolt = <5000000>;
> +		vin-supply = <&main_12v>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	vddq: regulator-vddq {
> +		compatible = "regulator-fixed";
> +		regulator-name = "VDDQ";
> +		regulator-min-microvolt = <1200000>;
> +		regulator-max-microvolt = <1200000>;
> +		vin-supply = <&main_12v>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	vddao_3v3: regulator-vddao-3v3 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "VDDAO3V3";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		vin-supply = <&main_12v>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	vddao_1v8: regulator-vddao-1v8 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "VDDAO1V8";
> +		regulator-min-microvolt = <1800000>;
> +		regulator-max-microvolt = <1800000>;
> +		vin-supply = <&vddao_3v3>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	ddr4_2v5: regulator-ddr4-2v5 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "DDR4_2V5";
> +		regulator-min-microvolt = <2500000>;
> +		regulator-max-microvolt = <2500000>;
> +		vin-supply = <&vddao_3v3>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	vcc_3v3: regulator-vcc-3v3 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "VCC3V3";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		vin-supply = <&vddao_3v3>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	vcc_1v8: regulator-vcc-1v8 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "VCC1V8";
> +		regulator-min-microvolt = <1800000>;
> +		regulator-max-microvolt = <1800000>;
> +		vin-supply = <&vcc_3v3>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	vdd_1v8: regulator-vdd-1v8 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "VDD1V8_BOOT";
> +		regulator-min-microvolt = <1800000>;
> +		regulator-max-microvolt = <1800000>;
> +		vin-supply = <&vcc_3v3>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	vddio_b: regulator-vddio-3v3-b {
> +		compatible = "regulator-fixed";
> +		regulator-name = "VDDIO_B";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		vin-supply = <&vcc_3v3>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	sdcard: regulator-sdcard {
> +		compatible = "regulator-fixed";
> +		regulator-name = "SDCARD_POWER";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		vin-supply = <&vddao_3v3>;
> +		gpio = <&gpio GPIOA_4 GPIO_ACTIVE_LOW>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
>   };
>   
>   &uart_b {
>   	status = "okay";
>   };
> +
> +&nand {
> +	status = "okay";
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +
> +	pinctrl-0 = <&nand_pins>;
> +	pinctrl-names = "default";
> +
> +	nand at 0 {
> +		reg = <0>;
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		nand-on-flash-bbt;
> +
> +		partition at 0 {
> +			label = "boot";
> +			reg = <0x0 0x00200000>;
> +		};
> +		partition at 200000 {
> +			label = "env";
> +			reg = <0x00200000 0x00400000>;
> +		};
> +		partition at 600000 {
> +			label = "system";
> +			reg = <0x00600000 0x00a00000>;
> +		};
> +		partition at 1000000 {
> +			label = "rootfs";
> +			reg = <0x01000000 0x03000000>;
> +		};
> +		partition at 4000000 {
> +			label = "media";
> +			reg = <0x04000000 0x8000000>;
> +		};
> +	};
> +};
> +
> +&ethmac {
> +	status = "okay";
> +	phy-handle = <&internal_ephy>;
> +	phy-mode = "rmii";
> +};
> +
> +&spifc {
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +
> +	pinctrl-0 = <&spifc_pins>;
> +	pinctrl-names = "default";
> +
> +	nand at 0 {
> +		compatible = "spi-nand";
> +		reg = <0>;
> +		spi-max-frequency = <83000000>;
> +		spi-tx-bus-width = <4>;
> +		spi-rx-bus-width = <4>;
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		status = "disabled";
> +
> +		partitions {
> +			compatible = "fixed-partitions";
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +
> +			partition at 0 {
> +				label = "boot";
> +				reg = <0 0x200000>;
> +			};
> +
> +			partition at 200000 {
> +				label = "env";
> +				reg = <0x200000 0x400000>;
> +			};
> +
> +			partition at 600000 {
> +				label = "system";
> +				reg = <0x600000 0xa00000>;
> +			};
> +
> +			partition at 1000000 {
> +				label = "rootfs";
> +				reg = <0x1000000 0x3000000>;
> +			};
> +
> +			partition at 4000000 {
> +				label = "data";
> +				reg = <0x4000000 0x8000000>;
> +			};
> +		};
> +	};
> +};
> +
> +&sd {
> +	status = "okay";
> +	pinctrl-0 = <&sdcard_pins>;
> +	pinctrl-1 = <&sdcard_clk_gate_pins>;
> +	pinctrl-names = "default","clk-gate";
> +
> +	bus-width = <4>;
> +	cap-sd-highspeed;
> +	max-frequency = <50000000>;
> +	disable-wp;
> +
> +	cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
> +	vmmc-supply = <&sdcard>;
> +	vqmmc-supply = <&sdcard>;
> +};
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
> index c913dd409e64..c0ce776ec463 100644
> --- a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
> @@ -7,6 +7,11 @@
>   #include <dt-bindings/interrupt-controller/arm-gic.h>
>   #include <dt-bindings/gpio/gpio.h>
>   #include <dt-bindings/reset/amlogic,c3-reset.h>
> +#include <dt-bindings/clock/amlogic,c3-pll-clkc.h>
> +#include <dt-bindings/clock/amlogic,c3-scmi-clkc.h>
> +#include <dt-bindings/clock/amlogic,c3-peripherals-clkc.h>
> +#include <dt-bindings/power/amlogic,c3-pwrc.h>
> +#include <dt-bindings/gpio/amlogic-c3-gpio.h>
>   
>   / {
>   	cpus {
> @@ -57,6 +62,34 @@ pwrc: power-controller {
>   		};
>   	};
>   
> +	sram {
> +		compatible = "mmio-sram";
> +		reg = <0x0 0x07f50e00 0x0 0x100>;
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		ranges = <0 0x0 0x07f50e00 0x100>;
> +
> +		scmi_shmem: sram at 0 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0x0 0x100>;
> +		};
> +	};
> +
> +	firmware {
> +		scmi: scmi {
> +			compatible = "arm,scmi-smc";
> +			arm,smc-id = <0x820000C1>;
> +			shmem = <&scmi_shmem>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
> +			scmi_clk: protocol at 14 {
> +				reg = <0x14>;
> +				#clock-cells = <1>;
> +			};
> +		};
> +	};
> +
>   	soc {
>   		compatible = "simple-bus";
>   		#address-cells = <2>;
> @@ -82,6 +115,44 @@ apb4: bus at fe000000 {
>   			#size-cells = <2>;
>   			ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
>   
> +			clkc_periphs: clock-controller at 0 {
> +				compatible = "amlogic,c3-peripherals-clkc";
> +				reg = <0x0 0x0 0x0 0x49c>;
> +				#clock-cells = <1>;
> +				clocks = <&xtal>,
> +					 <&scmi_clk CLKID_OSC>,
> +					 <&scmi_clk CLKID_FIXED_PLL_OSC>,
> +					 <&clkc_pll CLKID_FCLK_DIV2>,
> +					 <&clkc_pll CLKID_FCLK_DIV2P5>,
> +					 <&clkc_pll CLKID_FCLK_DIV3>,
> +					 <&clkc_pll CLKID_FCLK_DIV4>,
> +					 <&clkc_pll CLKID_FCLK_DIV5>,
> +					 <&clkc_pll CLKID_FCLK_DIV7>,
> +					 <&clkc_pll CLKID_GP0_PLL>,
> +					 <&scmi_clk CLKID_GP1_PLL_OSC>,
> +					 <&clkc_pll CLKID_HIFI_PLL>,
> +					 <&scmi_clk CLKID_SYS_CLK>,
> +					 <&scmi_clk CLKID_AXI_CLK>,
> +					 <&scmi_clk CLKID_SYS_PLL_DIV16>,
> +					 <&scmi_clk CLKID_CPU_CLK_DIV16>;
> +				clock-names = "xtal_24m",
> +					      "oscin",
> +					      "fix",
> +					      "fdiv2",
> +					      "fdiv2p5",
> +					      "fdiv3",
> +					      "fdiv4",
> +					      "fdiv5",
> +					      "fdiv7",
> +					      "gp0",
> +					      "gp1",
> +					      "hifi",
> +					      "sysclk",
> +					      "axiclk",
> +					      "sysplldiv16",
> +					      "cpudiv16";
> +			};
> +
>   			reset: reset-controller at 2000 {
>   				compatible = "amlogic,c3-reset";
>   				reg = <0x0 0x2000 0x0 0x98>;
> @@ -108,6 +179,237 @@ gpio: bank at 4000 {
>   					#gpio-cells = <2>;
>   					gpio-ranges = <&periphs_pinctrl 0 0 55>;
>   				};
> +
> +				i2c0_pins1: i2c0-pins1 {
> +					mux {
> +						groups = "i2c0_sda_e",
> +							 "i2c0_scl_e";
> +						function = "i2c0";
> +						bias-disable;
> +						drive-strength-microamp = <3000>;
> +					};
> +				};
> +
> +				i2c0_pins2: i2c0-pins2 {
> +					mux {
> +						groups = "i2c0_sda_d",
> +							 "i2c0_scl_d";
> +						function = "i2c0";
> +						bias-disable;
> +						drive-strength-microamp = <3000>;
> +					};
> +				};
> +
> +				i2c1_pins1: i2c1-pins1 {
> +					mux {
> +						groups = "i2c1_sda_x",
> +							 "i2c1_scl_x";
> +						function = "i2c1";
> +						bias-disable;
> +						drive-strength-microamp = <3000>;
> +					};
> +				};
> +
> +				i2c1_pins2: i2c1-pins2 {
> +					mux {
> +						groups = "i2c1_sda_d",
> +							 "i2c1_scl_d";
> +						function = "i2c1";
> +						bias-disable;
> +						drive-strength-microamp = <3000>;
> +					};
> +				};
> +
> +				i2c1_pins3: i2c1-pins3 {
> +					mux {
> +						groups = "i2c1_sda_a",
> +							 "i2c1_scl_a";
> +						function = "i2c1";
> +						bias-disable;
> +						drive-strength-microamp = <3000>;
> +					};
> +				};
> +
> +				i2c1_pins4: i2c1-pins4 {
> +					mux {
> +						groups = "i2c1_sda_b",
> +							 "i2c1_scl_b";
> +						function = "i2c1";
> +						bias-disable;
> +						drive-strength-microamp = <3000>;
> +					};
> +				};
> +
> +				i2c2_pins1: i2c2-pins1 {
> +					mux {
> +						groups = "i2c2_sda",
> +							 "i2c2_scl";
> +						function = "i2c2";
> +						bias-disable;
> +						drive-strength-microamp = <3000>;
> +					};
> +				};
> +
> +				i2c3_pins1: i2c3-pins1 {
> +					mux {
> +						groups = "i2c3_sda_c",
> +							 "i2c3_scl_c";
> +						function = "i2c3";
> +						bias-disable;
> +						drive-strength-microamp = <3000>;
> +					};
> +				};
> +
> +				i2c3_pins2: i2c3-pins2 {
> +					mux {
> +						groups = "i2c3_sda_x",
> +							 "i2c3_scl_x";
> +						function = "i2c3";
> +						bias-disable;
> +						drive-strength-microamp = <3000>;
> +					};
> +				};
> +
> +				i2c3_pins3: i2c3-pins3 {
> +					mux {
> +						groups = "i2c3_sda_d",
> +							 "i2c3_scl_d";
> +						function = "i2c3";
> +						bias-disable;
> +						drive-strength-microamp = <3000>;
> +					};
> +				};
> +
> +				nand_pins: nand-pins {
> +					mux {
> +						groups = "emmc_nand_d0",
> +							 "emmc_nand_d1",
> +							 "emmc_nand_d2",
> +							 "emmc_nand_d3",
> +							 "emmc_nand_d4",
> +							 "emmc_nand_d5",
> +							 "emmc_nand_d6",
> +							 "emmc_nand_d7",
> +							 "nand_ce0",
> +							 "nand_ale",
> +							 "nand_cle",
> +							 "nand_wen_clk",
> +							 "nand_ren_wr";
> +						function = "nand";
> +						input-enable;
> +					};
> +				};
> +
> +				sdcard_pins: sdcard-pins {
> +					mux {
> +						groups = "sdcard_d0",
> +							 "sdcard_d1",
> +							 "sdcard_d2",
> +							 "sdcard_d3",
> +							 "sdcard_clk",
> +							 "sdcard_cmd";
> +						function = "sdcard";
> +						bias-pull-up;
> +						drive-strength-microamp = <4000>;
> +					};
> +				};
> +
> +				sdcard_clk_gate_pins: sdcard-clk-cmd-pins {
> +					mux {
> +						groups = "GPIOC_4";
> +						function = "gpio_periphs";
> +						bias-pull-down;
> +						drive-strength-microamp = <4000>;
> +					};
> +				};
> +
> +				sdio_m_clk_gate_pins: sdio-m-clk-cmd-pins {
> +					mux {
> +						groups = "sdio_clk";
> +						function = "sdio";
> +						bias-pull-down;
> +						drive-strength-microamp = <4000>;
> +					};
> +				};
> +
> +				sdio_m_pins: sdio-m-all-pins {
> +					mux {
> +						groups = "sdio_d0",
> +							 "sdio_d1",
> +							 "sdio_d2",
> +							 "sdio_d3",
> +							 "sdio_clk",
> +							 "sdio_cmd";
> +						function = "sdio";
> +						input-enable;
> +						bias-pull-up;
> +						drive-strength-microamp = <4000>;
> +					};
> +				};
> +
> +				spicc0_pins1: spicc0-pins1 {
> +					mux {
> +						groups = "spi_a_mosi_b",
> +							 "spi_a_miso_b",
> +							 "spi_a_clk_b";
> +						function = "spi_a";
> +						drive-strength-microamp = <3000>;
> +					};
> +				};
> +
> +				spicc0_pins2: spicc0-pins2 {
> +					mux {
> +						groups = "spi_a_mosi_c",
> +							 "spi_a_miso_c",
> +							 "spi_a_clk_c";
> +						function = "spi_a";
> +						drive-strength-microamp = <3000>;
> +					};
> +				};
> +
> +				spicc0_pins3: spicc0-pins3 {
> +					mux {
> +						groups = "spi_a_mosi_x",
> +							 "spi_a_miso_x",
> +							 "spi_a_clk_x";
> +						function = "spi_a";
> +						drive-strength-microamp = <3000>;
> +					};
> +				};
> +
> +				spicc1_pins1: spicc1-pins1 {
> +					mux {
> +						groups = "spi_b_mosi_d",
> +							 "spi_b_miso_d",
> +							 "spi_b_clk_d";
> +						function = "spi_b";
> +						drive-strength-microamp = <3000>;
> +					};
> +				};
> +
> +				spicc1_pins2: spicc1-pins2 {
> +					mux {
> +						groups = "spi_b_mosi_x",
> +							 "spi_b_miso_x",
> +							 "spi_b_clk_x";
> +						function = "spi_b";
> +						drive-strength-microamp = <3000>;
> +					};
> +				};
> +
> +				spifc_pins: spifc-pins {
> +					mux {
> +						groups = "spif_mo",
> +							 "spif_mi",
> +							 "spif_clk",
> +							 "spif_cs",
> +							 "spif_hold",
> +							 "spif_wp",
> +							 "spif_clk_loop";
> +						function = "spif";
> +						drive-strength-microamp = <4000>;
> +					};
> +				};
>   			};
>   
>   			gpio_intc: interrupt-controller at 4080 {
> @@ -119,13 +421,131 @@ gpio_intc: interrupt-controller at 4080 {
>   					<10 11 12 13 14 15 16 17 18 19 20 21>;
>   			};
>   
> +			clkc_pll: clock-controller at 8000 {
> +				compatible = "amlogic,c3-pll-clkc";
> +				reg = <0x0 0x8000 0x0 0x1a4>;
> +				#clock-cells = <1>;
> +				clocks = <&scmi_clk CLKID_TOP_PLL_OSC>,
> +					 <&scmi_clk CLKID_MCLK_PLL_OSC>,
> +					 <&scmi_clk CLKID_FIXED_PLL_OSC>;
> +				clock-names = "top",
> +					      "mclk",
> +					      "fix";
> +			};
> +
> +			eth_phy: mdio-multiplexer at 28000 {
> +				compatible = "amlogic,g12a-mdio-mux";
> +				reg = <0x0 0x28000 0x0 0xa4>;
> +
> +				clocks = <&clkc_periphs CLKID_SYS_ETH_PHY>,
> +					 <&xtal>,
> +					 <&clkc_pll CLKID_FCLK_50M>;
> +				clock-names = "pclk", "clkin0", "clkin1";
> +				mdio-parent-bus = <&mdio0>;
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +
> +				ext_mdio: mdio at 0 {
> +					reg = <0>;
> +					#address-cells = <1>;
> +					#size-cells = <0>;
> +				};
> +
> +				int_mdio: mdio at 1 {
> +					reg = <1>;
> +					#address-cells = <1>;
> +					#size-cells = <0>;
> +
> +					internal_ephy: ethernet_phy at 8 {
> +						compatible = "ethernet-phy-id0180.3301",
> +							     "ethernet-phy-ieee802.3-c22";
> +						interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
> +						reg = <8>;
> +						max-speed = <100>;
> +					};
> +				};
> +			};
> +
> +			spicc0: spi at 50000 {
> +				compatible = "amlogic,meson-g12a-spicc";
> +				reg = <0x0 0x50000 0x0 0x44>;
> +				interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clkc_periphs CLKID_SYS_SPICC_0>,
> +					 <&clkc_periphs CLKID_SPICC_A>;
> +				clock-names = "core", "pclk";
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				status = "disabled";
> +			};
> +
> +			spicc1: spi at 52000 {
> +				compatible = "amlogic,meson-g12a-spicc";
> +				reg = <0x0 0x52000 0x0 0x44>;
> +				interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clkc_periphs CLKID_SYS_SPICC_1>,
> +					 <&clkc_periphs CLKID_SPICC_B>;
> +				clock-names = "core", "pclk";
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				status = "disabled";
> +			};
> +
> +			spifc: spi at 56000 {
> +				compatible = "amlogic,a1-spifc";
> +				reg = <0x0 0x56000 0x0 0x290>;
> +				interrupts = <GIC_SPI 182 IRQ_TYPE_EDGE_RISING>;
> +				clocks = <&clkc_periphs CLKID_SPIFC>;
> +				clock-names = "core";
> +				status = "disabled";
> +			};
> +
> +			i2c0: i2c at 66000 {
> +				compatible = "amlogic,meson-axg-i2c";
> +				reg = <0x0 0x66000 0x0 0x24>;
> +				interrupts = <GIC_SPI 160 IRQ_TYPE_EDGE_RISING>;
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				clocks = <&clkc_periphs CLKID_SYS_I2C_M_A>;
> +				status = "disabled";
> +			};
> +
> +			i2c1: i2c at 68000 {
> +				compatible = "amlogic,meson-axg-i2c";
> +				reg = <0x0 0x68000 0x0 0x24>;
> +				interrupts = <GIC_SPI 161 IRQ_TYPE_EDGE_RISING>;
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				clocks = <&clkc_periphs CLKID_SYS_I2C_M_B>;
> +				status = "disabled";
> +			};
> +
> +			i2c2: i2c at 6a000 {
> +				compatible = "amlogic,meson-axg-i2c";
> +				reg = <0x0 0x6a000 0x0 0x24>;
> +				interrupts = <GIC_SPI 162 IRQ_TYPE_EDGE_RISING>;
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				clocks = <&clkc_periphs CLKID_SYS_I2C_M_C>;
> +				status = "disabled";
> +			};
> +
> +			i2c3: i2c at 6c000 {
> +				compatible = "amlogic,meson-axg-i2c";
> +				reg = <0x0 0x6c000 0x0 0x24>;
> +				interrupts = <GIC_SPI 163 IRQ_TYPE_EDGE_RISING>;
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				clocks = <&clkc_periphs CLKID_SYS_I2C_M_D>;
> +				status = "disabled";
> +			};
> +
>   			uart_b: serial at 7a000 {
>   				compatible = "amlogic,meson-s4-uart",
>   					   "amlogic,meson-ao-uart";
>   				reg = <0x0 0x7a000 0x0 0x18>;
>   				interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
>   				status = "disabled";
> -				clocks = <&xtal>, <&xtal>, <&xtal>;
> +				clocks = <&xtal>, <&clkc_periphs CLKID_SYS_UART_B>, <&xtal>;
>   				clock-names = "xtal", "pclk", "baud";
>   			};
>   
> @@ -136,6 +556,72 @@ sec_ao: ao-secure at 10220 {
>   				reg = <0x0 0x10220 0x0 0x140>;
>   				amlogic,has-chip-id;
>   			};
> +
> +			sdio: mmc at 88000 {
> +				compatible = "amlogic,meson-axg-mmc";
> +				reg = <0x0 0x88000 0x0 0x800>;
> +				interrupts = <GIC_SPI 176 IRQ_TYPE_EDGE_RISING>;
> +				power-domains = <&pwrc PWRC_C3_SDIOA_ID>;
> +				clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_A>,
> +					  <&clkc_periphs CLKID_SD_EMMC_A>,
> +					  <&clkc_pll CLKID_FCLK_DIV2>;
> +				clock-names = "core","clkin0", "clkin1";
> +				no-mmc;
> +				no-sd;
> +				resets = <&reset RESET_SD_EMMC_A>;
> +				status = "disabled";
> +			};
> +
> +			sd: mmc at 8a000 {
> +				compatible = "amlogic,meson-axg-mmc";
> +				reg = <0x0 0x8a000 0x0 0x800>;
> +				interrupts = <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>;
> +				power-domains = <&pwrc PWRC_C3_SDCARD_ID>;
> +				clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_B>,
> +					<&clkc_periphs CLKID_SD_EMMC_B>,
> +					<&clkc_pll CLKID_FCLK_DIV2>;
> +				clock-names = "core", "clkin0", "clkin1";
> +				no-mmc;
> +				no-sdio;
> +				resets = <&reset RESET_SD_EMMC_B>;
> +				status = "disabled";
> +			};
> +
> +			nand: nand-controller at 8d000 {
> +				compatible = "amlogic,meson-axg-nfc";
> +				reg = <0x0 0x8d000 0x0 0x200>,
> +					<0x0 0x8C000 0x0 0x4>;
> +				reg-names = "nfc", "emmc";
> +				interrupts = <GIC_SPI 87 IRQ_TYPE_EDGE_RISING>;
> +				clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_C>,
> +					<&clkc_pll CLKID_FCLK_DIV2>;
> +				clock-names = "core", "device";
> +				status = "disabled";
> +			};
> +		};
> +
> +		ethmac: ethernet at fdc00000 {
> +			compatible = "amlogic,meson-g12a-dwmac",
> +				     "snps,dwmac-3.70a",
> +				     "snps,dwmac";
> +			reg = <0x0 0xfdc00000 0x0 0x10000>,
> +			      <0x0 0xfe024000 0x0 0x8>;
> +			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "macirq";
> +			power-domains = <&pwrc PWRC_C3_ETH_ID>;
> +			clocks = <&clkc_periphs CLKID_SYS_ETH_MAC>,
> +				 <&clkc_pll CLKID_FCLK_DIV2>,
> +				 <&clkc_pll CLKID_FCLK_50M>;
> +			clock-names = "stmmaceth", "clkin0", "clkin1";
> +			rx-fifo-depth = <4096>;
> +			tx-fifo-depth = <2048>;
> +			status = "disabled";
> +
> +			mdio0: mdio {
> +				compatible = "snps,dwmac-mdio";
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +			};
>   		};
>   	};
>   };
> 

Reviewed-by: Neil Armstrong <neil.armstrong at linaro.org>


From neil.armstrong at linaro.org  Fri Aug 30 01:11:22 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Fri, 30 Aug 2024 10:11:22 +0200
Subject: [PATCH v4 1/3] dt-bindings: clock: fix C3 PLL input parameter
In-Reply-To: <1jplpqsa71.fsf@starbuckisacylon.baylibre.com>
References: <20240830-c3_add_node-v4-0-b56c0511e9dc@amlogic.com>
 <20240830-c3_add_node-v4-1-b56c0511e9dc@amlogic.com>
 <0e74dbc8-88ed-43db-95ef-0fe55d92091d@linaro.org>
 <1jplpqsa71.fsf@starbuckisacylon.baylibre.com>
Message-ID: <79c735ca-008d-497b-bf5b-a21f6dcde796@linaro.org>

On 30/08/2024 10:10, Jerome Brunet wrote:
> On Fri 30 Aug 2024 at 10:00, Neil Armstrong <neil.armstrong at linaro.org> wrote:
> 
>> Hi Jerome,
>>
>> On 30/08/2024 07:26, Xianwei Zhao via B4 Relay wrote:
>>> From: Xianwei Zhao <xianwei.zhao at amlogic.com>
>>> Add C3 PLL controller input clock parameters "fix".
>>> The clock named "fix" was initially implemented in PLL clock controller
>>> driver. However, some registers required secure zone access, so we moved
>>> it to the secure zone (BL31) and accessed it through SCMI. Since the PLL
>>> clock driver needs to use this clock, the "fix" clock is used as an input
>>> source. We updated the driver but forgot to modify the binding accordingly,
>>> so we are adding it here.
>>> It is an ABI break but on a new and immature platform. Noboby could
>>> really
>>> use that platform at this stage, so nothing is going to break on anyone
>>> really.
>>> Fixes: 0e6be855a96d ("dt-bindings: clock: add Amlogic C3 PLL clock
>>> controller")
>>> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>
>>> Signed-off-by: Xianwei Zhao <xianwei.zhao at amlogic.com>
>>> ---
>>>    Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml | 7 +++++--
>>
>> So you mind if I take this one via my arm64-dt tree ?
> 
> There is no conflicting change in my tree so it's fine, yes.

Thanks
Neil

> 
>>
>> Neil
>>
>> <snip>
> 



From neil.armstrong at linaro.org  Fri Aug 30 01:15:00 2024
From: neil.armstrong at linaro.org (Neil Armstrong)
Date: Fri, 30 Aug 2024 10:15:00 +0200
Subject: [PATCH v4 0/3] add some node for amlogic c3
In-Reply-To: <20240830-c3_add_node-v4-0-b56c0511e9dc@amlogic.com>
References: <20240830-c3_add_node-v4-0-b56c0511e9dc@amlogic.com>
Message-ID: <172500570043.143584.9400880712807220818.b4-ty@linaro.org>

Hi,

On Fri, 30 Aug 2024 13:26:07 +0800, Xianwei Zhao wrote:
> Add some node for board AW409 and support board C308l AW419.
> 
> 

Thanks, Applied to https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git (v6.12/arm64-dt)

[1/3] dt-bindings: clock: fix C3 PLL input parameter
      https://git.kernel.org/amlogic/c/4ccba8cb2c5ca573d9bbf366e7d9d5e9761518c0
[2/3] arm64: dts: amlogic: add some device nodes for C3
      https://git.kernel.org/amlogic/c/520b792e83171efc8ec0b004412b44dabc044de0
[3/3] arm64: dts: amlogic: add C3 AW419 board
      https://git.kernel.org/amlogic/c/d4bd8f3023b68f72431e05ec6cbc793519b449cf

These changes has been applied on the intermediate git tree [1].

The v6.12/arm64-dt branch will then be sent via a formal Pull Request to the Linux SoC maintainers
for inclusion in their intermediate git branches in order to be sent to Linus during
the next merge window, or sooner if it's a set of fixes.

In the cases of fixes, those will be merged in the current release candidate
kernel and as soon they appear on the Linux master branch they will be
backported to the previous Stable and Long-Stable kernels [2].

The intermediate git branches are merged daily in the linux-next tree [3],
people are encouraged testing these pre-release kernels and report issues on the
relevant mailing-lists.

If problems are discovered on those changes, please submit a signed-off-by revert
patch followed by a corrective changeset.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git
[2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
[3] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git

-- 
Neil



From abelova at astralinux.ru  Fri Aug 30 01:23:08 2024
From: abelova at astralinux.ru (Anastasia Belova)
Date: Fri, 30 Aug 2024 11:23:08 +0300
Subject: [PATCH] drm/meson: switch to a managed drm device
In-Reply-To: <64ef8b1d-40ab-4c10-b217-58a3e4cbf652@linaro.org>
References: <20240828110421.14956-1-abelova@astralinux.ru>
 <64ef8b1d-40ab-4c10-b217-58a3e4cbf652@linaro.org>
Message-ID: <62972d3a-0703-4ce7-b706-b94e1a740a76@astralinux.ru>

Hi,

29/08/24 15:14, Neil Armstrong ?????:
> Hi,
>
> On 28/08/2024 13:04, Anastasia Belova wrote:
>> Switch to a managed drm device to cleanup some error handling
>> and make future work easier.
>>
>> Fix dereference of NULL in meson_drv_bind_master by removing
>> drm_dev_put(drm) before meson_encoder_*_remove where drm
>> dereferenced.
>
> Please send the fix separately with a Fixes tag.
>

This fix can't be separated from the patch. drm_dev_put may be
removed only while switching to a managed drm. Otherwise
a check could be added before calling meson_encoder_*_remove.
But it would become redundant after switching to a managed drm.

I may send the second version of this patch with Fixes tag, so all
changes could be applied to older versions.

Thanks,
Anastasia Belova

> Thanks,
> Neil
>
>>
>> Co-developed by Linux Verification Center (linuxtesting.org).
>>
>> Signed-off-by: Anastasia Belova <abelova at astralinux.ru>
>> ---
>> ? drivers/gpu/drm/meson/meson_crtc.c???????? | 10 +--
>> ? drivers/gpu/drm/meson/meson_drv.c????????? | 71 ++++++++++------------
>> ? drivers/gpu/drm/meson/meson_drv.h????????? |? 2 +-
>> ? drivers/gpu/drm/meson/meson_encoder_cvbs.c |? 8 +--
>> ? drivers/gpu/drm/meson/meson_overlay.c????? |? 8 +--
>> ? drivers/gpu/drm/meson/meson_plane.c??????? | 10 +--
>> ? 6 files changed, 51 insertions(+), 58 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/meson/meson_crtc.c 
>> b/drivers/gpu/drm/meson/meson_crtc.c
>> index d70616da8ce2..e1c0bf3baeea 100644
>> --- a/drivers/gpu/drm/meson/meson_crtc.c
>> +++ b/drivers/gpu/drm/meson/meson_crtc.c
>> @@ -662,13 +662,13 @@ void meson_crtc_irq(struct meson_drm *priv)
>> ? ????? drm_crtc_handle_vblank(priv->crtc);
>> ? -??? spin_lock_irqsave(&priv->drm->event_lock, flags);
>> +??? spin_lock_irqsave(&priv->drm.event_lock, flags);
>> ????? if (meson_crtc->event) {
>> ????????? drm_crtc_send_vblank_event(priv->crtc, meson_crtc->event);
>> ????????? drm_crtc_vblank_put(priv->crtc);
>> ????????? meson_crtc->event = NULL;
>> ????? }
>> -??? spin_unlock_irqrestore(&priv->drm->event_lock, flags);
>> +??? spin_unlock_irqrestore(&priv->drm.event_lock, flags);
>> ? }
>> ? ? int meson_crtc_create(struct meson_drm *priv)
>> @@ -677,18 +677,18 @@ int meson_crtc_create(struct meson_drm *priv)
>> ????? struct drm_crtc *crtc;
>> ????? int ret;
>> ? -??? meson_crtc = devm_kzalloc(priv->drm->dev, sizeof(*meson_crtc),
>> +??? meson_crtc = devm_kzalloc(priv->drm.dev, sizeof(*meson_crtc),
>> ??????????????????? GFP_KERNEL);
>> ????? if (!meson_crtc)
>> ????????? return -ENOMEM;
>> ? ????? meson_crtc->priv = priv;
>> ????? crtc = &meson_crtc->base;
>> -??? ret = drm_crtc_init_with_planes(priv->drm, crtc,
>> +??? ret = drm_crtc_init_with_planes(&priv->drm, crtc,
>> ????????????????????? priv->primary_plane, NULL,
>> ????????????????????? &meson_crtc_funcs, "meson_crtc");
>> ????? if (ret) {
>> -??????? dev_err(priv->drm->dev, "Failed to init CRTC\n");
>> +??????? dev_err(priv->drm.dev, "Failed to init CRTC\n");
>> ????????? return ret;
>> ????? }
>> ? diff --git a/drivers/gpu/drm/meson/meson_drv.c 
>> b/drivers/gpu/drm/meson/meson_drv.c
>> index 4bd0baa2a4f5..2e7c2e7c7b82 100644
>> --- a/drivers/gpu/drm/meson/meson_drv.c
>> +++ b/drivers/gpu/drm/meson/meson_drv.c
>> @@ -182,7 +182,6 @@ static int meson_drv_bind_master(struct device 
>> *dev, bool has_components)
>> ????? struct platform_device *pdev = to_platform_device(dev);
>> ????? const struct meson_drm_match_data *match;
>> ????? struct meson_drm *priv;
>> -??? struct drm_device *drm;
>> ????? struct resource *res;
>> ????? void __iomem *regs;
>> ????? int ret, i;
>> @@ -197,17 +196,13 @@ static int meson_drv_bind_master(struct device 
>> *dev, bool has_components)
>> ????? if (!match)
>> ????????? return -ENODEV;
>> ? -??? drm = drm_dev_alloc(&meson_driver, dev);
>> -??? if (IS_ERR(drm))
>> -??????? return PTR_ERR(drm);
>> +??? priv = devm_drm_dev_alloc(dev, &meson_driver,
>> +???????????????? struct meson_drm, drm);
>> ? -??? priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
>> -??? if (!priv) {
>> -??????? ret = -ENOMEM;
>> -??????? goto free_drm;
>> -??? }
>> -??? drm->dev_private = priv;
>> -??? priv->drm = drm;
>> +??? if (IS_ERR(priv))
>> +??????? return PTR_ERR(priv);
>> +
>> +??? priv->drm.dev_private = priv;
>> ????? priv->dev = dev;
>> ????? priv->compat = match->compat;
>> ????? priv->afbcd.ops = match->afbcd_ops;
>> @@ -215,7 +210,7 @@ static int meson_drv_bind_master(struct device 
>> *dev, bool has_components)
>> ????? regs = devm_platform_ioremap_resource_byname(pdev, "vpu");
>> ????? if (IS_ERR(regs)) {
>> ????????? ret = PTR_ERR(regs);
>> -??????? goto free_drm;
>> +??????? goto remove_encoders;
>> ????? }
>> ? ????? priv->io_base = regs;
>> @@ -223,13 +218,13 @@ static int meson_drv_bind_master(struct device 
>> *dev, bool has_components)
>> ????? res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi");
>> ????? if (!res) {
>> ????????? ret = -EINVAL;
>> -??????? goto free_drm;
>> +??????? goto remove_encoders;
>> ????? }
>> ????? /* Simply ioremap since it may be a shared register zone */
>> ????? regs = devm_ioremap(dev, res->start, resource_size(res));
>> ????? if (!regs) {
>> ????????? ret = -EADDRNOTAVAIL;
>> -??????? goto free_drm;
>> +??????? goto remove_encoders;
>> ????? }
>> ? ????? priv->hhi = devm_regmap_init_mmio(dev, regs,
>> @@ -237,18 +232,18 @@ static int meson_drv_bind_master(struct device 
>> *dev, bool has_components)
>> ????? if (IS_ERR(priv->hhi)) {
>> ????????? dev_err(&pdev->dev, "Couldn't create the HHI regmap\n");
>> ????????? ret = PTR_ERR(priv->hhi);
>> -??????? goto free_drm;
>> +??????? goto remove_encoders;
>> ????? }
>> ? ????? priv->canvas = meson_canvas_get(dev);
>> ????? if (IS_ERR(priv->canvas)) {
>> ????????? ret = PTR_ERR(priv->canvas);
>> -??????? goto free_drm;
>> +??????? goto remove_encoders;
>> ????? }
>> ? ????? ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1);
>> ????? if (ret)
>> -??????? goto free_drm;
>> +??????? goto remove_encoders;
>> ????? ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0);
>> ????? if (ret)
>> ????????? goto free_canvas_osd1;
>> @@ -261,7 +256,7 @@ static int meson_drv_bind_master(struct device 
>> *dev, bool has_components)
>> ? ????? priv->vsync_irq = platform_get_irq(pdev, 0);
>> ? -??? ret = drm_vblank_init(drm, 1);
>> +??? ret = drm_vblank_init(&priv->drm, 1);
>> ????? if (ret)
>> ????????? goto free_canvas_vd1_2;
>> ? @@ -284,10 +279,10 @@ static int meson_drv_bind_master(struct 
>> device *dev, bool has_components)
>> ????? ret = drmm_mode_config_init(drm);
>> ????? if (ret)
>> ????????? goto free_canvas_vd1_2;
>> -??? drm->mode_config.max_width = 3840;
>> -??? drm->mode_config.max_height = 2160;
>> -??? drm->mode_config.funcs = &meson_mode_config_funcs;
>> -??? drm->mode_config.helper_private??? = &meson_mode_config_helpers;
>> +??? priv->drm.mode_config.max_width = 3840;
>> +??? priv->drm.mode_config.max_height = 2160;
>> +??? priv->drm.mode_config.funcs = &meson_mode_config_funcs;
>> +??? priv->drm.mode_config.helper_private = &meson_mode_config_helpers;
>> ? ????? /* Hardware Initialization */
>> ? @@ -308,9 +303,9 @@ static int meson_drv_bind_master(struct device 
>> *dev, bool has_components)
>> ????????? goto exit_afbcd;
>> ? ????? if (has_components) {
>> -??????? ret = component_bind_all(dev, drm);
>> +??????? ret = component_bind_all(dev, &priv->drm);
>> ????????? if (ret) {
>> -??????????? dev_err(drm->dev, "Couldn't bind all components\n");
>> +??????????? dev_err(priv->drm.dev, "Couldn't bind all components\n");
>> ????????????? /* Do not try to unbind */
>> ????????????? has_components = false;
>> ????????????? goto exit_afbcd;
>> @@ -339,26 +334,26 @@ static int meson_drv_bind_master(struct device 
>> *dev, bool has_components)
>> ????? if (ret)
>> ????????? goto exit_afbcd;
>> ? -??? ret = request_irq(priv->vsync_irq, meson_irq, 0, 
>> drm->driver->name, drm);
>> +??? ret = request_irq(priv->vsync_irq, meson_irq, 0, 
>> priv->drm.driver->name, &priv->drm);
>> ????? if (ret)
>> ????????? goto exit_afbcd;
>> ? -??? drm_mode_config_reset(drm);
>> +??? drm_mode_config_reset(&priv->drm);
>> ? -??? drm_kms_helper_poll_init(drm);
>> +??? drm_kms_helper_poll_init(&priv->drm);
>> ? ????? platform_set_drvdata(pdev, priv);
>> ? -??? ret = drm_dev_register(drm, 0);
>> +??? ret = drm_dev_register(&priv->drm, 0);
>> ????? if (ret)
>> ????????? goto uninstall_irq;
>> ? -??? drm_fbdev_dma_setup(drm, 32);
>> +??? drm_fbdev_dma_setup(&priv->drm, 32);
>> ? ????? return 0;
>> ? ? uninstall_irq:
>> -??? free_irq(priv->vsync_irq, drm);
>> +??? free_irq(priv->vsync_irq, &priv->drm);
>> ? exit_afbcd:
>> ????? if (priv->afbcd.ops)
>> ????????? priv->afbcd.ops->exit(priv);
>> @@ -370,15 +365,14 @@ static int meson_drv_bind_master(struct device 
>> *dev, bool has_components)
>> ????? meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
>> ? free_canvas_osd1:
>> ????? meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
>> -free_drm:
>> -??? drm_dev_put(drm);
>> +remove_encoders:
>> ? ????? meson_encoder_dsi_remove(priv);
>> ????? meson_encoder_hdmi_remove(priv);
>> ????? meson_encoder_cvbs_remove(priv);
>> ? ????? if (has_components)
>> -??????? component_unbind_all(dev, drm);
>> +??????? component_unbind_all(dev, &priv->drm);
>> ? ????? return ret;
>> ? }
>> @@ -391,7 +385,7 @@ static int meson_drv_bind(struct device *dev)
>> ? static void meson_drv_unbind(struct device *dev)
>> ? {
>> ????? struct meson_drm *priv = dev_get_drvdata(dev);
>> -??? struct drm_device *drm = priv->drm;
>> +??? struct drm_device *drm = &priv->drm;
>> ? ????? if (priv->canvas) {
>> ????????? meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
>> @@ -404,7 +398,6 @@ static void meson_drv_unbind(struct device *dev)
>> ????? drm_kms_helper_poll_fini(drm);
>> ????? drm_atomic_helper_shutdown(drm);
>> ????? free_irq(priv->vsync_irq, drm);
>> -??? drm_dev_put(drm);
>> ? ????? meson_encoder_dsi_remove(priv);
>> ????? meson_encoder_hdmi_remove(priv);
>> @@ -428,7 +421,7 @@ static int __maybe_unused 
>> meson_drv_pm_suspend(struct device *dev)
>> ????? if (!priv)
>> ????????? return 0;
>> ? -??? return drm_mode_config_helper_suspend(priv->drm);
>> +??? return drm_mode_config_helper_suspend(&priv->drm);
>> ? }
>> ? ? static int __maybe_unused meson_drv_pm_resume(struct device *dev)
>> @@ -445,7 +438,7 @@ static int __maybe_unused 
>> meson_drv_pm_resume(struct device *dev)
>> ????? if (priv->afbcd.ops)
>> ????????? priv->afbcd.ops->init(priv);
>> ? -??? return drm_mode_config_helper_resume(priv->drm);
>> +??? return drm_mode_config_helper_resume(&priv->drm);
>> ? }
>> ? ? static void meson_drv_shutdown(struct platform_device *pdev)
>> @@ -455,8 +448,8 @@ static void meson_drv_shutdown(struct 
>> platform_device *pdev)
>> ????? if (!priv)
>> ????????? return;
>> ? -??? drm_kms_helper_poll_fini(priv->drm);
>> -??? drm_atomic_helper_shutdown(priv->drm);
>> +??? drm_kms_helper_poll_fini(&priv->drm);
>> +??? drm_atomic_helper_shutdown(&priv->drm);
>> ? }
>> ? ? /*
>> diff --git a/drivers/gpu/drm/meson/meson_drv.h 
>> b/drivers/gpu/drm/meson/meson_drv.h
>> index 3f9345c14f31..c4c6c810cb20 100644
>> --- a/drivers/gpu/drm/meson/meson_drv.h
>> +++ b/drivers/gpu/drm/meson/meson_drv.h
>> @@ -53,7 +53,7 @@ struct meson_drm {
>> ????? u8 canvas_id_vd1_1;
>> ????? u8 canvas_id_vd1_2;
>> ? -??? struct drm_device *drm;
>> +??? struct drm_device drm;
>> ????? struct drm_crtc *crtc;
>> ????? struct drm_plane *primary_plane;
>> ????? struct drm_plane *overlay_plane;
>> diff --git a/drivers/gpu/drm/meson/meson_encoder_cvbs.c 
>> b/drivers/gpu/drm/meson/meson_encoder_cvbs.c
>> index d1191de855d9..ddca22c8c1ff 100644
>> --- a/drivers/gpu/drm/meson/meson_encoder_cvbs.c
>> +++ b/drivers/gpu/drm/meson/meson_encoder_cvbs.c
>> @@ -104,7 +104,7 @@ static int meson_encoder_cvbs_get_modes(struct 
>> drm_bridge *bridge,
>> ????? for (i = 0; i < MESON_CVBS_MODES_COUNT; ++i) {
>> ????????? struct meson_cvbs_mode *meson_mode = &meson_cvbs_modes[i];
>> ? -??????? mode = drm_mode_duplicate(priv->drm, &meson_mode->mode);
>> +??????? mode = drm_mode_duplicate(&priv->drm, &meson_mode->mode);
>> ????????? if (!mode) {
>> ????????????? dev_err(priv->dev, "Failed to create a new display 
>> mode\n");
>> ????????????? return 0;
>> @@ -221,7 +221,7 @@ static const struct drm_bridge_funcs 
>> meson_encoder_cvbs_bridge_funcs = {
>> ? ? int meson_encoder_cvbs_probe(struct meson_drm *priv)
>> ? {
>> -??? struct drm_device *drm = priv->drm;
>> +??? struct drm_device *drm = &priv->drm;
>> ????? struct meson_encoder_cvbs *meson_encoder_cvbs;
>> ????? struct drm_connector *connector;
>> ????? struct device_node *remote;
>> @@ -256,7 +256,7 @@ int meson_encoder_cvbs_probe(struct meson_drm *priv)
>> ????? meson_encoder_cvbs->priv = priv;
>> ? ????? /* Encoder */
>> -??? ret = drm_simple_encoder_init(priv->drm, 
>> &meson_encoder_cvbs->encoder,
>> +??? ret = drm_simple_encoder_init(&priv->drm, 
>> &meson_encoder_cvbs->encoder,
>> ??????????????????????? DRM_MODE_ENCODER_TVDAC);
>> ????? if (ret)
>> ????????? return dev_err_probe(priv->dev, ret,
>> @@ -273,7 +273,7 @@ int meson_encoder_cvbs_probe(struct meson_drm *priv)
>> ????? }
>> ? ????? /* Initialize & attach Bridge Connector */
>> -??? connector = drm_bridge_connector_init(priv->drm, 
>> &meson_encoder_cvbs->encoder);
>> +??? connector = drm_bridge_connector_init(&priv->drm, 
>> &meson_encoder_cvbs->encoder);
>> ????? if (IS_ERR(connector))
>> ????????? return dev_err_probe(priv->dev, PTR_ERR(connector),
>> ?????????????????????? "Unable to create CVBS bridge connector\n");
>> diff --git a/drivers/gpu/drm/meson/meson_overlay.c 
>> b/drivers/gpu/drm/meson/meson_overlay.c
>> index 7f98de38842b..60ee7f758723 100644
>> --- a/drivers/gpu/drm/meson/meson_overlay.c
>> +++ b/drivers/gpu/drm/meson/meson_overlay.c
>> @@ -484,7 +484,7 @@ static void meson_overlay_atomic_update(struct 
>> drm_plane *plane,
>> ? ????? interlace_mode = new_state->crtc->mode.flags & 
>> DRM_MODE_FLAG_INTERLACE;
>> ? -??? spin_lock_irqsave(&priv->drm->event_lock, flags);
>> +??? spin_lock_irqsave(&priv->drm.event_lock, flags);
>> ? ????? if ((fb->modifier & DRM_FORMAT_MOD_AMLOGIC_FBC(0, 0)) ==
>> ????????????????? DRM_FORMAT_MOD_AMLOGIC_FBC(0, 0)) {
>> @@ -717,7 +717,7 @@ static void meson_overlay_atomic_update(struct 
>> drm_plane *plane,
>> ? ????? priv->viu.vd1_enabled = true;
>> ? -??? spin_unlock_irqrestore(&priv->drm->event_lock, flags);
>> +??? spin_unlock_irqrestore(&priv->drm.event_lock, flags);
>> ? ????? DRM_DEBUG_DRIVER("\n");
>> ? }
>> @@ -838,7 +838,7 @@ int meson_overlay_create(struct meson_drm *priv)
>> ? ????? DRM_DEBUG_DRIVER("\n");
>> ? -??? meson_overlay = devm_kzalloc(priv->drm->dev, 
>> sizeof(*meson_overlay),
>> +??? meson_overlay = devm_kzalloc(priv->drm.dev, sizeof(*meson_overlay),
>> ???????????????????? GFP_KERNEL);
>> ????? if (!meson_overlay)
>> ????????? return -ENOMEM;
>> @@ -846,7 +846,7 @@ int meson_overlay_create(struct meson_drm *priv)
>> ????? meson_overlay->priv = priv;
>> ????? plane = &meson_overlay->base;
>> ? -??? drm_universal_plane_init(priv->drm, plane, 0xFF,
>> +??? drm_universal_plane_init(&priv->drm, plane, 0xFF,
>> ?????????????????? &meson_overlay_funcs,
>> ?????????????????? supported_drm_formats,
>> ?????????????????? ARRAY_SIZE(supported_drm_formats),
>> diff --git a/drivers/gpu/drm/meson/meson_plane.c 
>> b/drivers/gpu/drm/meson/meson_plane.c
>> index b43ac61201f3..13be94309bf4 100644
>> --- a/drivers/gpu/drm/meson/meson_plane.c
>> +++ b/drivers/gpu/drm/meson/meson_plane.c
>> @@ -157,7 +157,7 @@ static void meson_plane_atomic_update(struct 
>> drm_plane *plane,
>> ?????? * Update Buffer
>> ?????? * Enable Plane
>> ?????? */
>> -??? spin_lock_irqsave(&priv->drm->event_lock, flags);
>> +??? spin_lock_irqsave(&priv->drm.event_lock, flags);
>> ? ????? /* Check if AFBC decoder is required for this buffer */
>> ????? if ((meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXM) ||
>> @@ -393,7 +393,7 @@ static void meson_plane_atomic_update(struct 
>> drm_plane *plane,
>> ? ????? priv->viu.osd1_enabled = true;
>> ? -??? spin_unlock_irqrestore(&priv->drm->event_lock, flags);
>> +??? spin_unlock_irqrestore(&priv->drm.event_lock, flags);
>> ? }
>> ? ? static void meson_plane_atomic_disable(struct drm_plane *plane,
>> @@ -536,7 +536,7 @@ int meson_plane_create(struct meson_drm *priv)
>> ????? const uint64_t *format_modifiers = format_modifiers_default;
>> ????? int ret;
>> ? -??? meson_plane = devm_kzalloc(priv->drm->dev, sizeof(*meson_plane),
>> +??? meson_plane = devm_kzalloc(priv->drm.dev, sizeof(*meson_plane),
>> ???????????????????? GFP_KERNEL);
>> ????? if (!meson_plane)
>> ????????? return -ENOMEM;
>> @@ -549,14 +549,14 @@ int meson_plane_create(struct meson_drm *priv)
>> ????? else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A))
>> ????????? format_modifiers = format_modifiers_afbc_g12a;
>> ? -??? ret = drm_universal_plane_init(priv->drm, plane, 0xFF,
>> +??? ret = drm_universal_plane_init(&priv->drm, plane, 0xFF,
>> ????????????????????? &meson_plane_funcs,
>> ????????????????????? supported_drm_formats,
>> ????????????????????? ARRAY_SIZE(supported_drm_formats),
>> ????????????????????? format_modifiers,
>> ????????????????????? DRM_PLANE_TYPE_PRIMARY, "meson_primary_plane");
>> ????? if (ret) {
>> -??????? devm_kfree(priv->drm->dev, meson_plane);
>> +??????? devm_kfree(priv->drm.dev, meson_plane);
>> ????????? return ret;
>> ????? }
>



From neil.armstrong at linaro.org  Fri Aug 30 01:29:38 2024
From: neil.armstrong at linaro.org (neil.armstrong at linaro.org)
Date: Fri, 30 Aug 2024 10:29:38 +0200
Subject: [PATCH] drm/meson: switch to a managed drm device
In-Reply-To: <62972d3a-0703-4ce7-b706-b94e1a740a76@astralinux.ru>
References: <20240828110421.14956-1-abelova@astralinux.ru>
 <64ef8b1d-40ab-4c10-b217-58a3e4cbf652@linaro.org>
 <62972d3a-0703-4ce7-b706-b94e1a740a76@astralinux.ru>
Message-ID: <bd0b8d63-f543-480e-85b4-2b8cec178c38@linaro.org>

On 30/08/2024 10:23, Anastasia Belova wrote:
> Hi,
> 
> 29/08/24 15:14, Neil Armstrong ?????:
>> Hi,
>>
>> On 28/08/2024 13:04, Anastasia Belova wrote:
>>> Switch to a managed drm device to cleanup some error handling
>>> and make future work easier.
>>>
>>> Fix dereference of NULL in meson_drv_bind_master by removing
>>> drm_dev_put(drm) before meson_encoder_*_remove where drm
>>> dereferenced.
>>
>> Please send the fix separately with a Fixes tag.
>>
> 
> This fix can't be separated from the patch. drm_dev_put may be
> removed only while switching to a managed drm. Otherwise
> a check could be added before calling meson_encoder_*_remove.
> But it would become redundant after switching to a managed drm.
> 
> I may send the second version of this patch with Fixes tag, so all
> changes could be applied to older versions.

Reading the currenrt code, component_unbind_all(dev, drm) is called
after drm_dev_put(drm), which is quite wrong aswell.

So perhaps we should keep the kref on drm  until component_unbind_all()
is called in the first case, no ?

Neil

> 
> Thanks,
> Anastasia Belova
> 
>> Thanks,
>> Neil
>>
>>>
>>> Co-developed by Linux Verification Center (linuxtesting.org).
>>>
>>> Signed-off-by: Anastasia Belova <abelova at astralinux.ru>
>>> ---
>>> ? drivers/gpu/drm/meson/meson_crtc.c???????? | 10 +--
>>> ? drivers/gpu/drm/meson/meson_drv.c????????? | 71 ++++++++++------------
>>> ? drivers/gpu/drm/meson/meson_drv.h????????? |? 2 +-
>>> ? drivers/gpu/drm/meson/meson_encoder_cvbs.c |? 8 +--
>>> ? drivers/gpu/drm/meson/meson_overlay.c????? |? 8 +--
>>> ? drivers/gpu/drm/meson/meson_plane.c??????? | 10 +--
>>> ? 6 files changed, 51 insertions(+), 58 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/meson/meson_crtc.c b/drivers/gpu/drm/meson/meson_crtc.c
>>> index d70616da8ce2..e1c0bf3baeea 100644
>>> --- a/drivers/gpu/drm/meson/meson_crtc.c
>>> +++ b/drivers/gpu/drm/meson/meson_crtc.c
>>> @@ -662,13 +662,13 @@ void meson_crtc_irq(struct meson_drm *priv)
>>> ? ????? drm_crtc_handle_vblank(priv->crtc);
>>> ? -??? spin_lock_irqsave(&priv->drm->event_lock, flags);
>>> +??? spin_lock_irqsave(&priv->drm.event_lock, flags);
>>> ????? if (meson_crtc->event) {
>>> ????????? drm_crtc_send_vblank_event(priv->crtc, meson_crtc->event);
>>> ????????? drm_crtc_vblank_put(priv->crtc);
>>> ????????? meson_crtc->event = NULL;
>>> ????? }
>>> -??? spin_unlock_irqrestore(&priv->drm->event_lock, flags);
>>> +??? spin_unlock_irqrestore(&priv->drm.event_lock, flags);
>>> ? }
>>> ? ? int meson_crtc_create(struct meson_drm *priv)
>>> @@ -677,18 +677,18 @@ int meson_crtc_create(struct meson_drm *priv)
>>> ????? struct drm_crtc *crtc;
>>> ????? int ret;
>>> ? -??? meson_crtc = devm_kzalloc(priv->drm->dev, sizeof(*meson_crtc),
>>> +??? meson_crtc = devm_kzalloc(priv->drm.dev, sizeof(*meson_crtc),
>>> ??????????????????? GFP_KERNEL);
>>> ????? if (!meson_crtc)
>>> ????????? return -ENOMEM;
>>> ? ????? meson_crtc->priv = priv;
>>> ????? crtc = &meson_crtc->base;
>>> -??? ret = drm_crtc_init_with_planes(priv->drm, crtc,
>>> +??? ret = drm_crtc_init_with_planes(&priv->drm, crtc,
>>> ????????????????????? priv->primary_plane, NULL,
>>> ????????????????????? &meson_crtc_funcs, "meson_crtc");
>>> ????? if (ret) {
>>> -??????? dev_err(priv->drm->dev, "Failed to init CRTC\n");
>>> +??????? dev_err(priv->drm.dev, "Failed to init CRTC\n");
>>> ????????? return ret;
>>> ????? }
>>> ? diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c
>>> index 4bd0baa2a4f5..2e7c2e7c7b82 100644
>>> --- a/drivers/gpu/drm/meson/meson_drv.c
>>> +++ b/drivers/gpu/drm/meson/meson_drv.c
>>> @@ -182,7 +182,6 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
>>> ????? struct platform_device *pdev = to_platform_device(dev);
>>> ????? const struct meson_drm_match_data *match;
>>> ????? struct meson_drm *priv;
>>> -??? struct drm_device *drm;
>>> ????? struct resource *res;
>>> ????? void __iomem *regs;
>>> ????? int ret, i;
>>> @@ -197,17 +196,13 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
>>> ????? if (!match)
>>> ????????? return -ENODEV;
>>> ? -??? drm = drm_dev_alloc(&meson_driver, dev);
>>> -??? if (IS_ERR(drm))
>>> -??????? return PTR_ERR(drm);
>>> +??? priv = devm_drm_dev_alloc(dev, &meson_driver,
>>> +???????????????? struct meson_drm, drm);
>>> ? -??? priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
>>> -??? if (!priv) {
>>> -??????? ret = -ENOMEM;
>>> -??????? goto free_drm;
>>> -??? }
>>> -??? drm->dev_private = priv;
>>> -??? priv->drm = drm;
>>> +??? if (IS_ERR(priv))
>>> +??????? return PTR_ERR(priv);
>>> +
>>> +??? priv->drm.dev_private = priv;
>>> ????? priv->dev = dev;
>>> ????? priv->compat = match->compat;
>>> ????? priv->afbcd.ops = match->afbcd_ops;
>>> @@ -215,7 +210,7 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
>>> ????? regs = devm_platform_ioremap_resource_byname(pdev, "vpu");
>>> ????? if (IS_ERR(regs)) {
>>> ????????? ret = PTR_ERR(regs);
>>> -??????? goto free_drm;
>>> +??????? goto remove_encoders;
>>> ????? }
>>> ? ????? priv->io_base = regs;
>>> @@ -223,13 +218,13 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
>>> ????? res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi");
>>> ????? if (!res) {
>>> ????????? ret = -EINVAL;
>>> -??????? goto free_drm;
>>> +??????? goto remove_encoders;
>>> ????? }
>>> ????? /* Simply ioremap since it may be a shared register zone */
>>> ????? regs = devm_ioremap(dev, res->start, resource_size(res));
>>> ????? if (!regs) {
>>> ????????? ret = -EADDRNOTAVAIL;
>>> -??????? goto free_drm;
>>> +??????? goto remove_encoders;
>>> ????? }
>>> ? ????? priv->hhi = devm_regmap_init_mmio(dev, regs,
>>> @@ -237,18 +232,18 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
>>> ????? if (IS_ERR(priv->hhi)) {
>>> ????????? dev_err(&pdev->dev, "Couldn't create the HHI regmap\n");
>>> ????????? ret = PTR_ERR(priv->hhi);
>>> -??????? goto free_drm;
>>> +??????? goto remove_encoders;
>>> ????? }
>>> ? ????? priv->canvas = meson_canvas_get(dev);
>>> ????? if (IS_ERR(priv->canvas)) {
>>> ????????? ret = PTR_ERR(priv->canvas);
>>> -??????? goto free_drm;
>>> +??????? goto remove_encoders;
>>> ????? }
>>> ? ????? ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1);
>>> ????? if (ret)
>>> -??????? goto free_drm;
>>> +??????? goto remove_encoders;
>>> ????? ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0);
>>> ????? if (ret)
>>> ????????? goto free_canvas_osd1;
>>> @@ -261,7 +256,7 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
>>> ? ????? priv->vsync_irq = platform_get_irq(pdev, 0);
>>> ? -??? ret = drm_vblank_init(drm, 1);
>>> +??? ret = drm_vblank_init(&priv->drm, 1);
>>> ????? if (ret)
>>> ????????? goto free_canvas_vd1_2;
>>> ? @@ -284,10 +279,10 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
>>> ????? ret = drmm_mode_config_init(drm);
>>> ????? if (ret)
>>> ????????? goto free_canvas_vd1_2;
>>> -??? drm->mode_config.max_width = 3840;
>>> -??? drm->mode_config.max_height = 2160;
>>> -??? drm->mode_config.funcs = &meson_mode_config_funcs;
>>> -??? drm->mode_config.helper_private??? = &meson_mode_config_helpers;
>>> +??? priv->drm.mode_config.max_width = 3840;
>>> +??? priv->drm.mode_config.max_height = 2160;
>>> +??? priv->drm.mode_config.funcs = &meson_mode_config_funcs;
>>> +??? priv->drm.mode_config.helper_private = &meson_mode_config_helpers;
>>> ? ????? /* Hardware Initialization */
>>> ? @@ -308,9 +303,9 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
>>> ????????? goto exit_afbcd;
>>> ? ????? if (has_components) {
>>> -??????? ret = component_bind_all(dev, drm);
>>> +??????? ret = component_bind_all(dev, &priv->drm);
>>> ????????? if (ret) {
>>> -??????????? dev_err(drm->dev, "Couldn't bind all components\n");
>>> +??????????? dev_err(priv->drm.dev, "Couldn't bind all components\n");
>>> ????????????? /* Do not try to unbind */
>>> ????????????? has_components = false;
>>> ????????????? goto exit_afbcd;
>>> @@ -339,26 +334,26 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
>>> ????? if (ret)
>>> ????????? goto exit_afbcd;
>>> ? -??? ret = request_irq(priv->vsync_irq, meson_irq, 0, drm->driver->name, drm);
>>> +??? ret = request_irq(priv->vsync_irq, meson_irq, 0, priv->drm.driver->name, &priv->drm);
>>> ????? if (ret)
>>> ????????? goto exit_afbcd;
>>> ? -??? drm_mode_config_reset(drm);
>>> +??? drm_mode_config_reset(&priv->drm);
>>> ? -??? drm_kms_helper_poll_init(drm);
>>> +??? drm_kms_helper_poll_init(&priv->drm);
>>> ? ????? platform_set_drvdata(pdev, priv);
>>> ? -??? ret = drm_dev_register(drm, 0);
>>> +??? ret = drm_dev_register(&priv->drm, 0);
>>> ????? if (ret)
>>> ????????? goto uninstall_irq;
>>> ? -??? drm_fbdev_dma_setup(drm, 32);
>>> +??? drm_fbdev_dma_setup(&priv->drm, 32);
>>> ? ????? return 0;
>>> ? ? uninstall_irq:
>>> -??? free_irq(priv->vsync_irq, drm);
>>> +??? free_irq(priv->vsync_irq, &priv->drm);
>>> ? exit_afbcd:
>>> ????? if (priv->afbcd.ops)
>>> ????????? priv->afbcd.ops->exit(priv);
>>> @@ -370,15 +365,14 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
>>> ????? meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
>>> ? free_canvas_osd1:
>>> ????? meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
>>> -free_drm:
>>> -??? drm_dev_put(drm);
>>> +remove_encoders:
>>> ? ????? meson_encoder_dsi_remove(priv);
>>> ????? meson_encoder_hdmi_remove(priv);
>>> ????? meson_encoder_cvbs_remove(priv);
>>> ? ????? if (has_components)
>>> -??????? component_unbind_all(dev, drm);
>>> +??????? component_unbind_all(dev, &priv->drm);
>>> ? ????? return ret;
>>> ? }
>>> @@ -391,7 +385,7 @@ static int meson_drv_bind(struct device *dev)
>>> ? static void meson_drv_unbind(struct device *dev)
>>> ? {
>>> ????? struct meson_drm *priv = dev_get_drvdata(dev);
>>> -??? struct drm_device *drm = priv->drm;
>>> +??? struct drm_device *drm = &priv->drm;
>>> ? ????? if (priv->canvas) {
>>> ????????? meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
>>> @@ -404,7 +398,6 @@ static void meson_drv_unbind(struct device *dev)
>>> ????? drm_kms_helper_poll_fini(drm);
>>> ????? drm_atomic_helper_shutdown(drm);
>>> ????? free_irq(priv->vsync_irq, drm);
>>> -??? drm_dev_put(drm);
>>> ? ????? meson_encoder_dsi_remove(priv);
>>> ????? meson_encoder_hdmi_remove(priv);
>>> @@ -428,7 +421,7 @@ static int __maybe_unused meson_drv_pm_suspend(struct device *dev)
>>> ????? if (!priv)
>>> ????????? return 0;
>>> ? -??? return drm_mode_config_helper_suspend(priv->drm);
>>> +??? return drm_mode_config_helper_suspend(&priv->drm);
>>> ? }
>>> ? ? static int __maybe_unused meson_drv_pm_resume(struct device *dev)
>>> @@ -445,7 +438,7 @@ static int __maybe_unused meson_drv_pm_resume(struct device *dev)
>>> ????? if (priv->afbcd.ops)
>>> ????????? priv->afbcd.ops->init(priv);
>>> ? -??? return drm_mode_config_helper_resume(priv->drm);
>>> +??? return drm_mode_config_helper_resume(&priv->drm);
>>> ? }
>>> ? ? static void meson_drv_shutdown(struct platform_device *pdev)
>>> @@ -455,8 +448,8 @@ static void meson_drv_shutdown(struct platform_device *pdev)
>>> ????? if (!priv)
>>> ????????? return;
>>> ? -??? drm_kms_helper_poll_fini(priv->drm);
>>> -??? drm_atomic_helper_shutdown(priv->drm);
>>> +??? drm_kms_helper_poll_fini(&priv->drm);
>>> +??? drm_atomic_helper_shutdown(&priv->drm);
>>> ? }
>>> ? ? /*
>>> diff --git a/drivers/gpu/drm/meson/meson_drv.h b/drivers/gpu/drm/meson/meson_drv.h
>>> index 3f9345c14f31..c4c6c810cb20 100644
>>> --- a/drivers/gpu/drm/meson/meson_drv.h
>>> +++ b/drivers/gpu/drm/meson/meson_drv.h
>>> @@ -53,7 +53,7 @@ struct meson_drm {
>>> ????? u8 canvas_id_vd1_1;
>>> ????? u8 canvas_id_vd1_2;
>>> ? -??? struct drm_device *drm;
>>> +??? struct drm_device drm;
>>> ????? struct drm_crtc *crtc;
>>> ????? struct drm_plane *primary_plane;
>>> ????? struct drm_plane *overlay_plane;
>>> diff --git a/drivers/gpu/drm/meson/meson_encoder_cvbs.c b/drivers/gpu/drm/meson/meson_encoder_cvbs.c
>>> index d1191de855d9..ddca22c8c1ff 100644
>>> --- a/drivers/gpu/drm/meson/meson_encoder_cvbs.c
>>> +++ b/drivers/gpu/drm/meson/meson_encoder_cvbs.c
>>> @@ -104,7 +104,7 @@ static int meson_encoder_cvbs_get_modes(struct drm_bridge *bridge,
>>> ????? for (i = 0; i < MESON_CVBS_MODES_COUNT; ++i) {
>>> ????????? struct meson_cvbs_mode *meson_mode = &meson_cvbs_modes[i];
>>> ? -??????? mode = drm_mode_duplicate(priv->drm, &meson_mode->mode);
>>> +??????? mode = drm_mode_duplicate(&priv->drm, &meson_mode->mode);
>>> ????????? if (!mode) {
>>> ????????????? dev_err(priv->dev, "Failed to create a new display mode\n");
>>> ????????????? return 0;
>>> @@ -221,7 +221,7 @@ static const struct drm_bridge_funcs meson_encoder_cvbs_bridge_funcs = {
>>> ? ? int meson_encoder_cvbs_probe(struct meson_drm *priv)
>>> ? {
>>> -??? struct drm_device *drm = priv->drm;
>>> +??? struct drm_device *drm = &priv->drm;
>>> ????? struct meson_encoder_cvbs *meson_encoder_cvbs;
>>> ????? struct drm_connector *connector;
>>> ????? struct device_node *remote;
>>> @@ -256,7 +256,7 @@ int meson_encoder_cvbs_probe(struct meson_drm *priv)
>>> ????? meson_encoder_cvbs->priv = priv;
>>> ? ????? /* Encoder */
>>> -??? ret = drm_simple_encoder_init(priv->drm, &meson_encoder_cvbs->encoder,
>>> +??? ret = drm_simple_encoder_init(&priv->drm, &meson_encoder_cvbs->encoder,
>>> ??????????????????????? DRM_MODE_ENCODER_TVDAC);
>>> ????? if (ret)
>>> ????????? return dev_err_probe(priv->dev, ret,
>>> @@ -273,7 +273,7 @@ int meson_encoder_cvbs_probe(struct meson_drm *priv)
>>> ????? }
>>> ? ????? /* Initialize & attach Bridge Connector */
>>> -??? connector = drm_bridge_connector_init(priv->drm, &meson_encoder_cvbs->encoder);
>>> +??? connector = drm_bridge_connector_init(&priv->drm, &meson_encoder_cvbs->encoder);
>>> ????? if (IS_ERR(connector))
>>> ????????? return dev_err_probe(priv->dev, PTR_ERR(connector),
>>> ?????????????????????? "Unable to create CVBS bridge connector\n");
>>> diff --git a/drivers/gpu/drm/meson/meson_overlay.c b/drivers/gpu/drm/meson/meson_overlay.c
>>> index 7f98de38842b..60ee7f758723 100644
>>> --- a/drivers/gpu/drm/meson/meson_overlay.c
>>> +++ b/drivers/gpu/drm/meson/meson_overlay.c
>>> @@ -484,7 +484,7 @@ static void meson_overlay_atomic_update(struct drm_plane *plane,
>>> ? ????? interlace_mode = new_state->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE;
>>> ? -??? spin_lock_irqsave(&priv->drm->event_lock, flags);
>>> +??? spin_lock_irqsave(&priv->drm.event_lock, flags);
>>> ? ????? if ((fb->modifier & DRM_FORMAT_MOD_AMLOGIC_FBC(0, 0)) ==
>>> ????????????????? DRM_FORMAT_MOD_AMLOGIC_FBC(0, 0)) {
>>> @@ -717,7 +717,7 @@ static void meson_overlay_atomic_update(struct drm_plane *plane,
>>> ? ????? priv->viu.vd1_enabled = true;
>>> ? -??? spin_unlock_irqrestore(&priv->drm->event_lock, flags);
>>> +??? spin_unlock_irqrestore(&priv->drm.event_lock, flags);
>>> ? ????? DRM_DEBUG_DRIVER("\n");
>>> ? }
>>> @@ -838,7 +838,7 @@ int meson_overlay_create(struct meson_drm *priv)
>>> ? ????? DRM_DEBUG_DRIVER("\n");
>>> ? -??? meson_overlay = devm_kzalloc(priv->drm->dev, sizeof(*meson_overlay),
>>> +??? meson_overlay = devm_kzalloc(priv->drm.dev, sizeof(*meson_overlay),
>>> ???????????????????? GFP_KERNEL);
>>> ????? if (!meson_overlay)
>>> ????????? return -ENOMEM;
>>> @@ -846,7 +846,7 @@ int meson_overlay_create(struct meson_drm *priv)
>>> ????? meson_overlay->priv = priv;
>>> ????? plane = &meson_overlay->base;
>>> ? -??? drm_universal_plane_init(priv->drm, plane, 0xFF,
>>> +??? drm_universal_plane_init(&priv->drm, plane, 0xFF,
>>> ?????????????????? &meson_overlay_funcs,
>>> ?????????????????? supported_drm_formats,
>>> ?????????????????? ARRAY_SIZE(supported_drm_formats),
>>> diff --git a/drivers/gpu/drm/meson/meson_plane.c b/drivers/gpu/drm/meson/meson_plane.c
>>> index b43ac61201f3..13be94309bf4 100644
>>> --- a/drivers/gpu/drm/meson/meson_plane.c
>>> +++ b/drivers/gpu/drm/meson/meson_plane.c
>>> @@ -157,7 +157,7 @@ static void meson_plane_atomic_update(struct drm_plane *plane,
>>> ?????? * Update Buffer
>>> ?????? * Enable Plane
>>> ?????? */
>>> -??? spin_lock_irqsave(&priv->drm->event_lock, flags);
>>> +??? spin_lock_irqsave(&priv->drm.event_lock, flags);
>>> ? ????? /* Check if AFBC decoder is required for this buffer */
>>> ????? if ((meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXM) ||
>>> @@ -393,7 +393,7 @@ static void meson_plane_atomic_update(struct drm_plane *plane,
>>> ? ????? priv->viu.osd1_enabled = true;
>>> ? -??? spin_unlock_irqrestore(&priv->drm->event_lock, flags);
>>> +??? spin_unlock_irqrestore(&priv->drm.event_lock, flags);
>>> ? }
>>> ? ? static void meson_plane_atomic_disable(struct drm_plane *plane,
>>> @@ -536,7 +536,7 @@ int meson_plane_create(struct meson_drm *priv)
>>> ????? const uint64_t *format_modifiers = format_modifiers_default;
>>> ????? int ret;
>>> ? -??? meson_plane = devm_kzalloc(priv->drm->dev, sizeof(*meson_plane),
>>> +??? meson_plane = devm_kzalloc(priv->drm.dev, sizeof(*meson_plane),
>>> ???????????????????? GFP_KERNEL);
>>> ????? if (!meson_plane)
>>> ????????? return -ENOMEM;
>>> @@ -549,14 +549,14 @@ int meson_plane_create(struct meson_drm *priv)
>>> ????? else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A))
>>> ????????? format_modifiers = format_modifiers_afbc_g12a;
>>> ? -??? ret = drm_universal_plane_init(priv->drm, plane, 0xFF,
>>> +??? ret = drm_universal_plane_init(&priv->drm, plane, 0xFF,
>>> ????????????????????? &meson_plane_funcs,
>>> ????????????????????? supported_drm_formats,
>>> ????????????????????? ARRAY_SIZE(supported_drm_formats),
>>> ????????????????????? format_modifiers,
>>> ????????????????????? DRM_PLANE_TYPE_PRIMARY, "meson_primary_plane");
>>> ????? if (ret) {
>>> -??????? devm_kfree(priv->drm->dev, meson_plane);
>>> +??????? devm_kfree(priv->drm.dev, meson_plane);
>>> ????????? return ret;
>>> ????? }
>>
> 



From abelova at astralinux.ru  Fri Aug 30 01:47:16 2024
From: abelova at astralinux.ru (Anastasia Belova)
Date: Fri, 30 Aug 2024 11:47:16 +0300
Subject: [PATCH] drm/meson: switch to a managed drm device
In-Reply-To: <bd0b8d63-f543-480e-85b4-2b8cec178c38@linaro.org>
References: <20240828110421.14956-1-abelova@astralinux.ru>
 <64ef8b1d-40ab-4c10-b217-58a3e4cbf652@linaro.org>
 <62972d3a-0703-4ce7-b706-b94e1a740a76@astralinux.ru>
 <bd0b8d63-f543-480e-85b4-2b8cec178c38@linaro.org>
Message-ID: <3603f75a-9004-4091-b2b2-0800b6fce09f@astralinux.ru>

Hi,

30/08/24 11:29, neil.armstrong at linaro.org ?????:
> On 30/08/2024 10:23, Anastasia Belova wrote:
>> Hi,
>>
>> 29/08/24 15:14, Neil Armstrong ?????:
>>> Hi,
>>>
>>> On 28/08/2024 13:04, Anastasia Belova wrote:
>>>> Switch to a managed drm device to cleanup some error handling
>>>> and make future work easier.
>>>>
>>>> Fix dereference of NULL in meson_drv_bind_master by removing
>>>> drm_dev_put(drm) before meson_encoder_*_remove where drm
>>>> dereferenced.
>>>
>>> Please send the fix separately with a Fixes tag.
>>>
>>
>> This fix can't be separated from the patch. drm_dev_put may be
>> removed only while switching to a managed drm. Otherwise
>> a check could be added before calling meson_encoder_*_remove.
>> But it would become redundant after switching to a managed drm.
>>
>> I may send the second version of this patch with Fixes tag, so all
>> changes could be applied to older versions.
>
> Reading the currenrt code, component_unbind_all(dev, drm) is called
> after drm_dev_put(drm), which is quite wrong aswell.
>
> So perhaps we should keep the kref on drm? until component_unbind_all()
> is called in the first case, no ?

Right, but with a managed drm we don't need to release kref ourselves.

The comment for commit is not complete. Information about dereference
of NULL in component_unbind_all may be added in the second version, as
well as Fixes tag.

Anastasia Belova

>
> Neil
>
>>
>> Thanks,
>> Anastasia Belova
>>
>>> Thanks,
>>> Neil
>>>
>>>>
>>>> Co-developed by Linux Verification Center (linuxtesting.org).
>>>>
>>>> Signed-off-by: Anastasia Belova <abelova at astralinux.ru>
>>>> ---
>>>> ? drivers/gpu/drm/meson/meson_crtc.c???????? | 10 +--
>>>> ? drivers/gpu/drm/meson/meson_drv.c????????? | 71 
>>>> ++++++++++------------
>>>> ? drivers/gpu/drm/meson/meson_drv.h????????? |? 2 +-
>>>> ? drivers/gpu/drm/meson/meson_encoder_cvbs.c |? 8 +--
>>>> ? drivers/gpu/drm/meson/meson_overlay.c????? |? 8 +--
>>>> ? drivers/gpu/drm/meson/meson_plane.c??????? | 10 +--
>>>> ? 6 files changed, 51 insertions(+), 58 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/meson/meson_crtc.c 
>>>> b/drivers/gpu/drm/meson/meson_crtc.c
>>>> index d70616da8ce2..e1c0bf3baeea 100644
>>>> --- a/drivers/gpu/drm/meson/meson_crtc.c
>>>> +++ b/drivers/gpu/drm/meson/meson_crtc.c
>>>> @@ -662,13 +662,13 @@ void meson_crtc_irq(struct meson_drm *priv)
>>>> ? ????? drm_crtc_handle_vblank(priv->crtc);
>>>> ? -??? spin_lock_irqsave(&priv->drm->event_lock, flags);
>>>> +??? spin_lock_irqsave(&priv->drm.event_lock, flags);
>>>> ????? if (meson_crtc->event) {
>>>> ????????? drm_crtc_send_vblank_event(priv->crtc, meson_crtc->event);
>>>> ????????? drm_crtc_vblank_put(priv->crtc);
>>>> ????????? meson_crtc->event = NULL;
>>>> ????? }
>>>> - spin_unlock_irqrestore(&priv->drm->event_lock, flags);
>>>> +??? spin_unlock_irqrestore(&priv->drm.event_lock, flags);
>>>> ? }
>>>> ? ? int meson_crtc_create(struct meson_drm *priv)
>>>> @@ -677,18 +677,18 @@ int meson_crtc_create(struct meson_drm *priv)
>>>> ????? struct drm_crtc *crtc;
>>>> ????? int ret;
>>>> ? -??? meson_crtc = devm_kzalloc(priv->drm->dev, sizeof(*meson_crtc),
>>>> +??? meson_crtc = devm_kzalloc(priv->drm.dev, sizeof(*meson_crtc),
>>>> ??????????????????? GFP_KERNEL);
>>>> ????? if (!meson_crtc)
>>>> ????????? return -ENOMEM;
>>>> ? ????? meson_crtc->priv = priv;
>>>> ????? crtc = &meson_crtc->base;
>>>> -??? ret = drm_crtc_init_with_planes(priv->drm, crtc,
>>>> +??? ret = drm_crtc_init_with_planes(&priv->drm, crtc,
>>>> ????????????????????? priv->primary_plane, NULL,
>>>> ????????????????????? &meson_crtc_funcs, "meson_crtc");
>>>> ????? if (ret) {
>>>> -??????? dev_err(priv->drm->dev, "Failed to init CRTC\n");
>>>> +??????? dev_err(priv->drm.dev, "Failed to init CRTC\n");
>>>> ????????? return ret;
>>>> ????? }
>>>> ? diff --git a/drivers/gpu/drm/meson/meson_drv.c 
>>>> b/drivers/gpu/drm/meson/meson_drv.c
>>>> index 4bd0baa2a4f5..2e7c2e7c7b82 100644
>>>> --- a/drivers/gpu/drm/meson/meson_drv.c
>>>> +++ b/drivers/gpu/drm/meson/meson_drv.c
>>>> @@ -182,7 +182,6 @@ static int meson_drv_bind_master(struct device 
>>>> *dev, bool has_components)
>>>> ????? struct platform_device *pdev = to_platform_device(dev);
>>>> ????? const struct meson_drm_match_data *match;
>>>> ????? struct meson_drm *priv;
>>>> -??? struct drm_device *drm;
>>>> ????? struct resource *res;
>>>> ????? void __iomem *regs;
>>>> ????? int ret, i;
>>>> @@ -197,17 +196,13 @@ static int meson_drv_bind_master(struct 
>>>> device *dev, bool has_components)
>>>> ????? if (!match)
>>>> ????????? return -ENODEV;
>>>> ? -??? drm = drm_dev_alloc(&meson_driver, dev);
>>>> -??? if (IS_ERR(drm))
>>>> -??????? return PTR_ERR(drm);
>>>> +??? priv = devm_drm_dev_alloc(dev, &meson_driver,
>>>> +???????????????? struct meson_drm, drm);
>>>> ? -??? priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
>>>> -??? if (!priv) {
>>>> -??????? ret = -ENOMEM;
>>>> -??????? goto free_drm;
>>>> -??? }
>>>> -??? drm->dev_private = priv;
>>>> -??? priv->drm = drm;
>>>> +??? if (IS_ERR(priv))
>>>> +??????? return PTR_ERR(priv);
>>>> +
>>>> +??? priv->drm.dev_private = priv;
>>>> ????? priv->dev = dev;
>>>> ????? priv->compat = match->compat;
>>>> ????? priv->afbcd.ops = match->afbcd_ops;
>>>> @@ -215,7 +210,7 @@ static int meson_drv_bind_master(struct device 
>>>> *dev, bool has_components)
>>>> ????? regs = devm_platform_ioremap_resource_byname(pdev, "vpu");
>>>> ????? if (IS_ERR(regs)) {
>>>> ????????? ret = PTR_ERR(regs);
>>>> -??????? goto free_drm;
>>>> +??????? goto remove_encoders;
>>>> ????? }
>>>> ? ????? priv->io_base = regs;
>>>> @@ -223,13 +218,13 @@ static int meson_drv_bind_master(struct 
>>>> device *dev, bool has_components)
>>>> ????? res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi");
>>>> ????? if (!res) {
>>>> ????????? ret = -EINVAL;
>>>> -??????? goto free_drm;
>>>> +??????? goto remove_encoders;
>>>> ????? }
>>>> ????? /* Simply ioremap since it may be a shared register zone */
>>>> ????? regs = devm_ioremap(dev, res->start, resource_size(res));
>>>> ????? if (!regs) {
>>>> ????????? ret = -EADDRNOTAVAIL;
>>>> -??????? goto free_drm;
>>>> +??????? goto remove_encoders;
>>>> ????? }
>>>> ? ????? priv->hhi = devm_regmap_init_mmio(dev, regs,
>>>> @@ -237,18 +232,18 @@ static int meson_drv_bind_master(struct 
>>>> device *dev, bool has_components)
>>>> ????? if (IS_ERR(priv->hhi)) {
>>>> ????????? dev_err(&pdev->dev, "Couldn't create the HHI regmap\n");
>>>> ????????? ret = PTR_ERR(priv->hhi);
>>>> -??????? goto free_drm;
>>>> +??????? goto remove_encoders;
>>>> ????? }
>>>> ? ????? priv->canvas = meson_canvas_get(dev);
>>>> ????? if (IS_ERR(priv->canvas)) {
>>>> ????????? ret = PTR_ERR(priv->canvas);
>>>> -??????? goto free_drm;
>>>> +??????? goto remove_encoders;
>>>> ????? }
>>>> ? ????? ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1);
>>>> ????? if (ret)
>>>> -??????? goto free_drm;
>>>> +??????? goto remove_encoders;
>>>> ????? ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0);
>>>> ????? if (ret)
>>>> ????????? goto free_canvas_osd1;
>>>> @@ -261,7 +256,7 @@ static int meson_drv_bind_master(struct device 
>>>> *dev, bool has_components)
>>>> ? ????? priv->vsync_irq = platform_get_irq(pdev, 0);
>>>> ? -??? ret = drm_vblank_init(drm, 1);
>>>> +??? ret = drm_vblank_init(&priv->drm, 1);
>>>> ????? if (ret)
>>>> ????????? goto free_canvas_vd1_2;
>>>> ? @@ -284,10 +279,10 @@ static int meson_drv_bind_master(struct 
>>>> device *dev, bool has_components)
>>>> ????? ret = drmm_mode_config_init(drm);
>>>> ????? if (ret)
>>>> ????????? goto free_canvas_vd1_2;
>>>> -??? drm->mode_config.max_width = 3840;
>>>> -??? drm->mode_config.max_height = 2160;
>>>> -??? drm->mode_config.funcs = &meson_mode_config_funcs;
>>>> -??? drm->mode_config.helper_private??? = &meson_mode_config_helpers;
>>>> +??? priv->drm.mode_config.max_width = 3840;
>>>> +??? priv->drm.mode_config.max_height = 2160;
>>>> +??? priv->drm.mode_config.funcs = &meson_mode_config_funcs;
>>>> +??? priv->drm.mode_config.helper_private = 
>>>> &meson_mode_config_helpers;
>>>> ? ????? /* Hardware Initialization */
>>>> ? @@ -308,9 +303,9 @@ static int meson_drv_bind_master(struct 
>>>> device *dev, bool has_components)
>>>> ????????? goto exit_afbcd;
>>>> ? ????? if (has_components) {
>>>> -??????? ret = component_bind_all(dev, drm);
>>>> +??????? ret = component_bind_all(dev, &priv->drm);
>>>> ????????? if (ret) {
>>>> -??????????? dev_err(drm->dev, "Couldn't bind all components\n");
>>>> +??????????? dev_err(priv->drm.dev, "Couldn't bind all components\n");
>>>> ????????????? /* Do not try to unbind */
>>>> ????????????? has_components = false;
>>>> ????????????? goto exit_afbcd;
>>>> @@ -339,26 +334,26 @@ static int meson_drv_bind_master(struct 
>>>> device *dev, bool has_components)
>>>> ????? if (ret)
>>>> ????????? goto exit_afbcd;
>>>> ? -??? ret = request_irq(priv->vsync_irq, meson_irq, 0, 
>>>> drm->driver->name, drm);
>>>> +??? ret = request_irq(priv->vsync_irq, meson_irq, 0, 
>>>> priv->drm.driver->name, &priv->drm);
>>>> ????? if (ret)
>>>> ????????? goto exit_afbcd;
>>>> ? -??? drm_mode_config_reset(drm);
>>>> +??? drm_mode_config_reset(&priv->drm);
>>>> ? -??? drm_kms_helper_poll_init(drm);
>>>> +??? drm_kms_helper_poll_init(&priv->drm);
>>>> ? ????? platform_set_drvdata(pdev, priv);
>>>> ? -??? ret = drm_dev_register(drm, 0);
>>>> +??? ret = drm_dev_register(&priv->drm, 0);
>>>> ????? if (ret)
>>>> ????????? goto uninstall_irq;
>>>> ? -??? drm_fbdev_dma_setup(drm, 32);
>>>> +??? drm_fbdev_dma_setup(&priv->drm, 32);
>>>> ? ????? return 0;
>>>> ? ? uninstall_irq:
>>>> -??? free_irq(priv->vsync_irq, drm);
>>>> +??? free_irq(priv->vsync_irq, &priv->drm);
>>>> ? exit_afbcd:
>>>> ????? if (priv->afbcd.ops)
>>>> ????????? priv->afbcd.ops->exit(priv);
>>>> @@ -370,15 +365,14 @@ static int meson_drv_bind_master(struct 
>>>> device *dev, bool has_components)
>>>> ????? meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
>>>> ? free_canvas_osd1:
>>>> ????? meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
>>>> -free_drm:
>>>> -??? drm_dev_put(drm);
>>>> +remove_encoders:
>>>> ? ????? meson_encoder_dsi_remove(priv);
>>>> ????? meson_encoder_hdmi_remove(priv);
>>>> ????? meson_encoder_cvbs_remove(priv);
>>>> ? ????? if (has_components)
>>>> -??????? component_unbind_all(dev, drm);
>>>> +??????? component_unbind_all(dev, &priv->drm);
>>>> ? ????? return ret;
>>>> ? }
>>>> @@ -391,7 +385,7 @@ static int meson_drv_bind(struct device *dev)
>>>> ? static void meson_drv_unbind(struct device *dev)
>>>> ? {
>>>> ????? struct meson_drm *priv = dev_get_drvdata(dev);
>>>> -??? struct drm_device *drm = priv->drm;
>>>> +??? struct drm_device *drm = &priv->drm;
>>>> ? ????? if (priv->canvas) {
>>>> ????????? meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
>>>> @@ -404,7 +398,6 @@ static void meson_drv_unbind(struct device *dev)
>>>> ????? drm_kms_helper_poll_fini(drm);
>>>> ????? drm_atomic_helper_shutdown(drm);
>>>> ????? free_irq(priv->vsync_irq, drm);
>>>> -??? drm_dev_put(drm);
>>>> ? ????? meson_encoder_dsi_remove(priv);
>>>> ????? meson_encoder_hdmi_remove(priv);
>>>> @@ -428,7 +421,7 @@ static int __maybe_unused 
>>>> meson_drv_pm_suspend(struct device *dev)
>>>> ????? if (!priv)
>>>> ????????? return 0;
>>>> ? -??? return drm_mode_config_helper_suspend(priv->drm);
>>>> +??? return drm_mode_config_helper_suspend(&priv->drm);
>>>> ? }
>>>> ? ? static int __maybe_unused meson_drv_pm_resume(struct device *dev)
>>>> @@ -445,7 +438,7 @@ static int __maybe_unused 
>>>> meson_drv_pm_resume(struct device *dev)
>>>> ????? if (priv->afbcd.ops)
>>>> ????????? priv->afbcd.ops->init(priv);
>>>> ? -??? return drm_mode_config_helper_resume(priv->drm);
>>>> +??? return drm_mode_config_helper_resume(&priv->drm);
>>>> ? }
>>>> ? ? static void meson_drv_shutdown(struct platform_device *pdev)
>>>> @@ -455,8 +448,8 @@ static void meson_drv_shutdown(struct 
>>>> platform_device *pdev)
>>>> ????? if (!priv)
>>>> ????????? return;
>>>> ? -??? drm_kms_helper_poll_fini(priv->drm);
>>>> -??? drm_atomic_helper_shutdown(priv->drm);
>>>> +??? drm_kms_helper_poll_fini(&priv->drm);
>>>> +??? drm_atomic_helper_shutdown(&priv->drm);
>>>> ? }
>>>> ? ? /*
>>>> diff --git a/drivers/gpu/drm/meson/meson_drv.h 
>>>> b/drivers/gpu/drm/meson/meson_drv.h
>>>> index 3f9345c14f31..c4c6c810cb20 100644
>>>> --- a/drivers/gpu/drm/meson/meson_drv.h
>>>> +++ b/drivers/gpu/drm/meson/meson_drv.h
>>>> @@ -53,7 +53,7 @@ struct meson_drm {
>>>> ????? u8 canvas_id_vd1_1;
>>>> ????? u8 canvas_id_vd1_2;
>>>> ? -??? struct drm_device *drm;
>>>> +??? struct drm_device drm;
>>>> ????? struct drm_crtc *crtc;
>>>> ????? struct drm_plane *primary_plane;
>>>> ????? struct drm_plane *overlay_plane;
>>>> diff --git a/drivers/gpu/drm/meson/meson_encoder_cvbs.c 
>>>> b/drivers/gpu/drm/meson/meson_encoder_cvbs.c
>>>> index d1191de855d9..ddca22c8c1ff 100644
>>>> --- a/drivers/gpu/drm/meson/meson_encoder_cvbs.c
>>>> +++ b/drivers/gpu/drm/meson/meson_encoder_cvbs.c
>>>> @@ -104,7 +104,7 @@ static int meson_encoder_cvbs_get_modes(struct 
>>>> drm_bridge *bridge,
>>>> ????? for (i = 0; i < MESON_CVBS_MODES_COUNT; ++i) {
>>>> ????????? struct meson_cvbs_mode *meson_mode = &meson_cvbs_modes[i];
>>>> ? -??????? mode = drm_mode_duplicate(priv->drm, &meson_mode->mode);
>>>> +??????? mode = drm_mode_duplicate(&priv->drm, &meson_mode->mode);
>>>> ????????? if (!mode) {
>>>> ????????????? dev_err(priv->dev, "Failed to create a new display 
>>>> mode\n");
>>>> ????????????? return 0;
>>>> @@ -221,7 +221,7 @@ static const struct drm_bridge_funcs 
>>>> meson_encoder_cvbs_bridge_funcs = {
>>>> ? ? int meson_encoder_cvbs_probe(struct meson_drm *priv)
>>>> ? {
>>>> -??? struct drm_device *drm = priv->drm;
>>>> +??? struct drm_device *drm = &priv->drm;
>>>> ????? struct meson_encoder_cvbs *meson_encoder_cvbs;
>>>> ????? struct drm_connector *connector;
>>>> ????? struct device_node *remote;
>>>> @@ -256,7 +256,7 @@ int meson_encoder_cvbs_probe(struct meson_drm 
>>>> *priv)
>>>> ????? meson_encoder_cvbs->priv = priv;
>>>> ? ????? /* Encoder */
>>>> -??? ret = drm_simple_encoder_init(priv->drm, 
>>>> &meson_encoder_cvbs->encoder,
>>>> +??? ret = drm_simple_encoder_init(&priv->drm, 
>>>> &meson_encoder_cvbs->encoder,
>>>> ??????????????????????? DRM_MODE_ENCODER_TVDAC);
>>>> ????? if (ret)
>>>> ????????? return dev_err_probe(priv->dev, ret,
>>>> @@ -273,7 +273,7 @@ int meson_encoder_cvbs_probe(struct meson_drm 
>>>> *priv)
>>>> ????? }
>>>> ? ????? /* Initialize & attach Bridge Connector */
>>>> -??? connector = drm_bridge_connector_init(priv->drm, 
>>>> &meson_encoder_cvbs->encoder);
>>>> +??? connector = drm_bridge_connector_init(&priv->drm, 
>>>> &meson_encoder_cvbs->encoder);
>>>> ????? if (IS_ERR(connector))
>>>> ????????? return dev_err_probe(priv->dev, PTR_ERR(connector),
>>>> ?????????????????????? "Unable to create CVBS bridge connector\n");
>>>> diff --git a/drivers/gpu/drm/meson/meson_overlay.c 
>>>> b/drivers/gpu/drm/meson/meson_overlay.c
>>>> index 7f98de38842b..60ee7f758723 100644
>>>> --- a/drivers/gpu/drm/meson/meson_overlay.c
>>>> +++ b/drivers/gpu/drm/meson/meson_overlay.c
>>>> @@ -484,7 +484,7 @@ static void meson_overlay_atomic_update(struct 
>>>> drm_plane *plane,
>>>> ? ????? interlace_mode = new_state->crtc->mode.flags & 
>>>> DRM_MODE_FLAG_INTERLACE;
>>>> ? -??? spin_lock_irqsave(&priv->drm->event_lock, flags);
>>>> +??? spin_lock_irqsave(&priv->drm.event_lock, flags);
>>>> ? ????? if ((fb->modifier & DRM_FORMAT_MOD_AMLOGIC_FBC(0, 0)) ==
>>>> ????????????????? DRM_FORMAT_MOD_AMLOGIC_FBC(0, 0)) {
>>>> @@ -717,7 +717,7 @@ static void meson_overlay_atomic_update(struct 
>>>> drm_plane *plane,
>>>> ? ????? priv->viu.vd1_enabled = true;
>>>> ? - spin_unlock_irqrestore(&priv->drm->event_lock, flags);
>>>> +??? spin_unlock_irqrestore(&priv->drm.event_lock, flags);
>>>> ? ????? DRM_DEBUG_DRIVER("\n");
>>>> ? }
>>>> @@ -838,7 +838,7 @@ int meson_overlay_create(struct meson_drm *priv)
>>>> ? ????? DRM_DEBUG_DRIVER("\n");
>>>> ? -??? meson_overlay = devm_kzalloc(priv->drm->dev, 
>>>> sizeof(*meson_overlay),
>>>> +??? meson_overlay = devm_kzalloc(priv->drm.dev, 
>>>> sizeof(*meson_overlay),
>>>> ???????????????????? GFP_KERNEL);
>>>> ????? if (!meson_overlay)
>>>> ????????? return -ENOMEM;
>>>> @@ -846,7 +846,7 @@ int meson_overlay_create(struct meson_drm *priv)
>>>> ????? meson_overlay->priv = priv;
>>>> ????? plane = &meson_overlay->base;
>>>> ? -??? drm_universal_plane_init(priv->drm, plane, 0xFF,
>>>> +??? drm_universal_plane_init(&priv->drm, plane, 0xFF,
>>>> ?????????????????? &meson_overlay_funcs,
>>>> ?????????????????? supported_drm_formats,
>>>> ?????????????????? ARRAY_SIZE(supported_drm_formats),
>>>> diff --git a/drivers/gpu/drm/meson/meson_plane.c 
>>>> b/drivers/gpu/drm/meson/meson_plane.c
>>>> index b43ac61201f3..13be94309bf4 100644
>>>> --- a/drivers/gpu/drm/meson/meson_plane.c
>>>> +++ b/drivers/gpu/drm/meson/meson_plane.c
>>>> @@ -157,7 +157,7 @@ static void meson_plane_atomic_update(struct 
>>>> drm_plane *plane,
>>>> ?????? * Update Buffer
>>>> ?????? * Enable Plane
>>>> ?????? */
>>>> -??? spin_lock_irqsave(&priv->drm->event_lock, flags);
>>>> +??? spin_lock_irqsave(&priv->drm.event_lock, flags);
>>>> ? ????? /* Check if AFBC decoder is required for this buffer */
>>>> ????? if ((meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXM) ||
>>>> @@ -393,7 +393,7 @@ static void meson_plane_atomic_update(struct 
>>>> drm_plane *plane,
>>>> ? ????? priv->viu.osd1_enabled = true;
>>>> ? - spin_unlock_irqrestore(&priv->drm->event_lock, flags);
>>>> +??? spin_unlock_irqrestore(&priv->drm.event_lock, flags);
>>>> ? }
>>>> ? ? static void meson_plane_atomic_disable(struct drm_plane *plane,
>>>> @@ -536,7 +536,7 @@ int meson_plane_create(struct meson_drm *priv)
>>>> ????? const uint64_t *format_modifiers = format_modifiers_default;
>>>> ????? int ret;
>>>> ? -??? meson_plane = devm_kzalloc(priv->drm->dev, 
>>>> sizeof(*meson_plane),
>>>> +??? meson_plane = devm_kzalloc(priv->drm.dev, sizeof(*meson_plane),
>>>> ???????????????????? GFP_KERNEL);
>>>> ????? if (!meson_plane)
>>>> ????????? return -ENOMEM;
>>>> @@ -549,14 +549,14 @@ int meson_plane_create(struct meson_drm *priv)
>>>> ????? else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A))
>>>> ????????? format_modifiers = format_modifiers_afbc_g12a;
>>>> ? -??? ret = drm_universal_plane_init(priv->drm, plane, 0xFF,
>>>> +??? ret = drm_universal_plane_init(&priv->drm, plane, 0xFF,
>>>> ????????????????????? &meson_plane_funcs,
>>>> ????????????????????? supported_drm_formats,
>>>> ????????????????????? ARRAY_SIZE(supported_drm_formats),
>>>> ????????????????????? format_modifiers,
>>>> ????????????????????? DRM_PLANE_TYPE_PRIMARY, "meson_primary_plane");
>>>> ????? if (ret) {
>>>> -??????? devm_kfree(priv->drm->dev, meson_plane);
>>>> +??????? devm_kfree(priv->drm.dev, meson_plane);
>>>> ????????? return ret;
>>>> ????? }
>>>
>>
>



From herbert at gondor.apana.org.au  Fri Aug 30 03:36:24 2024
From: herbert at gondor.apana.org.au (Herbert Xu)
Date: Fri, 30 Aug 2024 18:36:24 +0800
Subject: [PATCH -next 0/6] Cleanup unused function declarations
In-Reply-To: <20240820082525.259337-1-yuehaibing@huawei.com>
References: <20240820082525.259337-1-yuehaibing@huawei.com>
Message-ID: <ZtGgqISfvQNdt0fN@gondor.apana.org.au>

On Tue, Aug 20, 2024 at 04:25:19PM +0800, Yue Haibing wrote:
> Cleanup unused declarations for crypto driver subsystem.
> 
> Yue Haibing (6):
>   crypto: safexcel - Remove unused declaration
>     safexcel_ring_first_rptr()
>   crypto: sl3516 - Remove unused declaration sl3516_ce_enqueue()
>   crypto: octeontx - Remove unused declaration otx_cpt_callback()
>   crypto: ccp - Remove unused declaration sp_get_master()
>   crypto: amlogic - Remove unused declaration meson_enqueue()
>   crypto: crypto4xx - Remove unused declaration crypto4xx_free_ctx()
> 
>  drivers/crypto/amcc/crypto4xx_core.h             | 1 -
>  drivers/crypto/amlogic/amlogic-gxl.h             | 2 --
>  drivers/crypto/ccp/sp-dev.h                      | 1 -
>  drivers/crypto/gemini/sl3516-ce.h                | 2 --
>  drivers/crypto/inside-secure/safexcel.h          | 1 -
>  drivers/crypto/marvell/octeontx/otx_cptvf_algs.h | 1 -
>  6 files changed, 8 deletions(-)
> 
> -- 
> 2.34.1

All applied.  Thanks.
-- 
Email: Herbert Xu <herbert at gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt


From chenyufan at vivo.com  Fri Aug 30 03:42:00 2024
From: chenyufan at vivo.com (Chen Yufan)
Date: Fri, 30 Aug 2024 18:42:00 +0800
Subject: [PATCH v2] clk: meson: axg-audio: Use dev_err_probe() to simplfy code
Message-ID: <20240830104200.20519-1-chenyufan@vivo.com>

Use dev_err_probe() can make code a bit simpler.

Signed-off-by: Chen Yufan <chenyufan at vivo.com>
---
The modifications made compared to the previous version are as follows:
1. Change missing dev_err() to dev_err_probe().
2. Remove the extra "%ld" in "dev_err_probe
(dev, PTR_ERR(map), "failed to init regmap: %ld\n")".
---
 drivers/clk/meson/axg-audio.c | 18 ++++++------------
 1 file changed, 6 insertions(+), 12 deletions(-)

diff --git a/drivers/clk/meson/axg-audio.c b/drivers/clk/meson/axg-audio.c
index e03a5bf899c0..c3d2d483c61b 100644
--- a/drivers/clk/meson/axg-audio.c
+++ b/drivers/clk/meson/axg-audio.c
@@ -1761,10 +1761,8 @@ static int axg_audio_clkc_probe(struct platform_device *pdev)
 		return PTR_ERR(regs);
 
 	map = devm_regmap_init_mmio(dev, regs, &axg_audio_regmap_cfg);
-	if (IS_ERR(map)) {
-		dev_err(dev, "failed to init regmap: %ld\n", PTR_ERR(map));
-		return PTR_ERR(map);
-	}
+	if (IS_ERR(map))
+		return dev_err_probe(dev, PTR_ERR(map), "failed to init regmap\n");
 
 	/* Get the mandatory peripheral clock */
 	clk = devm_clk_get_enabled(dev, "pclk");
@@ -1772,10 +1770,8 @@ static int axg_audio_clkc_probe(struct platform_device *pdev)
 		return PTR_ERR(clk);
 
 	ret = device_reset(dev);
-	if (ret) {
-		dev_err_probe(dev, ret, "failed to reset device\n");
-		return ret;
-	}
+	if (ret)
+		return dev_err_probe(dev, ret, "failed to reset device\n");
 
 	/* Populate regmap for the regmap backed clocks */
 	for (i = 0; i < data->regmap_clk_num; i++)
@@ -1793,10 +1789,8 @@ static int axg_audio_clkc_probe(struct platform_device *pdev)
 		name = hw->init->name;
 
 		ret = devm_clk_hw_register(dev, hw);
-		if (ret) {
-			dev_err(dev, "failed to register clock %s\n", name);
-			return ret;
-		}
+		if (ret)
+			return dev_err_probe(dev, ret, "failed to register clock %s\n", name);
 	}
 
 	ret = devm_of_clk_add_hw_provider(dev, meson_clk_hw_get, (void *)&data->hw_clks);
-- 
2.39.0



From broonie at kernel.org  Fri Aug 30 06:25:57 2024
From: broonie at kernel.org (Mark Brown)
Date: Fri, 30 Aug 2024 14:25:57 +0100
Subject: (subset) [PATCH v2 0/3] ASoC: dt-bindings:
 amlogic-sound-cards: document clocks property
In-Reply-To: <20240828-topic-amlogic-upstream-bindings-fixes-audio-snd-card-v2-0-58159abf0779@linaro.org>
References: <20240828-topic-amlogic-upstream-bindings-fixes-audio-snd-card-v2-0-58159abf0779@linaro.org>
Message-ID: <172502435719.145062.8812088921353096920.b4-ty@kernel.org>

On Wed, 28 Aug 2024 15:53:53 +0200, Neil Armstrong wrote:
> Following an off-list discution with Jerome about fixing the following
> DTBs check errors:
>     sound: Unevaluated properties are not allowed ('assigned-clock-parents', 'assigned-clock-rates', 'assigned-clocks' were unexpected)
>         from schema $id: http://devicetree.org/schemas/sound/amlogic,axg-sound-card.yaml#
>     sound: Unevaluated properties are not allowed ('assigned-clock-parents', 'assigned-clock-rates', 'assigned-clocks' were unexpected)
>         from schema $id: http://devicetree.org/schemas/sound/amlogic,gx-sound-card.yaml#
>     sound: 'anyOf' conditional failed, one must be fixed:
>         'clocks' is a required property
>         '#clock-cells' is a required property
>         from schema $id: http://devicetree.org/schemas/clock/clock.yaml#
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next

Thanks!

[1/3] ASoC: dt-bindings: amlogic,axg-sound-card: document clocks property
      commit: 4b1d9019b26fd654ebc2d0d2e100ed56ef1821f0
[2/3] ASoC: dt-bindings: amlogic,gx-sound-card: document clocks property
      commit: f189c972f86b00318cf2547b62e461cb98374e34

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark



From jbrunet at baylibre.com  Fri Aug 30 07:36:18 2024
From: jbrunet at baylibre.com (Jerome Brunet)
Date: Fri, 30 Aug 2024 16:36:18 +0200
Subject: [GIT PULL] clk: meson: amlogic clock updates for v6.12 
Message-ID: <1jjzfyrsbh.fsf@starbuckisacylon.baylibre.com>


Hi Stephen,

Here is the Amlogic clock update for v6.12.
Nothing out of the ordinary: adding some clocks and bit of clean-up.
The only notable change might be the use symbol namespace for exported
symbols specific to Amlogic clocks. Those won't pollute the global
namespace anymore and will not be accessible to other modules that have
reason to use them.

Please pull.
Cheers

Jerome

The following changes since commit 8400291e289ee6b2bf9779ff1c83a291501f017b:

  Linux 6.11-rc1 (2024-07-28 14:19:55 -0700)

are available in the Git repository at:

  https://github.com/BayLibre/clk-meson.git tags/clk-meson-v6.12-1

for you to fetch changes up to adac147c6a32e2919cb04555387e12e738991a19:

  clk: meson: introduce symbol namespace for amlogic clocks (2024-07-29 16:47:33 +0200)

----------------------------------------------------------------
Amlogic clock changes for v6.12

* Constify some structs clean-up
* Add SM1 eARC clocks
* Introduce a symbol namespace for Amlogic clock specific symbols

----------------------------------------------------------------
Javier Carrasco (6):
      clk: meson: a1: peripherals: Constify struct regmap_config
      clk: meson: a1: pll: Constify struct regmap_config
      clk: meson: c3: peripherals: Constify struct regmap_config
      clk: meson: c3: pll: Constify struct regmap_config
      clk: meson: s4: peripherals: Constify struct regmap_config
      clk: meson: s4: pll: Constify struct regmap_config

Jerome Brunet (6):
      Merge tag 'v6.11-rc1' into clk-meson-next
      dt-bindings: clock: axg-audio: add earcrx clock ids
      Merge branch 'v6.12/bindings' into clk-meson-next
      clk: meson: axg-audio: setup regmap max_register based on the SoC
      clk: meson: axg-audio: add sm1 earcrx clocks
      clk: meson: introduce symbol namespace for amlogic clocks

 drivers/clk/meson/a1-peripherals.c         |  3 ++-
 drivers/clk/meson/a1-pll.c                 |  3 ++-
 drivers/clk/meson/axg-aoclk.c              |  1 +
 drivers/clk/meson/axg-audio.c              | 39 ++++++++++++++++++++++++++++--
 drivers/clk/meson/axg-audio.h              |  2 ++
 drivers/clk/meson/axg.c                    |  1 +
 drivers/clk/meson/c3-peripherals.c         |  3 ++-
 drivers/clk/meson/c3-pll.c                 |  3 ++-
 drivers/clk/meson/clk-cpu-dyndiv.c         |  3 ++-
 drivers/clk/meson/clk-dualdiv.c            |  5 ++--
 drivers/clk/meson/clk-mpll.c               |  5 ++--
 drivers/clk/meson/clk-phase.c              |  8 +++---
 drivers/clk/meson/clk-pll.c                |  7 +++---
 drivers/clk/meson/clk-regmap.c             | 13 +++++-----
 drivers/clk/meson/g12a-aoclk.c             |  1 +
 drivers/clk/meson/g12a.c                   |  1 +
 drivers/clk/meson/gxbb-aoclk.c             |  1 +
 drivers/clk/meson/gxbb.c                   |  1 +
 drivers/clk/meson/meson-aoclk.c            |  3 ++-
 drivers/clk/meson/meson-clkc-utils.c       |  3 ++-
 drivers/clk/meson/meson-eeclk.c            |  3 ++-
 drivers/clk/meson/s4-peripherals.c         |  3 ++-
 drivers/clk/meson/s4-pll.c                 |  3 ++-
 drivers/clk/meson/sclk-div.c               |  3 ++-
 drivers/clk/meson/vclk.c                   |  5 ++--
 drivers/clk/meson/vid-pll-div.c            |  3 ++-
 include/dt-bindings/clock/axg-audio-clkc.h |  7 ++++++
 27 files changed, 100 insertions(+), 33 deletions(-)


From jbrunet at baylibre.com  Fri Aug 30 07:46:44 2024
From: jbrunet at baylibre.com (Jerome Brunet)
Date: Fri, 30 Aug 2024 16:46:44 +0200
Subject: [PATCH v1] clk: meson: axg-audio: Use dev_err_probe() to
 simplfy code
In-Reply-To: <20240830080103.12811-1-chenyufan@vivo.com> (Chen Yufan's message
	of "Fri, 30 Aug 2024 16:01:03 +0800")
References: <20240830080103.12811-1-chenyufan@vivo.com>
Message-ID: <1jfrqmrru3.fsf@starbuckisacylon.baylibre.com>

On Fri 30 Aug 2024 at 16:01, Chen Yufan <chenyufan at vivo.com> wrote:

> Use dev_err_probe() can make code a bit simpler.

It surely does but ...

>
> Signed-off-by: Chen Yufan <chenyufan at vivo.com>
> ---
>  drivers/clk/meson/axg-audio.c | 12 ++++--------

Why this driver alone ?

I have nothing against the change you are doing but I would not want to get a
single patch for each and every amlogic clock drivers.

>  1 file changed, 4 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/clk/meson/axg-audio.c b/drivers/clk/meson/axg-audio.c
> index e03a5bf899c0..0637b05a4c89 100644
> --- a/drivers/clk/meson/axg-audio.c
> +++ b/drivers/clk/meson/axg-audio.c
> @@ -1761,10 +1761,8 @@ static int axg_audio_clkc_probe(struct platform_device *pdev)
>  		return PTR_ERR(regs);
>  
>  	map = devm_regmap_init_mmio(dev, regs, &axg_audio_regmap_cfg);
> -	if (IS_ERR(map)) {
> -		dev_err(dev, "failed to init regmap: %ld\n", PTR_ERR(map));
> -		return PTR_ERR(map);
> -	}
> +	if (IS_ERR(map))
> +		return dev_err_probe(dev, PTR_ERR(map), "failed to init regmap: %ld\n");

This does not inspire a lot of confidence. Did you perfom any test
before sending this ?

I know you sent a v2 fixing this, but still ...

>  
>  	/* Get the mandatory peripheral clock */
>  	clk = devm_clk_get_enabled(dev, "pclk");
> @@ -1772,10 +1770,8 @@ static int axg_audio_clkc_probe(struct platform_device *pdev)
>  		return PTR_ERR(clk);
>  
>  	ret = device_reset(dev);
> -	if (ret) {
> -		dev_err_probe(dev, ret, "failed to reset device\n");
> -		return ret;
> -	}
> +	if (ret)
> +		return dev_err_probe(dev, ret, "failed to reset device\n");
>  
>  	/* Populate regmap for the regmap backed clocks */
>  	for (i = 0; i < data->regmap_clk_num; i++)

Finally, it does not apply on my tree.
Check the PR sent to Stephen, you'll get all the details.

https://lore.kernel.org/linux-clk/1jjzfyrsbh.fsf at starbuckisacylon.baylibre.com/

-- 
Jerome


From krzk at kernel.org  Fri Aug 30 10:46:33 2024
From: krzk at kernel.org (Krzysztof Kozlowski)
Date: Fri, 30 Aug 2024 19:46:33 +0200
Subject: [PATCH v1] clk: meson: axg-audio: Use dev_err_probe() to simplfy
 code
In-Reply-To: <1jfrqmrru3.fsf@starbuckisacylon.baylibre.com>
References: <20240830080103.12811-1-chenyufan@vivo.com>
 <1jfrqmrru3.fsf@starbuckisacylon.baylibre.com>
Message-ID: <1cb1589f-221a-4fee-b7c4-2556e2c14335@kernel.org>

On 30/08/2024 16:46, Jerome Brunet wrote:
> On Fri 30 Aug 2024 at 16:01, Chen Yufan <chenyufan at vivo.com> wrote:
> 
>> Use dev_err_probe() can make code a bit simpler.
> 
> It surely does but ...
> 
>>
>> Signed-off-by: Chen Yufan <chenyufan at vivo.com>
>> ---
>>  drivers/clk/meson/axg-audio.c | 12 ++++--------
> 
> Why this driver alone ?
> 
> I have nothing against the change you are doing but I would not want to get a
> single patch for each and every amlogic clock drivers.
> 

Look here:
https://lore.kernel.org/all/?q=f:@vivo.com
There is a like a flood of trivial patches started last two weeks. Not
sure if there is any coordination, any oversight or review. Few trivial
ones were introducing bugs, so I suggest caution.

Best regards,
Krzysztof



From helen.koike at collabora.com  Tue Aug 27 13:27:58 2024
From: helen.koike at collabora.com (Helen Mae Koike Fornazier)
Date: Tue, 27 Aug 2024 17:27:58 -0300
Subject: [PATCH v1] drm/ci: increase timeout for all jobs
In-Reply-To: <20240820070818.1124403-1-vignesh.raman@collabora.com>
References: <20240820070818.1124403-1-vignesh.raman@collabora.com>
Message-ID: <1919586153a.1236d9a3a2810380.346109493548527669@collabora.com>





---- On Tue, 20 Aug 2024 04:08:16 -0300 Vignesh Raman  wrote ---

 > Set the timeout of all drm-ci jobs to 1h30m since 
 > some jobs takes more than 1 hour to complete. 
 >  
 > Signed-off-by: Vignesh Raman vignesh.raman at collabora.com> 

Acked-by: Helen Koike <helen.koike at collabora.com>

Thanks
Helen

 > --- 
 >  drivers/gpu/drm/ci/test.yml | 5 ++++- 
 >  1 file changed, 4 insertions(+), 1 deletion(-) 
 >  
 > diff --git a/drivers/gpu/drm/ci/test.yml b/drivers/gpu/drm/ci/test.yml 
 > index b6f428cdaf94..09d8447840e9 100644 
 > --- a/drivers/gpu/drm/ci/test.yml 
 > +++ b/drivers/gpu/drm/ci/test.yml 
 > @@ -10,6 +10,7 @@ 
 >  .lava-test: 
 >  extends: 
 >  - .test-rules 
 > +  timeout: "1h30m" 
 >  script: 
 >  # Note: Build dir (and thus install) may be dirty due to GIT_STRATEGY 
 >  - rm -rf install 
 > @@ -71,6 +72,7 @@ 
 >  - .baremetal-test-arm64 
 >  - .use-debian/baremetal_arm64_test 
 >  - .test-rules 
 > +  timeout: "1h30m" 
 >  variables: 
 >  FDO_CI_CONCURRENT: 10 
 >  HWCI_TEST_SCRIPT: "/install/igt_runner.sh" 
 > @@ -215,7 +217,6 @@ panfrost:rk3399: 
 >  extends: 
 >  - .lava-igt:x86_64 
 >  stage: i915 
 > -  timeout: "1h30m" 
 >  variables: 
 >  DRIVER_NAME: i915 
 >  DTB: "" 
 > @@ -414,6 +415,7 @@ panfrost:g12b: 
 >  
 >  virtio_gpu:none: 
 >  stage: software-driver 
 > +  timeout: "1h30m" 
 >  variables: 
 >  CROSVM_GALLIUM_DRIVER: llvmpipe 
 >  DRIVER_NAME: virtio_gpu 
 > @@ -436,6 +438,7 @@ virtio_gpu:none: 
 >  
 >  vkms:none: 
 >  stage: software-driver 
 > +  timeout: "1h30m" 
 >  variables: 
 >  DRIVER_NAME: vkms 
 >  GPU_VERSION: none 
 > -- 
 > 2.43.0 
 >  
 > 


From helen.koike at collabora.com  Wed Aug 28 08:23:00 2024
From: helen.koike at collabora.com (Helen Mae Koike Fornazier)
Date: Wed, 28 Aug 2024 12:23:00 -0300
Subject: [PATCH v1] drm/ci: increase timeout for all jobs
In-Reply-To: <CAF6AEGu-T4=3jPRcnq3BFBtfb_yhmWE2b8EgxgTm5Q0bqSv04Q@mail.gmail.com>
References: <20240820070818.1124403-1-vignesh.raman@collabora.com> <CAF6AEGu-T4=3jPRcnq3BFBtfb_yhmWE2b8EgxgTm5Q0bqSv04Q@mail.gmail.com>
Message-ID: <19199953cbf.ded17a68157355.1209172729493560159@collabora.com>





---- On Tue, 27 Aug 2024 19:04:42 -0300 Rob Clark  wrote ---

 > On Tue, Aug 20, 2024 at 12:09?AM Vignesh Raman 
 > vignesh.raman at collabora.com> wrote: 
 > > 
 > > Set the timeout of all drm-ci jobs to 1h30m since 
 > > some jobs takes more than 1 hour to complete. 
 > > 
 > > Signed-off-by: Vignesh Raman vignesh.raman at collabora.com> 
 >  
 > Acked-by: Rob Clark robdclark at gmail.com> 

Applied to drm-misc-next.

Thanks
Helen

 >  
 > > --- 
 > >  drivers/gpu/drm/ci/test.yml | 5 ++++- 
 > >  1 file changed, 4 insertions(+), 1 deletion(-) 
 > > 
 > > diff --git a/drivers/gpu/drm/ci/test.yml b/drivers/gpu/drm/ci/test.yml 
 > > index b6f428cdaf94..09d8447840e9 100644 
 > > --- a/drivers/gpu/drm/ci/test.yml 
 > > +++ b/drivers/gpu/drm/ci/test.yml 
 > > @@ -10,6 +10,7 @@ 
 > >  .lava-test: 
 > >    extends: 
 > >      - .test-rules 
 > > +  timeout: "1h30m" 
 > >    script: 
 > >      # Note: Build dir (and thus install) may be dirty due to GIT_STRATEGY 
 > >      - rm -rf install 
 > > @@ -71,6 +72,7 @@ 
 > >      - .baremetal-test-arm64 
 > >      - .use-debian/baremetal_arm64_test 
 > >      - .test-rules 
 > > +  timeout: "1h30m" 
 > >    variables: 
 > >      FDO_CI_CONCURRENT: 10 
 > >      HWCI_TEST_SCRIPT: "/install/igt_runner.sh" 
 > > @@ -215,7 +217,6 @@ panfrost:rk3399: 
 > >    extends: 
 > >      - .lava-igt:x86_64 
 > >    stage: i915 
 > > -  timeout: "1h30m" 
 > >    variables: 
 > >      DRIVER_NAME: i915 
 > >      DTB: "" 
 > > @@ -414,6 +415,7 @@ panfrost:g12b: 
 > > 
 > >  virtio_gpu:none: 
 > >    stage: software-driver 
 > > +  timeout: "1h30m" 
 > >    variables: 
 > >      CROSVM_GALLIUM_DRIVER: llvmpipe 
 > >      DRIVER_NAME: virtio_gpu 
 > > @@ -436,6 +438,7 @@ virtio_gpu:none: 
 > > 
 > >  vkms:none: 
 > >    stage: software-driver 
 > > +  timeout: "1h30m" 
 > >    variables: 
 > >      DRIVER_NAME: vkms 
 > >      GPU_VERSION: none 
 > > -- 
 > > 2.43.0 
 > > 
 > 


