[RFC PATCH v5 2/6] mtd: rawnand: meson: wait for command in polling mode
Liang Yang
liang.yang at amlogic.com
Mon Jun 5 06:19:49 PDT 2023
Hi Miquel and Arseniy,
On 2023/6/5 17:05, Miquel Raynal wrote:
> [ EXTERNAL EMAIL ]
>
> Hi Arseniy,
>
>>>> @@ -1412,6 +1419,8 @@ static int meson_nfc_probe(struct platform_device *pdev)
>>>> return ret;
>>>> }
>>>>
>>>> + nfc->use_polling = of_property_read_bool(dev->of_node, "polling");
>>>
>>> This is a problem. You cannot add a polling property like that.
>>>
>>> There is already a nand-rb property which is supposed to carry how are
>>> wired the RB lines. I don't see any in-tree users of the compatibles, I
>>> don't know how acceptable it is to consider using soft fallback when
>>> this property is missing, otherwise take the values of the rb lines
>>> provided in the DT and user hardware control, but I would definitely
>>> prefer that.
>>
>> I see. So i need to implement processing of this property here? And if it
>> is missed -> use software waiting. I think interesting thing will be that:
>>
>> 1) Even with support of this property here, I really don't know how to pass
>> RB values to this controller - I just have define for RB command and that's
>> it. I found that this property is an array of u32 - IIUC each element is
>> RB pin per chip. May be i need to dive into the old vendor's driver to find
>> how to use RB values (although this driver uses software waiting so I'm not
>> sure that I'll find something in it).
>
> Liang, can you please give use the relevant information here? How do we
> target RB0 and RB1? It seems like you use the CS as only information
> like if the RB lines where hardwired internally to a CS. Can we invert
> the lines with a specific configuration?
Controllor has only one external RB pinmux (NAND_RB0). all the RB pins
of different CEs need to be bound into one wire and connect with
NAND_RB0 if want to use controller polling rb. the current operating
CE of NAND is decided to "chip_select", of course controller internally
has different nfc commands to regconize which Ce's RB signal is polling.
<&nand_pins> in dts/yaml should include the NAND_RB0 if hardware
connects, or use software polling here.
@Arseniy, sorry, i don't travel all the informations yet. but why don't
you use the new RB_INT command with irq that i provided in another
thread. the new RB_INT command doesn't depend on the physical RB wires,
it also send the READ status command(0x70) and wait for the irq wake up
completion.
> Arseniy, if the answer to my above question is no, then you should
> expect the nand-rb and reg arrays to be identical. If they are not,
> then you can return -EINVAL.
>
> If the nand-rb property is missing, then fallback to software wait.
>
>> 2) I can't test RB mode - I don't have such device :(
>>
>> Also for example in arasan-nand-controller.c parsed 'nand-rb' values are used
>> in controller specific register for waiting (I guess Meson controller has something
>> like that, but I don't have doc). While in marvell_nand.c it looks like that they parse
>> 'nand-rb' property, but never use it.
>
> Yes, the logic around the second RB line (taking care of CS1/CS3) is
> slightly broken or at least badly documented, and thus should not be
> used.
>
>>> In any case you'll need a dt-binding update which must be acked by
>>> dt-binding maintainers.
>>
>> You mean to add this property desc to Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml ?
>
> Yes. In a dedicated patch. Something along the lines:
>
> nand-rb: true
>
> inside the nand chip object should be fine. And flag the change as a
> fix because we should have used and parsed this property since the
> beginning.
>
> Thanks,
> Miquèl
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