[PATCH v1 1/5] phy: amlogic: during USB PHY clkin obtaining, enable it
Martin Blumenstingl
martin.blumenstingl at googlemail.com
Sun Apr 16 13:54:17 PDT 2023
Hi Dmitry,
On Fri, Apr 14, 2023 at 5:24 PM Dmitry Rokosov <ddrokosov at sberdevices.ru> wrote:
[...]
> - priv->clk = devm_clk_get(dev, "xtal");
> + priv->clk = devm_clk_get_enabled(dev, "xtal");
Generally this works fine but I wouldn't recommend this approach if:
- there's some required wait time after the clock has been enabled
(see phy_meson_g12a_usb2_init - there's already some required wait
time after triggering the reset)
- clock gating (for power saving) is needed when the dwc3 driver is
unloaded by the PHY driver is not
In this case: just manually manage the clock in phy_meson_g12a_usb2_{init,exit}
Best regards,
Martin
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