[PATCH 02/20] arm64: dts: Update cache properties for amlogic

[Pierre Gondois]

Hello Neil,

On 10/31/22 10:51, Neil Armstrong wrote:
> Hi,
> 
> On 31/10/2022 10:19, Pierre Gondois wrote:
>> The DeviceTree Specification v0.3 specifies that the cache node
>> 'compatible' and 'cache-level' properties are 'required'. Cf.
>> s3.8 Multi-level and Shared Cache Nodes
>>
>> The recently added init_of_cache_level() function checks
>> these properties. Add them if missing.
> 
> Is this tied to a bindings change ? Since I'm only in CC to the 02/20 patch,
> I don't have the context here.

It is not tied to a binding change, it is just to align the DTs to the
DeviceTree spec to potentially prepare for having a common DT parsing code.

To avoid cc-ing people to DTs they are not related, the get_maintainers.pl
script was run on each patch individually. The cover-letter is at:
https://lore.kernel.org/all/20221031091848.530938-1-pierre.gondois@arm.com/


> 
> Neil
> 
>>
>> Signed-off-by: Pierre Gondois <pierre.gondois at arm.com>
>> ---
>>    arch/arm64/boot/dts/amlogic/meson-a1.dtsi   | 1 +
>>    arch/arm64/boot/dts/amlogic/meson-axg.dtsi  | 1 +
>>    arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 1 +
>>    arch/arm64/boot/dts/amlogic/meson-g12b.dtsi | 1 +
>>    arch/arm64/boot/dts/amlogic/meson-gx.dtsi   | 1 +
>>    arch/arm64/boot/dts/amlogic/meson-sm1.dtsi  | 1 +
>>    6 files changed, 6 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
>> index b4000cf65a9a..d2f7cb4e5375 100644
>> --- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
>> +++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
>> @@ -36,6 +36,7 @@ cpu1: cpu at 1 {
>>    
>>    		l2: l2-cache0 {
>>    			compatible = "cache";
>> +			cache-level = <2>;
>>    		};
>>    	};
>>    
>> diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
>> index 04f797b5a012..1648e67afbb6 100644
>> --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
>> +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
>> @@ -105,6 +105,7 @@ cpu3: cpu at 3 {
>>    
>>    		l2: l2-cache0 {
>>    			compatible = "cache";
>> +			cache-level = <2>;
>>    		};
>>    	};
>>    
>> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
>> index fb0ab27d1f64..af23d7968181 100644
>> --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
>> +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
>> @@ -50,6 +50,7 @@ cpu3: cpu at 3 {
>>    
>>    		l2: l2-cache0 {
>>    			compatible = "cache";
>> +			cache-level = <2>;
>>    		};
>>    	};
>>    
>> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
>> index ee8fcae9f9f0..9978e619accc 100644
>> --- a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
>> +++ b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
>> @@ -105,6 +105,7 @@ cpu103: cpu at 103 {
>>    
>>    		l2: l2-cache0 {
>>    			compatible = "cache";
>> +			cache-level = <2>;
>>    		};
>>    	};
>>    };
>> diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
>> index 023a52005494..e3c12e0be99d 100644
>> --- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
>> +++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
>> @@ -132,6 +132,7 @@ cpu3: cpu at 3 {
>>    
>>    		l2: l2-cache0 {
>>    			compatible = "cache";
>> +			cache-level = <2>;
>>    		};
>>    	};
>>    
>> diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
>> index 80737731af3f..d845eb19d93d 100644
>> --- a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
>> +++ b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
>> @@ -88,6 +88,7 @@ cpu3: cpu at 3 {
>>    
>>    		l2: l2-cache0 {
>>    			compatible = "cache";
>> +			cache-level = <2>;
>>    		};
>>    	};
>>    
>