[PATCH v4 2/4] spi: meson-spicc: Use pinctrl to drive CLK line when idle

[Martin Blumenstingl]

On Fri, Oct 21, 2022 at 3:31 PM Amjad Ouled-Ameur
<aouledameur at baylibre.com> wrote:
>
> Between SPI transactions, all SPI pins are in HiZ state. When using the SS
> signal from the SPICC controller it's not an issue because when the
> transaction resumes all pins come back to the right state at the same time
> as SS.
>
> The problem is when we use CS as a GPIO. In fact, between the GPIO CS
> state change and SPI pins state change from idle, you can have a missing or
> spurious clock transition.
>
> Set a bias on the clock depending on the clock polarity requested before CS
> goes active, by passing a special "idle-low" and "idle-high" pinctrl state
> and setting the right state at a start of a message
>
> Reported-by: Da Xue <da at libre.computer>
> Signed-off-by: Neil Armstrong <narmstrong at baylibre.com>
> Signed-off-by: Amjad Ouled-Ameur <aouledameur at baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl at googlemail.com>