Meson GXL and Rockchip PHY based on same IP?

[Da Xue]

On Sat, Jul 30, 2022 at 3:31 PM Heiner Kallweit <hkallweit1 at gmail.com> wrote:
>
> On 30.07.2022 19:06, Martin Blumenstingl wrote:
> > Hi Heiner,
> >
> > On Sat, Jul 30, 2022 at 5:59 PM Heiner Kallweit <hkallweit1 at gmail.com> wrote:
> >>
> >> Meson GXL and Rockchip ethernet PHY drivers have quite something in common.
> >> They share a number of non-standard registers, using the same bits
> >> and same bank handling. This makes me think they they may be using
> >> the same IP. However they have different quirk handling. But this
> >> doesn't rule out that actually they would need the same quirk handling.
> > You made me curious and I found the following public Microchip
> > LAN83C185 datasheet: [0]
> > Page 27 has a "SMI REGISTER MAPPING" which matches the definitions in
> > meson-gxl.c.
> > Also on page 33 the interrupt source bits are a 100% match with the
> > INTSRC_* marcos in meson-gxl.c
> >
> Great, thanks for investigating!
>
> > Whether this means that:
> > - Amlogic SoCs embed a LAN83C185
> > - LAN83C185 is based on the same IP core (possibly not even designed
> > by Amlogic or SMSC)
> > - the SMI interface design is something that one hardware engineer
> > brought from one company to another
> > - ...something else
> > is something I can't tell

Per Jerome, both are OmniPHY IP.


> >
> >
> > Best regards,
> > Martin
> >
> >
> > [0] https://ww1.microchip.com/downloads/en/DeviceDoc/LAN83C185-Data-Sheet-DS00002808A.pdf
>
>
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