[PATCH] fix green/pink color distortion from HDR set during vendor Uboot
Neil Armstrong
narmstrong at baylibre.com
Mon Apr 19 15:50:31 BST 2021
Hi,
Thanks for looking at this !
The subject should be :
"drm/meson: fix green/pink color distortion from HDR set during vendor Uboot"
On 19/04/2021 16:33, Mathias Steiger wrote:
>
> I also wrote a program to set this via /dev/mem from user space: https://github.com/ballerburg9005/android-tvbox-2-linux-pc-and-server/blob/main/fix_greenpink.c .
>
>
Please explicit here what the patch does, no need for the example program, the patch is self explicit.
Then add:
Fixes: 728883948b0d ("drm/meson: Add G12A Support for VIU setup")
Finally, it also needs your sign-off at the end of your commit message, simply commit with "-s".
>
> diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c
> index 453d8b4c5..7d929b5b2 100644
> --- a/drivers/gpu/drm/meson/meson_drv.c
> +++ b/drivers/gpu/drm/meson/meson_drv.c
> @@ -308,6 +308,10 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
> drm->mode_config.funcs = &meson_mode_config_funcs;
> drm->mode_config.helper_private = &meson_mode_config_helpers;
>
> + /* undo settings made in vendor Uboot */
> +
> + writel_bits_relaxed(15 << 13, 0, priv->io_base + _REG(OSD1_HDR2_CTRL)); // fixes green/pink color distortion - reg_only_mat must be 0
> +
This should go in meson_viu.c in meson_viu_init right after meson_viu_set_g12a_osd1_matrix() for
VPU_COMPATIBLE_G12A (extend the else if case).
Please document the bits your write in meson_registers.h like:
#define OSD1_HDR2_CTRL_VDIN0_HDR2_TOP_EN BIT(13)
and same for bits mat_o_en and reg_out_fmt, then use them in writel_bits_relaxed()
> /* Hardware Initialization */
>
> meson_vpu_init(priv);
> diff --git a/drivers/gpu/drm/meson/meson_registers.h b/drivers/gpu/drm/meson/meson_registers.h
> index 446e7961d..91351f9a3 100644
> --- a/drivers/gpu/drm/meson/meson_registers.h
> +++ b/drivers/gpu/drm/meson/meson_registers.h
> @@ -634,6 +634,9 @@
> #define VPP_WRAP_OSD3_MATRIX_PRE_OFFSET2 0x3dbc
> #define VPP_WRAP_OSD3_MATRIX_EN_CTRL 0x3dbd
>
> +/* osd1 HDR */
> +#define OSD1_HDR2_CTRL 0x38a0
> +
> /* osd2 scaler */
> #define OSD2_VSC_PHASE_STEP 0x3d00
> #define OSD2_VSC_INI_PHASE 0x3d01
>
This part will be ok with the bits defined.
>
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Neil
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