[PATCH 1/5] iommu/io-pgtable-arm: Add BROKEN_NS quirk to disable shareability on ARM LPAE

Neil Armstrong narmstrong at baylibre.com
Wed Sep 9 08:27:57 EDT 2020


On 09/09/2020 14:23, Steven Price wrote:
> Subject: s/BROKEN_NS/BROKEN_SH/

Thanks,
Neil

> 
> Steve
> 
> On 08/09/2020 16:18, Neil Armstrong wrote:
>> The coherency integration of the IOMMU in the Mali-G52 found in the Amlogic G12B SoCs
>> is broken and leads to constant and random faults from the IOMMU.
>>
>> Disabling shareability completely fixes the issue.
>>
>> Signed-off-by: Neil Armstrong <narmstrong at baylibre.com>
>> ---
>>   drivers/iommu/io-pgtable-arm.c | 7 ++++---
>>   include/linux/io-pgtable.h     | 4 ++++
>>   2 files changed, 8 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c
>> index dc7bcf858b6d..d2d48dc86556 100644
>> --- a/drivers/iommu/io-pgtable-arm.c
>> +++ b/drivers/iommu/io-pgtable-arm.c
>> @@ -440,7 +440,9 @@ static arm_lpae_iopte arm_lpae_prot_to_pte(struct arm_lpae_io_pgtable *data,
>>                   << ARM_LPAE_PTE_ATTRINDX_SHIFT);
>>       }
>>   -    if (prot & IOMMU_CACHE)
>> +    if (data->iop.cfg.quirks & IO_PGTABLE_QUIRK_ARM_BROKEN_SH)
>> +        pte |= ARM_LPAE_PTE_SH_NS;
>> +    else if (prot & IOMMU_CACHE)
>>           pte |= ARM_LPAE_PTE_SH_IS;
>>       else
>>           pte |= ARM_LPAE_PTE_SH_OS;
>> @@ -1005,8 +1007,7 @@ arm_mali_lpae_alloc_pgtable(struct io_pgtable_cfg *cfg, void *cookie)
>>   {
>>       struct arm_lpae_io_pgtable *data;
>>   -    /* No quirks for Mali (hopefully) */
>> -    if (cfg->quirks)
>> +    if (cfg->quirks & ~(IO_PGTABLE_QUIRK_ARM_BROKEN_SH))
>>           return NULL;
>>         if (cfg->ias > 48 || cfg->oas > 40)
>> diff --git a/include/linux/io-pgtable.h b/include/linux/io-pgtable.h
>> index 23285ba645db..efb9c8f20909 100644
>> --- a/include/linux/io-pgtable.h
>> +++ b/include/linux/io-pgtable.h
>> @@ -86,6 +86,9 @@ struct io_pgtable_cfg {
>>        *
>>        * IO_PGTABLE_QUIRK_ARM_TTBR1: (ARM LPAE format) Configure the table
>>        *    for use in the upper half of a split address space.
>> +     *
>> +     * IO_PGTABLE_QUIRK_ARM_BROKEN_SH: (ARM LPAE format) Disables shareability
>> +     *    when coherency integration is broken.
>>        */
>>       #define IO_PGTABLE_QUIRK_ARM_NS        BIT(0)
>>       #define IO_PGTABLE_QUIRK_NO_PERMS    BIT(1)
>> @@ -93,6 +96,7 @@ struct io_pgtable_cfg {
>>       #define IO_PGTABLE_QUIRK_ARM_MTK_EXT    BIT(3)
>>       #define IO_PGTABLE_QUIRK_NON_STRICT    BIT(4)
>>       #define IO_PGTABLE_QUIRK_ARM_TTBR1    BIT(5)
>> +    #define IO_PGTABLE_QUIRK_ARM_BROKEN_SH    BIT(6)
>>       unsigned long            quirks;
>>       unsigned long            pgsize_bitmap;
>>       unsigned int            ias;
>>
> 




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