Reset controller on the Amlogic SoC board.

[Anand Moon]

Hi Neil,

On Thu, 23 Jul 2020 at 21:12, Neil Armstrong <narmstrong at baylibre.com> wrote:
>
> Hi,
>
> On 23/07/2020 17:14, Anand Moon wrote:
> > Hi Neil,
> >
> > On Thu, 23 Jul 2020 at 18:36, Neil Armstrong <narmstrong at baylibre.com> wrote:
> >>
> >> Hi Anand,
> >>
> >> On 23/07/2020 12:49, Anand Moon wrote:
> >>> Hi Neil / Martin / Jerome / Kevin.
> >>>
> >>> I am a bit investigating the reset controller for the Amlogic SoC board.
> >>> Each of thes reset controllers have different reset IP features.
> >>> So we should map the reset controller to appropriate IP nodes
> >>> in the DTS to make this work.
> >>
> >> Correct support is already done for Meson8/8b/GXL/GXBB/G12A/A1.
> >>
> >> Can you specify which features are missing ?
> >
> > Yes, the reset controller is working fine.
> > Currently we have only one reset controller _reset-controller at 1004_
> >
> > But what observation is that we could have different reset controller
>
> Sorry I don't see any good reasons for that, it's a single reset controller
> with multiple lines split over 8 registers.
>
> You are free to do the work and submit the changes, but it will break the current
> bindings and offer no changes or new features over the actual design.
>
> Neil
>

Thank you for your comments.
Ok I got your point.

-Anand