[PATCH v2 2/2] soc: amlogic: ee-pwrc: ensure driver state maches HW state
jbrunet at baylibre.com
Mon Sep 30 01:22:28 PDT 2019
On Fri 27 Sep 2019 at 08:37, Neil Armstrong <narmstrong at baylibre.com> wrote:
> On 26/09/2019 21:08, Kevin Hilman wrote:
>> Neil Armstrong <narmstrong at baylibre.com> writes:
>>> On 25/09/2019 23:35, Kevin Hilman wrote:
>>>> From: Kevin Hilman <khilman at baylibre.com>
>>>> During init, ensure that the driver on/off state as well as clock and
>>>> reset state matches the hardware state. Do this by always calling the
>>>> drivers 'on' function, and then callling the 'off' function if the
>>>> HW state was initially detected as off.
>>> I don't see what you are trying to solve except simplifying the code.
>> Simplifying the code is a worthwhile goal on its own, but that's not the
>> only thing I'm tring to accomplish.
> I still find it ugly to power_on a domain to power it off right afterwards.
> The issue is with the CCF enable handling which is not in sync with the
> HW, if you boot with an already enabled clock, it won't be marked enabled
> in CCF, and it's clearly bad when you want to have a fine-tuned gate state
CCF should disable unused clock so, in theory, you should not have to
call enable() then disable() to get things in sync.
I suppose the clock in question has the flag CLK_IGNORE_UNUSED (one of
the gates) ?
If the CLK_INGORE_UNUSED is becoming a problem, it would be better to
fix the clock tree rather than adding quirks in consumers.
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