[PATCH v6 5/7] arm64: dts: amlogic: g12a: add cooling properties

Neil Armstrong narmstrong at baylibre.com
Mon Sep 30 01:19:29 PDT 2019


On 27/09/2019 20:43, Guillaume La Roque wrote:
> Add missing #colling-cells field for G12A SoC
> Add cooling-map for passive and hot trip point
> 
> Tested-by: Christian Hewitt <christianshewitt at gmail.com>
> Tested-by: Kevin Hilman <khilman at baylibre.com>
> Signed-off-by: Guillaume La Roque <glaroque at baylibre.com>
> ---
>  arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 24 +++++++++++++++++++++
>  1 file changed, 24 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
> index 733a9d46fc4b..3ab6497548ca 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
> @@ -18,6 +18,7 @@
>  			reg = <0x0 0x0>;
>  			enable-method = "psci";
>  			next-level-cache = <&l2>;
> +			#cooling-cells = <2>;
>  		};
>  
>  		cpu1: cpu at 1 {
> @@ -26,6 +27,7 @@
>  			reg = <0x0 0x1>;
>  			enable-method = "psci";
>  			next-level-cache = <&l2>;
> +			#cooling-cells = <2>;
>  		};
>  
>  		cpu2: cpu at 2 {
> @@ -34,6 +36,7 @@
>  			reg = <0x0 0x2>;
>  			enable-method = "psci";
>  			next-level-cache = <&l2>;
> +			#cooling-cells = <2>;
>  		};
>  
>  		cpu3: cpu at 3 {
> @@ -42,6 +45,7 @@
>  			reg = <0x0 0x3>;
>  			enable-method = "psci";
>  			next-level-cache = <&l2>;
> +			#cooling-cells = <2>;
>  		};
>  
>  		l2: l2-cache0 {
> @@ -113,3 +117,23 @@
>  &sd_emmc_a {
>  	amlogic,dram-access-quirk;
>  };
> +
> +&cpu_thermal {
> +	cooling-maps {
> +		map0 {
> +			trip = <&cpu_passive>;
> +			cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +					<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +					<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +					<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +		};
> +
> +		map1 {
> +			trip = <&cpu_hot>;
> +			cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +					<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +					<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +					<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +		};
> +	};
> +};
> 

Reviewed-by: Neil Armstrong <narmstrong at baylibre.com>



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