[PATCH 1/3] clk: meson: add DT documentation for emmc clock controller

Yixun Lan yixun.lan at amlogic.com
Tue Jul 3 07:57:14 PDT 2018


Document the EMMC sub clock controller driver, the potential consumer
of this driver is EMMC or NAND.

Signed-off-by: Yixun Lan <yixun.lan at amlogic.com>
---
 .../bindings/clock/amlogic,emmc-clkc.txt      | 45 +++++++++++++++++++
 1 file changed, 45 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/amlogic,emmc-clkc.txt

diff --git a/Documentation/devicetree/bindings/clock/amlogic,emmc-clkc.txt b/Documentation/devicetree/bindings/clock/amlogic,emmc-clkc.txt
new file mode 100644
index 000000000000..5534bd446363
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/amlogic,emmc-clkc.txt
@@ -0,0 +1,45 @@
+* Amlogic EMMC Sub Clock Controller Driver
+
+The Amlogic EMMC clock controller generates and supplies clock to support
+EMMC and NAND controller
+
+Required Properties:
+
+- compatible: should be:
+		"amlogic,emmc-clkc"
+
+- #clock-cells: should be 1.
+
+Two clocks are provided as the parent of this EMMC clock controller driver from
+upper layer clock controller - eg "amlogic,axg-clkc" in AXG platfrom.
+The main consumer of this driver is EMMC or NAND, to specify which the clock
+they may consume, the preprocessor macros in the dt-bindings/clock/emmc-clkc.h
+header and can be used in device tree sources.
+
+Parent node should have the following properties :
+- compatible: "syscon", "simple-mfd, and "amlogic,emmc-clkc"
+- reg: base address and size of the EMMC control register space.
+
+Example: Clock controller node:
+
+sd_emmc_c_clkc: clock-controller at 7000 {
+	compatible = "amlogic,emmc-clkc", "syscon", "simple-mfd";
+	reg = <0x0 0x7000 0x0 0x4>;
+	#clock-cells = <1>;
+
+	clock-names = "clkin0", "clkin1";
+	clocks = <&clkc CLKID_SD_EMMC_C_CLK0>,
+			<&clkc CLKID_FCLK_DIV2>;
+};
+
+Example: NAND controller node that consumes the clock generated by the clock
+  controller:
+
+	nand: nfc at 7800 {
+		compatible = "amlogic,meson-axg-nfc";
+		reg = <0x0 0x7800 0x0 0x100>;
+		interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
+		clocks = <&clkc CLKID_SD_EMMC_C>,
+				<&sd_emmc_c_clkc CLKID_EMMC_C_DIV>;
+		clock-names = "core", "device";
+	};
-- 
2.18.0




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